JP2007173750A - Semiconductor device, and method of manufacturing same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which can be miniaturized and thinned by having a functional element or a light-emitting and/or light-receiving element having an oscillator or a movable part on a functional side to be packaged. <P>SOLUTION: With respect to a first substrate 10 having an electronic element 11 including the functional element or the light-emitting element and/or the light-receiving element having the oscillator or the movable part on one side, on its one side, a second substrate 20 is stuck so as to cover the electronic element with a gap from the electronic element, and a piercing wiring 14 is formed so as to be connected with the electronic element 11 through the first substrate 10. On the other side of first substrate 10, insulators (30, 34 and 37) are formed. In the insulators (30, 34 and 37), wiring layers (31, 35 and 36) are embedded and formed while they are connected with the piercing wiring 14, and a bump 38 is formed projecting on the surface of the insulators while it is connected with the wiring layers (31, 35 and 36). <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and in particular, a movable part or a functional part such as a MEMS (Micro Electro Mechanical Systems), a SAW (Surface Acoustic Wave) element, or an F-BAR (Thin Film Bulk Acoustic Wave Resonators). The present invention relates to a semiconductor device having a functional element having a vibrator, a light emitting element such as a light emitting diode or a photodiode, and / or a light receiving element, and a manufacturing method thereof.

  In recent years, mobile devices typified by mobile phones and personal computers have been reduced in size and weight, and have increased functionality and functionality, and the components and substrates that make up these devices have been similarly reduced in size, thickness, and weight. High-density mounting is progressing. In addition, regarding the mounting of devices such as semiconductors, a module package that incorporates multiple semiconductor chips, passive components, and other functional devices instead of a single semiconductor chip package as the mounting area becomes smaller and the transmission signal speed increases. Many have been proposed.

As a conventional module package, for example, a semiconductor chip, a chip component, a hollow ceramic package, or the like is mounted on both sides of a module substrate.
Each material and part has been downsized year by year, and the entire module has been downsized. However, as long as this structure is adopted, there is a limit to downsizing the package size.

  For example, in the case of a micro device having a movable part or a vibrator on a functional surface such as a MEMS (Micro Electro Mechanical Systems), a SAW (Surface Acoustic Wave) element, or an F-BAR (Thin Film Bulk Acoustic Wave Resonators) Can not be covered with a sealing material or the like, a package structure is hermetically sealed using a substrate such as ceramic, metal, or glass.

For example, in Patent Document 1, a semiconductor chip provided with a microdevice having a vibrator or a movable portion on a functional surface is mounted on a hollow portion in a wiring board in which an insulating layer and a wiring layer are laminated, A hydrophobic material film is formed on the inner surface of the hollow portion so as to cover the surface of the insulating layer exposed in the hollow portion and the boundary between the insulating layer and the wiring layer on the inner surface of the hollow portion, and the upper surface of the hollow portion is covered with a metal film. An element-embedded substrate is disclosed.
The hollow portion is held in, for example, a vacuum, a reduced pressure, a reducing atmosphere, or an inert gas atmosphere.

  However, in the structure shown in Patent Document 1, in order to accommodate the semiconductor chip smoothly, it is necessary to make the hollow portion considerably larger than the size of the semiconductor chip. Therefore, the module or the semiconductor device incorporating the micro device is required. There is a disadvantage that the size and thickness are increased, and a hollow substrate for forming a hollow portion such as a ceramic substrate or a resin substrate for hermetically sealing the microdevice is necessary in manufacturing. There is a disadvantage that there are many manufacturing processes.

Patent Document 2 describes a configuration and a manufacturing method of a semiconductor device called a system in package (SIP) in which an MIM capacitor or the like is formed, and Patent Documents 3 and 4 describe a wafer by wafer bonding. A method for hermetically sealing with a level package is described.
JP 2004-179573 A JP 2005-5548 A JP 2001-68616 A JP 2004-80221 A

  An object of the present invention is packaged with a functional element such as a MEMS, SAW element or F-BAR having a vibrator or a movable part, or a light emitting element and / or a light receiving element such as a light emitting diode or a photodiode. Another object of the present invention is to provide a semiconductor device that can be reduced in size and thickness and a manufacturing method thereof.

  In order to solve the above problems, a semiconductor device of the present invention includes a first substrate on which a functional element having a vibrator or a movable portion or a light emitting element and / or an electronic element including a light receiving element is formed on one surface; A second substrate bonded on the one surface of the first substrate so as to cover the electronic element with a gap from the electronic element, and connected to the electronic element through the first substrate; A through wiring formed on the other surface of the first substrate; a wiring layer embedded in the insulating layer and connected to the through wiring; and the wiring layer And bumps formed on the surface of the insulating layer in a convex manner.

The above-described semiconductor device of the present invention has one surface with respect to a first substrate on which a functional element having a vibrator or a movable part or an electronic element including a light-emitting element and / or a light-receiving element is formed on one surface. A second substrate is bonded to the electronic device so as to cover the electronic device with a gap from the electronic device.
Further, a through wiring is formed so as to penetrate the first substrate and connect to the electronic element, and an insulating layer is formed on the other surface of the first substrate.
Further, the insulating layer is formed by being connected to the through wiring and embedded in the wiring layer, and has a bump formed on the surface of the insulating layer so as to be connected to the wiring layer.

  In order to solve the above-described problems, the semiconductor device manufacturing method according to the present invention includes a functional element having a vibrator or a movable portion on one surface, or an electronic element including a light emitting element and / or a light receiving element. Bonding a second substrate on the one surface of the first substrate and on the one surface of the first substrate so as to cover the electronic element with a gap from the electronic element; Forming a through wiring so as to penetrate through one substrate and connect to the electronic element; and forming an insulating layer on the other surface of the first substrate and embedding the insulating layer in the through wiring; Forming a wiring layer so as to be connected; and connecting the wiring layer and forming a bump on the surface of the insulating layer.

In the method of manufacturing a semiconductor device according to the present invention, first, a functional element having a vibrator or a movable part on one surface or a light emitting element and / or an electronic element including a light receiving element is formed. A second substrate is bonded onto the surface so as to cover the electronic element with a gap from the electronic element.
Next, a through wiring is formed so as to penetrate the first substrate and connect to the electronic element.
Next, an insulating layer is formed on the other surface of the first substrate, embedded in the insulating layer, and a wiring layer is formed so as to be connected to the through wiring.
Next, bumps are formed on the surface of the insulating layer so as to be connected to the wiring layer.

  In the semiconductor device of the present invention, a first substrate and a second substrate are stacked and mounted with a gap, and similarly to the above, a vibrator or a movable part is provided on a functional surface such as a MEMS, SAW element, or F-BAR. A functional element or a light-emitting element and / or a light-receiving element such as a light-emitting diode and a photodiode are packaged, and can be reduced in size and thickness.

  In the method for manufacturing a semiconductor device of the present invention, the first substrate and the second substrate are laminated and bonded together with a gap, and similarly to the above, a vibrator or a movable member is provided on a functional surface such as a MEMS, SAW element, or F-BAR. A semiconductor device having a functional element having a portion or a light emitting element such as a light emitting diode or a photodiode and / or a light receiving element can be packaged and manufactured by making it smaller and thinner.

  Embodiments of a semiconductor device and a manufacturing method thereof according to the present invention will be described below with reference to the drawings.

First Embodiment FIG. 1 is a schematic cross-sectional view of a semiconductor device according to this embodiment.
For example, an electronic element 11 such as a functional element having a vibrator or a movable part on a functional surface such as a MEMS, SAW element, or F-BAR is formed on one surface of a first substrate 10 made of a silicon semiconductor. The element wiring 12 connected to is formed.
A through opening 13 reaching the element wiring 12 from the other surface of the first substrate 10 is opened, and a through wiring 14 is formed on the other surface of the first substrate 10 by embedding the through opening 13.

On the surface of the first substrate 10 on which the electronic element 11 is formed, for example, the second substrate 20 is covered with a gold-plated seal ring so as to cover the electronic element 11 with a gap from the electronic element 11. It seals and seals by the sealing material S which becomes.
Here, for example, a hermetically sealed hollow portion V is formed with the formation surface of the electronic element 11 of the first substrate 10 and the surface of the second substrate 20 as the inner wall surface, and the hollow portion V is, for example, a vacuum , Reduced pressure, reducing atmosphere, or inert gas atmosphere.
Further, for example, a recess 21 is formed on the surface of the second substrate 20 on the first substrate 10 side to widen the gap between the surface of the electronic element 11 and the second substrate 20.

On the other surface of the first substrate 10, for example, an electrical resistance element 15 and a capacitor 16 are formed in connection with the through wiring 14. As the capacitor 16, for example, an MIM capacitor described in Patent Document 2 is formed.
Further, for example, a first insulating layer 30 made of an insulating resin is formed on the entire surface so as to cover the through wiring 14, the electric resistance element 15, and the capacitor 16.
The first insulating layer 30 has a first wiring opening that reaches the through wiring 14, the electric resistance element 15, the capacitor 16, and the like, and is embedded to fill the through wiring 14, the electric resistance element 15, and the capacitor 16. A first wiring 31 made of a conductor such as copper in which a plug and a wiring portion connected to each other are integrated is formed. A part of the first wiring 31 has a pattern constituting an inductor.
As described above, passive elements (first electronic circuits) such as the electric resistance element 15, the capacitor 16, and the inductor are formed on the other surface of the first substrate 10.

  The semiconductor chip 33a and the passive element integrated device 33b are mounted on the upper layer (face up) of the first wiring 31 via an adhesive layer 32 such as a die attach film. For example, active elements such as switching transistors are formed on the semiconductor chip, and passive elements such as electric resistance elements, capacitors, and inductors are integrated and formed on the passive element integrated device 33b.

Further, for example, a second insulating layer 34 made of an insulating resin is formed on the entire surface so as to cover the first wiring 31, the semiconductor chip 33a, and the passive element integrated device 33b.
In the second insulating layer 34, for example, second wiring openings reaching the first wiring 31, the pad electrode of the semiconductor chip 33a, the passive element integrated device 33b, and the like are opened. A second wiring 35 made of a conductor such as copper in which a wiring connected to a plug connected to the pad wiring of the first wiring 31, the semiconductor chip 33a, and the passive element integrated device 33b is integrated.

Further, for example, a conductive post 36 is formed on the upper layer of the second wiring 35, and a buffer layer 37 is formed on the second insulating layer 34 so as to embed the outer peripheral portion of the conductive post.
Further, for example, the top of the conductive post 36 is exposed from the buffer layer 37, and bumps 38 made of solder balls or the like are formed so as to protrude from the surface of the buffer layer 37.
As described above, the insulating layer composed of the first insulating layer 30, the second insulating layer 34, the buffer layer 37, and the like is formed on the other surface of the first substrate, and the through wiring is formed in the insulating layer. 14, a wiring layer including a first wiring 31, a first wiring 35, and a conductive post 36 is embedded and formed.

FIG. 2A is a plan view of the first substrate 10 on the electronic element forming surface side, and FIG. 2B is a plan view of the second substrate 20 on the side opposite to the surface facing the first substrate.
On one surface of the first substrate 10, for example, electronic elements (11a, 11b, 11c) such as MEMS, SAW elements, or F-BAR are laid out according to the size of each element, and surround the outer periphery thereof. The sealing material S is formed.
The second substrate 20 has a recess 21 on the side facing the first substrate 10.

FIG. 3A is a cross-sectional view of an example of the F-BAR in which a vibrator is formed in the electronic element 11 described above.
For example, an elastic resonance film made of a laminate of a lower electrode 42, a piezoelectric film 43, and an upper electrode 44 is formed on the substrate 40 via a gap 41 that constitutes a predetermined resonance region.
The lower electrode 42 and the upper electrode 44 are made of a conductive material such as Al, Pt, Au, Cu, W, Mo, and Ti, and are formed with a film thickness of 0.1 to 0.5 μm, for example.
The piezoelectric film 43 is made of a piezoelectric material such as aluminum nitride or zinc oxide, is a dense film highly oriented in the c-axis, and has excellent piezoelectric characteristics and elastic characteristics. The film thickness is 5 μm or less.
The gap 41 is supported by a leg formed by bending at the end of the lower electrode 42, and the height of the gap 41 is, for example, about several μm.
The film thickness of the lower electrode 42, the upper electrode 44, and the piezoelectric film 43, the height of the gap 41, and the like can be appropriately adjusted according to the resonance frequency.
Moreover, FIG.3 (b) is sectional drawing of an example of said MEMS. For example, the MEMS structure 46 which has a movable part is formed in the board | substrate 45, and MEMS is comprised.

  In the semiconductor device according to the present embodiment, the first substrate and the second substrate are stacked and bonded with a gap, and a vibrator or a movable portion is provided on a functional surface such as a MEMS, SAW element, or F-BAR. It is packaged with functional elements that have a hollow structure that holds the functional elements in a predetermined atmosphere by stacking the first substrate and the second substrate, and can be reduced in size and thickness is there.

Next, a method for manufacturing the semiconductor device of the present embodiment will be described.
First, as shown in FIG. 4A, for example, a functional element having a vibrator or a movable part on a functional surface such as a MEMS, SAW element, or F-BAR on one surface of a first substrate 10 made of a silicon semiconductor. And the like, and the element wiring 12 connected to the electronic element 11 is formed. Further forming a sealing material S ₁₀ made of gold-plated seal ring bonded area of the second substrate.
On the other hand, a recess 21 is formed in the second substrate 20 made of a silicon semiconductor to widen the gap between the surface of the electronic element 11 and the second substrate 20 when bonded to the first substrate 10. In the second substrate 20 side, to form a sealing material S ₂₀ made of gold-plated seal ring bonded area of the first substrate.

Next, as shown in FIG. 4 (b), for example, bonded to the sealing material _{S 10} of the first substrate 10 and the sealing material _{S 20} of the second substrate 20, an electronic device 11 formed of a first substrate On the surface, the second substrate 20 is bonded from the concave 21 formation surface side so as to cover the electronic element 11 with a gap from the electronic element 11.
In the above, the first substrate 10 and the second substrate 20 are bonded together by hermetically sealing with the sealing material S formed by bonding the sealing material S ₁₀ and the sealing material S ₂₀ , thereby forming the first substrate 10. A hermetically sealed hollow portion V is formed with the formation surface of the electronic element 11 and the surface of the second substrate 20 as the inner wall surface.
Here, the step of forming the hollow portion V so that the hollow portion V is maintained in a vacuum, reduced pressure, reducing atmosphere, or inert gas atmosphere is performed in a vacuum, reduced pressure, reducing atmosphere, or inert gas atmosphere. Do it below.
When bonding the substrates as described above at the wafer level, the methods described in Patent Documents 3 and 4 can be preferably used.

  Next, as shown in FIG. 5A, for example, the first substrate 10 is thinly processed by polishing from the back surface side of the electronic element 11 formation surface of the first substrate 10.

Next, as shown in FIG. 5B, for example, a resist film having a pattern that opens a region that becomes an opening reaching the element wiring 12 is formed, and an etching process such as wet etching is performed to form the first substrate. 10, a through opening 13 reaching the element wiring 12 is formed.
For example, the through opening 13 is formed so as to have a forward taper shape with a larger opening diameter toward the upper side of the opening.

  Next, as illustrated in FIG. 6A, for example, the through-opening 13 is embedded, and the through-wiring 14 is patterned on the other surface of the first substrate 10. Although the through opening 13 is completely embedded in the drawing, it may be formed of a conductive layer that covers the inner wall surface of the through opening 13. However, from the viewpoint of flattening the substrate, it is preferable to completely embed as shown in the figure, and it can be easily embedded by making the through opening 13 a forward tapered shape as described above.

  Next, as illustrated in FIG. 6B, for example, the electrical resistance element 15 and the capacitor 16 are formed by connecting to the through wiring 14. For example, the capacitor 16 can be formed by the MIM capacitor forming method described in Patent Document 2.

  Next, as shown in FIG. 7 (a), for example, the through wiring 14, the electric resistance element 15 and the capacitor 16 are covered by spin coating or bonding, and the entire surface is covered with polyimide resin, epoxy resin, BCB (benzoic acid). A first insulating layer 30 made of a photosensitive resin such as cyclobutene resin is formed.

  Next, as illustrated in FIG. 7B, for example, the first insulating layer 30 is exposed and developed with a pattern that opens the first wiring opening, and the through wiring 14 and the electric resistance element 15 are processed. The first wiring opening 30p reaching the capacitor 16 and the like is opened.

Next, as shown in FIG. 8A, for example, a seed layer (not shown) is formed on the entire surface so as to cover the inner wall of the first wiring opening 30p by sputtering or the like. A resist film (not shown) having an opening pattern is patterned, and an electroplating process or the like using the seed layer as one electrode is performed to fill the first wiring opening 30p. A first wiring 31 made of a conductor such as copper in which a plug connected to the capacitor 16 or the like and a wiring portion are integrated is formed. Here, a part of the first wiring 31 is patterned so as to constitute an inductor.
Thereafter, the resist film is removed, and the exposed seed layer is removed using the first wiring 31 as a mask.

As described above, in this embodiment, for example, an MIM capacitor as described in Patent Document 2 is formed, and the first wiring and the like constituting the rewiring are patterned to form a spiral inductor or the like.
Usually, the passive components are a plurality of 1005 or 0603 size chip components soldered and mounted on the module substrate by a dozen to several tens. However, in this embodiment, all of them are built on the first substrate of silicon. In addition, it is not necessary to provide a soldering space or a clearance between components for mounting, and the size of the component itself can be reduced, particularly easily reduced in thickness.

  Next, as shown in FIG. 8B, for example, the semiconductor chip 33a and the passive element integrated device 33b are formed on the first wiring 31 via an adhesive layer 32 such as a die attach film. Mount with the pad electrode side facing up.

  Next, as shown in FIG. 9A, for example, the first wiring 31, the semiconductor chip 33a, and the passive element integrated device 33b are covered by spin coating or bonding, and the entire surface is covered with polyimide resin, epoxy resin, A second insulating layer 34 made of a photosensitive resin such as BCB (benzocyclobutene) resin is formed.

  Next, as shown in FIG. 9B, for example, the second insulating layer 34 is exposed and developed in a pattern in which openings for the second wiring are opened, and the first wiring 31 and the semiconductor chip 33a. The second wiring opening 34p reaching the pad electrode of the passive element integrated device 33b is opened.

Next, as shown in FIG. 10A, for example, a seed layer (not shown) is formed on the entire surface by covering the inner wall of the second wiring opening 34p by sputtering or the like, and a second wiring formation region is formed. A resist film (not shown) having an opening pattern is patterned, and electrolytic plating using the seed layer as one electrode is performed to fill the second wiring opening 34p, and the first wiring 31, the semiconductor chip 33a, and A second wiring 35 made of a conductor such as copper in which a plug connected to the pad electrode of the passive element integrated device 33b and the wiring portion are integrated is formed.
Thereafter, the resist film is removed, but since the seed layer is also used for forming a conductive post in the next step, the portion of the seed layer exposed from the second wiring 35 is not removed.

Next, as shown in FIG. 10B, for example, a resist film (not shown) having a pattern opening the formation region of the conductive post is formed by bonding a photosensitive resin sheet, and the above seed layer is formed. The conductive post 36 is formed in the upper layer of the second wiring by performing an electrolytic plating process using the electrode as one electrode.
Thereafter, the resist film is removed, and further, the exposed seed layer is removed using the second wiring 35 and the conductive post 36 as a mask.

  Next, as shown in FIG. 11A, for example, an insulating resin constituting the buffer layer is supplied, and the outer periphery of the conductive post 36 is embedded to form the buffer layer 37 on the second insulating layer 34. Then, polishing is performed until the top of the conductive post 36 is exposed from the upper surface.

Next, the back surface side of the bonding surface of the second substrate 20 to the first substrate 10 is polished to thin the second substrate 20.
After the above, as shown in FIG. 11B, for example, a bump 38 made of a solder ball or the like is formed on the top surface of the exposed conductive post 36 so as to protrude from the surface of the buffer layer 37. . After performing each of the above steps at the wafer level, the semiconductor device according to the present embodiment shown in FIG. 1 can be manufactured by cutting into each semiconductor device by a dicing process.

  In the method of manufacturing a semiconductor device according to the above-described embodiment, the first substrate and the second substrate are stacked and bonded together with a gap, and a vibrator or movable member is provided on a functional surface such as a MEMS, SAW element, or F-BAR. A semiconductor device having a functional element having a portion is packaged, and a hollow structure that holds the functional element in a predetermined atmosphere can be realized by stacking the first substrate and the second substrate, and the size and thickness can be reduced. Is possible.

In the semiconductor device according to the present embodiment, the second substrate is used as a cap that forms a simple hollow portion, but a passive element or the like may be formed on the second substrate. In this case, a wiring can be separately formed so as to be connected to the passive element formed on the second substrate.
Further, the concave portion of the second substrate is not necessarily required, and may not be formed when a sufficient gap can be secured between the electronic element on the first substrate and the surface of the second substrate.

The module substrate constituting the conventional semiconductor device usually needs a thickness of 200 to 600 μm, but the thickness of the rewiring layer (first wiring and second wiring) of the semiconductor device of this embodiment is about 50 to 100 μm in total. As it is completed, the thickness can be significantly reduced.
Further, since the rewiring can be formed by a wafer process, it can be formed with a fine pattern as compared with a normal substrate wiring pitch, and the area can be reduced in size.

Second Embodiment FIG. 12 is a schematic sectional view of a semiconductor device according to this embodiment.
The structure is substantially the same as that of the semiconductor device according to the first embodiment, but a light emitting diode, a photodiode, other light emitting elements and / or light receiving elements are formed on one surface of the first substrate 10 made of a silicon semiconductor. On the surface of the first substrate 10 on which the electronic element 17 is formed, for example, a light transmission of a glass substrate or the like so as to cover the electronic element 17 with a gap from the electronic element 17. The second substrate 22 made of a protective protective substrate is bonded to the adhesive layer A.
In the above configuration, the hollow portion V may be hermetically sealed, but it is not always necessary, and the adhesive layer A provides a gap between the electronic element 17 on the first substrate 10 and the surface of the second substrate 22. It only has to be secured.

  A semiconductor chip to be mounted is selected from an image sensor control IC, a memory IC, and the like as necessary to form an image sensor module.

13A is a plan view of the first substrate 10 on the electronic element forming surface side, and FIG. 13B is a plan view of the second substrate 22 on the side opposite to the surface facing the first substrate.
On one surface of the first substrate 10, for example, electronic elements (17a, 17b, 17c) such as photodiodes are laid out according to the size of each element, and an adhesive layer A is formed so as to surround the outer periphery thereof. Has been.
Moreover, a glass substrate etc. can be used as the 2nd board | substrate 22, The recessed part currently formed in the 2nd board | substrate of 1st Embodiment is not especially required.

The semiconductor device according to the present embodiment includes, for example, a photodiode formed as the electronic element 17 on one surface of the first substrate 10 and a passive element embedded in the insulating layer (30, 32, 37). A PDIC can be formed from a semiconductor chip or the like, and light can be received through the second substrate 22.
In addition, a light emitting diode or the like is formed as the electronic element 17, and light can be emitted to the outside through the second substrate.

  In the semiconductor device according to the present embodiment, the first substrate and the second substrate are stacked and bonded with a gap, and the package includes a light emitting element and / or a light receiving element such as a light emitting diode and a photodiode. The light emitting element and / or the light receiving element can be protected by the second substrate by stacking the first substrate and the second substrate, and it is necessary to provide a package for protecting these separately. In addition, the semiconductor device can be reduced in size and thickness.

Third Embodiment FIG. 14 is a schematic cross-sectional view of a semiconductor device according to this embodiment.
Although the configuration is substantially the same as that of the semiconductor device according to the first embodiment, an electronic element 23 such as a functional element having a vibrator or a movable portion on the surface of the second substrate 20 on the side to be bonded to the first substrate 10. And an element wiring 24 connected to the second substrate 20 to form a second electronic circuit. The first substrate 10 and the second substrate 20 have the surface on which the electronic element 23 is formed on the second substrate 20. The second electronic circuit is connected to the first electronic circuit of the first substrate 10 by an electrode E which is bonded to constitute the inner wall surface of the hollow portion V and connects the hollow portion V in the vertical direction. The configuration is different.
When the electronic element 23 is a functional element having a vibrator or a movable portion, the hollow portion V is hermetically sealed as in the first embodiment.
The electronic element 23 formed on the second substrate 20 may be a passive element.

15A is a plan view of the first substrate 10 on the electronic element forming surface side, and FIG. 15B is a plan view of the second substrate 20 on the side opposite to the surface facing the first substrate.
On one surface of the first substrate 10, for example, electronic elements (11a, 11b, 11c) such as MEMS, SAW elements, or F-BAR are laid out according to the size of each element, and surround the outer periphery thereof. The sealing material S is formed.
Also, on the bonding surface of the second substrate 20 to the first substrate 10, for example, electronic elements (23a, 23b, 23c) such as MEMS, SAW elements or F-BAR are laid out according to the size of each element. Has been.
Here, for example, the electronic elements (11 a, 11 b) on the first substrate 10 overlap with the electronic elements 23 c on the second substrate 20, and the electronic elements 11 c on the first substrate 10 are on the electronic elements ( 23a, 23b), the first substrate 10 and the second substrate 20 are bonded together.

FIG. 16 is a circuit diagram when the semiconductor device according to the present embodiment is applied to, for example, a mobile phone RF module.
For example, a transmission / reception circuit of three frequency bands of Band A, Band B, and Band C and a switching circuit for driving them are provided. Each of the three transmission / reception circuits includes an F-BAR and the like, and is divided into a transmission circuit and a reception circuit.
Here, for Band A, the transmission circuit is configured to include the electronic element 11 a of the first substrate 10, and the reception circuit is configured to include the electronic element 23 a of the second substrate 20.
For Band B, the transmission circuit is configured to include the electronic element 11 b of the first substrate 10, and the reception circuit is configured to include the electronic element 23 b of the second substrate 20.
For Band C, the transmission circuit includes the electronic element 11 c of the first substrate 10, and the reception circuit includes the electronic element 23 c of the second substrate 20.
The switching circuit is formed on, for example, the semiconductor chip 33a.

  Each transmission / reception circuit is configured as described above, and as shown in the layouts of FIGS. 15A and 15B, the electronic element 11a and the electronic element 23a, the electronic element 11b and the electronic element 23b, the electronic element 11c and the electronic element By arranging 23c so as not to oppose each other, it is possible to drive the circuit while suppressing interference of electromagnetic waves during transmission and reception in any of the transmission / reception circuits of the three frequency bands.

In the semiconductor device according to the present embodiment, the first substrate and the second substrate are stacked and bonded with a gap, and a vibrator or a movable portion is provided on a functional surface such as a MEMS, SAW element, or F-BAR. It is packaged with functional elements, and a hollow structure that holds the functional elements in a predetermined atmosphere can be realized by stacking the first substrate and the second substrate. Is possible.
In particular, by forming an element such as a MEMS, SAW element, or F-BAR that requires a predetermined element area on both the first substrate and the second substrate, the area required for the entire semiconductor device is increased to about half. Can be reduced.

Next, a method for manufacturing the semiconductor device of the present embodiment will be described.
First, as shown in FIG. 17A, for example, a functional element having a vibrator or a movable portion on a functional surface such as a MEMS, SAW element, or F-BAR on one surface of a first substrate 10 made of a silicon semiconductor. And the like, and the element wiring 12 connected to the electronic element 11 is formed. Further, the second to form a sealing material S ₁₀ made of a bonded gold plated seal ring in the region of the substrate, further forming electrodes E to connect vertically hollow portion.
On the other hand, also on the bonding surface of the second substrate 20 made of a silicon semiconductor to the first substrate, an electronic element 23 such as a functional element having a vibrator or a movable part on a functional surface such as a MEMS, SAW element, or F-BAR. And an element wiring 24 connected thereto is formed. Further forming a sealing material S ₂₀ made of gold-plated seal ring bonded area of the first substrate.

Next, as shown in FIG. 17 (b), for example, bonded to the sealing material _{S 10} of the first substrate 10 and the sealing material _{S 20} of the second substrate 20, an electronic device 11 formed of a first substrate On the surface, the electronic element 11 formation surface of the first substrate 10 and the electronic element 23 formation surface of the second substrate 20 are bonded so as to cover the electronic element 11 with a gap from the electronic element 11. In this manner, the first substrate 10 and the second substrate 20 are bonded together by hermetically sealing with the sealing material S formed by joining the sealing material S ₁₀ and the sealing material S _20. A hermetically sealed hollow portion V having the inner surface as the formation surface of the electronic element 11 and the formation surface of the electronic element 23 of the second substrate 20 is configured.
In the above process, the electrodes E formed on the first substrate 10 side are bonded together so as to be connected to the element wiring 24 of the second substrate.
Here, the step of forming the hollow portion V so that the hollow portion V is maintained in a vacuum, reduced pressure, reducing atmosphere, or inert gas atmosphere is performed in a vacuum, reduced pressure, reducing atmosphere, or inert gas atmosphere. Do it below.

  Next, as illustrated in FIG. 18A, for example, the first substrate 10 is thinly processed by polishing from the back surface side of the electronic element 11 formation surface of the first substrate 10.

Next, as shown in FIG. 18B, for example, a resist film having a pattern that opens a region to be an opening reaching the element wiring 12 and the electrode E is formed, and an etching process such as wet etching is performed. A through opening 13 reaching the element wiring 12 and the electrode E is formed in the first substrate 10.
For example, the through opening 13 is formed so as to have a forward taper shape with a larger opening diameter toward the upper side of the opening.
The steps after the above can be performed by the same steps as the method for manufacturing the semiconductor device shown in the first embodiment, whereby the semiconductor device shown in FIG. 14 can be manufactured.

  In the method of manufacturing a semiconductor device according to the above-described embodiment, the first substrate and the second substrate are stacked and bonded together with a gap, and a vibrator or movable member is provided on a functional surface such as a MEMS, SAW element, or F-BAR. A semiconductor device having a functional element having a portion is packaged, and by realizing a hollow structure that holds the functional element in a predetermined atmosphere by stacking the first substrate and the second substrate, the size and thickness can be reduced. Is possible.

According to the above embodiment, the following effects can be enjoyed.
All of these functions can be integrated on the silicon substrate without using members that have been required in the past, such as module substrates, chip parts, and hollow ceramic packages. For this reason, it can be manufactured by using a wafer process, and the module can be greatly reduced in size by high-definition rewiring and element formation.
Further, the entire manufacturing process can be performed in a wafer state, and the manufacturing cost can be suppressed.

The present invention is not limited to the above description.
For example, the number of resin layers and wiring layers incorporated in the resin layer is not limited to the embodiment, and may be any number.
An image receiving element such as a capacitor, an inductor, or an electric resistance element can be appropriately incorporated as necessary. Furthermore, a semiconductor chip on which an active element such as a transistor is formed can be appropriately incorporated.
In addition, various modifications can be made without departing from the scope of the present invention.

The semiconductor device of the present invention can be applied to a packaged semiconductor device having a movable part, a vibrator, a light emitting element, and / or a light receiving element on a functional surface such as a MEMS, SAW element, or F-BAR.
The semiconductor device manufacturing method of the present invention includes a movable part, a vibrator, a light emitting element, and / or a light receiving element on a functional surface such as a MEMS, SAW element, or F-BAR. Applicable to.

FIG. 1 is a schematic cross-sectional view of a semiconductor device according to the first embodiment of the present invention. FIG. 2A is a plan view of the electronic device forming surface side of the first substrate of the semiconductor device according to the first embodiment of the present invention, and FIG. 2B is a surface of the second substrate facing the first substrate. FIG. FIG. 3A is a cross-sectional view of an example of an F-BAR, and FIG. 3B is a cross-sectional view of an example of a MEMS. 4 (a) and 4 (b) are cross-sectional views illustrating manufacturing steps of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. FIGS. 5A and 5B are cross-sectional views illustrating manufacturing steps of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. 6A and 6B are cross-sectional views illustrating the manufacturing process of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. 7A and 7B are cross-sectional views illustrating the manufacturing process of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. FIGS. 8A and 8B are cross-sectional views illustrating manufacturing steps of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. FIGS. 9A and 9B are cross-sectional views illustrating manufacturing steps of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. FIGS. 10A and 10B are cross-sectional views illustrating manufacturing steps of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. FIGS. 11A and 11B are cross-sectional views illustrating manufacturing steps of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. FIG. 12 is a schematic cross-sectional view of a semiconductor device according to the second embodiment of the present invention. FIG. 13A is a plan view of an electronic element forming surface side of the first substrate of the semiconductor device according to the second embodiment of the present invention, and FIG. 13B is a surface of the second substrate facing the first substrate. FIG. FIG. 14 is a schematic cross-sectional view of a semiconductor device according to the third embodiment of the present invention. FIG. 15A is a plan view of the electronic device forming surface side of the first substrate of the semiconductor device according to the third embodiment of the present invention, and FIG. 15B is a surface of the second substrate facing the first substrate. FIG. FIG. 16 is a circuit diagram of an RF module for a mobile phone that can be configured by the semiconductor device of the third embodiment. FIGS. 17A and 17B are cross-sectional views illustrating manufacturing steps of a method for manufacturing a semiconductor device according to the third embodiment of the present invention. 18A and 18B are cross-sectional views illustrating the manufacturing steps of the method for manufacturing a semiconductor device according to the third embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... 1st board | substrate, 11, 11a, 11b, 11c ... Electronic element, 12 ... Element wiring, 13 ... Through-opening part, 14 ... Through wiring, 15 ... Electrical resistance element, 16 ... Capacitor, 17 ... Electronic element, 20 ... 2nd board | substrate, 21 ... recessed part, 22 ... 2nd board | substrate, 23, 23a, 23b, 23c ... electronic element, 24 ... element wiring, 30 ... 1st insulating layer, 31 ... 1st wiring, 32 ... adhesion layer, 33a ... Semiconductor chip, 33b ... passive element integrated device, 34 ... second insulating layer, 35 ... second wiring, 36 ... conductive post, 37 ... buffer layer, 38 ... bump, 40 ... substrate, 41 ... gap, 42 ... lower electrode , 43 ... piezoelectric film, 44 ... upper electrode, 45 ... substrate, 46 ... MEMS structure, _{S, S} 10, S _{20 ...} sealing member, A ... adhesive layer, E ... electrode, V ... hollow portion

Claims (22)

A first substrate on which an electronic element including a functional element having a vibrator or a movable part or a light emitting element and / or a light receiving element is formed on one surface;
A second substrate bonded on the one surface of the first substrate so as to cover the electronic element with a gap from the electronic element;
A through-wiring formed to penetrate the first substrate and connect to the electronic element;
An insulating layer formed on the other surface of the first substrate;
A wiring layer embedded in the insulating layer and connected to the through wiring;
A semiconductor device comprising: a bump connected to the wiring layer and protrudingly formed on a surface of the insulating layer. The electronic element is a functional element having a vibrator or a movable part,
The first substrate and the second substrate are bonded together by sealing with a sealing material,
The semiconductor device according to claim 1, wherein a hollow portion having an inner wall surface that is a surface on which the electronic element is formed on the first substrate and a surface of the second substrate is configured. The semiconductor device according to claim 2, wherein the hollow portion is held in a vacuum, a reduced pressure, a reducing atmosphere, or an inert gas atmosphere. The semiconductor device according to claim 1, wherein a recess that widens a gap between the electronic element and the surface of the second substrate is formed on a surface of the second substrate on the first substrate side. The electronic element is a light emitting element and / or a light receiving element;
The semiconductor device according to claim 1, wherein the second substrate is a light-transmissive protective substrate. The semiconductor device according to claim 1, wherein a first electronic circuit is formed on the first substrate. The semiconductor device according to claim 6, wherein a passive element is formed as a first electronic circuit on the first substrate. The semiconductor device according to claim 1, wherein a second electronic circuit is formed on the second substrate. The semiconductor device according to claim 8, wherein a passive element is formed as a second electronic circuit on the second substrate. The semiconductor device according to claim 8, wherein an electronic element including a functional element having a vibrator or a movable portion is formed as a second electronic circuit on the second substrate on a surface to be bonded to the first substrate. The semiconductor device according to claim 1, wherein a semiconductor chip is embedded in the insulating layer. On one surface of the first substrate on which an electronic element including a functional element having a vibrator or a movable part or a light emitting element and / or a light receiving element is formed on one surface, the electronic element is spaced from the electronic element. Bonding the second substrate so as to cover the electronic element;
Forming a through wiring so as to penetrate the first substrate and connect to the electronic element;
Forming an insulating layer on the other surface of the first substrate, embedding in the insulating layer, and forming a wiring layer so as to connect to the through wiring;
Connecting the wiring layer and forming bumps convexly on the surface of the insulating layer. The electronic element is a functional element having a vibrator or a movable part,
In the step of bonding the second substrate onto the one surface of the first substrate, the first substrate and the second substrate are sealed with a sealing material and bonded together, and the electronic element of the first substrate The method for manufacturing a semiconductor device according to claim 12, wherein a hollow portion having an inner wall surface that is the surface of the second substrate and the surface of the second substrate is formed. The step of forming the hollow portion is performed in a vacuum, reduced pressure, reducing atmosphere, or inert gas atmosphere so that the hollow portion is maintained in a vacuum, reduced pressure, reducing atmosphere, or inert gas atmosphere. 14. A method for manufacturing a semiconductor device according to 13. 13. The semiconductor device according to claim 12, wherein the second substrate is a substrate in which a concave portion that widens a gap between the electronic element and the second substrate surface is formed on a surface of the second substrate on the first substrate side. Manufacturing method. A substrate on which a light emitting element and / or a light receiving element is formed as the electronic element is used as the first substrate,
The method for manufacturing a semiconductor device according to claim 12, wherein a substrate that is a light-transmissive protective substrate is used as the second substrate. The method for manufacturing a semiconductor device according to claim 12, wherein a substrate on which a first electronic circuit is formed is used as the first substrate. The method for manufacturing a semiconductor device according to claim 17, wherein a substrate on which a passive element is formed as the first electronic circuit is used as the first substrate. The method for manufacturing a semiconductor device according to claim 12, wherein a substrate on which a second electronic circuit is formed is used as the second substrate. The method for manufacturing a semiconductor device according to claim 19, wherein a substrate on which a passive element is formed as the second electronic circuit is used as the second substrate. As the second electronic circuit, a substrate on which an electronic element including a functional element having a vibrator or a movable portion is formed is used as the second substrate.
The manufacturing method of a semiconductor device according to claim 19, wherein in the step of bonding the second substrate to the first substrate, the second substrate is bonded so that a surface on which the electronic element is formed constitutes an inner wall surface of the hollow portion. Method. The method for manufacturing a semiconductor device according to claim 12, wherein in the step of forming the insulating layer, a semiconductor chip is embedded in the insulating layer.

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