JP2007173025A - High-pressure discharge lamp lighting device and image display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a compact and high-efficiency discharge lamp lighting device by suppressing loss of a switching circuit supplying power to a high-pressure discharge lamp without causing flicker of light due to shimmering of arc inside an arc tube. <P>SOLUTION: The high-pressure discharge lamp lighting device, equipped with a switching circuit such as a step-down chopper circuit 1 for controlling power supplied to the high-pressure discharge lamp DL, and a control circuit varying switching frequencies of the switching circuit in accordance with lamp voltages, further includes a switching frequency setting part (a microcomputer 2) for setting switching frequencies so as to hit given lamp powers, based on the lamp voltages, so that the switching frequency setting part, in case switching frequencies set in accordance with the lamp voltages overlap with acoustic resonance frequency range of the high-pressure discharge lamp DL, sets the switching frequency at some constant frequency other than the acoustic resonance frequency range. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a high-pressure discharge lamp lighting device for lighting a high-intensity high-pressure discharge lamp (HID lamp), and a projection-type image display device used for a projection-type television or projector using the same. .

  FIG. 10 is a circuit diagram of a conventional discharge lamp lighting device (Japanese Patent Laid-Open No. 2003-332092). In this lighting device, the DC power source E is stepped down by the step-down chopper circuit 1 and AC power is supplied to the lamp La via a polarity inversion bridge circuit composed of switching elements Q2 to Q5. The ramp voltage Vla is detected by dividing the resistances R4 and R5, and the microcomputer 2 sets the reference voltage of the comparator CP1. The switching element Q1 of the step-down chopper circuit 1 is on / off controlled by an on / off control circuit 3. If the current flowing through the resistor R1 exceeds the reference voltage of the comparator CP1 when the switching element Q1 is on, the output of the on / off control circuit 3 is inverted and the switching element Q1 is turned off. When the switching element Q1 is off, the energy of the choke L1 is released through the diode D1, and when the choke current becomes zero, the cathode voltage Vd of the diode D1 rises. When this voltage Vd is detected by dividing the resistances R2 and R3 and exceeds the reference voltage of the comparator CP2, the output of the on / off control circuit 3 is inverted, and the switching element Q1 is turned on.

  However, the timer circuit 4 is attached to the on / off control circuit 3, and the shortest off time is defined by the output of the comparator CP3, and the longest off time is defined by the output of the comparator CP4. The mode in which the switching element Q1 is turned on when the output of the comparator CP3 is inverted is the discontinuous mode as shown in FIG. 2B, and the mode in which the switching element Q1 is turned on when the output of the comparator CP4 is inverted is shown in FIG. Thus, the chopper current IL1 is in the continuous mode.

  When the OFF time of the switching element Q1 is longer than the timer time of the comparator CP3 and shorter than the timer time of the comparator CP4, the chopper current IL1 becomes a boundary mode (current zero cross switching) as shown in FIG. Since the peak value Ip of the current IL1 flowing through the choke L1 can be kept low, the loss of the discharge lamp lighting device can be reduced.

In Patent Document 1, it is proposed to set a switching frequency so as to avoid an acoustic resonance frequency in a high pressure discharge lamp lighting device, but a lighting circuit using a chopper circuit or a low-frequency rectangular wave inverter is proposed. Rather, it is a lighting circuit using a high-frequency sine wave inverter, and in order to operate a switching circuit such as a chopper circuit efficiently in a so-called boundary mode (current zero cross switching), a predetermined lamp based on the lamp voltage is used. It does not assume a configuration in which the switching frequency is variably controlled so as to be electric power.
JP 2003-308989 A JP 2003-320992 A

  In the conventional discharge lamp lighting device shown in FIG. 10, when the lamp power is controlled as indicated by the broken line in FIG. 11 with respect to the change in the lamp voltage, the switching frequency of the step-down chopper circuit 1 is indicated by the solid line in FIG. To change. That is, in the high frequency region where the comparator CP3 fixes the off time of the switching element Q1 to the shortest time and in the low frequency region where the comparator CP4 fixes the off time of the switching element Q1 to the longest time, the switching frequency is substantially constant. In the other steady frequency region, the switching frequency of the step-down chopper circuit 1 changes according to the lamp voltage. A ripple component of this switching frequency is superimposed on the lamp current.

  By the way, in the high pressure discharge lamp, when a specific frequency component is included in the lamp current, a so-called acoustic resonance phenomenon occurs in which the arc curvature in the arc tube fluctuates. In general, a plurality of resonance frequency bands exist within a frequency range of several KHz to several tens of KHz used in a normal discharge lamp lighting device. Therefore, when the switching frequency of the chopper circuit 1 overlaps the resonance frequency band of the high pressure discharge lamp, the arc in the arc tube of the high pressure discharge lamp fluctuates and flickers. When this lighting device is used in an image display device such as a projector, there is a problem that the image appears as flickering.

  The present invention has been made in view of such problems of the prior art, and suppresses the loss of the switching circuit that supplies power to the high-pressure discharge lamp without causing light flicker due to arc fluctuation in the arc tube, An object is to provide a small and highly efficient discharge lamp lighting device.

  In order to solve the above problem, the invention of claim 1 is a switching circuit (step-down chopper circuit 1) for controlling the power supplied to the high-pressure discharge lamp DL and switching according to the lamp voltage, as shown in FIG. A high-pressure discharge lamp lighting device comprising a control circuit 5 for changing the switching frequency of the circuit, further comprising a switching frequency setting unit (microcomputer 2) for setting the switching frequency so as to obtain a predetermined lamp power based on the lamp voltage, The switching frequency setting unit sets the switching frequency to a substantially constant frequency outside the acoustic resonance frequency region when the switching frequency set based on the lamp voltage overlaps the acoustic resonance frequency region of the high pressure discharge lamp DL. It is what.

  The invention of claim 2 is characterized in that, in claim 1, the substantially constant frequency outside the acoustic resonance frequency region is set on the upper limit frequency side of the acoustic resonance frequency region.

  According to a third aspect of the present invention, in the first or second aspect, the lamp voltage for switching from a substantially constant frequency outside the acoustic resonance frequency region to a switching frequency set based on the lamp voltage, and the lamp voltage is set. The lamp voltage is switched from a switching frequency to a substantially constant frequency outside the acoustic resonance frequency region.

  Invention of Claim 4 is invention of an image display apparatus provided with the high pressure discharge lamp lighting device in any one of Claims 1-3, The high pressure discharge lamp lighted by this high pressure discharge lamp lighting device, and this high pressure It is characterized by comprising image display means for transmitting or reflecting light from a discharge lamp and an optical system for projecting transmitted light or reflected light through the image display means onto a screen.

  According to the first aspect of the present invention, since the switching frequency is set according to the lamp voltage, it is possible to suppress the loss of the switching circuit that supplies power to the high-pressure discharge lamp and is set based on the lamp voltage. When the switching frequency overlaps the acoustic resonance frequency region of the high-pressure discharge lamp, the switching frequency is set to a substantially constant frequency outside the acoustic resonance frequency region, so switching at the acoustic resonance frequency inherent to the high-pressure discharge lamp is avoided. Thus, a compact and highly efficient high pressure discharge lamp lighting device can be provided without causing light flicker due to arc fluctuation in the arc tube.

  According to the second aspect of the present invention, the substantially constant frequency outside the acoustic resonance frequency region is set on the upper limit frequency side of the acoustic resonance frequency region, so that the ripple current included in the lamp current can be reduced.

  According to the invention of claim 3, since the hysteresis characteristic is given to the change of the switching frequency according to the lamp voltage, the switching frequency is prevented from frequently switching, and the flicker that occurs when the switching frequency is switched is prevented. Can be suppressed.

  Since invention of Claim 4 is an image display apparatus using the high pressure discharge lamp lighting device of Claims 1-3, it can be reduced in size without causing the flicker of light, and since there is little circuit loss, It is possible to realize a projector and a projection type projection television in which the number of rotations of the air cooling fan is reduced and noise is suppressed.

(Embodiment 1)
FIG. 1 is a circuit diagram showing a configuration of Embodiment 1 of the present invention. In the present embodiment, the step-down chopper circuit 1 is connected to the DC power source E. The step-down chopper circuit 1 includes a switching element Q1, a choke L1, a diode D1, and a smoothing capacitor C1.

  The DC power source E is obtained, for example, by rectifying the AC voltage of a commercial AC power source. The negative electrode of the smoothing capacitor C1 is connected to the negative electrode of the DC power source E through a low resistance R1 for current detection. The negative electrode of the DC power supply E is connected to the ground line. The connection point between the switching element Q1 and the choke L1 is connected to the cathode of a diode D1 for energizing regenerative current, and the anode of the diode D1 is connected to the negative electrode of the smoothing capacitor C1. The switching element Q1 is intermittently turned on / off at a high frequency by the output of the control circuit 5, whereby the voltage obtained by stepping down the voltage of the DC power supply E is charged in the smoothing capacitor C1.

  The voltage of the smoothing capacitor C1 is divided by a series circuit of resistors R4 and R5, and is input to the microcomputer 2 as a detected value of the lamp voltage Vla. The microcomputer 2 stores the target lamp power, calculates the target peak value Ip of the current flowing through the step-down chopper circuit 1 from the input lamp voltage and the stored lamp power, and calculates the reference voltage of the comparator CP1. Is output as a voltage value equivalent to Ip × R1.

  The drive circuit 7 is connected to the gate of the switching element Q1, and the output of the Q1 switching control inverter INV3 in the control circuit 5 is connected. The switching element Q1 is on / off controlled via the drive circuit 7 by the output of the inverter INV3 of the control circuit 5 being switched to High / Low.

  The drive circuit 7 of the switching element Q1 is composed of, for example, a high side drive IC. As another example, the circuit configuration is configured by a pulse transformer, one end of the secondary winding of the pulse transformer is connected to the gate of the switching element Q1, and the primary winding of the pulse transformer is connected to the output of the control circuit 5. Alternatively (see FIG. 10).

  The output of the step-down chopper circuit 1 is connected to a polarity inversion bridge circuit composed of switching elements Q2 to Q5. One end of an inductor L2 is connected to a connection point between the switching elements Q2 and Q3. One end of a capacitor C2 is connected to the other end of the inductor L2. The other end of the capacitor C2 is connected to a connection point between the switching elements Q4 and Q5. In parallel with the capacitor C2, a lamp DL made of a high-pressure discharge lamp is connected via a secondary winding of a pulse transformer PT. The output terminal of the pulse voltage generation circuit 8 is connected to the primary winding of the pulse transformer PT. The input terminal of the pulse voltage generation circuit 8 is connected to both ends of the capacitor C2.

  The control circuit 6 controls on / off of the switching elements Q2 to Q5. The drive circuits 7a and 7b drive the low-voltage side switching elements Q3 and Q5 and the high-voltage side switching elements Q2 and Q4 in accordance with the output of the control circuit 6.

  The constant power control range of the lamp is assumed that the lamp voltage includes at least the range of V1 to V2 in FIG. In addition, when the lamp is under constant power control, an acoustic resonance phenomenon occurs when the ripple frequency included in the lamp current is f1 to f2 in FIG.

Hereinafter, the control at the time of starting and the control at the time of lighting will be individually described.
(Control at start-up)
The control circuit 5 controls the output voltage of the step-down chopper circuit 1 to be a predetermined value. The control of the step-down chopper circuit 1 is the same as in the lighting control described later, and is omitted here.

  The control circuit 6 transmits a high frequency signal having a duty of approximately 50% to each of the drive circuits 7a and 7b so that the switching elements Q2 and Q5 and the switching elements Q3 and Q4 are alternately turned on and off. Q5 is driven at a high frequency. As a result, resonance between the inductor L2 and the capacitor C2 occurs, a pulse voltage is generated by the pulse voltage generation circuit 8 by the resonance voltage, and a high voltage boosted by the pulse transformer PT is applied to the lamp DL to discharge the lamp DL. .

  After a predetermined time from the start of the start sequence, the alternating frequency of the switching elements Q2 and Q5 and the switching elements Q3 and Q4 is switched to a low frequency around 100 Hz. Here, if the voltage of the capacitor C1 is equal to or lower than the predetermined voltage, the microcomputer 2 determines that the lamp DL is lit, and shifts to control at the time of lighting.

(Control during lighting)
After the lamp DL is lit, the control circuit 5 switches the switching element Q1 in accordance with the output voltage (lamp voltage Vla) of the step-down chopper circuit 1 and controls the reference voltage (Ip × R1) for controlling the current flowing through the choke L1. And the power supplied to the lamp DL is controlled.

  The control circuit 6 drives the switching elements Q2 and Q5 and the switching elements Q3 and Q4 at a low frequency around 100 Hz, and supplies a rectangular wave current to the lamp DL.

  Details of the operation of controlling the step-down chopper circuit 1 in order for the control circuit 5 to control the power supplied to the lamp DL will be described. The control circuit 5 turns on the switching element Q1 when the choke current becomes zero, and the comparator CP1 whose output changes so that the switching element Q1 is turned off when the choke current flowing through the choke L1 reaches the target peak value Ip. An output changing comparator CP2 and an RS latch circuit 9 for outputting the gate signal of the switching element Q1 from the output states of both the comparators CP1 and CP2 are provided.

  The inverting input terminal of the comparator CP1 is connected to the output terminal of the microcomputer 2 and uses a voltage corresponding to the target peak value Ip of the choke current as a reference voltage (Ip × R1). The non-inverting input terminal of the comparator CP1 is connected to the negative electrode of the smoothing capacitor C1, and the detected value (IL1 × R1) of the voltage across the low resistance R1 for current detection, that is, the voltage corresponding to the choke current is input. When the detected value of the voltage corresponding to the choke current becomes larger than the reference voltage, the output of the comparator CP1 becomes High.

  The non-inverting input terminal of the comparator CP2 is used as a reference voltage for detecting the timing when the choke current becomes zero. On the other hand, the inverting input terminal of the comparator CP2 is connected to a voltage obtained by dividing the voltage between the cathode of the diode D1 and the ground by the resistors R2 and R3, and a voltage value obtained by detecting a change in the cathode voltage of the diode D1 is input.

  When the switching element Q1 is turned off, the choke current is regenerated along the path of choke L1 → smoothing capacitor C1 → diode D1 → choke L1, and when the choke current becomes zero, smoothing capacitor C1 → choke L1 → junction capacitance of diode D1 → smoothing capacitor When the detection value of the comparator CP2 becomes larger than the reference voltage by flowing in the reverse direction along the path C1 and the cathode voltage of the diode D1 rises, the output of the comparator CP2 becomes Low.

  The RS latch circuit 9 includes a NOR gate NOR3 to which the output of the comparator CP1 is directly input, and a NOR gate NOR2 to which the output of the comparator CP2 is input via the NOR gate NOR1. A latch circuit is configured by connecting the inputs and outputs of the NOR gates NOR2 and NOR3 to each other. The output of the comparator CP3 described later is connected to the input of the NOR gate NOR1. Further, the output of the NOR gate NOR4 is input to the input of the NOR gate NOR2, and the output of the comparator CP4 described later is connected to the input of the NOR gate NOR4. Further, the inverter INV1 is connected to the output of the NOR gate NOR3, the inverters INV2 and INV3 are connected to the output of the inverter INV1, and the output of the inverter INV3 is connected to the drive circuit 7 of the switching element Q1.

  In the RS latch circuit 9, when both the outputs of the comparator CP2 and the comparator CP3 become Low, the output of the NOR gate NOR1 becomes High and the latch state changes, and the output of the inverter INV3 of the control circuit 5 becomes High. . Thereafter, when either the output of the comparator CP2 or the output of the comparator CP3 becomes High, the output of the NOR gate NOR1 becomes Low, but the output of the inverter INV3 maintains the High state.

  Further, when the output of the NOR gate NOR4 becomes High, the output of the inverter INV3 becomes High even if the output of the NOR gate NOR1 remains Low.

  Next, when the output of the comparator CP1 becomes High, the latch state of the RS latch circuit 9 changes, and the output of the inverter INV3 becomes Low. Thereafter, even if the output of the comparator CP1 becomes Low, the output of the inverter INV3 maintains the Low state.

  The timer circuit 4 includes a comparator CP3 whose output becomes Low when a first predetermined time (corresponding to the shortest OFF time) has elapsed after the switching element Q1 is turned off, and a second predetermined time (after the switching element Q1 is turned off). Comparing CP4 whose output becomes Low after the elapse of the longest off time), a timer body comprising constant current source Is and capacitors C3 and C4, and the base of the output of RS latch circuit 9, the output of inverter INV3 is It is composed of an NPN transistor Q6 for starting the charging of the capacitor C3, that is, the timer operation from the time of going low. A semiconductor switch Q7 is connected between the capacitor C4 and the ground, and a control terminal of the semiconductor switch Q7 is connected to an output terminal of the microcomputer 2 through a resistor R7. After the start control is started, the semiconductor switch Q7 is turned off until the lamp DL is turned on and the voltage of the smoothing capacitor C1 reaches V1, and at this time, the constant current source Is charges only the capacitor C3.

  The non-inverting input terminal of the comparator CP3 is set to a reference voltage corresponding to the first predetermined time. The inverting input terminal of the comparator CP3 is connected to a connection point between the constant current source Is and the capacitors C3 and C4. The output of the comparator CP3 is connected to the input of the NOR gate NOR1.

  The non-inverting input terminal of the comparator CP4 is set to a reference voltage corresponding to the second predetermined time. The inverting input terminal of the comparator CP4 is connected to a connection point between the constant current source Is and the capacitors C3 and C4. The output of the comparator CP4 is connected to the input of the NOR gate NOR4.

  The inverting input terminal of the comparator CP3 and the inverting input terminal of the comparator CP4 are connected to the collector of the transistor Q6. The emitter of the transistor Q6 is connected to the ground, and the base is connected to the output of the inverter INV2 via the resistor R6.

  In the timer circuit 4, when the output of the control circuit 5 becomes High by the output of the RS latch circuit 9, that is, when the switching element Q1 is turned on and a choke current flows, the transistor Q6 is turned on and the capacitors C3 and C3 are turned on. The voltage of C4 is held near zero, the outputs of the comparators CP3 and CP4 are held High, and the output of the NOR gate NOR4 is held Low.

  When the switching element Q1 is turned off in this state, the transistor Q6 is turned off, the capacitor C3 is charged by the constant current source Is, the voltage of the capacitor C3 gradually increases, and the timer operation starts. When the first predetermined time (corresponding to the shortest off time) elapses, the inverting input terminal voltage of the comparator CP3 exceeds the non-inverting input terminal voltage, and the output of the comparator CP3 changes from High to Low. Further, when a second predetermined time (corresponding to the longest off time) elapses thereafter, the output of the comparator CP4 similarly changes from High to Low, and the output of the NOR gate NOR4 changes from Low to High.

  Until the lamp voltage reaches V1, the microcomputer 2 generates the target peak value of the choke current corresponding to the lamp voltage obtained by detecting the voltage of the smoothing capacitor C1, thereby determining the on-time of the switching element Q1. When the choke current IL1 of the choke L1 becomes substantially zero, zero cross control is performed to turn on the switching element Q1, and the switching frequency of the switching element Q1 gradually increases as the lamp voltage increases. Until this ramp voltage reaches V1, the timing at which the choke current detected by the comparator CP2 becomes substantially zero is later than the timing at which the output of the comparator CP3 changes from High to Low. The operation in this case becomes the boundary mode shown in FIG.

  When the lamp voltage is between V1 and V2, the drive signal output from the microcomputer 2 to the semiconductor switch Q7 becomes High, and the semiconductor switch Q7 is turned on, so that the constant current source Is charges the capacitors C3 and C4. As a result, the timer time of the comparator CP3 becomes longer, so the timing at which the choke current detected by the comparator CP2 becomes substantially zero is earlier than the timing at which the output of the comparator CP3 changes from High to Low, and the output of the comparator CP2 is After changing from High to Low, the output of the comparator CP3 changes from High to Low, whereby the switching element Q1 is turned on.

  Therefore, when the lamp voltage is from V1 to V2, the OFF time of the switching element Q1 is equal to the timer time for the constant current source Is to charge the capacitors C3 and C4. When the lamp is under constant power control under a constant off-time, the change in the ON time width of the switching element Q1 is small. Therefore, the switching frequency of the switching element Q1 is between the lamp voltage and the lamp voltage between V1 and V2. Is approximately the same value as in the case of V1. The operation in this case is the discontinuous mode of FIG.

  Next, when the lamp voltage exceeds V2, the drive signal output from the microcomputer 2 to the semiconductor switch Q7 becomes Low, and the semiconductor switch Q7 is turned off, so that the capacitor connected to the timer circuit 4 is only C3, and the comparator The timer time of CP3 is the same as when the lamp voltage is smaller than V1. Then, the timing at which the choke current detected by the comparator CP2 becomes substantially zero is later than the timing at which the output of the comparator CP3 changes from High to Low, and the voltage of the capacitor C1 is the same as until the ramp voltage reaches V1. The microcomputer 2 generates the target value of the choke current corresponding to the lamp voltage obtained by detecting the above, thereby determining the ON time of the switching element Q1, and when the choke current IL1 of the choke L1 becomes substantially zero, the switching element Q1 is Zero-crossing control to turn on is performed, and the switching frequency of the switching element Q1 gradually increases as the lamp voltage increases. The operation in this case becomes the boundary mode shown in FIG.

  By the way, as shown in FIG. 3, when the lamp voltage is lower than V1, the switching frequency of the switching element Q1 is lowered as the lamp voltage is lowered. If the switching frequency becomes too low, it will be recognized as noise. Therefore, the comparator CP4 forcibly turns on the switching element Q1 when the switching element Q1 is off for a second predetermined time (the longest off time). A lower limit is set for the frequency. At this time, as shown in FIG. 2C, the current flowing through the choke L1 is controlled to be a continuous current that does not become zero.

The above switching operation will be described with reference to FIG.
As shown in FIG. 2A, in the zero cross control, when the choke current IL1 is zero, that is, when t = t1, the output of the comparator CP1 is Low, the output of the comparator CP2 is Low, and the output of the inverter INV3 is High. Thus, the switching element Q1 is turned on, a current flows through the choke L1, and increases linearly. When the current IL1 of the choke L1 reaches the target value Ip, that is, when t = t2, the output of the comparator CP1 becomes High for a moment. At this time, the output of the inverter INV3 becomes Low, the switching element Q1 is turned off, and the current IL1 decreases linearly. At this time, when the timer operation starts and a predetermined time elapses, the output of the comparator CP3 changes from High to Low. When the decreased current IL1 becomes equivalent to zero, that is, when t = t3, the output of the comparator CP2 changes from High to Low, and the output of the NOR gate NOR1 becomes High, so that the output of the inverter INV3 becomes It becomes High, and the switching element Q1 is turned on again.

  Further, as shown in FIG. 2B, in the discontinuous current control, even when the current IL1 becomes zero and the output of the comparator CP2 changes from High to Low, the output of the comparator CP3 is still High. In addition, since the output of the NOR gate NOR1 remains low, the output of the inverter INV3 maintains the low state, and the current IL1 remains zero. When the output of the comparator CP3 becomes Low, that is, when t = t6, the output of the NOR gate NOR1 changes to High, and the output of the inverter INV3 becomes High. Therefore, the current IL1 is kept at zero for a certain period from when the current IL1 becomes equivalent to zero until the output of the comparator CP3 changes.

  Further, as shown in FIG. 2C, in the continuous current control, even if the output of the comparator CP2 remains high before the current IL1 flowing through the choke L1 becomes zero, the second predetermined time (longest off time) When the output of the comparator CP4 changes from High to Low after a lapse of time, the output of the NOR gate NOR4 changes from Low to High (at t = t9). At this time, the state of the RS latch circuit 9 changes and the output of the inverter INV3 becomes High. Therefore, there is no period in which the current IL1 becomes zero, and a current flows continuously through the choke L1.

  FIG. 3 shows the relationship between the lamp voltage and the switching frequency of the switching element Q1. FIG. 3 is a graph showing the electric power (broken line) supplied to the lamp DL by the high pressure discharge lamp lighting device of the first embodiment and the switching frequency (solid line) of the switching element Q1 with respect to the lamp voltage.

  As described above, in Embodiment 1, the comparator CP3 of the timer circuit 4 that defines the shortest off time of the switching element Q1 is effectively used, and the capacitor C4 is connected in parallel to the time measuring capacitor C3, thereby reducing the shortest off time. The lamp voltage interval V1 to V2 is set to be long so that the fixed frequency interval on the high frequency side that has occurred near the maximum value of the lamp voltage in FIG. 11 appears in the lamp voltage intervals V1 to V2 lower than that. Is.

  By the way, in order to set the time keeping time of the timer circuit 4 longer in the lamp voltage sections V1 to V2, the constant current of the constant current source Is may be reduced in addition to increasing the time constant of the time measuring capacitor C3. Further, the reference voltage of the comparator CP3 may be switched. In the following embodiment, switching of the reference voltage will be described.

(Embodiment 2)
FIG. 4 is a circuit diagram showing a configuration of the second embodiment of the present invention. The difference between the present embodiment and the first embodiment described above is the configuration of the input terminal of the comparator CP3 of the timer circuit 4. In the present embodiment, a voltage obtained by dividing the power supply voltage Vcc of the control circuit 5 by the resistors R8 to R10 is input to the non-inverting input terminal of the comparator CP3. Further, a transistor Q8 is connected in parallel to the resistor R10, and the control terminal of the transistor Q8 is connected to the output terminal of the microcomputer 2 through the resistor R11. The capacitor C3 and the transistor Q6 are connected to the inverting input terminal of the comparator CP3, the constant current source Is is connected to the capacitor C3, and the capacitor C3 is charged when the transistor Q6 is turned off.

  When the ramp voltage is V1 or lower or V2 or higher, the transistor Q8 is turned on by the drive signal output from the microcomputer 2 and both ends of the resistor R10 are short-circuited. The reference voltage of the comparator CP3 is the control power supply voltage Vcc by the resistors R8 and R9. A low value is obtained by dividing the pressure. Therefore, the shortest off time of the switching element Q1 defined by the comparator CP3 is set short.

  When the ramp voltage is between V1 and V2, the transistor Q8 is turned off by the drive signal output from the microcomputer 2, and the reference voltage of the comparator CP3 is a high value obtained by dividing the control power supply voltage Vcc by the resistors R8 and R9, R10. become. Therefore, the shortest off time of the switching element Q1 defined by the comparator CP3 is set long.

  Thereby, the operation | movement similar to Embodiment 1 is realizable, and the relationship between the switching frequency of switching element Q1 and a lamp voltage changes like the continuous line of FIG.

(Embodiment 3)
FIG. 5 is a circuit diagram showing a configuration of the third embodiment of the present invention, and FIG. 6 is an operation explanatory diagram thereof. The difference between the present embodiment and the first embodiment described above is the configuration of the input terminals of the comparators CP3 and CP4 of the timer circuit 4. In this embodiment, the capacitor C3 and the transistor Q6 are connected to the inverting input terminal of the comparator CP3, the constant current source Is is connected to the capacitor C3, and the capacitor C3 is charged when the transistor Q6 is turned off. A voltage obtained by dividing the power supply voltage Vcc of the control circuit 5 by the resistors R12 to R14 is input to the non-inverting input terminal of the comparator CP4. Further, the transistor Q9 is connected in parallel to the resistor R14, and the control terminal of the transistor Q9 is connected to the output terminal of the microcomputer 2 through the resistor R15.

  When the ramp voltage is V1 or less or V2 or more, the transistor Q9 is turned off by the drive signal output from the microcomputer 2, and the reference voltage of the comparator CP4 is a high value obtained by dividing the control power supply voltage Vcc by the resistors R12 and R13 and R14. become. Therefore, the longest off time of the switching element Q1 defined by the comparator CP4 is set long.

  When the ramp voltage is between V1 and V2, the transistor Q9 is turned on by the drive signal output from the microcomputer 2, both ends of the resistor R14 are short-circuited, and the reference voltage of the comparator CP4 is the control power supply voltage Vcc by the resistors R12 and R13. A low value is obtained by dividing the pressure. Therefore, the longest off time of the switching element Q1 defined by the comparator CP4 is set short.

  As a result, even if the output of the comparator CP2 before the current IL1 flowing through the choke L1 becomes equivalent to zero remains in the High state, the output of the comparator CP4 changes from High to Low, and the output of the NOR gate NOR4 changes from Low to High. Change. At this time, the state of the RS latch circuit 9 changes and the output of the inverter INV3 becomes High. Therefore, there is no period in which the current IL1 becomes zero, and a current flows continuously through the choke L1.

  Until the lamp voltage reaches V1, the microcomputer 2 generates the target peak value of the choke current corresponding to the lamp voltage obtained by detecting the voltage of the capacitor C1, thereby determining the on-time of the switching element Q1, and the choke When the choke current IL1 of L1 becomes substantially zero, zero cross control is performed so as to turn on the switching element Q1.

  When the ramp voltage is between V1 and V2, the transistor Q9 is turned on by the drive signal output from the microcomputer 2 to short-circuit the resistor R14. The voltage input to the non-inverting input terminal of the comparator CP4 is lower than when the ramp voltage is less than or equal to V1, and before the outputs of the comparators CP2 and CP3 both become Low, the output of the comparator CP4 is Low and the output of the NOR gate NOR4 Becomes High, the output of the inverter INV3 becomes High, and the switching element Q1 is turned on. In this case, since the switching element Q1 is turned on before the current flowing through the choke L1 becomes substantially zero, a current continuously flows through the choke L1.

  When the ramp voltage is V2 or more, the transistor Q9 is turned off again by the drive signal output from the microcomputer 2, the output of the comparator CP3 becomes low before the output of the comparator CP4 becomes low, and the choke current becomes substantially zero. Thus, the output of the comparator CP2 becomes Low and the output of the NOR gate NOR1 becomes High, so that the output of the inverter INV3 becomes High and the switching element Q1 is turned on.

  FIG. 6 shows the relationship between the lamp voltage and the switching frequency of the switching element Q1. FIG. 6 is a graph showing the power supplied to the lamp DL (broken line) and the switching frequency (solid line) of the switching element Q1 with respect to the lamp voltage by the high pressure discharge lamp lighting device of FIG.

  As described above, in the third embodiment, the comparator CP4 of the timer circuit 4 that defines the longest off time of the switching element Q1 is effectively used, and the reference voltage is lower than normal in the ramp voltage interval of V1 to V2. By switching to, the longest off-time is set to be short, so that the fixed frequency section on the low frequency side that has occurred in the vicinity of the minimum lamp voltage value in FIG. 11 appears in the higher lamp voltage sections V1 to V2. It is a thing.

(Embodiment 3 ')
The timer circuit of the third embodiment and the timer circuit of the first or second embodiment may be combined. In this case, when the lamp voltage is between V1 and V2, between V1 and a predetermined voltage, the switching frequency of the switching element Q1 is controlled to be substantially constant near f1, as shown in FIG. 3, from the predetermined voltage to V2. During this period, the switching frequency of the switching element Q1 is controlled to be substantially constant in the vicinity of f2 as shown in FIG.

(Embodiment 4)
FIG. 7 is an operation explanatory diagram of Embodiment 4 of the present invention. The circuit diagram of this embodiment may be the same as FIG. After the lamp DL is turned on, the lamp voltage Vla rises and the Q7 drive signal output from the microcomputer 2 is Low until the voltage reaches V1, and the semiconductor switch Q7 is turned off. Until the lamp voltage exceeds V1 and reaches V3, the Q7 drive signal is High and the semiconductor switch Q7 is on. When the lamp voltage exceeds V3, the Q7 drive signal becomes Low and the semiconductor switch Q7 is turned off again. When the lamp voltage drops once after exceeding V3, the Q7 drive signal output from the microcomputer 2 becomes Low so that the semiconductor switch Q7 is turned off until the lamp voltage drops to V2. When the lamp voltage becomes V2 or less, the Q7 drive signal becomes High, and the semiconductor switch Q7 is turned on. When the lamp voltage further decreases to V1 or less, the Q7 drive signal is set low and the semiconductor switch Q7 is turned off. That is, when the lamp voltage is between V2 and V3, a hysteresis characteristic is given to switching of the switching frequency of the switching element Q1 with respect to a change in the lamp voltage.

  A flowchart for realizing the operation of this embodiment by the microcomputer 2 will be described with reference to FIG. First, after initializing the flag FLG, the lamp voltage Vla is read. The read lamp voltage Vla is compared with V1, and if Vla is smaller than V1, the Q7 drive signal is set to Low. The flag FLG inputs 0, and the control circuit 5 performs lamp lighting control from the lamp voltage and the current of the step-down chopper circuit 1, and returns to the lamp voltage reading again.

  If Vla is not less than V1 and less than V2, the Q7 drive signal becomes High and 0 is input to the flag FLG. If Vla is V2 or more and less than V3, it is determined whether the flag FLG is 1. If FLG = 0, the Q7 drive signal is set to High and 0 is input to the flag FLG. If FLG = 1, the Q7 drive signal is Low. If Vla is equal to or higher than V3, the Q7 drive signal is set to Low and 1 is input to the flag FLG. Then, the lighting control of the lamp is performed, and the process returns to reading the lamp voltage again.

(Embodiment 5)
The above-described discharge lamp lighting devices according to the first to fourth embodiments are used for lighting a high-pressure discharge lamp serving as a light source of an image display device such as a projector or a rear projection television. Here, the case where it mounts in a projector is illustrated. FIG. 9 is a schematic configuration diagram showing an internal configuration of the image display device 30. In the figure, 31 is a projection window, 32 is a power supply unit, 33a, 33b and 33c are cooling fans, 34 is an external signal input unit, 35 is an optical system, 36 is a main control board, 40 is a high pressure discharge lamp lighting device, DL is a lamp (high pressure discharge lamp). A main control board 36 is mounted in a frame indicated by a broken line. In the middle of the optical system 35, image display means (a transmissive liquid crystal display panel or a reflective image display element) that transmits or reflects light from the high-pressure discharge lamp DL is provided, and transmitted light that passes through the image display means. Alternatively, the optical system 35 is designed to project the reflected light onto the screen. By using the high pressure discharge lamp lighting device of the present invention, it is possible to prevent the light from flickering due to the acoustic resonance phenomenon, so it is possible to prevent the image projected on the screen from flickering. Further, since the circuit loss is small, it is possible to realize a projector in which the number of rotations of the cooling fan is reduced and noise is suppressed.

It is a circuit diagram which shows the structure of Embodiment 1 of this invention. It is an operation | movement waveform diagram of Embodiment 1 of this invention. It is operation | movement explanatory drawing of Embodiment 1 of this invention. It is a circuit diagram which shows the structure of Embodiment 2 of this invention. It is a circuit diagram which shows the structure of Embodiment 3 of this invention. It is operation | movement explanatory drawing of Embodiment 3 of this invention. It is operation | movement explanatory drawing of Embodiment 4 of this invention. It is a flowchart for operation | movement description of Embodiment 4 of this invention. It is a schematic block diagram which shows the internal structure of the projector using the high pressure discharge lamp lighting device by this invention. It is a circuit diagram which shows the structure of the conventional discharge lamp lighting device. It is operation | movement explanatory drawing of the conventional discharge lamp lighting device.

Explanation of symbols

1 Step-down chopper circuit 2 Microcomputer 4 Timer circuit 5 Control circuit DL lamp (High pressure discharge lamp)

Claims (4)

In a high-pressure discharge lamp lighting device comprising a switching circuit that controls power supplied to a high-pressure discharge lamp, and a control circuit that varies the switching frequency of the switching circuit according to the lamp voltage,
A switching frequency setting unit that sets a switching frequency so as to obtain a predetermined lamp power based on the lamp voltage,
The switching frequency setting unit sets the switching frequency to a substantially constant frequency outside the acoustic resonance frequency region when the switching frequency set based on the lamp voltage overlaps the acoustic resonance frequency region of the high pressure discharge lamp. High pressure discharge lamp lighting device. The high-pressure discharge lamp lighting device according to claim 1, wherein the substantially constant frequency outside the acoustic resonance frequency region is set on an upper limit frequency side of the acoustic resonance frequency region. A lamp voltage that switches from a substantially constant frequency outside the acoustic resonance frequency region to a switching frequency that is set based on a lamp voltage, and a substantially constant frequency outside the acoustic resonance frequency region from a switching frequency that is set based on the lamp voltage. 3. The high pressure discharge lamp lighting device according to claim 1, wherein the lamp voltage is different from the lamp voltage switched to the frequency. The high-pressure discharge lamp lighting device according to any one of claims 1 to 3, a high-pressure discharge lamp that is lit by the high-pressure discharge lamp lighting device, and an image display means that transmits or reflects light from the high-pressure discharge lamp; An image display apparatus comprising: an optical system that projects transmitted light or reflected light through an image display unit onto a screen.

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