JP2007135251A - Load driving circuit and method of detecting its abnormality - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a load driving circuit which detects abnormality without using a high-performance microcomputer even in the case of controlling a load with a high frequency signal. <P>SOLUTION: The load driving circuit is equipped with: the load that is connected with a power source; a load driving means that controls the drive of the above load by switching on or switching off the current flowing to the above load; and an abnormality detecting means that detects the abnormality within the above load and a circuit. The circuit also has the first monitoring means which outputs a HI signal when the current flowing to the above load is ON and outputs a LO signal when it is OFF, and the second monitoring means which outputs a LO signal when the current flowing to the above load is ON and a HI signal when it is OFF. The above abnormality detecting means detects the abnormality within the above load and the circuit by the combination of the HI/LO signal outputted from the above first monitoring means and the LO/HI signal outputted from the above second monitoring means. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to abnormality detection of a solenoid drive circuit.

Conventionally, in the load driving circuit described in Patent Document 1, a current is supplied to a load such as a solenoid in accordance with a signal that repeats ON / OFF, and the driving state of the load is controlled by controlling this signal. . At that time, the output terminal voltage of the load is monitored, and if the output terminal voltage is a value corresponding to ON / OFF of the signal, it is judged as normal and does not become a value corresponding to ON / OFF but sticks to a constant value. If it is, it is judged as abnormal.
JP-A-10-108353

  However, in the above prior art, the abnormality determination is delayed due to a time lag from when the load drive signal is turned ON / OFF until the value of the output terminal voltage is monitored. Therefore, it is necessary to improve the performance of the microcomputer that performs abnormality determination. However, when a high-frequency ON / OFF signal is used as in PWM control, a delay in abnormality determination becomes significant, so a particularly high-performance microcomputer is required, and the cost It was a factor of up.

  The present invention has been made paying attention to the above problems, and the object of the present invention is to enable a load to be detected without using a high-performance microcomputer even when the load is controlled by a high-frequency signal. It is to provide a driving circuit.

  In order to achieve the above-described object, in the present invention, a load connected to a power source, a load driving means for controlling driving of the load by ON / OFF control of a current flowing through the load, and the load and circuit And a first monitoring means for outputting a HI signal when the current flowing through the load is ON and outputting a LO signal when the current is OFF. Second monitoring means for outputting an LO signal when the current flowing through the load is ON and outputting an HI signal when the current is OFF, and the abnormality detection means is configured to output the HI / output from the first monitoring means. The load and the abnormality in the circuit are detected by a combination of the LO signal and the LO / HI signal output from the second monitoring means.

  Therefore, even when the load is controlled by a high-frequency signal, it is possible to provide a load drive circuit that can detect a load abnormality without using a high-performance microcomputer.

  Hereinafter, the best mode for realizing a load driving circuit of the present invention will be described based on an embodiment shown in the drawings.

[Circuit configuration of load drive circuit]
The first embodiment will be described with reference to FIGS. FIG. 1 is a circuit diagram of the load driving circuit of the present application. The load driving circuit includes a solenoid 1 (load), a relay 2 (load driving means), first and second voltage dividing circuits 3 and 4, a comparator 5, a microcomputer 6 (abnormality detecting means), and a diagnostic device 100 (first, Second monitoring means). The solenoid 1 of the present application is a solenoid that drives an electromagnetic valve in the hydraulic brake control device of the vehicle, but is not particularly limited as long as it is a load.

  One side of the solenoid 1 is connected to the battery B, and the other side is connected to the ground GND via the relay 2. The relay 2 performs PWM driving of the solenoid 1 and outputs a drive signal to the microcomputer 6. The first and second voltage dividing circuits 3 and 4 divide the battery voltage and the solenoid downstream voltage, respectively, and output them to the comparator 5. The comparator 5 also outputs a comparison signal (PWM drive ON / OFF signal) between the solenoid downstream voltage and the battery voltage to the diagnostic device 100.

  The diagnostic device 100 outputs independent signals of HI and LO to the microcomputer 6 based on the input comparison signal. As soon as the PWM drive is turned on, the HI signal is output, and the HI output is continued until the PWM drive is turned off for a certain time. Similarly, when the PWM drive is turned off, the LO signal is output immediately, and the LO signal is continuously output until the PWM drive is turned on for a certain time. The comparison signal itself is also output to the microcomputer 6.

  The microcomputer 6 determines a circuit abnormality based on the HI / LO signal and the comparison signal from the diagnostic device 100 and the drive signal from the relay 2. The combination of the HI / LO signal with respect to the PWM drive state determines whether the solenoid 1 is short-circuited / disconnected or the circuit itself is abnormal.

[Circuit configuration of diagnostic equipment]
FIG. 2 is a circuit diagram of the diagnostic device 100. The diagnostic apparatus 100 includes an HI signal system 110 (first monitoring means) and an LO signal system 120 (second monitoring means). The signal systems 110 and 120 include first and second NOT gates 111 and 121, a timer 112, 122 and flip-flop circuits 113 and 123. In addition, the LO signal system has a third NOT gate 124.

  The comparison signal from the comparator 5 is directly output to the microcomputer 6 via the monitor circuit 101 and also input to the signal systems 110 and 120. This comparison signal branches into two systems in each of the signal systems 110 and 120, one is directly input to the flip-flop circuits 113 and 123, and the other is the flop-flop circuit 113 via NOT gates 111 and 121 and timers 112 and 122. , 123.

  Based on the input, each of the flip-flop circuits 113 and 123 outputs a signal. The output of the HI system flip-flop circuit 113 becomes the HI holding signal as it is, and the output of the LO system flip-flop circuit 123 is inverted through the third NOT gate 124 to become the LO holding signal.

[Circuit abnormality judgment]
In detecting an abnormality of a load circuit driven by ON / OFF of a signal, a time lag occurs from when the signal is turned ON / OFF until the terminal voltage of the load is detected. Cause a delay. Here, if the ON / OFF cycle is long, the influence of the abnormality detection delay is small. However, when the control is performed with a very short ON / OFF cycle, such as PWM control, the influence of the response delay becomes significant.

  In order to cope with this response delay, it is necessary to improve the performance of the microcomputer that performs abnormality detection, but this causes an increase in cost. On the other hand, in a device such as a brake control device that requires high reliability, it is necessary to avoid a response delay in detecting an abnormality as much as possible.

  Therefore, in this embodiment, when the comparison signal (PWM drive ON / OFF signal) from the comparator 5 is ON, the HI signal system 110 provided in the diagnostic apparatus 100 immediately sets the HI holding signal to 1 (HI output). . Also, the time after the comparison signal changes from ON to OFF is measured by the HI signal timer 112, and when the ON signal continues for a certain time after the change, the HI signal system 110 sets the HI holding signal to 0 (LO output). And

  Similarly, when the comparison signal is OFF, the LO signal system 120 immediately sets the LO holding signal to 0 (LO output). When the comparison signal is changed from OFF to ON and ON for a certain period of time, the LO output is set to 1 (HI output).

[Abnormal diagnosis table]
FIG. 3 is an abnormality diagnosis table for the PWM drive state and the values of the HI and LO holding signals. An abnormal pattern can be specified by the PWM driving state and the value of each holding signal. The fixed time is appropriately changed according to the circuit.

(During PWM drive: When cycle is short)
When the PWM duty is high and the cycle is shorter than the fixed time, the next PWM cycle is started before the fixed time elapses from ON → OFF or OFF → ON. Therefore, if the circuit is normal, the HI holding signal is always 1 and the LO holding signal is 0 during PWM driving, and otherwise it is determined to be abnormal.

(During PWM drive: When cycle is long)
When the PWM duty is low and the cycle is long, a certain time elapses from when ON → OFF or OFF → ON until the next PWM cycle starts, and the HI holding signal becomes zero. Therefore, if the circuit is normal, the HI and LO holding signals are 1 and 0 before the lapse of a certain time, respectively, but both the HI and LO holding signals are 0 after the lapse of the certain time. Otherwise, it is considered abnormal.

(PWM not driven)
While the PWM is not driven, the power is not turned ON / OFF, and the comparison current from the comparator 5 is always ON. Therefore, if the circuit is normal, the HI holding signal is 1 before and after the lapse of a certain time, and the LO holding signal is 0 before the lapse of the certain time, but becomes 1 with the lapse of the certain time. Otherwise, it is judged as abnormal.

  As a result, by detecting the passage of a certain time and the pattern of the HI / LO holding signal, it becomes possible to detect the abnormality with high accuracy without detecting the terminal voltage every PWM drive cycle. Also, if the power supply voltage drops temporarily without causing a failure by continuing the previous HI / LO holding signal for a certain period of time after turning ON → OFF or OFF → ON, an error is detected as an error. Avoid doing that. Furthermore, since abnormality detection is performed during PWM control with a short cycle, it is possible to detect intermediate failures (intermittent disconnection, short circuit, etc.) of the solenoid coil.

[Change in circuit abnormality judgment control over time]
FIG. 4 is a time chart showing the change over time of the circuit abnormality determination control in the normal state.
(Time t1)
At time t1, the comparison signal from the comparator 5 is turned ON, the HI holding signal is 1, and the LO holding signal is 0.

(Time t2)
At time t2, PWM is not driven, and the comparison signal from the comparator 5 is turned on.

(Time t3)
A predetermined time t elapses after the comparison signal is changed from OFF to ON at time t3, and the LO holding signal becomes 1.

(Time t4)
At time t4, PWM driving is resumed, the comparison signal is turned OFF, and the LO holding signal is 0.

(Time t5)
At time t5, the comparison signal is turned off.

(Time t6)
A predetermined time t elapses after the comparison signal is changed from ON to OFF at time t6, and the HI holding signal becomes zero.

(Time t7)
At time t7, the comparison signal is turned ON, and the HI holding signal is 1.

[Effect of the embodiment of the present application]
In this embodiment, when the comparison signal (PWM drive ON / OFF signal) from the comparator 5 is ON, the HI signal system 110 provided in the diagnostic apparatus 100 immediately sets the HI holding signal to 1 (HI output). . When the comparison signal changes from ON to OFF and the ON signal continues for a certain time, the HI signal system 110 sets the HI holding signal to 0 (LO output). Similarly, when the comparison signal is OFF, the LO signal system 120 immediately sets the LO holding signal to 0 (LO output). When the comparison signal is changed from OFF to ON and ON for a certain period of time, the LO output is set to 1 (HI output).

  Thereby, it is possible to detect an abnormality without detecting the terminal voltage for each drive cycle of the solenoid 1 by detecting the passage of a certain time and the pattern of the HI / LO holding signal. Therefore, even when the control repeats ON / OFF in a short cycle like PWM control, it is possible to detect an abnormality with high accuracy without using a high-performance microcomputer.

[Other embodiments]
As described above, the best mode for carrying out the present invention has been described based on the first embodiment. However, the specific configuration of the present invention is not limited to each embodiment and does not depart from the gist of the present invention. Such design changes are included in the present invention.

  Further, technical ideas other than the claims that can be grasped from the above embodiments will be described below together with the effects thereof.

(A) In the load driving circuit according to claim 1,
The first monitoring means continues to output the HI signal until the current flowing through the load is turned off for a certain time, and the second monitoring means outputs the LO signal until the current flowing through the load is turned on for a certain time. A load drive circuit characterized by continuing the operation.

  When a temporary power supply voltage drop that does not lead to a failure occurs, it is possible to avoid erroneously detecting an abnormality.

(B) In the load driving circuit according to claim 1,
The load driving circuit characterized in that ON / OFF of the current is PWM control.

  Even in the PWM control in which the current is turned on / off in a short cycle, it is possible to detect an abnormality with high accuracy without improving the performance of the microcomputer. Further, since abnormality detection is performed during short-cycle control, it is possible to detect intermediate failure (intermittent disconnection, short circuit, etc.) of the solenoid coil.

(C) In the load driving circuit according to claim 1 or any one of (a) and (b) above,
The load driving circuit characterized in that the cycle of the ON / OFF signal of the current is shorter than the time from when the current is turned ON / OFF until the terminal voltage of the load is detected.

  In the case of control that repeats ON / OFF in a short cycle, the method of detecting an abnormality by detecting the terminal voltage every drive cycle affects the response delay from when the current is turned ON / OFF until the load terminal voltage is detected. Becomes prominent. By performing abnormality detection without detecting the terminal voltage for each driving cycle as in the present application, highly accurate abnormality detection can be performed.

It is a circuit diagram of this application load drive circuit. It is a circuit diagram of a diagnostic apparatus. It is an abnormality diagnosis table | surface with respect to the value of a PWM drive state and HI, LO holding | maintenance signal. It is a time chart of the circuit abnormality judgment control in the normal time.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Solenoid 2 Relay 3, 4 Voltage dividing circuit 5 Comparator 6 Microcomputer 100 Diagnosis apparatus 101 Monitor circuit 110,120 HI, LO signal system 111,121 First, 2nd gate 112,122 Timer 113,123 Flip-flop circuit 124 3rd Gate

Claims (2)

A load connected to the power supply;
Load driving means for controlling the driving of the load by ON / OFF controlling the current flowing through the load;
In a load driving circuit comprising: an abnormality detecting means for detecting an abnormality in the load and the circuit;
First monitoring means for outputting a HI signal when the current flowing through the load is ON and outputting a LO signal when the current is OFF;
Second monitoring means for outputting a LO signal when the current flowing through the load is ON and outputting a HI signal when the current is OFF;
The abnormality detection means detects an abnormality in the load and circuit by a combination of a HI / LO signal output from the first monitoring means and a LO / HI signal output from the second monitoring means. Load drive circuit. An abnormality detection method for a load drive circuit that performs drive control of the load by ON / OFF control of a current flowing through the load,
A first detection step of outputting a HI signal when the current flowing through the load is ON and outputting a LO signal when the current is OFF;
A second detection step of outputting a LO signal when the current flowing through the load is ON and outputting a HI signal when the current is OFF;
An abnormality in the load and the circuit is detected by a combination of the HI / LO signal output in the first detection step and the LO / HI signal output in the second detection step. Anomaly detection method.

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