JP2007110515A - Apparatus and method for controlling packet communication quality - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enhance the degree of freedom in adjusting or changing communication quality while realizing high-speed packet processing. <P>SOLUTION: A packet input 1 stores an input packet into a packet buffer 2. A queue controlling unit 5 stores packet information into predetermined queues. A QoS (quality of service) processor 6 receives the packet information from the queues in the decided order in accordance with packet scheduling (priority control, weighting fair control or packet shaping), and notifies a below-described packet transmitter 7 together with a transmission request. The packet transmitter 7 acquires a storing address of a packet to be transmitted in the packet buffer 2 based on the notified packet information or a management number, and transmits the packet to be specified on the basis of the storing address in the packet buffer. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a packet communication technique, and more particularly to a packet communication quality control apparatus and a packet communication quality control method for controlling communication quality when transmitting a communication packet received via a network.

In addition to data communication, various communication services such as voice calls and videophones are provided via the Internet. With such diversification, communication quality control called QoS (Quality of Service) is required. This QoS control has been performed by program control because it is necessary to perform various communication controls. In addition, there is a technique that improves processing speed, which is a problem of program control, by performing part of processing by hardware (for example, see Non-Patent Document 1).
“Home Gateway (HIKARI GATE) for Realizing Simple, Comfortable and Safe Network Services”, NTT Technical Journal, 2003 Vol. 15 No. 5 pp. 18-21

  However, in the prior art, since the connection of each component of the apparatus, such as a queue to which packets are input, a packet scheduler for controlling packet communication quality, and a transmission unit for transmitting packets to the outside, is fixed, There was a problem that the degree of freedom of adjustment or change for control was small.

  The present invention has been made in consideration of such circumstances, and its object is to achieve packet communication quality control capable of expanding the degree of freedom of adjustment or change of communication quality control while realizing high-speed packet processing. An apparatus and a packet communication quality control method are provided.

  In order to solve the above-described problem, the present invention provides a storage means for storing packet data indicating an input communication packet in a packet communication quality control apparatus that controls and outputs the communication quality of an input communication packet; A plurality of queues for sequentially storing packet information, which is information relating to packet data stored in the storage means, and a plurality of weighted fair controls for reading and outputting the packet information stored in the plurality of queues in a predetermined order Means, a transmission means for reading out packet data specified by the packet information output from the plurality of weighted fair control means from the storage means, and generating and transmitting a communication packet based on the packet data; and The queue, the plurality of weighted fair control means, and the transmission means are accommodated, and Path switching means for connecting the input and output of each section so as to be mutually switchable, and the queue sends the packet information to be stored and the output request of packet data corresponding to the packet information via the path switching means. The weighted fairness control means includes a plurality of counters corresponding to each of the inputs, and an adding means for adjusting the speed of integration of the weights to the plurality of counters. While adjusting the integrated speed of the weight to the counter by the adding means, there is no input capable of transmitting an output request, and a predetermined weight is applied to the counter until the value of the counter reaches a predetermined threshold value. Based on the value of the plurality of counters and the output request from the previous stage input via the path switching means, the packet information and the data input via the path switching means are integrated. Packet data specified by the packet information input together with the output request in response to the input output request in response to the input output request. Is read from the storage means, and a transmission packet is generated based on the packet data and transmitted.

  According to the present invention, in the above invention, the plurality of weighted fair control units are configured to output the packet information and the output based on the values of the plurality of counters and the output request from the previous stage input via the route switching unit. When selecting a request, if a transmission completion notification is input from the connection partner, a transmission completion notification is transmitted to the connection partner that requested the output.

  In the present invention according to the above invention, the plurality of weighted fair control means subtracts the packet length of the requested packet from the counter corresponding to the requested output after the output request is sent to the subsequent stage, While adding the packet length of the requested packet to the adding means, the weight is added to the plurality of counters based on the value of the adding means, and the value of the adding means is subtracted by the weight. To do.

  According to the present invention, in the above invention, when the plurality of weighted fair control means does not have an input capable of transmitting an output request and the value of the counter has reached a predetermined threshold value, After the values are added to the adding means, the values of the plurality of counters are set to zero.

  The present invention is the above invention, wherein the plurality of weighted fair control units receive a packet completion information and an output request input from the next connection partner after receiving the transmission completion notification from the connection partner. It is characterized by comprising adjusting means for adjusting.

  According to the present invention, in the above invention, a plurality of packets arranged in a preceding stage or a succeeding stage of each of the plurality of weighted fair control means and controlling a packet transmission rate based on a packet length of a packet requested to be output from the preceding stage It comprises a transmission rate adjusting means.

  According to the present invention, in the above invention, the plurality of packet transmission rate adjustment means are connected to the input / output of the path switching means, and the plurality of weighted fair control means are switched by the path switching means. It arrange | positions at each front | former stage or back | latter stage, It is characterized by the above-mentioned.

  According to the present invention, in the above invention, the plurality of packet transmission rate adjusting means have their inputs connected to the outputs of the plurality of weighted fair control means, and their outputs connected to the inputs of the path switching means. It is characterized by.

  The present invention is characterized in that, in the above invention, the plurality of packet transmission rate adjusting means have their inputs connected to the outputs of the plurality of queues and their outputs connected to the inputs of the path switching means. To do.

  Further, in order to solve the above-described problems, the present invention provides a storage means for storing packet data indicating an input communication packet in a packet communication quality control apparatus that controls and outputs the communication quality of an input communication packet. A plurality of queues that sequentially store packet information that is information on the packet data stored in the storage means, and a plurality of priorities that read and output the packet information stored in the plurality of queues based on a predetermined order A control unit; a transmission unit that reads out packet data specified by packet information output from the plurality of priority control units from the storage unit; generates and transmits a communication packet based on the packet data; and The queue, the plurality of priority control means, and the transmission means are accommodated, and input / output of each of these parts is performed. Path switching means for connecting to each other so as to be switchable, and the queue outputs the packet information to be stored and an output request for packet data corresponding to the packet information to the corresponding connection partner via the path switching means. The priority control means adjusts the time from receipt of a transmission completion notification from one of the subsequent connection partners until reception of the packet information and output request input from the next previous connection partner. And the packet information and the output request are selected and output from any one of the preceding connection partners based on the priority specific to each of the preceding connection partners after the time adjustment by the adjusting means. In response to the output request, the transmission means reads packet data specified by the packet information output together with the output request from the storage means. Out, wherein the generating and transmitting a transmission packet based on the packet data.

  According to the present invention, in the above invention, when the priority control unit selects any one packet information and output request based on a priority specific to each connection partner, a transmission completion notification is input from the connection partner. When the transmission is completed, a transmission completion notification is transmitted to the connection partner that requested the output.

  In order to solve the above-described problem, the present invention provides a packet communication quality control method for controlling and outputting the communication quality of an input communication packet, and storing packet data indicating the input communication packet; , Sequentially storing packet information, which is information about the packet data, in a plurality of queues, and when there is no queue capable of transmitting an output request, a predetermined weight is assigned to a plurality of counters until a predetermined threshold is reached. A step of integrating, a step of controlling an accumulation frequency of weights to the plurality of counters, and a value input from the plurality of queues based on the value of the accumulated weights and output requests from the plurality of queues. Selecting packet information and an output request, and reading packet data specified by the selected packet information , Characterized in that it comprises the steps of generating and transmitting a communication packet based on the packet data.

  In order to solve the above-described problem, the present invention provides a packet communication quality control method for controlling and outputting the communication quality of an input communication packet, and storing packet data indicating the input communication packet; A step of sequentially storing packet information, which is information about the packet data, in a plurality of queues; a step of adjusting packet information input from the plurality of queues; and a time until an output request is received; Selecting and outputting packet information and an output request from any one of the plurality of queues based on a priority specific to each of the inputs; and depending on the output request, the output Reads the packet data specified by the packet information output with the request and communicates based on the packet data Characterized in that it comprises the steps of generating and transmitting a packet.

  According to the present invention, the input / output of the plurality of queues, the plurality of control units, and the transmission unit are connected to be switchable by the path switching unit, and the weighted fair control unit is used to control the cumulative speed of the weights to the plurality of counters. While there is no input capable of transmitting an output request while adjusting by the adding means, and until the value of the counter reaches a predetermined threshold value, a predetermined weight is added to the counter, and the values of the counters And the output request from the previous stage input via the path switching means, the packet information input via the path switching means and the output request are output to the corresponding connection partner, and input by the transmission means In response to the output request, the packet data specified by the packet information input together with the output request is read from the storage means, and a transmission packet is generated based on the packet data To send Te. Therefore, there is an advantage that the degree of freedom of adjustment or change of communication quality control can be expanded while realizing high-speed packet processing.

  Also, according to the present invention, when packet information and an output request are selected based on a plurality of counter values and output requests from a plurality of queues, when a transmission completion notification is input from a connection partner, an output request A transmission completion notification is sent to the connected partner. Therefore, there is an advantage that the degree of freedom of adjustment or change of communication quality control can be expanded while realizing high-speed packet processing.

  Further, according to the present invention, after sending the output request to the subsequent stage, the weighted fair control means subtracts the packet length of the requested packet from the counter corresponding to the requested output, and While adding the packet length to the adding means, the weights are added to a plurality of counters based on the value of the adding means, and the value of the adding means is subtracted by the weight. Therefore, there is an advantage that the degree of freedom of adjustment or change of communication quality control can be expanded while realizing high-speed packet processing regardless of the packet transmission speed.

  Further, according to the present invention, when there is no input capable of transmitting an output request and the counter value has reached a predetermined threshold, the weighted fair control means adds the values of a plurality of counters to the adding means. After that, the values of a plurality of counters are set to zero. Therefore, the weight integration rate can be improved, and the degree of freedom of adjustment or change of communication quality control can be increased while realizing high-speed packet processing regardless of the packet transmission rate. can get.

  Further, according to the present invention, the adjustment unit adjusts the time from the reception of the transmission completion notification from the connection partner to the reception of the packet information and the output request input from the next connection partner. Therefore, there is an advantage that the degree of freedom of adjustment or change of communication quality control can be expanded while realizing high-speed packet processing.

  Further, according to the present invention, the packet transmission based on the packet length of the packet requested to be output from the preceding stage by the plurality of packet transmission rate adjusting means arranged in the preceding stage or the succeeding stage of each of the plurality of weighted fair control means. Control the rate. Therefore, there is an advantage that the packet transmission rate can be easily controlled, and the degree of freedom in adjusting or changing the communication quality control can be expanded while realizing high-speed packet processing.

  Also, according to the present invention, the input / output of the plurality of packet transmission rate adjusting means is connected to the input / output of the path switching means, and the plurality of packet transmission rate adjusting means are connected to the plurality of weighted fairness by the switching operation by the path switching means. It arrange | positions in each front stage or back | latter stage of each control means. Therefore, there is an advantage that the packet transmission rate can be easily controlled, and the degree of freedom in adjusting or changing the communication quality control can be expanded while realizing high-speed packet processing.

  According to the present invention, the inputs of the plurality of packet transmission rate adjusting means are connected to the outputs of the plurality of weighted fair control means, and the outputs are connected to the inputs of the path switching means. Therefore, it is possible to simplify the circuit configuration and to obtain an advantage that the degree of freedom of adjustment or change of communication quality control can be expanded while realizing high-speed packet processing.

  According to the present invention, the inputs of the plurality of packet transmission rate adjusting means are connected to the outputs of the plurality of queues, and the outputs are connected to the inputs of the path switching means. Therefore, it is possible to simplify the circuit configuration and to obtain an advantage that the degree of freedom of adjustment or change of communication quality control can be expanded while realizing high-speed packet processing.

  Further, according to the present invention, the input / output to / from the plurality of queues, the plurality of control means, and the transmission means are connected so as to be switchable by the path switching means, and any one of the subsequent connection partners is adjusted by the adjustment means of the priority control means. After the transmission completion notification is received, the time from receiving the next packet information and output request received from the previous connection partner is adjusted. Based on the priority, the packet information and the output request are read in a predetermined order from any one of the connection partners in the previous stage, and the packet data specified by the packet information input together with the output request is transmitted by the transmission unit. Read from the storage means, generate a transmission packet based on the packet data, and transmit. Therefore, packets can be transmitted according to a specific priority, and there is an advantage that the degree of freedom in adjusting or changing communication quality control can be expanded while realizing high-speed packet processing.

  Further, according to the present invention, when the priority control means selects any one packet information and output request based on the priority specific to each connection partner, when a transmission completion notification is input from the connection partner. Transmits a transmission completion notification to the connection partner that requested the output. Therefore, there is an advantage that the degree of freedom of adjustment or change of communication quality control can be expanded while realizing high-speed packet processing.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a configuration of a packet processing apparatus according to an embodiment of the present invention. In FIG. 1, a packet input unit 1 inquires an empty area management table 3 for an address for storing an input packet in a packet buffer 2, acquires a storage address, and stores a packet input to the storage address. . Further, the packet input unit 1 acquires a management number from the free space management table 3 at the same time. At this time, packet information necessary for packet identification (source MAC address, destination MAC address, destination IP address, etc.) and packet length are extracted and input to the packet identifier 4 as packet information.

  The free space management table 3 includes a packet information table 3-1 that stores a management number, packet information, a storage address, a packet length, and the like for managing packets stored in the packet buffer 2 in association with each other.

  The packet discriminator 4 determines which queue to store the packet information from among a plurality of queues to be described later according to a preset rule, and inputs the packet information to the queue control unit 5. The queue control unit 5 includes a plurality of queues # 0 to #J, and stores packet information in the queue #j (j = 0 to J) determined by the packet identifier 4. The queue control unit 5 sends a transmission request (Req) to the QoS processing unit 6 when packet information exists in the queue #j (j = 0 to J). At the same time, the packet information itself or the management number is notified.

  The QoS processing unit 6 notifies packet transmission unit 7 (to be described later) together with a transmission request of packet information or a management number determined to be transmitted by packet scheduling (priority control, weighted fair control, packet shaping), which will be specified later. In addition, the QoS processing unit 6 sets its own internal state to a state where the next packet can be transmitted by tracing back the completion notification notified from the packet transmission unit 7 which will be described later, along the path where the transmission request is made. The completion notification is sent to the queue control unit 5. Since the completion notification reaches the queue that made the transmission request that triggered the transmission of the completion notification, the queue that received the completion notification deletes the packet information that triggered the transmission request.

  The packet transmission unit 7 acquires the storage address in the packet buffer 2 of the packet to be transmitted from the notified packet information or management number, and transmits the packet in the packet buffer specified by the storage address. The packet transmission unit 7 sends a completion notification (Ack) to the QoS processing unit 6 at the start of transmission or at the end of transmission. Further, when the packet transmission is completed, the free space management table 3 is notified so that the management number of the packet can be used by another packet.

  Next, FIG. 2 is a block diagram showing the configuration of the QoS processing unit 6 described above. 2, the QoS processing unit 6 includes a selector 10, a plurality of packet schedulers (priority control, weighted fair control) 11-1 to 11-K, and a plurality of shapers 12-1 to 12-L. . Connected to the input of the selector 10 are the outputs (packet information) from the queues # 0 to #J of the queue controller 5 and the outputs of the packet schedulers 11-1 to 11-K and the shapers 12-1 to 12-L. The input of the packet schedulers 11-1 to 11-K and the inputs of the shapers 12-1 to 12-L are connected to the output of the selector 10, except for the output of the final stage. The selector 10 can connect an arbitrary input to an arbitrary output in accordance with an external setting.

  Next, examples of connection settings in the QoS processing unit 6 are shown in FIGS. 3 (a), 3 (b), 4 (a), and 4 (b). 3 (a) and 4 (a) are diagrams showing the connection state in the selector, and FIGS. 3 (b) and 4 (b) are developed views for easy viewing. As shown in FIG. 3A, by connecting the input and output of the selector 10, as shown in FIG. 3B, the output of the queues # 0 to # 3 is sent via the selector 10 to the packet scheduler 11-1. And the output of the queue # 4 is input to the packet scheduler 11-2 via the selector 10. Further, the output of the packet scheduler 11-1 is input to the packet scheduler 11-2 via the selector 10. The output of the packet scheduler 11-2 is input to the shaper 12-1, and the output of the shaper 12-1 is used as the final output (input to the packet transmission unit 7).

  In the example shown in FIGS. 4A and 4B, as shown in FIG. 4A, by connecting the input and output of the selector 10, as shown in FIG. Are input to the shaper 12-1, and the outputs of the queue # 1 and the queue # 2 are input to the packet scheduler 11-1. Further, the output of the shaper 12-1 and the output of the packet scheduler 11-1 are input to the packet scheduler 11-2, and the output of the packet scheduler 11-2 is the final output (input to the packet transmission unit 7). It is said. In this way, by setting the connection state of the selector 10 from the outside, QoS control with a high degree of freedom is possible in the configuration.

  Here, the operation of the QoS processing unit 6 in the connection state shown in FIGS. 4A and 4B will be described with reference to FIGS.

  FIG. 5A shows that four pieces of packet information Q0_0 to Q0_3, Q1_0 to Q1_3, and Q2_0 to Q2_3 are accumulated in queues # 0, # 1, and # 2, respectively. Transmission requests Req0_0, Req1_0, and Req2_0 are sent to the scheduler 11-1.

  In FIG. 5B, transmission requests Req0_0 and Req1_0 are sent from the shaper 12-1 and the packet scheduler 11-1 to the packet scheduler 11-2. The shaper 12-1 is for adjusting the traffic amount. The shaper 12-1 compares the token amount internally held with the length of the packet requested to be transmitted. If the token amount is large, the received transmission request is sent to the subsequent stage. Send it out. After sending, the token amount is subtracted by the packet length requested to be sent. The addition of tokens is controlled by the token rate. When the token rate is low, the packet transmission rate can be reduced. When the token rate is high, the packet transmission rate can be increased. Thereby, the packet transmission rate is controlled.

  In the state shown in FIG. 5B, the token amount is handled as being larger than the request packet length. Since the packet scheduler 11-1 has priority control, a transmission request Req1_0 having a high priority is output.

  Next, in FIG. 6A, a transmission request Req0_0 is output from the packet scheduler 11-2 to the packet transmission unit 7. This is because, among the transmission requests Req0_0 and Req1_0 input to the packet scheduler 11-2, the transmission request Req0_0 has a higher priority input. In FIG. 6B, the packet transmitting unit 7 that has received the transmission request Req0_0 starts to transmit a packet obtained from the packet information Q0_0 indicated by the transmission request Req0_0, and returns a completion notification Ack to the packet scheduler 11-2. .

  Next, in FIG. 7A, the packet scheduler 11-2 that has received the completion notification Ack stops the transmission request Req0_0 and returns a completion notification Ack to the port (shaper 12-1) that has input the transmission request Req0_0. ing. During this time, if all the packets of the packet information Q0_0 are not transmitted, the packets are continuously transmitted as they are. In FIG. 7B, the shaper 12-1 that has received the completion notification Ack returns the completion notification Ack to the queue # 0.

  Next, in FIG. 8A, the queue # 0 that has received the completion notification Ack deletes the packet information Q0_0, and further transmits a transmission request Req0_1 for the queued packet information Q0_1 to the shaper 12-1. Yes. In FIG. 8B, since the transmission request Req0_0 has just been transmitted, the amount of tokens in the shaper 12-1 is less than the packet length of the packet information Q0_1, and therefore the transmission request is not sent to the packet scheduler 11-2. However, since the transmission request Req1_0 is notified to the low priority port of the packet scheduler 11-2, the packet scheduler 11-2 sends the transmission request Req1_0 to the packet transmission unit 7.

  Next, in FIG. 9A, the packet transmission unit 7 confirms the packet transmission state, and if the packet is being transmitted, the completion notification Ack for the transmission request Req1_0 is not returned, but at present, the previous packet information Q0_0 Since the transmission of the packet is completed, the transmission request Req1_0 is accepted, a completion notification Ack is returned to the packet scheduler 11-2, and transmission of the packet indicated by the packet information Q1_0 is started. In FIG. 9B, the completion notification Ack received by the packet scheduler 11-2 is transmitted to the low priority port that requested the transmission request Req1_0, and at the same time, the transmission request Req1_0 sent to the packet transmission unit 7 is stopped. The completion notification Ack is received by the packet scheduler 11-1, and the packet scheduler 11-1 sends the completion notification Ack to the queue # 1 connected to the high priority port that has transmitted the transmission request Req1_0. .

  Next, in FIG. 10A, since the packet length indicated by the packet information Q0_1 corresponding to the transmission request Req0_1 exceeds the token amount in the shaper 12-1, the transmission request Req0_1 is sent to the packet scheduler 11-2. The Further, the queue # 1 deletes the packet information Q1_0 by the completion notification Ack received first, and sends the transmission request Req1_1 of the next queued packet information Q1_1 to the packet scheduler 11-1. The packet scheduler 11-1 sends the transmission request Req1_1 notified to the high priority port to the packet scheduler 11-2. In FIG. 10B, the packet scheduler 11-2 sends the transmission request Req0_1 notified to the high priority port to the packet transmission unit 7, and the packet transmission unit 7 receiving the transmission request confirms the packet transmission state. When the packet is not sent, a completion notification Ack is sent to the packet scheduler 11-2 and a packet indicated by the transmission request Q0_1 is sent.

  Such a transmission request (Req) and a completion notification (Ack) indicating that the request has been accepted, and one of the operation modes of the shapers 12-1 to 12-L and the packet schedulers 11-1 to 11-K. QoS processing is performed using a packet length for performing certain weighted fair control (described later).

  Next, FIGS. 11 and 12 are block diagrams illustrating an example of a connection form between the selector 10 and the packet schedulers 11-1 to 11-K and the shapers 12-1 to 12-L. As shown in FIG. 11, the outputs of the packet schedulers 11-1 to 11-K are fixedly connected to the shapers 12-1 to 12-K, and as shown in FIG. By connecting the shapers 13-1 to 13 -J with the selector 10, the connection terminals of the selector 10 can be reduced or the output bands from the queues # 0 to #J can be reduced compared to the configuration of FIG. You may make it operate | move in the state which narrowed down beforehand.

  Next, FIG. 13 is a block diagram illustrating a configuration example of the packet schedulers 11-1 to 11-K. The packet scheduler 11-k (k = 0 to K) shown in FIG. 13 is a four-input configuration example and includes a counter control unit 20 and a ReqAck control unit 21. The counter control unit 20 includes counters # 0 to # 3 for performing weighted fair control corresponding to the number of inputs, and controls the operations of the counters # 0 to # 3. The counter control unit 20 changes the state of the ReqAck control unit 21 to Si (i = 0 to 3) to be described later, that is, the packet scheduler 11- (k + 1), the shaper 12- (l), or the packet in the subsequent stage. When notifying the transmission unit 7 of a transmission request (Req), the frame length of the packet is changed to the previous packet scheduler 11- (ki-1), shaper 12- (l-1), or queue #j. Of the transmission requests from the counter #i corresponding to the input to be notified to the packet scheduler 11- (k + 1) in the subsequent stage.

  More specifically, the counter control unit 20 includes a credit unit 20-1 for adjusting the operations of the counters # 0 to # 3 in the weighted fair control. The counter control unit 20 is when any of schedi (i = 0 to 3), which will be described later, is 1 (when there is a scheduling completed state), that is, when there is an input of a packet transmittable state, and When the value of the credit unit 20-1 is negative or 0, the weight #i is not added to each counter #i. Further, when the packet scheduler 11-k makes a transmission request for the input #i, the value for the packet length is subtracted from the counter #i, and the value for the packet length is added to the credit unit 20-1.

  Further, the counter control unit 20 is when all of schedi (i = 0 to 3), which will be described later, are 0 (no scheduling complete state), that is, when there is no input of a packet transmittable state, and When the value of the credit unit 20-1 is positive, the weights # 0 to # 3 corresponding to the counters # 0 to # 3 are added. When adding the weights # 0 to # 3, the added amount is subtracted from the credit unit 20-1.

  That is, the counter control unit 20 makes a transmission request by using the credit unit 20-1 described above (by adding the value of the credit unit 20-1 to the determination condition as to whether or not to add a weight to the counter). Each time, the weight corresponding to the packet length subtracted from the corresponding counter #i (i = 0 to 3) is again distributed as a weight to all the counters # 0 to # 3. The condition that schedi (i = 0 to 3) becomes 1 is a case where a transmission request is notified by “ReqIni (i = 0 to 3) and the counter value is positive or 0”.

  As described above, the effect of using the credit unit 20-1 is that the packet scheduler 11-k (k = 0 to 0) is added to the counters # 0 to # 3 immediately after making a transmission request for one packet. Even if the output of 3) is high speed or low speed, the addition to the counters # 0 to # 3 can be completed halfway (scheduling completed state) until the next output line becomes available. Further, the values of the weights # 0 to # 3 can be reduced, and if the values of the weights # 0 to # 3 are small, the accuracy of the weighted fair control can be increased.

  Further, when the transmission rate is low, that is, when the time from notification of the transmission request (Req) until the completion notification (Ack) is returned is long, when the credit unit 20-1 is not used, the weight is set to each counter. It continues to add to # 0 to # 3. For this reason, when the maximum value of the counter or a certain threshold value is reached, a mechanism for stopping the addition to the counters # 0 to # 3 is required. In such a case, the values of all the counters # 0 to # 3 are the same value, so that only fair control is performed, and weighted fair control cannot be performed. Therefore, weighted fair control is performed even when the transmission rate is low by using the credit unit 20-1 to distribute only the packet length requested for transmission as a weight to the counters # 0 to # 3. Will be able to.

  As another concept, after a packet transmission request is transmitted, the next transmission request can be transmitted after transmission packet length ÷ output bandwidth. The transmission request is made and then added to the credit unit 20-1, which is distributed to each of the counters # 0 to # 3. However, after all the distribution is performed, the distribution to the counters # 0 to # 3 is stopped. Next, distribution starts when the next transmission request is sent. For this reason, when this distribution is averaged, the distribution speed is the same as the output band. Accordingly, even when the output band is high speed or low speed, the operation is performed so that the distribution speed is adjusted to match the output band.

  The frame length added to or subtracted from the counters # 0 to # 3 and the credit unit 20-1 described above is obtained from PIIni (i = 0 to 3), which will be described later, or only the management number is notified by PIIni. If there is, the frame length is retrieved from the packet information table 3-1 using this management number. Furthermore, it is also useful to use a value obtained by adding a header (tunneling header or the like) added at the time of actual packet transmission or information (such as an Ethernet frame preamble or FSC) as the frame length.

  The ReqAck control unit 21 is in an initial state of idle according to an external priority control / weighted fair control operation switching instruction, and in a state where a transmission request (ReqOut) is made in the subsequent stage Si (i = 0, 1, 2, 3) , The completion notification (AckIn) from the subsequent stage is received, and the packet is transmitted using the state Wi (i = 0, 1, 2, 3) waiting for the operation cycle time indicated by the delay unit 21-1 to elapse. Controls the output of information to the subsequent stage. The transmission request (ReqOut) becomes 1 when the state transits to Si (i = 0, 1, 2, 3), and becomes 0 otherwise. When the current state is S0, PIIn0 packet information is output to PIOut, PIIn1 packet information is output when it is S1, PIIn2 packet information is output when it is S2, and PIIn3 packet information is output when it is S3.

  AckOuti (i = 0, 1, 2, 3) is A0 when only the AckOut0 is 1 when the state when the completion notification (AckIn) is received from the subsequent stage is A0, AckOut1 is 1 when S1, and AckOut2 when S2 Only 1 and when S3, only AckOut3 becomes 1, and a completion notification is transmitted to the preceding packet scheduler. Here, the state transition in the weighted fair control operation is shown in FIG. 14, and the condition of the state transition in the weighted fair control operation is shown in FIG.

  Here, when the packet schedulers 11-1 to 11-n are connected in multiple stages through the selector 10, the delay unit 21-1 receives a completion notification (AckIn) from the subsequent stage, immediately checks the input state, If the input is selected, even if a transmission request for the next packet is sent after the completion notification Ack reaches the queues # 0 to #J, the transmission request cannot be received due to a propagation delay. Therefore, the influence of the propagation delay is eliminated by setting a value in consideration of the propagation delay in the delay unit 21-1. In addition, delay shown in FIG. 15 has shown the value set to the delay part 21-1.

Next, the operation of the above-described embodiment will be described.
First, basic operations of priority control and weighted fair control by the packet processing apparatus of the present embodiment will be described. FIG. 16 is a configuration and a sequence diagram for explaining basic operations of priority control and weighted fairness control by the packet processing apparatus of this embodiment. Here, in order to simplify the explanation, as shown in FIG. 16A, a basic configuration for outputting packet information from two queues # 0 and # 1 via the packet scheduler 11-1 will be described as an example. To do.

  In the priority control, in the packet scheduler 11-1, the input on the queue # 0 side is higher in priority than the input on the queue # 1 side. In this case, while outputting the current packet information (which may be either queue # 0 or # 1), packet information Q0_m (m = 1 to m) is input to queue # 0, which is the higher priority input. If 4) is input, the packet information Q0_m is preferentially output. Therefore, the packet information Q0_m from the queue # 0 on the higher priority side is sent in the minimum sendable time (see the arrow in the figure).

  Next, in the weighted fair control, the packet scheduler 11-1 assumes that the two inputs have the same weight, and the queues # 0 and # 1 have the same packet length. In this case, that is, when the weights are the same, packet information Q0_m of queue # 0 and packet information Q1_m (m = 1 to 5) of queue # 1 are alternately output. Therefore, although it is not transmitted with the minimum waiting time, according to the designated weight, in this case, since both are the same, they are alternately output (band division according to the weight).

  Next, the weighted fair control operation by the packet processing apparatus of this embodiment will be described. Here, FIG. 17 is a flowchart for explaining an operation example of the counter control unit 20 and the ReqAck control unit 21 during the weighted fair control. First, the counter control unit 20 resets the counters # 0 to # 3 and the credit unit 20-1 to 0 (S1). Next, the ReqAck control unit 21 determines whether or not the state transitions from the initial state Idle or the state Wi (i = 0, 1, 2, 3) to the state S0 (S2). When the state transitions from the initial state Idle or the state Wi (i = 0, 1, 2, 3) to the state S0, the packet length obtained from PIIn0 is subtracted from the counter # 0, and the packet length is converted to the credit unit 20. −1 is added (S3), and the process returns to step S2.

  On the other hand, when the initial state Idle or the state Wi (i = 0, 1, 2, 3) has not changed to the state S0, the ReqAck control unit 21 performs the initial state Idle or the state Wi (i = 0, 1, It is determined whether or not the state has changed from (2, 3) to state S1 (S4). When the state transitions from the initial state Idle or the state Wi (i = 0, 1, 2, 3) to the state S1, the packet length obtained from PIIn1 is decremented from the counter # 1, and the packet length is converted to the credit unit 20 −1 is added (S5), and the process returns to step S2.

  On the other hand, when the initial state Idle or the state Wi (i = 0, 1, 2, 3) has not changed to the state S1, the ReqAck control unit 21 performs the initial state Idle or the state Wi (i = 0, 1, It is determined whether or not the state has shifted from (2, 3) to state S2 (S6). When the state transitions from the initial state Idle or the state Wi (i = 0, 1, 2, 3) to the state S2, the packet length obtained from PIIn2 is decremented from the counter # 2, and the packet length is converted to the credit unit 20. −1 is added (S7), and the process returns to step S2.

  On the other hand, when the initial state Idle or the state Wi (i = 0, 1, 2, 3) has not transited to the state S2, the ReqAck control unit 21 performs the initial state Idle or the state Wi (i = 0, 1, It is determined whether or not the state has changed from (2, 3) to state S3 (S8). When the state transitions from the initial state Idle or the state Wi (i = 0, 1, 2, 3) to the state S3, the packet length obtained from the PIIn3 is subtracted from the counter # 3, and the packet length is converted to the credit unit 20. -1 is added (S9), and the process returns to step S2.

  If none of the cases is true, it is determined whether any of schedi (i = 0, 1, 2, 3) is 1 and the value of the credit unit 20-1 is 0 or less. (S10). Then, any one of schedi (i = 0, 1, 2, 3) is 1 (scheduling completion state), that is, there is an input of a packet transmission enabled state, and the value of the credit unit 20-1 is 0 or less. (Scheduling completed state), that is, if there is an input of a packet transmittable state, the process returns to step S2 without adding the weights to the counters # 0 to # 3.

  On the other hand, if this is not the case, that is, if there is no input in a state where packet transmission is possible, the variable n is set to 0 (S11), and it is determined whether or not the variable n is equal to or greater than the number of inputs (this time 4) (S12). If the variable n is not 4 or more, it is determined whether a transmission request is received (ReqIn = 1) (S13). If no transmission request is received (ReqIn = 0), it is determined whether or not the counter #n (n = 0 to 3) is 0 or more (S14). If counter #n (n = 0 to 3) is not 0 or more, weight #n corresponding to counter #n is added and weight #n is subtracted from credit unit 20-1 (S15). On the other hand, if the counter #n (n = 0 to 3) is 0 or more, the addition of the weight to the counter #n and the subtraction of the weight from the credit unit 20-1 are not performed. When a transmission request is received (ReqIn = 0), the weight #n corresponding to the counter #n is added regardless of the value of the counter #n, and the weight #n is added from the credit unit 20-1. Subtract (S15).

  Next, in either case, the variable n is incremented by one (S16), and the process returns to step S12 until the variable n becomes 4 or more, that is, until the processing for all counters # 0 to # 3 is completed. The above process is repeated. When the variable n becomes 4 or more, the process returns to step S2.

  Next, FIG. 18 is a flowchart for explaining another operation example of the counter control unit 20 and the ReqAck control unit 21 during the weighted fair control. Note that steps S21 to S33 in FIG. 18 are the same as steps S1 to S13 in FIG.

  In step S33, when it is determined whether or not a transmission request is received (ReqIn = 1), if no transmission request is received (ReqIn = 0), the counter #n (n = 0 to 3) is 0. As described above, it is determined whether the delay unit 21-1 has received 0 or a completion notification Ack (S34). If counter #n (n = 0 to 3) is not equal to or greater than 0, or delay unit 21-1 has not received 0 or completion notification Ack, weight #n corresponding to counter #n is added. The weight #n is subtracted from the credit unit 20-1 (S35). On the other hand, when the counter #n (n = 0 to 3) is 0 or more and the delay unit 21-1 receives 0 or the completion notification Ack, the value of the counter #n is added to the credit unit 20-1. At the same time, the value of the counter #n is set to 0 (S36). When a transmission request is received (ReqIn = 0), the counter #n is set regardless of the value of the counter #n, the value of the delay unit 21-1, or the completion notification Ack. The corresponding weight #n is added and the weight #n is subtracted from the credit unit 20-1 (S35).

  In either case, the variable n is incremented by one (S37), and the process returns to step S32. Until the variable n reaches the number of inputs (this time, 4) or more, that is, for all counters # 0 to # 3. The above-described processing is repeated until the processing is completed. When the variable n becomes 4 or more, the process returns to step S22.

  The difference between the processing of FIG. 17 and FIG. 18 is the operation when the value of the counter of the input that has not received a transmission request takes a positive value. The sum of the credit unit 20-1 and the counters # 0 to # 3 is basically 0. Therefore, in the case of the operation shown in FIG. 17, if any counter #i (i = 0-3) is a positive value, the other counters #p (p = 0-3; other than i) are negative. It is thought that it is. Therefore, when all the values of the credit unit 20-1 are distributed, the next packet is sent out, until the packet length is added to the credit unit 20-1, or until no scheduling completion state is input. The weights # 0 to # 3 are not added to the counters # 0 to # 3. As a result, there is a possibility that input scheduling completion for the counter #p having the negative value is delayed. Therefore, in the operation shown in FIG. 18, for a counter #i having a positive value even though no transmission request is received, the value of the counter #i is set to 0, and the value of the counter #i Is returned to the credit unit 20-1, and the weight addition speed is apparently improved.

  By the way, although the addition method to the counters # 0 to # 3 described above is described as being performed sequentially in FIGS. 17 and 18, parallel processing may be performed. In this case, it is necessary to consider that no competition occurs when subtracting from the credit unit 20-1. In addition, the addition of the weights to the counters # 0 to # 3 is performed by adjusting the count-up time according to the weights (if the weight is 4, the count-up cycle is 4), or an adder is used. Conceivable.

  Here, FIGS. 19A to 19D are timing charts showing an operation example in the case of performing simultaneous addition (parallel processing), sequential addition, and count-up time as an addition method to the counter described above. It is. FIG. 19A shows a state in which the weights # 0 to # 3 are simultaneously added to the counters # 0 to # 3. FIG. 19B shows the weights # 0 to # 3 to the counters # 0 to # 3. A state in which 0 to # 3 are sequentially added is shown. FIG. 19C shows a state in which the count-up time is adjusted and the counters # 0 to # 3 are simultaneously counted up. FIG. 19D shows the count-up time being adjusted. The counters # 0 to # 3 are sequentially counted up (the shaded area is the count up time).

  From the viewpoint of circuit scale, FIG. 19A shows four adders, FIG. 19B shows one adder, FIG. 19C shows four counters, and FIG. 19D shows counters. Therefore, the circuit scale becomes smaller in the order of (a)> (b)> (c)> (d). However, the operating frequency required for high-speed operation increases in the order of (a) <(b) <(c) <(d). Therefore, the counter control method to be used is selected in consideration of the circuit scale and the operating frequency.

Next, the priority control operation will be described.
Since the counter control unit 20 is not used during the priority control operation, it may be stopped. Basically, the same operation as in weighted fair control is performed. The difference is the state transition. FIG. 20 shows state transitions during priority control, and FIG. 21 shows conditions for state transitions during priority control. The priority order of input indicates the case of input # 0> input # 1> input # 2> input # 3. When ReqIn exists due to this state transition, the transmission requests input in the priority order can be notified to the subsequent packet scheduler. In the case of priority control, the delay unit 21-1 is particularly important, and the reason will be described with reference to FIGS. 22 (a) and 22 (b).

  22A and 22B, each of the packet schedulers 11-1 and 11-2 is a priority control scheduler and is connected in a hierarchical manner. In order to simplify the explanation, the number of input ports is two. At this time, the transmission of the packet indicated by the first packet information Q0_0 in the queue # 0 is started, and the completion notification Ack is returned to the packet scheduler 11-2. As an expected operation, what is output next to the packet information Q0_0 is a packet indicated by the packet information Q0_1.

  As shown in FIG. 22A, when there is no delay control, the transmission request notified to the high priority port is sent when the completion notification Ack is sent from the packet scheduler 11-2 to the packet scheduler 11-1. In order to cancel once, there is no transmission request from the high priority port. At this time, since the transmission request is notified to the low priority port, the packet indicated by the packet information Q2_0 from the queue # 2 connected to the low priority port is output next to the packet indicated by the packet information Q0_0. End up.

  As shown in FIG. 22B, even when there is delay control, when the packet scheduler 11-2 sends a completion notification Ack to the packet scheduler 11-1, the transmission request notified to the high priority port is sent. Although it cancels once, since it has set 3 to the delay part 21-1, it will be in a waiting state. After the packet scheduler 11-2 sends a completion notification Ack to the packet scheduler 11-1, the packet scheduler 11-1 sends a completion notification Ack to the queue # 0 for one cycle, and the queue # 0 sends the packet information Q0_1. It takes one cycle to send a request, and one cycle for the packet scheduler 11-2 to make a transmission request to the packet scheduler 11-1, a total of three cycles, from sending a completion notification Ack to receiving a transmission request Req. When the transmission request Req for the packet information Q0_1 is received, the delay of the delay unit 21-1 is 0, so the packet scheduler 11-1 selects an input port to be output at this time.

  Next, when the packet scheduler 11-2 receives Q0_1, the delay section of the packet scheduler 1-2 is exactly 0, so the packet scheduler 11-2 selects an input port to be output at this point. Of course, in this case, the packet indicated by the packet information Q0_1 notified to the high priority port is output.

  In this way, in particular, when the priority control schedulers are used in a hierarchical connection, the delay time operation from when the completion notification Ack is sent until the transmission request Req is received is correct (in this case, the packet Packet scheduling is possible (the packet indicated by the packet information Q0_1 is output next to the packet indicated by the information Q0_0).

  Next, the state of each signal during the weighted fair control operation will be described using a simple scheduling configuration as shown in FIG. In FIG. 23, each of queues # 0 to # 3 connected to four inputs of a packet scheduler (collectively referred to as packet scheduler 11) has packet information Q0_0 to Q0_3, packet information Q1_0 to Q1_3, packet Information Q2_0 to Q2_3 and packet information Q3_0 to Q3_3 are accumulated, and the packet scheduler 11 is notified of transmission requests ReqIn0 to ReqIn3. The packet information stored in each of the queues # 0 to # 3 is indicated by Qj_m (j: queue number, m: number of packet information given in the order of storage).

  When the packet to be transmitted is determined by the packet scheduler 11, the transmission request ReqOut is transmitted to the packet transmission unit 7 together with the packet information as described above. The packet transmission unit 7 that has received the transmission request ReqOut transmits a packet indicated by the packet information Qj_m and sends a completion notification AckIn to the packet scheduler 11 if the packet can be transmitted. The packet scheduler 11 that has received the completion notification AckIn notifies the transmission request source queue #j (j = 0 to 3) of the completion notification AckOuti (i = 0 to 3). Upon receiving the completion notification AckOuti, the queue #j releases the packet information Qj_m, notifies the next packet information, and notifies the packet scheduler 11 of a transmission request.

  In the following description, the weights # 0 to # 3 for each input of the packet scheduler 11 are 16 for the input # 0, 12 for the input # 1, 8 for the input # 2, and the input # 3 is described as 4 (4: 3: 2: 1). Further, the length of the packet indicated by each piece of packet information stored in the queues # 0 to # 3 is set to 100 for the sake of simplicity. For the same reason, the delay time set in the delay unit 21-1 is set to zero.

  Next, FIG. 24 is a timing chart showing the state of each signal (Reqin, PIIn, AckOut, PIOut, AckIn, and counter value) during the weighted fair control operation according to the present embodiment.

  The period A is an initial state, the packet scheduler is in an idle state, the values of the counters # 0 to # 3 are 0, and each input # 0 to # 3 includes packet information along with a transmission request. Entered. Since ReqIn0 to ReqIn3 are set for each input # 0 to # 3 and the counters # 0 to # 3 are 0, the schedule is in a completed state (sched0 to sched3 is 1). At this time, the internal state of the packet scheduler 11 transitions from the idle state Idle to the state S0.

  In period B, since the internal state is S0, ReqOut and packet information Q0_0 are sent to the packet transmitter 7. Further, 100, which is the length of the packet indicated by packet information Q0_0, is subtracted from the value of counter # 0 (becomes -100). In addition, the packet length is added to the credit unit 20-1, and the credit value becomes 100.

  In the period C, the packet transmission unit 7 has not sent a packet before this, so there is a free line. For this reason, the packet indicated by the packet information Q0_0 is immediately transmitted, and a completion notification AckIn is returned to the packet scheduler 11. The packet scheduler 11 that has received the completion notification AckIn transitions to the state W0 because the current state is S0. In addition, since the credit value ≧ 0, the addition of the weights # 0 to # 3 to the counters # 0 to # 3 is started.

  In the period D, since the current state is W0, a completion signal AckOut0 is transmitted from the input # 0 to notify the queue # 0 that the transmission is completed. At this time, the delay time by the delay unit 21-1 is set. In this explanation, since 0 is considered, delay == 0 always holds. Normally, since a value other than 0 is set, the process waits without changing the state for the set cycle. Since ReqIn1 is currently set and the value of the counter # 1 is 0, scheduling for the input # 1 is completed (sched1 = 1). Since delay == 0, the internal state of the packet scheduler 11 changes from W0 to S1.

  By the way, the signals ReqIn0 to ReqIn3 are written as pulses in FIG. 24. However, because the packet scheduler 11 internally requests transmission, ReqIn1 is set even in the period D. Treat as being. In practice, this can be dealt with by using a Set-Reset flip-flop, the Set terminal is connected to ReqIn0 to ReqIn3, the Reset terminal is connected to AckIn, and the output is ReqIn0 to ReqIn3. Thus, it can be handled that ReqIn0 to ReqIn3 are received after receiving ReqIn0 to ReqIn3 until receiving AckIn.

  In the period E, since the internal state is S1, the packet information Q1_0 is output as PIOut and the transmission request ReqOut is notified to the packet transmission unit 7. Unlike the period C, since the packet of the packet information Q0_0 is currently being transmitted, the transmission completion is not notified until the period G when the transmission is completed. Also, the packet length 100 is subtracted from the counter # 1 (becomes -100). Further, the packet length is added to the credit unit 20-1.

  In the period G, all the values of the credit unit 20-1 are distributed to the counters # 0 to # 3 and become 0, and the scheduling has been completed ((sched0‖sched1‖sched2‖sched3). = 1) Stop addition to each counter # 0 to # 3. By the time period G, the credit unit 20-1 has accumulated a total of 200, and the total of 80, 60, 40, 20 has been added to each of the counters # 0 to # 3, and the inputs # 0 and # 1 Since a frame transmission request is made (the counters # 0 and # 1 are each subtracted by 100), the current values of the counters # 0 to # 3 are −20, −40, 40, and 20, respectively.

  In the period H, since the transmission completion for the input 1 sent out is notified, the current state S1 changes to the state W1.

  In the period I, since the state is W1, a completion signal AckOut1 is transmitted from the input # 1 to notify the queue # 1 that the transmission is completed. At this time, a delay time is set in the delay unit 21-1 (in this case, 0). At this time, since ReqIn2 is set and the value of the counter # 2 is 40, the scheduling for the input # 2 is completed, and the state transitions from the state W1 to the state S2.

The same processing is performed after the period J.
In the period Q, since the packet transmission of the packet information Q2_0 is completed, the transmission of the packet information Q3_0 that has issued the transmission request is started, and the completion notification Ack is returned. Thereby, the process transits from S3 to W3.

  In the period R, since the state is W3, the completion signal AckOut is notified to the input # 3. Further, since the scheduling for the input # 0 has been completed, the state transitions from state W3 to state S0.

  Packets output by continuing such processing are as shown in the bottom row of FIG. That is, looking at the 10 packets shown in the figure, there are 4 packets for queue # 0, 3 packets for queue # 1, 2 packets for queue # 2, and 1 packet for queue # 3. It can be seen that the packets were transmitted at the ratio of 4: 3: 2: 1 specified in.

  According to the above-described embodiment, the packet scheduler circuit block remains unchanged, and the control method is changed to perform priority control and weighted fair control, thereby realizing high-speed packet processing and adjusting or changing communication quality control. The degree of freedom can be expanded.

  In the above-described embodiment, the series of processes performed by the packet input unit 1, the packet identifier 4, the queue control unit 5, the QoS processing unit 6, the packet transmission unit 7 and the like described above are computer-readable in the form of a program. The above processing may be performed by storing the program in a possible recording medium and reading and executing the program by a computer. That is, in the packet input unit 1, the packet identifier 4, the queue control unit 5, the QoS processing unit 6, the packet transmission unit 7, etc., a central processing unit such as a CPU reads the above program into a main storage device such as a ROM or a RAM. It may be realized by executing information processing / arithmetic processing.

  Here, the computer-readable recording medium means a magnetic disk, a magneto-optical disk, a CD-ROM, a DVD-ROM, a semiconductor memory, or the like. Alternatively, the computer program may be distributed to the computer via a communication line, and the computer that has received the distribution may execute the program.

It is a block diagram which shows the structure of the packet processing apparatus by embodiment of this invention. It is a block diagram which shows the structure of a QoS process part. It is a block diagram which shows the example of the connection setting in a QoS process part. It is a block diagram which shows the example of the connection setting in a QoS process part. It is a block diagram for demonstrating operation | movement of a QoS process part. It is a block diagram for demonstrating operation | movement of a QoS process part. It is a block diagram for demonstrating operation | movement of a QoS process part. It is a block diagram for demonstrating operation | movement of a QoS process part. It is a block diagram for demonstrating operation | movement of a QoS process part. It is a block diagram for demonstrating operation | movement of a QoS process part. It is a block diagram which shows an example of the connection form of a selector, a packet scheduler, and a shaper. It is a block diagram which shows an example of the connection form of a selector, a packet scheduler, and a shaper. It is a block diagram which shows one structural example of a packet scheduler. It is a conceptual diagram which shows the state transition in weighted fair control operation | movement. It is a figure which shows the conditions of the state transition in weighted fair control operation | movement. FIG. 5 is a configuration for explaining basic operations of priority control and weighted fairness control by the packet processing apparatus of the present embodiment, and respective sequence diagrams. It is a flowchart for demonstrating one operation example of the counter control part at the time of weighted fair control. It is a flowchart for demonstrating the other operation example of the counter control part at the time of weighted fair control. It is a timing chart which shows the example performed by adjusting simultaneous addition (parallel processing), sequential addition, and count-up time as an addition method to the counter mentioned above. It is a conceptual diagram which shows the state transition at the time of priority control. It is a figure which shows the conditions of the state transition at the time of priority control. It is a block diagram for demonstrating the importance of the delay part at the time of priority control. It is a block diagram which shows the example of 1 structure for demonstrating the mode of each signal at the time of weighted fair control operation | movement. It is a timing chart which shows the mode of each signal at the time of weighted fair control operation | movement.

Explanation of symbols

1 packet input unit 2 packet buffer (storage means)
3 Free space management table 3-1 Packet information table 4 Packet identifier 5 Queue control unit (multiple queues)
6 QoS processing unit 7 Packet transmission unit (transmission means)
10 Selector (route switching means)
11-1 to 11-K packet scheduler (multiple weighted fair control means, multiple priority control means)
12-1 to 12-L shaper (packet transmission rate adjusting means)
12-1 to 12-K shaper (packet transmission rate adjusting means)
13-1 to 13-J shaper (packet transmission rate adjusting means)
20 Counter control unit (multiple counters)
20-1 Credit part (addition means)
21 ReqAck control part 21-1 delay part (adjustment means)

Claims (13)

In the packet communication quality control device that controls and outputs the communication quality of the input communication packet,
Storage means for storing packet data indicating the input communication packet;
A plurality of queues for sequentially storing packet information, which is information relating to packet data stored in the storage means;
A plurality of weighted fair control means for reading out and outputting the packet information stored in the plurality of queues based on a predetermined order;
Transmitting means for reading out packet data specified by the packet information output from the plurality of weighted fair control means from the storage means, and generating and transmitting a communication packet based on the packet data;
A path switching means for accommodating the plurality of queues, the plurality of weighted fair control means, and the transmission means, and for connecting the input and output of these units to each other so as to be switchable;
The queue outputs the packet information to be stored and a packet data output request corresponding to the packet information to the corresponding connection partner via the path switching unit,
The weighted fair control means includes a plurality of counters corresponding to each of the inputs, and an adding means for adjusting the cumulative speed of the weights to the multiple counters. While there is no input capable of transmitting an output request while adjusting by the adding means, and until the value of the counter reaches a predetermined threshold, a predetermined weight is added to the counter, Based on the value and the output request from the previous stage input through the route switching unit, the packet information and the output request input through the route switching unit are selected, and the response is made through the route switching unit. Output to the connection partner,
The transmission means reads packet data specified by packet information input together with the output request in response to the input output request from the storage means, generates a transmission packet based on the packet data, and transmits the packet. A packet communication quality control device.   The plurality of weighted fair control means, when selecting the packet information and the output request based on the value of the plurality of counters and the output request from the previous stage input via the path switching means, from the connection partner 2. The packet communication quality control apparatus according to claim 1, wherein when a transmission completion notification is input, a transmission completion notification is transmitted to the connection partner that requested the output.   The plurality of weighted fair control means, after sending the output request to the subsequent stage, subtracts the packet length of the requested packet from the counter corresponding to the requested input, and adds the packet length of the requested output packet 3. The packet according to claim 1, wherein the packet is accumulated in said means, while a weight is accumulated in said plurality of counters based on the value of said adder, and the value of said adder is subtracted by said weight. Communication quality control device.   The plurality of weighted fair control means, when there is no input capable of transmitting an output request and the value of the counter reaches a predetermined threshold value, after adding the values of the plurality of counters to the adding means 4. The packet communication quality control apparatus according to claim 3, wherein the values of the plurality of counters are set to zero.   The plurality of weighted fair control means includes an adjusting means for adjusting a time from reception of a transmission completion notification from the connection partner to reception of packet information and an output request input from the next connection partner. 5. The packet communication quality control device according to claim 1, wherein   A plurality of packet sending rate adjusting means are provided in the preceding stage or the succeeding stage of each of the plurality of weighted fair control means and control the packet sending rate based on the packet length of the packet requested to be output from the preceding stage. The packet communication quality control apparatus according to claim 1.   The plurality of packet transmission rate adjusting means are connected to the input / output of the path switching means, and the upstream and downstream stages of the plurality of weighted fair control means are arranged by the switching operation by the path switching means. The packet communication quality control apparatus according to claim 6.   7. The plurality of packet transmission rate adjusting means, the input is connected to the output of the plurality of weighted fairness control means, and the output is connected to the input of the path switching means. Packet communication quality control device.   7. The packet communication quality according to claim 6, wherein the plurality of packet transmission rate adjusting means have their inputs connected to the outputs of the plurality of queues and their outputs connected to the inputs of the path switching means. Control device. In the packet communication quality control device that controls and outputs the communication quality of the input communication packet,
Storage means for storing packet data indicating the input communication packet;
A plurality of queues for sequentially storing packet information, which is information relating to packet data stored in the storage means;
A plurality of priority control means for reading out and outputting the packet information stored in the plurality of queues based on a predetermined order;
Transmission means for reading out packet data specified by packet information output from the plurality of priority control means from the storage means, and generating and transmitting a communication packet based on the packet data;
A path switching unit that accommodates the plurality of queues, the plurality of priority control units, and the transmission unit, and connects the input and output of these units so as to be switchable with each other.
The queue outputs the packet information to be stored and a packet data output request corresponding to the packet information to the corresponding connection partner via the path switching unit,
The priority control means includes an adjusting means for adjusting a time from reception of a transmission completion notification from one of the subsequent connection partners until reception of the packet information and output request input from the next previous connection partner. Comprising, after the time adjustment by the adjusting means, selecting and outputting the packet information and the output request from any one of the preceding connection partners based on the priority specific to each of the preceding connection partners;
In response to the output request, the transmission means reads packet data specified by the packet information output together with the output request from the storage means, generates a transmission packet based on the packet data, and transmits the packet And a packet communication quality control device.   The priority control means, when selecting any one packet information and output request based on the priority specific to each connection partner, when a transmission completion notification is input from the connection partner, 11. The packet communication quality control apparatus according to claim 10, wherein a transmission completion notification is transmitted to the other party. In a packet communication quality control method for controlling and outputting the communication quality of an input communication packet,
Storing packet data indicating the input communication packet;
Sequentially storing packet information, which is information about the packet data, in a plurality of queues;
A step of adding a predetermined weight to a plurality of counters until a predetermined threshold is reached when there is no queue capable of transmitting an output request;
Controlling an accumulation frequency of weights to the plurality of counters;
Selecting packet information and output requests input from the plurality of queues based on the accumulated weight value and output requests from the plurality of queues;
Reading packet data specified by the selected packet information, generating and transmitting a communication packet based on the packet data, and a packet communication quality control method. In a packet communication quality control method for controlling and outputting the communication quality of an input communication packet,
Storing packet data indicating the input communication packet;
Sequentially storing packet information, which is information about the packet data, in a plurality of queues;
Adjusting packet information and output time received from the plurality of queues until receiving the output request;
After the time adjustment, selecting and outputting packet information and output requests from any one of the plurality of queues based on a priority specific to each of the inputs;
Reading packet data specified by the packet information output together with the output request in response to the output request, generating a communication packet based on the packet data, and transmitting the packet data. Packet communication quality control method.

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