JP2007108733A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2007108733A5 JP2007108733A5 JP2006250691A JP2006250691A JP2007108733A5 JP 2007108733 A5 JP2007108733 A5 JP 2007108733A5 JP 2006250691 A JP2006250691 A JP 2006250691A JP 2006250691 A JP2006250691 A JP 2006250691A JP 2007108733 A5 JP2007108733 A5 JP 2007108733A5
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- transistor
- electrically connected
- line
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims 68
- 230000000875 corresponding Effects 0.000 claims 10
Claims (17)
前記画素は、第１乃至第５のトランジスタと、第１及び第２の保持容量と、信号線と、第１乃至第４の走査線と、第１及び第２の電源線と、容量線とを有し、
前記第１のトランジスタのゲート電極は、前記第２のトランジスタの第１の電極及び、前記第３のトランジスタの第１の電極及び、前記第４のトランジスタの第２の電極及び、前記第２の保持容量の第１の電極と電気的に接続され、第１の電極は、前記第１の電源線と電気的に接続され、第２の電極は、前記第４のトランジスタの第１の電極及び、前記第５のトランジスタの第１の電極と電気的に接続され、
前記第２のトランジスタのゲート電極は、前記第１の走査線と電気的に接続され、第２の電極は、前記信号線と電気的に接続され、
前記第３のトランジスタのゲート電極は、前記第２の走査線と電気的に接続され、第２の電極は、前記第１の保持容量の第１の電極と電気的に接続され、
前記第４のトランジスタのゲート電極は、前記第３の走査線と電気的に接続され、
前記第５のトランジスタのゲート電極は、前記第４の走査線と電気的に接続され、第２の電極は、前記発光素子の第１の電極と電気的に接続され、
前記第１の保持容量の第２の電極は、前記容量線と電気的に接続され、
前記第２の保持容量の第２の電極は、前記容量線と電気的に接続され、
前記発光素子の第２の電極は、前記第２の電源線と電気的に接続されていることを特徴とする表示装置。 A display device having a pixel provided with a light emitting element,
The pixels include first to fifth transistors, first and second storage capacitors, signal lines, first to fourth scanning lines, first and second power supply lines, and capacitance lines. Have
The gate electrode of the first transistor includes a first electrode of the second transistor, a first electrode of the third transistor, a second electrode of the fourth transistor, and the second electrode. The first electrode of the storage capacitor is electrically connected, the first electrode is electrically connected to the first power supply line, the second electrode is the first electrode of the fourth transistor, and , Electrically connected to the first electrode of the fifth transistor,
A gate electrode of the second transistor is electrically connected to the first scan line; a second electrode is electrically connected to the signal line;
A gate electrode of the third transistor is electrically connected to the second scanning line; a second electrode is electrically connected to a first electrode of the first storage capacitor;
A gate electrode of the fourth transistor is electrically connected to the third scan line;
A gate electrode of the fifth transistor is electrically connected to the fourth scan line; a second electrode is electrically connected to the first electrode of the light emitting element;
A second electrode of the first storage capacitor is electrically connected to the capacitor line;
A second electrode of the second storage capacitor is electrically connected to the capacitor line;
The display device, wherein the second electrode of the light emitting element is electrically connected to the second power supply line.
前記画素は、第１乃至第６のトランジスタと、第１及び第２の保持容量と、信号線と、第１乃至第５の走査線と、第１乃至第３の電源線と、容量線とを有し、
前記第１のトランジスタのゲート電極は、前記第２のトランジスタの第１の電極及び、前記第３のトランジスタの第１の電極及び、前記第４のトランジスタの第２の電極及び、前記第２の保持容量の第１の電極と電気的に接続され、第１の電極は、前記第１の電源線と電気的に接続され、第２の電極は、前記第４のトランジスタの第１の電極及び、前記第５のトランジスタの第１の電極及び、前記第６のトランジスタの第１の電極と電気的に接続され、
前記第２のトランジスタのゲート電極は、前記第１の走査線と電気的に接続され、第２の電極は、前記信号線と電気的に接続され、
前記第３のトランジスタのゲート電極は、前記第２の走査線と電気的に接続され、第２の電極は、前記第１の保持容量の第１の電極と電気的に接続され、
前記第４のトランジスタのゲート電極は、前記第３の走査線と電気的に接続され、
前記第５のトランジスタのゲート電極は、前記第４の走査線と電気的に接続され、第２の電極は、前記発光素子の第１の電極と電気的に接続され、
前記第６のトランジスタのゲート電極は、前記第５の走査線と電気的に接続され、第２の電極は、前記第３の電源線と電気的に接続され、
前記第１の保持容量の第２の電極は、前記容量線と電気的に接続され、
前記第２の保持容量の第２の電極は、前記容量線と電気的に接続され、
前記発光素子の第２の電極は、前記第２の電源線と電気的に接続されていることを特徴とする表示装置。 A display device having a pixel provided with a light emitting element,
The pixels include first to sixth transistors, first and second storage capacitors, signal lines, first to fifth scanning lines, first to third power supply lines, and capacitance lines. Have
The gate electrode of the first transistor includes a first electrode of the second transistor, a first electrode of the third transistor, a second electrode of the fourth transistor, and the second electrode. The first electrode of the storage capacitor is electrically connected, the first electrode is electrically connected to the first power supply line, the second electrode is the first electrode of the fourth transistor, and , Electrically connected to the first electrode of the fifth transistor and the first electrode of the sixth transistor;
A gate electrode of the second transistor is electrically connected to the first scan line; a second electrode is electrically connected to the signal line;
A gate electrode of the third transistor is electrically connected to the second scanning line; a second electrode is electrically connected to a first electrode of the first storage capacitor;
A gate electrode of the fourth transistor is electrically connected to the third scan line;
A gate electrode of the fifth transistor is electrically connected to the fourth scan line; a second electrode is electrically connected to the first electrode of the light emitting element;
A gate electrode of the sixth transistor is electrically connected to the fifth scan line; a second electrode is electrically connected to the third power supply line;
A second electrode of the first storage capacitor is electrically connected to the capacitor line;
A second electrode of the second storage capacitor is electrically connected to the capacitor line;
The display device, wherein the second electrode of the light emitting element is electrically connected to the second power supply line.
前記画素は、第１乃至第５のトランジスタと、第１及び第２の保持容量と、信号線と、第１乃至第４の走査線と、第１及び第２の電源線と、容量線とを有し、
前記第１のトランジスタのゲート電極は、前記第２のトランジスタの第１の電極及び、前記第４のトランジスタの第２の電極及び、前記第１の保持容量の第１の電極と電気的に接続され、第１の電極は、前記第１の電源線と電気的に接続され、第２の電極は、前記第４のトランジスタの第１の電極及び、前記第５のトランジスタの第１の電極と電気的に接続され、
前記第２のトランジスタのゲート電極は、前記第１の走査線と電気的に接続され、第２の電極は、前記信号線と電気的に接続され、
前記第３のトランジスタのゲート電極は、前記第２の走査線と電気的に接続され、第１の電極は、前記第１の保持容量の第２の電極及び、前記第２の保持容量の第１の電極と電気的に接続され、第２の電極は、前記容量線と電気的に接続され、
前記第４のトランジスタのゲート電極は、前記第３の走査線と電気的に接続され、
前記第５のトランジスタのゲート電極は、前記第４の走査線と電気的に接続され、第２の電極は、前記発光素子の第１の電極と電気的に接続され、
前記第２の保持容量の第２の電極は、前記容量線と電気的に接続され、
前記発光素子の第２の電極は、前記第２の電源線と電気的に接続されていることを特徴とする表示装置。 A display device having a pixel provided with a light emitting element,
The pixels include first to fifth transistors, first and second storage capacitors, signal lines, first to fourth scanning lines, first and second power supply lines, and capacitance lines. Have
The gate electrode of the first transistor is electrically connected to the first electrode of the second transistor, the second electrode of the fourth transistor, and the first electrode of the first storage capacitor. The first electrode is electrically connected to the first power supply line, and the second electrode is connected to the first electrode of the fourth transistor and the first electrode of the fifth transistor. Electrically connected,
A gate electrode of the second transistor is electrically connected to the first scan line; a second electrode is electrically connected to the signal line;
The gate electrode of the third transistor is electrically connected to the second scanning line, the first electrode includes the second electrode of the first storage capacitor and the second electrode of the second storage capacitor. Electrically connected to one electrode, and the second electrode is electrically connected to the capacitor line,
A gate electrode of the fourth transistor is electrically connected to the third scan line;
A gate electrode of the fifth transistor is electrically connected to the fourth scan line; a second electrode is electrically connected to the first electrode of the light emitting element;
A second electrode of the second storage capacitor is electrically connected to the capacitor line;
The display device, wherein the second electrode of the light emitting element is electrically connected to the second power supply line.
前記画素は、第１乃至第６のトランジスタと、第１及び第２の保持容量と、信号線と、第１乃至第５の走査線と、第１乃至第３の電源線と、容量線とを有し、
前記第１のトランジスタのゲート電極は、前記第２のトランジスタの第１の電極及び、前記第４のトランジスタの第２の電極及び、前記第１の保持容量の第１の電極と電気的に接続され、第１の電極は、前記第１の電源線と電気的に接続され、第２の電極は、前記第４のトランジスタの第１の電極及び、前記第５のトランジスタの第１の電極及び、前記第６のトランジスタの第１の電極と電気的に接続され、
前記第２のトランジスタのゲート電極は、前記第１の走査線と電気的に接続され、第２の電極は、前記信号線と電気的に接続され、
前記第３のトランジスタのゲート電極は、前記第２の走査線と電気的に接続され、第１の電極は、前記第１の保持容量の第２の電極及び、前記第２の保持容量の第１の電極と電気的に接続され、第２の電極は、前記容量線と電気的に接続され、
前記第４のトランジスタのゲート電極は、前記第３の走査線と電気的に接続され、
前記第５のトランジスタのゲート電極は、前記第４の走査線と電気的に接続され、第２の電極は、前記発光素子の第１の電極と電気的に接続され、
前記第６のトランジスタのゲート電極は、前記第５の走査線と電気的に接続され、第２の電極は、前記第３の電源線と電気的に接続され、
前記第２の保持容量の第２の電極は、前記容量線と電気的に接続され、
前記発光素子の第２の電極は、前記第２の電源線と電気的に接続されていることを特徴とする表示装置。 A display device having a pixel provided with a light emitting element,
The pixels include first to sixth transistors, first and second storage capacitors, signal lines, first to fifth scanning lines, first to third power supply lines, and capacitance lines. Have
The gate electrode of the first transistor is electrically connected to the first electrode of the second transistor, the second electrode of the fourth transistor, and the first electrode of the first storage capacitor. The first electrode is electrically connected to the first power supply line; the second electrode is a first electrode of the fourth transistor; a first electrode of the fifth transistor; , Electrically connected to the first electrode of the sixth transistor;
A gate electrode of the second transistor is electrically connected to the first scan line; a second electrode is electrically connected to the signal line;
The gate electrode of the third transistor is electrically connected to the second scanning line, the first electrode includes the second electrode of the first storage capacitor and the second electrode of the second storage capacitor. Electrically connected to one electrode, and the second electrode is electrically connected to the capacitor line,
A gate electrode of the fourth transistor is electrically connected to the third scan line;
A gate electrode of the fifth transistor is electrically connected to the fourth scan line; a second electrode is electrically connected to the first electrode of the light emitting element;
A gate electrode of the sixth transistor is electrically connected to the fifth scan line; a second electrode is electrically connected to the third power supply line;
A second electrode of the second storage capacitor is electrically connected to the capacitor line;
The display device, wherein the second electrode of the light emitting element is electrically connected to the second power supply line.
前記第４のトランジスタと、前記第５のトランジスタとが、互いに異なる導電形式であることを特徴とする表示装置。 In any one of Claims 1 thru | or 4 ,
The display device, wherein the fourth transistor and the fifth transistor have different conductivity types.
前記画素は、第１乃至第４のトランジスタと、第１及び第２の保持容量と、信号線と、第１乃至第３の走査線と、第１及び第２の電源線と、容量線とを有し、
前記第１のトランジスタのゲート電極は、前記第２のトランジスタの第１の電極及び、前記第３のトランジスタの第１の電極及び、前記第４のトランジスタの第２の電極及び、前記第２の保持容量の第１の電極と電気的に接続され、第１の電極は、前記第１の電源線と電気的に接続され、第２の電極は、前記第４のトランジスタの第１の電極及び、前記発光素子の第１の電極と電気的に接続され、
前記第２のトランジスタのゲート電極は、前記第１の走査線と電気的に接続され、第２の電極は、前記信号線と電気的に接続され、
前記第３のトランジスタのゲート電極は、前記第２の走査線と電気的に接続され、第２の電極は、前記第１の保持容量の第１の電極と電気的に接続され、
前記第４のトランジスタのゲート電極は、前記第３の走査線と電気的に接続され、
前記第１の保持容量の第２の電極は、前記容量線と電気的に接続され、
前記第２の保持容量の第２の電極は、前記容量線と電気的に接続され、
前記発光素子の第２の電極は、前記第２の電源線と電気的に接続されていることを特徴とする表示装置。 A display device having a pixel provided with a light emitting element,
The pixel includes first to fourth transistors, first and second storage capacitors, a signal line, first to third scanning lines, first and second power supply lines, and a capacitor line. Have
The gate electrode of the first transistor includes a first electrode of the second transistor, a first electrode of the third transistor, a second electrode of the fourth transistor, and the second electrode. The first electrode of the storage capacitor is electrically connected, the first electrode is electrically connected to the first power supply line, the second electrode is the first electrode of the fourth transistor, and , Electrically connected to the first electrode of the light emitting element,
A gate electrode of the second transistor is electrically connected to the first scan line; a second electrode is electrically connected to the signal line;
A gate electrode of the third transistor is electrically connected to the second scanning line; a second electrode is electrically connected to a first electrode of the first storage capacitor;
A gate electrode of the fourth transistor is electrically connected to the third scan line;
A second electrode of the first storage capacitor is electrically connected to the capacitor line;
A second electrode of the second storage capacitor is electrically connected to the capacitor line;
The display device, wherein the second electrode of the light emitting element is electrically connected to the second power supply line.
前記画素は、第１乃至第４のトランジスタと、第１及び第２の保持容量と、信号線と、第１乃至第３の走査線と、第１及び第２の電源線と、容量線とを有し、
前記第１のトランジスタのゲート電極は、前記第２のトランジスタの第１の電極及び、前記第４のトランジスタの第２の電極及び、前記第１の保持容量の第１の電極と電気的に接続され、第１の電極は、前記第１の電源線と電気的に接続され、第２の電極は、前記第４のトランジスタの第１の電極及び、前記発光素子の第１の電極と電気的に接続され、
前記第２のトランジスタのゲート電極は、前記第１の走査線と電気的に接続され、第２の電極は、前記信号線と電気的に接続され、
前記第３のトランジスタのゲート電極は、前記第２の走査線と電気的に接続され、第１の電極は、前記第１の保持容量の第２の電極及び、前記第２の保持容量の第１の電極と電気的に接続され、第２の電極は、前記容量線と電気的に接続され、
前記第４のトランジスタのゲート電極は、前記第３の走査線と電気的に接続され、
前記第２の保持容量の第２の電極は、前記容量線と電気的に接続され、
前記発光素子の第２の電極は、前記第２の電源線と電気的に接続されていることを特徴とする表示装置。 A display device having a pixel provided with a light emitting element,
The pixel includes first to fourth transistors, first and second storage capacitors, a signal line, first to third scanning lines, first and second power supply lines, and a capacitor line. Have
The gate electrode of the first transistor is electrically connected to the first electrode of the second transistor, the second electrode of the fourth transistor, and the first electrode of the first storage capacitor. The first electrode is electrically connected to the first power supply line, and the second electrode is electrically connected to the first electrode of the fourth transistor and the first electrode of the light emitting element. Connected to
A gate electrode of the second transistor is electrically connected to the first scan line; a second electrode is electrically connected to the signal line;
The gate electrode of the third transistor is electrically connected to the second scanning line, the first electrode includes the second electrode of the first storage capacitor and the second electrode of the second storage capacitor. Electrically connected to one electrode, and the second electrode is electrically connected to the capacitor line,
A gate electrode of the fourth transistor is electrically connected to the third scan line;
A second electrode of the second storage capacitor is electrically connected to the capacitor line;
The display device, wherein the second electrode of the light emitting element is electrically connected to the second power supply line.
前記第２のトランジスタと、前記第３のトランジスタとが、互いに異なる導電形式であることを特徴とする表示装置。 In any one of Claims 1 thru | or 7 ,
The display device, wherein the second transistor and the third transistor have different conductivity types.
前記画素が有する複数のトランジスタのうち、少なくとも２個のトランジスタのゲート電極が、共通の走査線に接続されることを特徴とする表示装置。 In any one of Claims 1 thru | or 8 ,
A display device, wherein gate electrodes of at least two transistors among a plurality of transistors included in the pixel are connected to a common scanning line.
前記画素は、少なくとも、第１及び第２のトランジスタと、第１及び第２の保持容量と、信号線と、第１及び第２の電源線とを有し、
前記第２のトランジスタの第１の電極は、前記第１のトランジスタの第２の電極及び、前記発光素子の第１の電極と電気的に接続され、第２の電極は、前記第１のトランジスタのゲート電極及び、前記信号線と電気的に接続され、
前記第１及び第２の保持容量が並列に接続されている表示装置の駆動方法であって、
前記第１及び第２の保持容量の両電極間の電圧を、前記第１の電源線に印加された電圧と前記第１のトランジスタの閾値電圧との差に相当する第１の電圧に収束させる第１の段階と、
前記第２の保持容量の両電極間の電圧を、前記第１の電源線に印加された電圧と前記信号線に供給される電流と同等な電流を前記第１のトランジスタに流すのに必要な前記第１のトランジスタのゲート・ソース間電圧との差に相当する第２の電圧に収束させるため前記第１のトランジスタに前記信号線に供給される電流を供給する第２の段階と、
前記第１の電圧及び前記第２の電圧に基づいた第３の電圧を前記第１のトランジスタのゲート電極に印加し、前記第１のトランジスタを介して前記発光素子に電流を供給し、発光する第３の段階と、を有し、
前記第１及び第２の段階において、前記第１のトランジスタのゲート電極と第２の電極を導通にするため前記第２のトランジスタを導通状態にし、
前記第３の段階において、前記第１のトランジスタのゲート電極と第２の電極の電気的接続を切断するため前記第２のトランジスタを非導通状態にすることを特徴とする表示装置の駆動方法。 A pixel having a light emitting element;
The pixel includes at least first and second transistors, first and second storage capacitors, a signal line, and first and second power supply lines,
The first electrode of the second transistor is electrically connected to the second electrode of the first transistor and the first electrode of the light-emitting element, and the second electrode is connected to the first transistor. Electrically connected to the gate electrode and the signal line,
A driving method of a display device in which the first and second holding capacitors are connected in parallel,
The voltage between both electrodes of the first and second storage capacitors is converged to a first voltage corresponding to the difference between the voltage applied to the first power supply line and the threshold voltage of the first transistor. The first stage,
The voltage between both electrodes of the second storage capacitor is necessary to pass a current equivalent to the voltage applied to the first power supply line and the current supplied to the signal line to the first transistor. A second stage for supplying a current supplied to the signal line to the first transistor to converge to a second voltage corresponding to a difference between a gate-source voltage of the first transistor;
A third voltage based on the first voltage and the second voltage is applied to the gate electrode of the first transistor, and a current is supplied to the light-emitting element through the first transistor to emit light. And a third stage,
In the first and second steps, the second transistor is turned on to make the gate electrode and the second electrode of the first transistor conductive,
In the third step, the display device driving method is characterized in that the second transistor is turned off in order to disconnect the electrical connection between the gate electrode and the second electrode of the first transistor.
前記画素は、少なくとも、第１及び第２のトランジスタと、第１及び第２の保持容量と、信号線と、第１及び第２の電源線とを有し、
前記第２のトランジスタの第１の電極は、前記第１のトランジスタの第２の電極及び、前記発光素子の第１の電極と電気的に接続され、第２の電極は、前記第１のトランジスタのゲート電極及び、前記信号線と電気的に接続され、
前記第１及び第２の保持容量が直列に接続されている表示装置の駆動方法であって、
前記第１の保持容量の両電極間の電圧を、前記第１の電源線に印加された電圧と前記第１のトランジスタの閾値電圧との差に相当する第１の電圧に収束させる第１の段階と、
前記第１及び第２の保持容量のそれぞれの両電極間の電圧の和を、前記第１の電源線に印加された電圧と前記信号線に供給される電流と同等な電流を前記第１のトランジスタに流すのに必要な前記第１のトランジスタのゲート・ソース間電圧との差に相当する第２の電圧に収束させるため前記第１のトランジスタに前記信号線に供給される電流を供給する第２の段階と、
前記第１の保持容量の両電極間に保持された第３の電圧を前記第１のトランジスタのゲート電極に印加し、前記第１のトランジスタを介して前記発光素子に電流を供給し、発光する第３の段階と、を有し、
前記第１及び第２の段階において、前記第１のトランジスタのゲート電極と第２の電極を導通にするため前記第２のトランジスタを導通状態にし、
前記第３の段階において、前記第１のトランジスタのゲート電極と第２の電極の電気的接続を切断するため前記第２のトランジスタを非導通状態にすることを特徴とする表示装置の駆動方法。 A pixel having a light emitting element;
The pixel includes at least first and second transistors, first and second storage capacitors, a signal line, and first and second power supply lines,
The first electrode of the second transistor is electrically connected to the second electrode of the first transistor and the first electrode of the light-emitting element, and the second electrode is connected to the first transistor. Electrically connected to the gate electrode and the signal line,
A driving method of a display device in which the first and second storage capacitors are connected in series,
A first voltage that converges a voltage between both electrodes of the first storage capacitor to a first voltage corresponding to a difference between a voltage applied to the first power supply line and a threshold voltage of the first transistor; Stages,
A sum of voltages between both electrodes of the first and second storage capacitors is set to a voltage equivalent to a voltage applied to the first power supply line and a current supplied to the signal line. A first current that is supplied to the signal line is supplied to the first transistor so as to converge to a second voltage corresponding to a difference between the gate-source voltage of the first transistor and the first transistor necessary to flow through the transistor. Two stages,
A third voltage held between both electrodes of the first storage capacitor is applied to the gate electrode of the first transistor, and a current is supplied to the light emitting element through the first transistor to emit light. a third stage, the,
In the first and second steps, the second transistor is turned on to make the gate electrode and the second electrode of the first transistor conductive,
In the third step, the display device driving method is characterized in that the second transistor is turned off in order to disconnect the electrical connection between the gate electrode and the second electrode of the first transistor.
前記第１及び第２の段階と、前記第３の段階とで、前記第２の電源線に印加される電圧が異なることを特徴とする表示装置の駆動方法。 In claim 11 or claim 12,
The display device driving method, wherein a voltage applied to the second power supply line is different between the first and second stages and the third stage.
前記画素は、少なくとも、第１及び第２のトランジスタと、第１及び第２の保持容量と、信号線と、第１乃至第３の電源線と、容量線とを有し、
前記第２のトランジスタの第１の電極は、前記第１のトランジスタの第２の電極及び、前記発光素子の第１の電極と電気的に接続され、第２の電極は、前記第１のトランジスタのゲート電極及び、前記信号線と電気的に接続され、
前記第１及び第２の保持容量が並列に接続されている表示装置の駆動方法であって、
前記第１及び第２の保持容量の両電極間の電圧を、前記第３の電源線に印加された電圧と前記容量線に印加された電圧との差に相当する第１の電圧に収束させる第１の段階と、
前記第１及び第２の保持容量の両電極間の電圧を、前記第１の電源線に印加された電圧と前記第１のトランジスタの閾値電圧との差に相当する第２の電圧に収束させる第２の段階と、
前記第２の保持容量の両電極間の電圧を、前記第１の電源線に印加された電圧と前記信号線に供給される電流と同等な電流を前記第１のトランジスタに流すのに必要な前記第１のトランジスタのゲート・ソース間電圧との差に相当する第３の電圧に収束させるため前記第１のトランジスタに前記信号線に供給される電流を供給する第３の段階と、
前記第２の電圧及び前記第３の電圧に基づいた第４の電圧を前記第１のトランジスタのゲート電極に印加し、前記第１のトランジスタを介して前記発光素子に電流を供給し、発光する第４の段階と、を有し、
前記第１乃至第３の段階において、前記第１のトランジスタのゲート電極と第２の電極を導通にするため前記第２のトランジスタを導通状態にし、
前記第４の段階において、前記第１のトランジスタのゲート電極と第２の電極の電気的接続を切断するため前記第２のトランジスタを非導通状態にすることを特徴とする表示装置の駆動方法。 A pixel having a light emitting element;
The pixel includes at least first and second transistors, first and second storage capacitors, a signal line, first to third power supply lines, and a capacitor line.
The first electrode of the second transistor is electrically connected to the second electrode of the first transistor and the first electrode of the light-emitting element, and the second electrode is connected to the first transistor. Electrically connected to the gate electrode and the signal line,
A driving method of a display device in which the first and second holding capacitors are connected in parallel,
The voltage between both electrodes of the first and second storage capacitors is converged to a first voltage corresponding to the difference between the voltage applied to the third power supply line and the voltage applied to the capacitor line. The first stage,
The voltage between both electrodes of the first and second storage capacitors is converged to a second voltage corresponding to the difference between the voltage applied to the first power supply line and the threshold voltage of the first transistor. The second stage,
The voltage between both electrodes of the second storage capacitor is necessary to pass a current equivalent to the voltage applied to the first power supply line and the current supplied to the signal line to the first transistor. A third stage for supplying a current to be supplied to the signal line to the first transistor in order to converge to a third voltage corresponding to a difference from a gate-source voltage of the first transistor;
A fourth voltage based on the second voltage and the third voltage is applied to the gate electrode of the first transistor, and a current is supplied to the light-emitting element through the first transistor to emit light. a fourth step, the,
In the first to third steps, the second transistor is turned on to make the gate electrode and the second electrode of the first transistor conductive,
In the fourth step, the display device driving method is characterized in that the second transistor is turned off in order to disconnect the electrical connection between the gate electrode and the second electrode of the first transistor.
前記画素は、少なくとも、第１及び第２のトランジスタと、第１及び第２の保持容量と、信号線と、第１乃至第３の電源線と、容量線とを有し、
前記第２のトランジスタの第１の電極は、前記第１のトランジスタの第２の電極及び、前記発光素子の第１の電極と電気的に接続され、第２の電極は、前記第１のトランジスタのゲート電極及び、前記信号線と電気的に接続され、
前記第１及び第２の保持容量が直列に接続されている表示装置の駆動方法であって、
前記第１及び第２の保持容量の両電極間の電圧を、前記第３の電源線に印加された電圧と前記容量線に印加された電圧との差に相当する第１の電圧に収束させる第１の段階と、
前記第１の保持容量の両電極間の電圧を、前記第１の電源線に印加された電圧と前記第１のトランジスタの閾値電圧との差に相当する第２の電圧に収束させる第２の段階と、
前記第１及び第２の保持容量のそれぞれの両電極間の電圧の和を、前記第１の電源線に印加された電圧と前記信号線に供給される電流と同等な電流を前記第１のトランジスタに流すのに必要な前記第１のトランジスタのゲート・ソース間電圧との差に相当する第３の電圧に収束させるため前記第１のトランジスタに前記信号線に供給される電流を供給する第３の段階と、
前記第１の保持容量の両電極間に保持された第４の電圧を前記第１のトランジスタのゲート電極に印加し、前記第１のトランジスタを介して前記発光素子に電流を供給し、発光する第４の段階と、を有し、
前記第１乃至第３の段階において、前記第１のトランジスタのゲート電極と第２の電極を導通にするため前記第２のトランジスタを導通状態にし、
前記第４の段階において、前記第１のトランジスタのゲート電極と第２の電極の電気的接続を切断するため前記第２のトランジスタを非導通状態にすることを特徴とする表示装置の駆動方法。 A pixel having a light emitting element;
The pixel includes at least first and second transistors, first and second storage capacitors, a signal line, first to third power supply lines, and a capacitor line.
The first electrode of the second transistor is electrically connected to the second electrode of the first transistor and the first electrode of the light-emitting element, and the second electrode is connected to the first transistor. Electrically connected to the gate electrode and the signal line,
A driving method of a display device in which the first and second storage capacitors are connected in series,
The voltage between both electrodes of the first and second storage capacitors is converged to a first voltage corresponding to the difference between the voltage applied to the third power supply line and the voltage applied to the capacitor line. The first stage,
A second voltage that converges the voltage between both electrodes of the first storage capacitor to a second voltage corresponding to a difference between a voltage applied to the first power supply line and a threshold voltage of the first transistor; Stages,
A sum of voltages between both electrodes of the first and second storage capacitors is set to a voltage equivalent to a voltage applied to the first power supply line and a current supplied to the signal line. A first current that is supplied to the signal line is supplied to the first transistor so as to converge to a third voltage corresponding to a difference between the gate-source voltage of the first transistor and the first transistor necessary to flow through the transistor. 3 stages,
A fourth voltage held between both electrodes of the first holding capacitor is applied to the gate electrode of the first transistor, and a current is supplied to the light emitting element through the first transistor to emit light. a fourth step, the,
In the first to third steps, the second transistor is turned on to make the gate electrode and the second electrode of the first transistor conductive,
In the fourth step, the display device driving method is characterized in that the second transistor is turned off in order to disconnect the electrical connection between the gate electrode and the second electrode of the first transistor.
前記第１乃至第３の段階と、前記第４の段階とで、前記第２の電源線に印加される電圧が異なることを特徴とする表示装置の駆動方法。 In claim 14 or claim 15,
A method for driving a display device, characterized in that a voltage applied to the second power supply line is different between the first to third stages and the fourth stage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006250691A JP5057731B2 (en) | 2005-09-16 | 2006-09-15 | Display device, module, and electronic device |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005269654 | 2005-09-16 | ||
| JP2005269654 | 2005-09-16 | ||
| JP2006250691A JP5057731B2 (en) | 2005-09-16 | 2006-09-15 | Display device, module, and electronic device |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012105550A Division JP2012190032A (en) | 2005-09-16 | 2012-05-04 | Display device, module, electronic appliance, and driving method for display device |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007108733A JP2007108733A (en) | 2007-04-26 |
| JP2007108733A5 true JP2007108733A5 (en) | 2009-10-01 |
| JP5057731B2 JP5057731B2 (en) | 2012-10-24 |
Family
ID=38034598
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006250691A Expired - Fee Related JP5057731B2 (en) | 2005-09-16 | 2006-09-15 | Display device, module, and electronic device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5057731B2 (en) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1764770A3 (en) * | 2005-09-16 | 2012-03-14 | Semiconductor Energy Laboratory Co., Ltd. | Display device and driving method of display device |
| KR101197768B1 (en) * | 2006-05-18 | 2012-11-06 | 엘지디스플레이 주식회사 | Pixel Circuit of Organic Light Emitting Display |
| EP1995818A1 (en) * | 2007-05-12 | 2008-11-26 | Huettinger Electronic Sp. z o. o | Circuit and method for reducing electrical energy stored in a lead inductance for fast extinction of plasma arcs |
| US8354674B2 (en) * | 2007-06-29 | 2013-01-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device wherein a property of a first semiconductor layer is different from a property of a second semiconductor layer |
| US8786793B2 (en) * | 2007-07-27 | 2014-07-22 | Semiconductor Energy Laboratory Co., Ltd. | Display device and manufacturing method thereof |
| US8421717B2 (en) | 2007-12-19 | 2013-04-16 | Panasonic Corporation | Active matrix type display apparatus |
| US9047815B2 (en) | 2009-02-27 | 2015-06-02 | Semiconductor Energy Laboratory Co., Ltd. | Method for driving semiconductor device |
| JP5642447B2 (en) * | 2009-08-07 | 2014-12-17 | 株式会社半導体エネルギー研究所 | Semiconductor device |
| KR20130043063A (en) | 2011-10-19 | 2013-04-29 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device and manufacturing method thereof |
| JP5494684B2 (en) * | 2012-01-20 | 2014-05-21 | セイコーエプソン株式会社 | Driving method of electronic circuit |
| CN103198794B (en) | 2013-03-29 | 2015-12-02 | 京东方科技集团股份有限公司 | Image element circuit and driving method, organic electroluminescence display panel and display device |
| US20160155849A1 (en) * | 2014-12-02 | 2016-06-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, method for manufacturing semiconductor device, module, and electronic device |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3832415B2 (en) * | 2002-10-11 | 2006-10-11 | ソニー株式会社 | Active matrix display device |
| KR100490622B1 (en) * | 2003-01-21 | 2005-05-17 | 삼성에스디아이 주식회사 | Organic electroluminescent display and driving method and pixel circuit thereof |
| JP4197287B2 (en) * | 2003-03-28 | 2008-12-17 | シャープ株式会社 | Display device |
| KR100502912B1 (en) * | 2003-04-01 | 2005-07-21 | 삼성에스디아이 주식회사 | Light emitting display device and display panel and driving method thereof |
| KR100497246B1 (en) * | 2003-04-01 | 2005-06-23 | 삼성에스디아이 주식회사 | Light emitting display device and display panel and driving method thereof |
| KR100560780B1 (en) * | 2003-07-07 | 2006-03-13 | 삼성에스디아이 주식회사 | Pixel circuit in OLED and Method for fabricating the same |
| JP5162807B2 (en) * | 2003-08-29 | 2013-03-13 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
-
2006
- 2006-09-15 JP JP2006250691A patent/JP5057731B2/en not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2007108733A5 (en) | ||
| JP2008151963A5 (en) | ||
| CN104867442B (en) | A kind of image element circuit and display device | |
| JP2007041571A5 (en) | ||
| US9858860B2 (en) | Organic light-emitting diode display | |
| CN104050923B (en) | Pixel circuit and display device using the same | |
| TW200707381A (en) | Electronic circuit, method of driving electronic circuit, electro-optical device, and electronic apparatus | |
| RU2012104629A (en) | DISPLAY DEVICE | |
| JP2010156962A5 (en) | ||
| WO2015000249A1 (en) | Pixel circuit, display panel, and display device | |
| WO2015000245A1 (en) | Pixel circuit and driving method therefor, display panel, and display device | |
| EP1840866A3 (en) | Pixel and organic light emitting display device using the pixel | |
| JP2007179041A5 (en) | ||
| JP2010249955A (en) | Display device | |
| JP2009122657A5 (en) | ||
| US20130069537A1 (en) | Pixel circuit and driving method thereof | |
| JP2008158491A5 (en) | ||
| EP1936595A3 (en) | Pixel, display using the same, and driving method for the same | |
| JP2007298973A5 (en) | ||
| EP1887728A3 (en) | Organic light emitting display and driving method of inspection circuit of organic light emitting display | |
| JP2011221070A5 (en) | ||
| JP2013113868A5 (en) | ||
| CN110223637A (en) | Pixel-driving circuit and organic LED display device | |
| TW201250658A (en) | Dual pixel unit and dual driver circuit | |
| JP2018155876A5 (en) |