JP2007086939A - Circuit simulation method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit simulation method that can easily and accurately analyze an analog/digital mixed circuit with respect to all the circuit nets wherever they may be in consideration of the effect of chattering such as noise generated in the circuit or incoming noise. <P>SOLUTION: In a simulated analog/digital mixed circuit, an AD conversion element 104 having a chattering generation circuit 102 for generating chattering is inserted in a net part connecting an analog circuit 111 and a digital circuit 112, and the chattering generated by the AD conversion element 104 is added to the signal waveform of an analog signal 121 at specified frequencies or generation timings when the analog signal 121 crosses a predetermined threshold. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a circuit simulation method for analyzing and verifying operation characteristics of a mixed analog / digital circuit in which analog circuits and digital circuits are mixed.

  In recent years, with the increasing functionality and performance of LSIs, it has become common to mix analog circuits and digital circuits and integrate them in one LSI chip. An analog simulator that analyzes analog circuits and a logic simulator that analyzes digital circuits operate in parallel as a circuit simulation method to simulate and verify operation characteristics for such analog / digital mixed circuits. The entire LSI is analyzed by exchanging data between these simulators.

As a simulator applied to such an analog / digital mixed circuit simulation method, there is currently SpectreVerilog of Cadence.
A case where a simulation of a circuit as shown in FIG. 3A is performed using this simulator will be described.

  The circuit in FIG. 3A is roughly divided into an analog unit 320 and a digital unit 321. The digital unit 321 includes logic circuits 303, 304, 305, and 306 as circuit blocks. Nets 311 to 319 are wirings connecting the blocks, and indicate the direction in which a signal flows in the direction of an arrow.

  In contrast to the analog / digital mixed circuit as described above, in the conventional simulation method, first, an AD conversion element or a DA conversion element is inserted into a connecting portion between the analog circuit and the digital circuit. An AD conversion element is inserted into the net connected from the output of the analog circuit to the input of the digital circuit, and a DA conversion element is inserted into the net connected from the output of the digital circuit to the input of the analog circuit.

  The circuits thus divided by the AD conversion element or the DA conversion element are input to the analog simulator and the logic simulator, respectively, and are analyzed. When the signal at the connecting portion of the analog circuit and the digital circuit changes, data is exchanged through the AD conversion element or the DA conversion element, so that the entire circuit is correctly analyzed. FIG. 11 shows a circuit diagram in which an AD conversion element and a DA conversion element are inserted. Here, reference numerals 1101, 1102, and 1103 denote AD conversion elements, and 1104 denotes a DA conversion element.

  An example of the characteristics of the AD conversion elements 1101 to 1103 at this time is shown in FIG. The conventional AD conversion element determines whether the logic is 0 or 1 depending on whether the voltage of the analog signal is higher or lower than a certain threshold value, and outputs it. Therefore, when a signal like the waveform 1201 is input and the threshold value of the AD conversion element is Vt, the output becomes like the waveform 1202.

  A method for improving the accuracy of simulation of the analog / digital mixed circuit as described above (see, for example, Patent Document 1) considers the influence of the current consumed by the digital circuit on the analog circuit and the analog circuit. The interlocking characteristics of the circuit can be verified with high accuracy.

Such a conventional circuit simulation method will be described below.
FIG. 13 is a block diagram showing a schematic configuration of a mixed analog / digital circuit to which a conventional circuit simulation method is applied. In FIG. 13, 1301 is an analog circuit and 1302 is a digital circuit. AD conversion elements 1305 and 1306 and a DA conversion element 1307 are inserted in a net connecting the analog circuit 1301 and the digital circuit 1302.

  In addition, a current calculation unit 1303 of the digital circuit 1302 is added in order to provide the analog circuit 1301 with information on current consumption that changes depending on the operating state of the digital circuit 1302. In addition, an equivalent circuit 1304 for calculating the current consumption of the digital circuit 1302 is added to the analog block 1310 in order to reflect the information of the current calculation unit 1303 in the simulation of the analog circuit 1301.

Such an analog simulator can perform an analysis reflecting the consumption current of the digital circuit by simulating the analog block 1310 including the equivalent circuit 1304, and an abnormal operation of the analog block 1310 due to fluctuations in the power supply voltage or the like. Etc. can be detected.
Japanese Patent Laid-Open No. 5-159017

  However, in the conventional circuit simulation method as described above, the characteristic of the connection portion between the analog circuit and the digital circuit is determined by the AD conversion element or the DA conversion element, and is the signal voltage greater than a given threshold value? Since it is merely performing an ideal operation such as judging logic when it is small, there are cases where the actual circuit characteristics cannot be expressed sufficiently.

  For example, when a circuit integrated in one LSI becomes complicated and large, the output of an analog signal may fluctuate due to noise generated inside the LSI, and chattering may occur at the input of the logic circuit. In such a case, since an accurate analysis is not performed in the simulation, a problem that an actual circuit malfunctions may occur.

  Further, in the simulation method of Patent Document 1, the influence on the analog circuit due to the consumption current of the digital part is taken into consideration, but other characteristics such as noise are not taken into consideration, and problems due to this will be described below. To do.

  FIG. 14 shows a signal at a connection portion with a digital circuit when noise is added to an analog signal in an actual LSI. A waveform 1401 is an example when noise is added to the input signal 1201 of FIG. In the case of such a waveform, if it is determined whether the logic is 0 or 1 based on the threshold value Vt, the waveform and the threshold value Vt cross each other within a short time, and a vibration of the waveform called chattering occurs. There is. A waveform 1402 indicates an input to an actual digital circuit when the waveform 1401 is input. In this way, noise is added to the analog signal, and the operation of the digital circuit may become unstable.

  However, in the above circuit simulation method, simulation including chattering such as noise generated in the circuit or noise entering from the outside is very difficult in terms of accuracy and calculation time. The analog mixed circuit simulation method has a problem in that the effect of such chattering on the circuit cannot be verified.

  Further, in order to cope with such chattering in a normal circuit design, a malfunction prevention circuit by chattering may be incorporated so as to operate normally even if chattering occurs in the circuit. In order to analyze and confirm the operation of a circuit including such a malfunction prevention circuit by simulation, it is necessary to manually add a noise source or the like on a circuit diagram or a net list.

  In this case, operation can be confirmed by analyzing by simulation for a net that can be expected to cause chattering, but operation confirmation is not performed for a net that cannot be expected to cause chattering without being analyzed by simulation. There was a problem that there was a high possibility that verification failure would occur for the net.

  The present invention solves the above-mentioned conventional problems, and in an analog / digital mixed circuit, an analysis considering the influence of chattering such as noise generated in the circuit or noise entering from the outside is arranged at any place. There is provided a circuit simulation method that can be executed easily and accurately without omission, regardless of the circuit net.

  In order to solve the above problems, the circuit simulation method of the present invention corresponds to the function of converting the voltage or current of an analog signal into a digital signal in the AD conversion element, and noise that is not originally included in the input signal. A feature is that a function for generating chattering and a function for switching whether or not chattering occurs are provided.

  As described above, the chattering generation function can freely vary the chattering frequency and generation time in accordance with changes in parameters or input signals.

  As described above, according to the present invention, the chattering generation function can freely vary the chattering frequency and generation time in accordance with changes in parameters or input signals.

  Therefore, in mixed analog / digital circuits, analysis considering the influence of chattering such as noise generated in the circuit or noise entering from the outside can be performed regardless of the circuit net placed in any place, without leakage It can be executed easily and accurately.

Hereinafter, a circuit simulation method showing an embodiment of the present invention will be specifically described with reference to the drawings.
(Embodiment 1)
A circuit simulation method according to the first embodiment of the present invention will be described.

FIG. 1 is a block diagram showing the configuration of an analog / digital mixed circuit to which the circuit simulation method of the first embodiment is applied.
FIG. 1A shows a circuit configuration diagram inputted as a simulation target. As shown in FIG. 1A, it is assumed that the analog circuit 111 and the logic circuit 112 which is a digital circuit are connected by a net 121. The arrow shown in the net 121 indicates the direction of signal flow. In this case, the output of the analog circuit 111 is connected to the input of the logic circuit 112. A terminal 113 is an output terminal and is connected to the logic circuit 112 via a net 122. The AD conversion element is automatically inserted into a part such as the net 121 that converts an analog signal into a logic signal.

  A circuit diagram after the AD conversion element is inserted is shown in FIG. In FIG. 1B, an element 104 indicates an AD conversion element, and the inside is composed of an element 101, an element 102, and an element 103. The element 101 is the same as the AD conversion element used in the normal simulation method. The voltage of the analog signal is examined, and “1” is output if it is equal to or greater than the specified threshold value, otherwise “0” is output. ”To output a logic signal. The element 102 is a chattering generation circuit and has a function of generating chattering at the moment when the logic changes from “0” to “1” or from “1” to “0”. The threshold value Vt, the frequency of chattering to be generated, and the generation time can be varied according to the parameters of the AD conversion element 104. The element 103 is a switch and can switch whether to generate chattering according to an external signal or a parameter.

  FIG. 2 shows input / output characteristics of the AD conversion element 104 used in this embodiment. A waveform 201 is an example of an input signal of the AD conversion element 104. Vt in the graph indicates a specified threshold value. A waveform 202 is an example of an output signal. Chattering occurs at the moment when the input waveform 201 crosses the threshold value. The rising chattering occurrence time tc1 is specified by a parameter of the AD conversion element 104. The chattering frequency fc1 during this time is also specified by a parameter. The falling chattering occurrence time tc2 and frequency fc2 are similarly specified by parameters.

  As described above, the AD conversion element 104 in the analog / digital mixed circuit to which the simulation method of this embodiment is applied can generate chattering even when noise is not applied to the input signal, and the chattering is given to the digital circuit. The impact can be easily verified.

Next, the case where the simulation method of the analog / digital mixed circuit of the first embodiment is applied to the circuit shown in FIG.
In this case as well, an AD conversion element or a DA conversion element is automatically inserted into the circuit at the time of simulation, in the same way as in a normal analog / digital mixed circuit simulation method. An AD conversion element having a chattering generation circuit according to this embodiment is inserted into a net connected from the output of the analog block to the input of the logic block. In addition, a normal DA conversion element is inserted into a net connected from the output of the logic block to the input of the analog block. Neither AD conversion elements nor DA conversion elements are inserted in the connection nets between the analog blocks and the nets connecting the logic blocks.

  FIG. 3B shows a circuit diagram after the AD conversion element or the DA conversion element is inserted. The nets 311, 312, and 313 have AD conversion elements 341, 342, and 343 inserted therein, and the net 314 has a DA conversion element 344 inserted therein.

  A simulation is performed using the circuit of FIG. 3B. In the first operation verification, the AD conversion element sets a switch included in the AD conversion element so that chattering does not occur. Thereby, it can be confirmed that the operation of the circuit is normal when chattering does not occur. At this time, it is particularly necessary to check the waveforms of the nets 315, 316, and 317 that are the outputs of the logic circuits.

  FIG. 4 shows an example of waveforms in the circuit. A waveform 401 is an output of the net 311, a waveform 402 is an output of the AD conversion element 341, and a waveform 403 indicates a waveform of the net 315 that is an output of the logic circuit 303. In this simulation, the output of the AD conversion element is a waveform that does not include chattering, and therefore the output of the logic circuit can also be a normal waveform.

  Next, the switch included in the AD conversion element is set so that chattering occurs, and the frequency and generation time as parameters are set. This frequency and generation time must be set assuming actual noise, but usually the frequency is sufficiently larger than the actual signal frequency, and the generation time is sufficiently smaller than the actual signal period. Set to. After that, the simulation is executed again for analysis. In this analysis, since the chattering generation circuit is incorporated in the AD conversion element, chattering occurs at the moment when the analog signal crosses the threshold value and is added to the input signal of the logic circuit. Therefore, the input signal of the logic circuit 303 has a waveform 404 in FIG.

  In a normal circuit design, in order to cope with chattering, a malfunction prevention circuit due to chattering may be incorporated so that it operates normally even if chattering occurs in the circuit. In the circuit of FIG. 3, it is assumed that a malfunction prevention circuit due to chattering is incorporated in the blocks 303 and 304 and not incorporated in the blocks 305 and 306.

  For example, since the block 303 includes a malfunction prevention circuit, a normal waveform should be output to the net 315 even if chattering occurs. However, when a waveform different from the waveform 403 without chattering is obtained as the waveform of the net 315, such as the waveform 405 in FIG. 4, it can be detected that the malfunction prevention circuit is not operating normally. Conversely, when the waveform 405 of the net 315 matches the waveform 403, it can be confirmed that the malfunction prevention circuit is operating normally.

  On the other hand, for example, since the malfunction prevention circuit is not included in the block 305, it can be confirmed that the output waveform changes when chattering occurs. For example, a waveform 501 in FIG. When there is no chattering, the input of the logic block 305 is like a waveform 502, and in this case, a normal output like a waveform 503 is obtained on the net 317. However, in the analysis in which chattering occurs, the input to the logic block 305 is a waveform 504, and the waveform 505 is obtained as an output. In such a case, since the output of the circuit changes due to the occurrence of chattering, it can be confirmed that a malfunction prevention circuit is also necessary for this circuit. As a result, it is possible to prevent forgetting to insert the malfunction prevention circuit.

In this way, the circuit simulation method of this embodiment confirms how the analog / digital mixed circuit is affected by chattering, whether the malfunction prevention circuit for chattering is operating normally, It is possible to verify whether the prevention circuit is forgotten to be inserted.
(Embodiment 2)
A circuit simulation method according to the second embodiment of the present invention will be described.

FIG. 6 is a block diagram showing a configuration of an analog / digital mixed circuit to which the circuit simulation method of the second embodiment is applied.
FIG. 6A shows a circuit configuration diagram inputted as a simulation target. Assume that the analog circuit 611 and the logic circuit 612 which is a digital circuit are connected by a net 621. An arrow shown in the net 621 indicates the direction of signal flow. In this case, the output of the analog circuit 611 is connected to the input of the logic circuit 612. A terminal 613 is an output terminal and is connected to the logic circuit 612 through a net 622. The AD conversion element is automatically inserted into a portion such as the net 621 that converts an analog signal into a logic signal.

  FIG. 6B shows a circuit diagram after the AD conversion element is inserted. In FIG. 6B, an element 604 indicates an AD conversion element, and the inside is composed of an element 601, an element 602, and an element 603. The element 601 is the same as the AD conversion element used in the normal simulation method. The voltage of the analog signal is checked, and if it is equal to or higher than a specified threshold value, “1” is output, otherwise “ By outputting “0”, it has a function of converting to a logic signal. The element 602 is a chattering generation circuit, and has a function of generating chattering at the moment when the logic changes from “0” to “1” or from “1” to “0”. The element 603 is a switch and can switch whether to generate chattering according to an external signal or a parameter.

  FIG. 7 shows input / output characteristics of the AD conversion element used in this embodiment. A waveform 701 is an example of an input signal of the AD conversion element 604. Vt in the graph indicates a specified threshold value. A waveform 702 is an example of an output signal. Chattering occurs at the moment when the input waveform 701 intersects the threshold value Vt, and the chattering frequencies fc1, fc2, fc3, fc4 and the generation times tc1, tc2, tc3, tc4 at this time are calculated by random numbers. Accordingly, every time the input waveform crosses the threshold value, the chattering frequency and the generation time change. The possible range of the frequency and generation time at this time is specified by a parameter, and chattering of the frequency or generation time within the specified allowable range occurs. In this way, by changing the chattering characteristics each time using a random number, it is possible to confirm in a single simulation what kind of chattering the logic circuit is affected.

For example, in FIG. 6, the logic circuit 612 is a chattering malfunction prevention circuit. When verifying the operation of such a malfunction prevention circuit, it is necessary to input chattering of various frequencies and generation times to check whether the circuit operates normally. In such a case, operation verification can be performed using the AD conversion element of this embodiment. A waveform 703 in FIG. 7 shows the voltage of the net 622 which is the output of the logic circuit 612 when the waveform 701 is input. From this waveform, it can be seen that other than chattering at time t2 can be removed. Accordingly, the circuit 612 can confirm that the chattering of the frequency fc2 and the generation time tc2 cannot be removed.
(Embodiment 3)
A circuit simulation method according to the third embodiment of the present invention will be described.

FIG. 8 is a block diagram showing a configuration of a mixed analog / digital circuit to which the circuit simulation method of the third embodiment is applied.
FIG. 8A shows a circuit configuration diagram inputted as a simulation target. As shown in FIG. 8A, it is assumed that an analog circuit 811 and a logic circuit 812 which is a digital circuit are connected by a net 821. An arrow in the net 821 indicates the direction of signal flow. In this case, the output of the analog circuit 811 is connected to the input of the logic circuit 812. A terminal 813 is an output terminal and is connected to the logic circuit 812 through a net 822. The AD conversion element is automatically inserted in a portion such as the net 821 that converts an analog signal into a logic signal.

  A circuit diagram after the AD conversion element is thus inserted is shown in FIG. In FIG. 8B, an element 804 indicates an AD conversion element, and the inside is composed of an element 801, an element 802, and an element 803. The element 801 is the same as the AD conversion element used in the normal simulation method. The voltage of the analog signal is checked, and “1” is output if it is equal to or higher than a specified threshold value. ”To output a logic signal. The element 802 is a chattering generation circuit and has a function of generating chattering at the moment when the logic changes from “0” to “1” or from “1” to “0”. The element 803 is a switch and can switch whether to generate chattering according to an external signal or a parameter.

  FIG. 9 shows input / output characteristics of the AD conversion element used in this embodiment. A waveform 901 is an example of an input signal of the AD conversion element 804. Vt in the graph indicates a specified threshold value. A waveform 902 is an example of an output signal. Chattering occurs at the moment when the input waveform 901 crosses the threshold value, and the chattering frequencies fc1 and fc2 and the generation times tc1 and tc2 at this time are automatically calculated from changes in the input signal.

First, a case where the chattering occurrence time and frequency are obtained from the slew rate of an analog signal that is an input signal will be described.
In the case of rising, when the difference between the time t1 when the input waveform intersects the threshold value Vt and the time immediately before the simulator calculates is Δtr, and the voltage difference at this time is ΔVr, the generation time tc1 and the frequency fc1 are as follows: It can be calculated by the formula.

tc1 = ktr * Δtr / ΔVr
fc1 = kfr * ΔVr / Δtr

Here, ktr and kfr are parameters and can be arbitrarily specified. Also, chattering does not occur when tc1 is smaller than 1 / fc1 at time t3.

  By using such an equation, slowly changing signals are susceptible to noise, so low frequency chattering occurs for a long time, and suddenly changing signals are less susceptible to noise, so the frequency is high. Chattering occurs only for a short time or no chattering occurs at all.

The chattering occurrence time and frequency in the case of falling can be defined by the same expression. For example, if the difference between the time t2 when the input waveform crosses the threshold value Vt and the time immediately before the simulator calculates is Δtf, and the voltage difference at this time is ΔVf, the generation time tc2 and the frequency fc2 are calculated by the following equations: it can.

tc2 = ktf * Δtf / ΔVf
fc2 = kff * ΔVf / Δtf

Here, ktf and kff are parameters.

There is also a method of obtaining the chattering occurrence time and frequency from the period or frequency of the input signal. The period of the signal can be calculated from the difference in time when the input signal crosses the threshold value Vt. For example, since the period of the signal at time t2 can be obtained by (t2−t1) * 2, the generation time tc2 and the frequency fc2 can be calculated by the following formula based on this value.

tc2 = ktf * (t2-t1)
fc2 = kft / (t2-t1)

In this case, the higher the frequency of the input signal, the higher the chattering frequency and the shorter the generation time. Conversely, the lower the frequency of the input signal, the lower the chattering frequency and the longer the generation time. Therefore, the frequency and generation time of chattering that occurs every time the input waveform crosses the threshold value varies depending on the frequency and slew rate of the input signal, and chattering that is close to the influence of actual noise can be generated.

  For example, in FIG. 8, the logic circuit 812 is a chattering malfunction prevention circuit. When performing operation verification of this circuit, it is necessary to input chattering of various frequencies and generation times that may actually occur to check whether the circuit operates normally. In such a case, operation verification can be performed using the AD conversion element of this embodiment. A waveform 903 in FIG. 9 shows the voltage of the net 822 that is the output of the logic circuit 812 when the waveform 901 is input. It can be seen that by inputting a signal that may actually occur as the waveform 901, chattering of various frequencies and generation times that actually occur due to a change in the signal occurs. From this waveform, the logic circuit 812 can confirm that the frequency is fc1 and the chattering of the generation time tc1 cannot be removed.

Next, the case where the simulation method of the analog / digital mixed circuit of this embodiment is applied to the circuit shown in FIG.
In this circuit, in order to deal with chattering, there is a block in which a malfunction prevention circuit due to chattering is incorporated so that the circuit operates normally even if chattering occurs in the circuit. In the circuit of FIG. 3, it is assumed that a malfunction prevention circuit due to chattering is incorporated in the blocks 303 and 304 and not incorporated in the blocks 305 and 306.

  Since the malfunction prevention circuit is not included in the block 305, when chattering occurs, the circuit malfunctions and the output waveform changes. However, in reality, the normal input waveform of this circuit is very steep and is not considered to be affected by noise. However, if the signal changes slowly for some reason, it may malfunction. When verifying such a situation, the AD conversion element of this embodiment can be used.

  For example, a waveform 1001 in FIG. When the AD conversion element according to this embodiment is used, the input of the logic block 305 has a waveform 1002, and chattering occurs at a portion where the input waveform changes smoothly. Thereby, the waveform of the output 317 of the logic block 305 becomes 1003, and it can be confirmed that the operation is abnormal. As described above, the simulation method according to the present embodiment makes it possible to verify circuit operation by generating realistic noise that matches the characteristics of the input signal.

  According to the circuit simulation method of the present invention, in an analog / digital mixed circuit, an analysis considering the influence of chattering such as noise generated in a circuit or noise entering from the outside is performed on a circuit net disposed at any location. Regardless of this, it can be executed easily and accurately without omission, and can be applied to the operation verification technology of a mixed analog / digital circuit.

1 is a block diagram showing a configuration of a mixed analog / digital circuit to which a circuit simulation method according to a first embodiment of the present invention is applied. Waveform diagram showing the input / output relationship of the analog / digital mixed circuit to which the circuit simulation method of the first embodiment is applied The block diagram which shows the structure of the other analog / digital mixed circuit to which the circuit simulation method of the first embodiment is applied Waveform diagram showing the input / output relationship of another analog / digital mixed circuit to which the circuit simulation method of the first embodiment is applied Waveform diagram showing another input / output relationship of another analog / digital mixed circuit to which the circuit simulation method of the first embodiment is applied A block diagram showing a configuration of a mixed analog / digital circuit to which a circuit simulation method according to a second embodiment of the present invention is applied. Waveform diagram showing the input / output relationship of the analog / digital mixed circuit to which the circuit simulation method of the second embodiment is applied A block diagram showing a configuration of a mixed analog / digital circuit to which a circuit simulation method according to a third embodiment of the present invention is applied. Waveform diagram showing the input / output relationship of the analog / digital mixed circuit to which the circuit simulation method of the third embodiment is applied Waveform diagram showing another input / output relationship of the mixed analog / digital circuit to which the circuit simulation method of the third embodiment is applied Block diagram showing the configuration of a mixed analog / digital circuit to which a conventional circuit simulation method is applied Waveform diagram showing the input / output relationship of the analog / digital mixed circuit using the conventional circuit simulation method Block diagram for explaining the operation of a mixed analog / digital circuit to which the conventional circuit simulation method is applied Waveform diagram showing the actual input / output relationship of the analog / digital mixed circuit using the conventional circuit simulation method

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 AD conversion element 102 Chattering generation circuit 103 Switch 104 AD conversion element 111 Analog circuit 112 Logic circuit 113 Output terminal 121 Net 122 Net 201 Input of AD conversion element 202 Output of AD conversion element 301 Analog circuit 302 Analog circuit 303 Logic circuit 304 Logic Circuit 305 Logic circuit 306 Logic circuit 320 Analog unit 321 Digital unit 341 AD conversion element 342 AD conversion element 343 AD conversion element 344 DA conversion element 401 Analog waveform 402 (without chattering) Input waveform 403 (without chattering) Logic output Waveform 404 Input waveform (with chattering) 405 Logic output waveform (with chattering) 501 Analog waveform 502 Input waveform 503 (without chattering) Logic output waveform 504 (without chattering) Input waveform 505 (with chattering) Logic output waveform 601 (with chattering) 601 AD converter 602 Chattering generation circuit 603 Switch 604 AD converter 611 Analog circuit 612 Logic circuit 613 Output terminal 621 Net 622 Net 701 Analog waveform 702 Waveform with random number chatter 703 Logic output waveform with chattering 801 AD conversion element 802 Chattering generation circuit 803 Switch 804 AD conversion element 811 Analog circuit 812 Logic circuit 813 Output terminal 821 Net 822 Net 901 Analog waveform 902 (Chattering from change of input signal Waveform 903 (when characteristic is obtained) Logic output waveform 1001 (when chattering is present) 1001 Analog waveform 1002 Waveform (when characteristic of chattering is obtained from change of input signal) 1003 Logic output waveform (when chattering is present) 1101 AD conversion element 1102 AD conversion element 1103 AD conversion element 1104 DA conversion element 1201 Input waveform of AD conversion element 1202 Output waveform of AD conversion element 1301 Analog circuit 1302 Digital circuit 1303 Digital circuit current calculation unit 1304 Equivalent circuit for current calculation 1305 AD Conversion element 1306 AD conversion element 1307 DA conversion element 1401 Analog waveform (with noise) 1402 Logic waveform (with noise)

Claims (11)

A circuit simulation method for simulating operation characteristics of an analog / digital mixed circuit in which an analog circuit for processing an analog signal and a digital circuit for processing a digital signal are mixed,
An AD conversion element having a function of converting the input analog signal into a digital signal and a function of generating noise different from the input signal is connected to a network connecting the analog circuit and the digital circuit of the analog / digital mixed circuit. Inserting into,
Performing the analysis,
The step of performing the analysis includes:
A circuit simulation method comprising: performing analysis in a state where the noise generated by the AD conversion element is added to a waveform of a net part connecting the analog circuit and the digital circuit. A circuit simulation method according to claim 1,
In the AD conversion element,
A conversion step of determining an output digital signal according to the voltage or current of the input analog signal;
And a step of generating the noise every time a digital signal changes in the conversion step. The circuit simulation method according to claim 2,
In the AD conversion element,
In the step of generating the noise,
A circuit simulation method comprising a step of varying a frequency of generated noise according to a parameter set corresponding to the frequency of the noise. The circuit simulation method according to claim 3,
In the AD conversion element,
In the step of varying the frequency,
A circuit simulation characterized by having a step of generating a noise having a different frequency each time a digital signal is changed in the conversion step by changing a frequency of the generated noise using a random number within an allowable range. Method. The circuit simulation method according to claim 2,
In the AD conversion element,
In the step of generating the noise,
A circuit simulation method comprising a step of varying the noise generation time in accordance with a parameter set corresponding to the noise generation time. The circuit simulation method according to claim 5,
In the AD conversion element,
In the step of varying the generation time,
The generation time of the noise is varied using a random number within an allowable range,
A circuit simulation method comprising a step of generating noise having a different generation time each time a digital signal changes in the conversion step. The circuit simulation method according to claim 2,
In the AD conversion element,
In the step of generating the noise,
A circuit simulation method comprising a step of switching whether or not to generate the noise according to an external signal or a set parameter input corresponding to whether or not to generate the noise. The circuit simulation method according to claim 2,
In the AD conversion element,
In the step of generating the noise,
According to a calculation formula for obtaining the noise frequency based on the frequency of the input analog signal,
A circuit simulation method comprising a step of varying a frequency of generated noise according to a frequency change of the analog signal. The circuit simulation method according to claim 2,
In the AD conversion element,
In the step of generating the noise,
According to a calculation formula for obtaining the frequency of the noise based on the slew rate of the input analog signal,
A circuit simulation method comprising a step of varying a frequency of generated noise in accordance with a change in slew rate of the analog signal. The circuit simulation method according to claim 2,
In the AD conversion element,
In the step of generating the noise,
According to a calculation formula for obtaining the generation time of the noise based on the frequency of the input analog signal,
A circuit simulation method comprising a step of varying a generation time of the noise according to a frequency change of the analog signal. The circuit simulation method according to claim 2,
In the AD conversion element,
In the step of generating the noise,
According to a calculation formula for obtaining the generation time of the noise based on the slew rate of the input analog signal,
A circuit simulation method comprising a step of varying the generation time of the noise according to a change in the slew rate of the analog signal.

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