JP2007074038A - Information reproducing apparatus and information reproducing method, and computer program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an apparatus and method for realizing reproduction of an image with high quality without jerkiness even when a contents reproduction speed is revised. <P>SOLUTION: A variable clock signal whose clock frequency is increased in response to an increase in a contents reproduction speed is given to one data processing section such as a data storage section for executing data processing associated with contents reproduction processing, the data storage section gives a synchronizing signal corresponding to the clock signal to a second data processing section such as a decode section, a buffer control section, an output control section, and an output display section so that the data processing of each processing section is executed by revising the speed in response to the reproduction speed. Through the configuration above, variable speed display for all frames can be attained without thinning frames at, e.g. high speed reproduction and image reproduction with high quality without jerkiness can be realized. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an information reproducing apparatus, an information reproducing method, and a computer program. More specifically, the present invention relates to an information reproducing apparatus, an information reproducing method, and a computer program for realizing high-quality image reproduction in which jerkiness is prevented in content reproduction processing in which reproduction speed is changed, such as high-speed reproduction and low-speed reproduction. .

  In recent information reproducing apparatuses such as hard disk recorders and DVD recorders, when reproducing content recorded on an information recording medium such as a hard disk or DVD, the user can set the reproduction speed, such as high-speed reproduction or slow reproduction. There are many things that can be configured.

  A general high-speed playback process executed in a conventional information playback apparatus performs a process of thinning out frames constituting moving image content at a predetermined interval and displaying the thinned frame on a display unit. However, the image data displayed on the display by executing such a frame thinning process may be unnatural when displaying an object that moves at a certain speed, for example. Jerkyness occurs as a so-called backlash of movement.

  With reference to FIG. 1, the generation mechanism of jerkiness will be described. FIG. 1 is a diagram illustrating a mechanism in which motion degradation called jerkiness occurs in an image when the viewing speed is changed.

  Assume that high-speed playback is performed for temporally continuous frames 1 to 12 shown in FIG. Each frame 1 to 12 includes a moving object 11. The object 11 moves downward as the frame progresses. FIG. 1B is a diagram in which only vertical lines of an image area including the object 11 are extracted and arranged from frames 1 to 12. The vertical grid is one pixel. The moving object 11 moves downward by one pixel for each frame.

  When this image data is played back at a high speed, frame thinning is executed. Here, it is assumed that the frames 3, 6, 9, and 12 are thinned out and reproduced. The playback speed is 1.5 times (3/2 times). The frame thinning result is shown in FIG. The reproduced images are reproduced in the order of frames 1, 2, 4, 5, 7, 8, 10, and 11, with frames 3, 6, 9, and 12 being thinned out.

  As can be understood from FIG. 1C, the moving object 11 moves one pixel between the reproduction frames 1 and 2 and moves two pixels between the reproduction frames 2 and 4. In the high-speed playback, the frames are played back at equal intervals in the order of frames 1, 2, 4, 5, 7, 8, 10, and 11. As a result, the viewer observes an unnatural movement in which the movement of the object 11 repeats faster or slower. This phenomenon is a so-called jerkiness in which the movement of the display object is jerky. The factor causing this jerkiness is due to the thinning-out process of the playback frame.

  Several information reproduction apparatuses that can change the reproduction speed have been proposed. For example, an information reproducing apparatus disclosed in Patent Document 1 will be described with reference to FIG. The information reproducing apparatus includes a data storage unit 101 such as an HDD, a decoding unit 102, a buffer control unit 103, a buffer 104, an output control unit 105, a display unit 106, an input unit 107, and a system clock 108.

  In a data storage unit 101 such as an HDD, image data to be reproduced is stored as compressed image data, for example, MPEG image data. The decoding unit 102 performs, for example, MPEG decoding processing and data decoding processing. The decoded data is temporarily stored in the buffer 104 under the control of the buffer control unit 103 and then output to the display unit 106 as a monitor unit configured by an LCD or the like under the control of the output control unit 105.

  The playback speed is set to a user's desired speed via the input unit 107. The playback speed setting information input via the input unit 107 is input to the internal counter 109 of the decoding unit 102. In the apparatus shown in FIG. 2, a fixed clock signal is input from the system clock 108 to the data storage unit 101, the decoding unit 102, the buffer control unit 103, the buffer memory 104, the output control unit 105, and the display unit 106. The timing of processing in each block is controlled by the input clock signal.

  The clock 109 in the decoding unit 102 counts the value of a counter that operates based on the clock supplied from the system clock 108. Based on this count value, the timing of processing to be executed is defined. For example, in MPEG2, a time stamp for determining processing timing is given to a packet storing image data. For example, PTS (Presentation Time Stamp), DTS (Decoding Time Stamp), SCR (System Clock Reference), and the like are used, and all are described in time in units of 90 kHz clock. According to the standard, PTS, DTS, and SCR are all set as a 33-bit description to represent 24 hours. However, a clock in an actual decoder uses a counter with fewer bits (for example, a 32-bit counter). You can also.

  The clock 109 in the decoding unit 102 counts the value of a counter that operates based on the clock supplied from the system clock 108, determines the timing of processing to be executed in the decoding unit 102, and performs decoding processing. By controlling the processing timing, the output time of the image / sound data output from the decoding unit 102 is adjusted.

  The decoded image data output from the decoding unit 102 is temporarily stored in the buffer memory 104 under the control of the buffer control unit 103, and then as a monitor unit configured by an LCD or the like under the control of the output control unit 105. Are displayed on the display unit 106. Each of these blocks executes processing with a processing timing defined by a clock supplied from a fixed system clock 108.

  The frame data output from the decoding unit 102 is output at a timing according to the playback speed setting information input from the input unit 107. However, the processing timing in the buffer control unit 103, the buffer 104, the output control unit 105, and the display unit 106 is defined by the supply clock of the system clock 108 that is a fixed clock, and is not changed according to the reproduction speed. . Therefore, even if the frame data output from the decoding unit 102 is output at intervals shorter than normal, the buffer control unit 103, the buffer 104, the output control unit 105, and the display unit 106 have the same timing as the normal playback processing. Only the process is executed. For example, processing corresponding to a frame rate of 60 frames / second, which is a normal playback frame rate, is executed.

  As a result, processing is not in time for all the frames output from the decoding unit 102, and as a result, only discrete image frames that have been thinned out for several frames are displayed. As a result, the high-speed playback data displayed on the display unit 106 is the image with the jerkiness described with reference to FIG.

  Patent Document 2 discloses a configuration example that eliminates such jerkiness. Japanese Patent Application Laid-Open No. 2004-228561 discloses a reproducing apparatus having a configuration in which a variable system clock is supplied to an output control unit that executes output control of image data to a display unit. The configuration described in Patent Document 2 will be described with reference to FIG.

  As shown in FIG. 3, the information reproducing apparatus includes a data storage unit 101 such as an HDD, a decoding unit 102, a buffer control unit 103, a buffer memory 104, an output control unit 105, a display unit 106, an input unit 107, and a system clock 108. Have. In FIG. 3, the same blocks as those shown in FIG. 2 are given the same reference numerals. The configuration shown in FIG. 3 further includes a variable system clock 111 supplied to the output control unit 111 and an output control unit buffer memory 112 attached to the output control unit 105.

  In a data storage unit 101 such as an HDD, image data to be reproduced is stored as compressed image data, for example, MPEG image data. The decoding unit 102 performs, for example, MPEG decoding processing and data decoding processing. The decoded data is temporarily stored in the buffer 104 under the control of the buffer control unit 103 and then output to the display unit 106 as a monitor unit configured by an LCD or the like under the control of the output control unit 105.

  In the configuration illustrated in FIG. 3, a variable clock is input to the output control unit 105 that performs output control of an image frame output to the display unit 106. Thereby, the input timing of the image frame data input to the output control unit 105 and the output timing of the image frame output from the output control unit 105 to the display unit 106 can be changed. In order to adjust the data input / output due to this timing shift, the output control unit buffer memory 112 is set, and the data can be stored in the buffer when the input data exceeds the output data.

  According to this configuration, the output control unit can perform processing according to the unique variable system clock 111 and can change the playback frame rate on the display unit 106. For example, display can be performed not only at a normal reproduction frame rate of 60 frames / second but also at a frame rate of 90 frames / second.

  When display at such a frame rate is executed, all image frames are displayed at a shorter time interval than normal playback without performing frame thinning described earlier with reference to FIG. 1 during high-speed playback. It becomes possible to do. As a result, the jerkiness described above is eliminated.

  However, in the configuration shown in FIG. 3, it is necessary to set the output control unit buffer memory 112 for data input / output adjustment in the output control unit 105.

As described above, the configuration shown in FIG. 3 requires an additional buffer memory, and also requires data input / output control for the buffer memory.
JP-A-7-303240 Japanese Patent Laid-Open No. 2004-56761

  The present invention has been made in view of the above-described problems. For example, high-quality playback that prevents the occurrence of jerkiness in a playback process in which the playback speed is changed, such as high-speed playback, without adding a new buffer memory or the like. An object is to provide an information reproducing apparatus, an information reproducing method, and a computer program for realizing image reproduction.

The first aspect of the present invention is:
In an information playback apparatus that executes content playback processing,
A playback speed determination unit that performs clock control for outputting a system clock based on the content playback speed, increases the clock frequency in response to an increase in the content playback speed, and decreases the clock frequency in response to a decrease in the content playback speed. When,
A system clock output unit for outputting a variable clock signal having a frequency controlled by the reproduction speed determination unit;
A content reproduction processing unit that executes data processing related to content reproduction;
The content reproduction processing unit
A first data processing unit that inputs a variable clock signal output from the system clock and executes data processing at a processing speed according to the input variable clock signal;
A second data processing unit that inputs a synchronization signal corresponding to the variable clock signal from the first data processing unit and executes data processing at a processing speed according to the synchronization signal;
There is an information reproducing apparatus characterized by comprising:

  Furthermore, in one embodiment of the information reproducing apparatus of the present invention, the first data processing unit is a data storage unit, and data acquisition and output processing from a storage medium is performed according to a variable clock signal output by the system clock. The second data processing unit is configured to execute data processing on output data from the data storage unit at a processing speed according to the synchronization signal. And

  Furthermore, in one embodiment of the information reproducing apparatus of the present invention, the first data processing unit is a data storage unit, and the second data processing unit is a decoding unit, a buffer control unit, an output control unit, an output display. Each of the decoding unit, the buffer control unit, the output control unit, and the output display unit sequentially transfers the synchronization signal output from the data storage unit, and transmits data at a processing speed according to the synchronization signal. It is the structure which performs a process.

  Furthermore, in one embodiment of the information reproducing apparatus of the present invention, the reproduction speed determining unit determines the clock frequency of the variable clock as the clock frequency at the standard reproduction when the content reproduction speed is set to n times the standard reproduction speed. It is the structure which performs the clock frequency control set to n times.

  Furthermore, in one embodiment of the information reproducing apparatus of the present invention, the content reproduction processing unit includes a data storage unit, a decoding unit, a buffer control unit, an output control unit, and an output display unit. A buffer control unit, an output control unit, and an output display unit that receive a variable clock signal output from the system clock or a synchronization signal corresponding to the variable clock signal, and read data from a buffer memory controlled by the buffer control unit The processing after the processing is executed by changing the processing speed according to the variable clock signal or the synchronization signal, and the data storage unit, the decoding unit, and the buffer control unit input a fixed clock signal of a fixed frequency, and the buffer The process before the data writing process to the buffer memory controlled by the control unit is performed with the fixed clock signal. Characterized in that it is configured to run in accordance with a fixed processing speed.

  Furthermore, in one embodiment of the information reproducing apparatus of the present invention, the frequency of the fixed clock signal is set to a frequency equal to or higher than the clock signal having the highest frequency among the variable clock signals output from the system clock. And

  Furthermore, in one embodiment of the information reproducing apparatus of the present invention, the reproduction speed determining unit determines a content reproduction speed based on user setting information input via the input unit, and based on the determined reproduction speed. The system is configured to execute a process of determining a clock frequency output from the system clock.

  Furthermore, in one embodiment of the information reproducing apparatus of the present invention, the reproduction speed determining unit inputs the feature amount information of the content to be reproduced, determines the content reproduction speed based on the feature amount information, and determines the determined reproduction speed. The system is configured to execute processing for determining a clock frequency output from the system clock based on the above.

Furthermore, the second aspect of the present invention provides
In an information reproduction method for executing content reproduction processing,
This is a clock frequency control step for controlling the clock output from the system clock based on the content playback speed. The clock frequency is increased as the content playback speed increases, and the clock frequency is decreased as the content playback speed decreases. A clock frequency control step for controlling, and
A system clock output step of outputting a variable clock signal having a frequency controlled in the clock frequency control step from a system clock;
A content reproduction processing step of inputting a variable clock signal output from the system clock or a synchronization signal corresponding to the variable clock signal and executing data processing at a processing speed according to the input variable clock signal or synchronization signal;
The content reproduction processing step includes
In the first data processing unit, a first data processing step of inputting a variable clock signal output from the system clock and executing data processing at a processing speed according to the input variable clock signal;
In the second data processing unit, a second data processing step of inputting a synchronization signal corresponding to the variable clock signal from the first data processing unit and executing data processing at a processing speed according to the synchronization signal;
There is an information reproduction method characterized by comprising:

  Furthermore, in an embodiment of the information reproducing method of the present invention, the first data processing unit is a data storage unit, and the first data processing step performs data acquisition and output processing from a storage medium by outputting the system clock. The second data processing step executes data processing on the output data from the data storage unit at a processing speed according to the synchronization signal. It is a step to perform.

  Furthermore, in an embodiment of the information reproducing method of the present invention, the first data processing unit is a data storage unit, and the second data processing unit includes a decoding unit, a buffer control unit, an output control unit, and an output display unit. The second data processing step sequentially transfers the synchronization signal output from the data storage unit in each of the decoding unit, the buffer control unit, the output control unit, and the output display unit, and the synchronization signal This is a step of executing data processing at a processing speed according to the above.

  Furthermore, in one embodiment of the information reproduction method of the present invention, the clock frequency control step is configured such that the clock frequency of the variable clock is set to the clock frequency at the time of standard reproduction when the content reproduction speed is set to n times the standard reproduction speed. This is a step of executing clock frequency control that is set to n times.

  Furthermore, in one embodiment of the information reproduction method of the present invention, the content reproduction processing step includes data acquisition processing from the data storage unit, decoding processing in the decoding unit, and decoding data writing and reading processing in the buffer memory in the buffer control unit. The display control process in the output control unit and the data display process in the output display unit are steps, and the buffer control unit, the output control unit, and the output display unit are connected to the variable clock signal output from the system clock or the variable clock signal. A corresponding synchronization signal is input, and processing subsequent to data reading from the buffer memory controlled by the buffer control unit is executed by changing the processing speed according to the variable clock signal or the synchronization signal corresponding to the variable clock signal, The data storage unit and decoding unit The buffer control unit receives a fixed clock signal having a fixed frequency, and executes processing before data writing processing to the buffer memory controlled by the buffer control unit at a fixed processing speed according to the fixed clock signal. .

  Furthermore, in one embodiment of the information reproducing method of the present invention, the frequency of the fixed clock signal is set to a frequency equal to or higher than the clock signal having the highest frequency among the variable clock signals output from the system clock. And

  Furthermore, in an embodiment of the information reproduction method of the present invention, the clock frequency control step determines a content reproduction speed based on user setting information input via the input unit, and based on the determined reproduction speed. It is a step which performs the process which determines the clock frequency which the said system clock outputs.

  Furthermore, in one embodiment of the information reproduction method of the present invention, the clock frequency control step inputs feature amount information of the content to be reproduced, determines a content reproduction speed based on the feature amount information, and determines the determined reproduction speed. The step of executing a process of determining a clock frequency output from the system clock based on the above.

Furthermore, the third aspect of the present invention provides
In a computer program for causing a content reproduction process to be executed in an information reproduction apparatus,
This is a clock frequency control step for controlling the clock output from the system clock based on the content playback speed. The clock frequency is increased as the content playback speed increases, and the clock frequency is decreased as the content playback speed decreases. A clock frequency control step for controlling, and
A system clock output step of outputting a variable clock signal having a frequency controlled in the clock frequency control step from a system clock;
A content reproduction processing step of inputting a variable clock signal output from the system clock or a synchronization signal corresponding to the variable clock signal and executing data processing at a processing speed according to the input variable clock signal or synchronization signal;
The content reproduction processing step includes
In the first data processing unit, a first data processing step of inputting a variable clock signal output from the system clock and executing data processing at a processing speed according to the input variable clock signal;
In the second data processing unit, a second data processing step of inputting a synchronization signal corresponding to the variable clock signal from the first data processing unit and executing data processing at a processing speed according to the synchronization signal;
There is a computer program characterized by comprising:

  The computer program of the present invention is, for example, a recording medium or a communication medium provided in a computer-readable format to a computer system that can execute various program codes, such as a CD, FD, or MO. It is a computer program that can be provided by a recording medium or a communication medium such as a network. By providing such a program in a computer-readable format, processing corresponding to the program is realized on the computer system.

  Other objects, features, and advantages of the present invention will become apparent from a more detailed description based on embodiments of the present invention described later and the accompanying drawings. In this specification, the system is a logical set configuration of a plurality of devices, and is not limited to one in which the devices of each configuration are in the same casing.

  According to the configuration of one embodiment of the present invention, control is performed to increase the clock frequency in response to an increase in content playback speed, and to decrease the clock frequency in response to a decrease in content playback speed, and output from the system clock. The variable clock signal output from the system clock is input to one data processing unit that executes data processing related to the content reproduction processing, for example, the data storage unit, and the synchronization signal corresponding to the clock signal is input from the data storage unit to the second data. Input to each of the processing units, for example, the decoding unit, the buffer control unit, the output control unit, the output display unit, the data acquisition processing in the data storage unit, the decoding processing in the decoding unit, the writing of the decoded data to the buffer memory in the buffer control unit and Reading processing, display control processing in the output control unit, output display unit Since the data display process is performed by changing the processing speed in accordance with the clock signal having a frequency corresponding to the content playback speed or the synchronization signal corresponding to the clock signal, frame thinning is performed, for example, during high-speed playback. All frames can be displayed at high speed, and high quality image reproduction without jerkiness is realized.

  Details of the information reproducing apparatus, information reproducing method, and computer program of the present invention will be described below with reference to the drawings.

  First, the configuration of an information reproducing apparatus according to an embodiment of the present invention will be described with reference to FIG. An information playback apparatus 200 shown in FIG. 4 is an information playback apparatus that performs playback processing of content input via, for example, a broadcast or a network, or content stored in an information recording medium such as a DVD or a hard disk. The overall basic configuration of the information reproducing apparatus 200 is similar to that of a conventional recording / reproducing apparatus, for example, a recording / reproducing apparatus represented by a VTR or HDD recorder.

  One of the differences of the information reproducing apparatus 200 of the present invention from the conventional apparatus is that the information reproducing apparatus system is configured to perform data processing using a variable clock during content reproduction. This variable clock is set to various clock cycles corresponding to the playback speed of content, and controls the processing timing of each data processing execution unit included in the information playback apparatus 200. By this processing, it is possible to reproduce a moving image without generating jerkiness. Specifically, it has a configuration for controlling the clock output from the system clock based on the content playback speed, and performs control to increase the clock frequency in response to an increase in the content playback speed.

  The configuration of the information reproducing apparatus 200 shown in FIG. 4 will be described. Distribution content using radio waves as broadcast waves is input via the tuner 201, and distribution content via a network such as the Internet or a LAN is input via the network interface 202. These input contents are encoded by an encoder 203 as an encoding process based on, for example, the MPEG method. When the input content is encoded content, the encoding process in the encoder 203 is omitted.

  The encoded content is stored in the data storage unit 204 configured by, for example, a hard disk. The process up to this point is until the input content such as broadcast is recorded. Each processing block that executes the data storage processing receives the system clock (for example, 13.5 MHz) of the information reproducing apparatus 200 and executes the processing at an input clock cycle, thereby executing normal content recording processing. Is done.

  Next, the reproduction process of the content stored in the data storage unit 204 configured by a hard disk or the like will be described. First, data read from the data storage unit 204 is decoded by the decoder 205. For example, decoding processing according to MPEG, NTSC, MUSE, etc. is executed.

  The decoder 205 outputs image and audio data as decoding processing result data. The output data is expanded in the buffer 206 and then transferred to the output control unit 207. Note that the buffer 206 may be built in the decoder 205. The output control unit 207 adds a necessary signal, for example, a synchronization signal, to the output display unit 208 in addition to the image / audio data, and outputs the signal to the output display unit 208 having a display and a speaker.

  The output display unit 208 presents the input signal from the output control unit 207 in a form that allows a person to audition. For example, the output display unit 208 includes a CRT, LED, plasma display, and the like, and presents the image signal in a form that can be seen by human eyes. In addition, an amplifier, a speaker, and the like are provided so that an audio signal can be heard by a human ear.

  The outline of the system for recording contents such as broadcasting and listening for playback has been described above. These basic configurations are equivalent to the conventional system. One of the differences between the information reproducing apparatus 200 of the present invention and the conventional apparatus is that, as described above, the data processing using a variable clock is performed during content reproduction in the information reproducing apparatus system. The variable clock is set to various clock cycles corresponding to the reproduction speed, and controls the processing timing of each data processing execution unit included in the information reproducing apparatus 200. By this processing, it is possible to reproduce a moving image without generating jerkiness.

  With reference to FIG. 5, a description will be given of an embodiment of a content playback processing configuration in the information playback apparatus 200 of the present invention that enables video playback without occurrence of jerkiness. As described with reference to FIG. 4, the basic flow of content reproduction follows the flow of processing of data acquisition from the data storage unit, decoding processing by the decoder, and output of images and audio obtained by decoding. It becomes.

  A content reproduction processing unit that executes data processing related to content reproduction processing includes a data storage unit 301, a decoding unit 302, a buffer control unit 303, an output control unit 305, and an output display unit 306 shown in the figure. Thus, various processes are executed in content reproduction. In other words, in FIG. 5, the content stored in the data storage unit 301 configured by a hard disk or the like is decoded by the decoding unit 302. For example, decoding processing according to MPEG, NTSC, MUSE, etc. is executed.

  The decoding unit 302 outputs image and audio data as decoding processing result data to the buffer control unit 303, and the buffer control unit 303 stores the image and audio data in the buffer memory 304. After that, the output control unit 305 inputs the data stored in the buffer memory 304 from the buffer control unit 303, and adds a necessary signal, for example, a synchronization signal, to the output display unit 306 in addition to the input image / audio data. Then, the data is output to the output display unit 306 having a display and a speaker.

  In this content reproduction, the content reproduction speed can be set to various settings such as high-speed reproduction and slow (low-speed) reproduction, in addition to the normal reproduction set as the normal reproduction speed. This setting is set, for example, by a user input via the input unit 307 shown in FIG. For example, the reproduction speed determination unit 308 determines the reproduction speed based on a user input via the input unit 307 and adjusts the clock frequency of the system clock 309 based on the determination information. The system clock 309 has a configuration capable of changing the clock frequency.

For example, when the clock frequency of the system clock 309 during normal playback (normal playback) is 13.5 MHz, when the content viewing / playback at 1.5 times speed is set, the playback speed determination unit 308 Clock frequency,
1.5 × 13.5 = 20.25MHz
Set to.

  In this way, the playback speed determination unit 308 controls the clock output from the system clock 309 based on the content playback speed, and performs clock frequency control that sets the clock frequency higher as the content playback speed increases. The system clock 309 outputs a variable clock signal having a frequency controlled according to the reproduction speed in the reproduction speed determination unit 308 as described above.

  For example, when the content playback speed is set to n times the standard playback speed, the playback speed determination unit 308 sets the clock frequency of the variable clock output from the system clock 309 to n times the clock frequency during standard playback. Perform frequency control processing.

  The system clock 309 outputs a variable clock signal having a frequency set in proportion to the content reproduction speed to the data storage unit 301. The data storage unit 301 executes data acquisition processing from storage means such as a hard disk and output processing to the decoding unit 302 by changing the processing speed based on a clock signal having a frequency corresponding to the content reproduction speed.

  Further, the data storage unit 301 outputs a synchronization signal synchronized with a variable clock signal having a frequency set in proportion to the content reproduction speed input from the system clock 309 to the decoding unit 302.

  The decoding unit 302 changes the processing speed based on the synchronization signal input from the data storage unit 301 and executes the decoding process and the output process of the processing result to the buffer control unit 303. Further, the decoding unit 302 outputs the synchronization signal input from the data storage unit 301 to the buffer control unit 303.

  The buffer control unit 303 executes decoding data writing and reading processing with respect to the buffer memory 304 by changing the processing speed based on the synchronization signal input from the decoding unit 302. Further, the buffer control unit 303 outputs the synchronization signal input from the decoding unit 302 to the output control unit 305.

  The output control unit 305 obtains data from the buffer memory 304 via the buffer control unit 303, generates display data, and performs display data output control processing for the output display unit 306 based on a synchronization signal input from the buffer control unit 303. Change the processing speed and execute.

  The output display unit 306 executes display data display processing input from the output control unit 305 while changing the processing speed based on the synchronization signal input from the output control unit 305.

  As described above, each data processing unit of the data storage unit 301 to the output display unit 306 executes processing by changing the processing speed based on the clock signal having a frequency corresponding to the content reproduction speed. As a result, the display image is displayed with the processing speed changed based on the clock signal having a frequency corresponding to the content reproduction speed.

That is,
(A) During normal playback (normal playback)
For example, the clock frequency of the system clock 309 is 13.5 MHz, the data storage unit 301 to the output display unit 306 execute data processing according to the clock frequency of 13.5 MHz,
(B) During high-speed playback at 1.5 times speed,
The clock frequency of the system clock 309 is set to 1.5 × 13.5 = 20.25 MHz, and the data storage unit 301 to the output display unit 306 execute data processing according to the clock frequency of 20.5 MHz.

  As described above, the information reproducing apparatus according to the embodiment of the present invention shown in FIG. 5 inputs the variable clock signal having the clock frequency proportional to the content reproduction speed to the data storage unit 301 that executes the data processing in the content reproduction processing. The synchronization signal corresponding to the variable clock signal is sequentially transferred from the data storage unit 301 to the decoding unit 302, the buffer control unit 303, the output control unit 305, and the output display unit 306. The data processing is executed by changing the processing speed according to the clock frequency proportional to the speed.

  Therefore, if the frame rate of the image output to the display in the output display unit 306 is, for example, 60 frames / sec during normal reproduction, the frame rate is 90 frames / sec in 1.5 × speed reproduction, and frame decimation is performed at all. A safe image display is realized.

  In this way, clock information having a clock frequency proportional to the image playback speed is sent to each data processing block that executes the content playback processing, and everything from reading the recorded data to presentation is performed at a speed corresponding to the content playback speed. Let

  For example, when the content playback speed is set to high speed playback by user input, the high speed playback determination unit 308 performs control to set the clock frequency output from the system clock 309 high, and the system clock 309 is set to a high frequency. Output a clock signal. A variable clock signal output from the system clock 309 is input to the data storage unit 301. Further, a synchronization signal corresponding to the clock signal is sequentially transferred from the data storage unit 301 to the decoding unit 302, the buffer control unit 303, the output control unit 305, and the output display unit 306.

  As a result, data acquisition processing in the data storage unit 301, decoding processing in the decoding unit 302, writing and reading processing of decoded data to the buffer memory in the buffer control unit, display control processing in the output control unit, and data display processing in the output display unit The processing speed is changed based on a clock signal having a frequency corresponding to the content reproduction speed.

  With these processes, for example, even when content is played back at high speed, high-speed display of all frames is achieved without thinning out frames, and high-quality image playback without jerkiness is realized.

A specific example of a clock input to the data storage unit 301 by the system clock 309 will be described with reference to FIG. FIG. 6 is a diagram showing a specific example of the clock frequency input to the data storage unit 301 by the system clock 309 when the reproduction speed is changed. In FIG.
(A) 1.00 times normal speed (normal playback)
(B) 1.50 times speed (high speed playback)
(C) 0.75 times speed (low speed playback)
The example of the clock corresponding to these three types of content reproduction speeds is shown.

(A), (b), and (c) show the same number of clocks (n clocks). The time required for clock counting of n clocks is respectively
(A) 1/60 second at 1.00 times normal speed (normal playback)
(B) 1/90 seconds at 1.50 times speed (high speed playback),
(C) 1/45 second at 0.75 times speed (low speed playback),
It has become.

  The number of clocks [n] shown in FIG. 6 corresponds to the number of clocks required for processing one field data. One frame as one screen of image data is composed of two fields. One frame is configured by combining two pieces of field information including pixel information of every other horizontal line (interlace processing). That is, one frame is composed of two field data. FIG. 7 shows two field data examples constituting one frame.

  One frame image includes, for example, field 0 (F0) and field 1 (F1) shown in FIG. A field 0 (F0) shown in FIG. 7 is composed of n pixels of pixels: p1 to pn, and a field 1 (F1) is also composed of n pixels of pixels: c1 to cn.

  Assume that the case where data processing is executed in the clock cycle of FIG. 6A is the normal playback speed, that is, the clock frequency at the time of viewing at 1.00 times speed. In this case, the field period is 1/60 seconds, and it takes 1/60 seconds to transfer data for one field. If a processing time of 1 clock is set for each of the number of pixels [n] included in one field, the data for one field is the transfer time in the normal speed reproduction processing at 1.00 times normal speed. A clock frequency in which n clocks are set to 1/60 seconds is set in the system clock 309, the clock signal is input to the data storage unit 301, and a synchronization signal corresponding to the clock signal is decoded from the data storage unit 301. Unit 302, buffer control unit 303, output control unit 305, and output display unit 306 are sequentially transferred. As a result, each data processing unit executes processing of n pixel data for one field at a period of 1/60 seconds.

  More specifically, in the case of horizontal 858 lines per field, vertical 262.5 lines, and field period 59.94 Hz, the clock frequency is 13.5 MHz in the normal speed reproduction processing at 1.00 times normal speed.

  Here, when the content playback speed is high speed playback of 1.50 times, the data transfer time for one field is set to 1/90 seconds. The number of clocks set to 1/90 seconds remains n clocks. Therefore, the clock frequency is 1.50 times the fast frequency proportional to the content playback speed compared to the 1.00 times speed shown in FIG. That is, a clock signal having a clock frequency having a clock cycle shown in FIG. 6B in which n clocks are set to 1/90 seconds as a transfer time for one field of data is set in the system clock 309, and the data storage unit 301 The clock signal is input, and a synchronization signal corresponding to the clock signal is sequentially transferred from the data storage unit 301 to the decoding unit 302, the buffer control unit 303, the output control unit 305, and the output display unit 306. . As a result, each data processing unit of the data storage unit 301 to the output display unit 306 executes n pixel data processing for one field at a period of 1/90 seconds.

  On the other hand, in the case of slow playback with the content playback speed slowed down to 0.75 times speed, the field data transfer time is set to 1/45 seconds. In this case, the clock of the clock frequency having the period shown in FIG. 6C in which n clocks are set to 1/45 seconds which is the transfer time of data for one field is set in the system clock 309 and stored in the data storage unit 301. The clock signal is input, and a synchronization signal corresponding to the clock signal is sequentially transferred from the data storage unit 301 to the decoding unit 302, the buffer control unit 303, the output control unit 305, and the output display unit 306. As a result, each data processing unit of the data storage unit 301 to the output display unit 306 executes processing of n pixel data for one field at a period of 1/45 seconds.

Referring to FIG. 8, in this embodiment, the correspondence between the synchronization signal based on the variable clock signal input to output control unit 305 shown in FIG. 5 and the transfer data input from buffer control unit 303 to output control unit 305 Will be described. In FIG.
(A) 1.00 times normal speed (normal playback)
(B) 1.50 times speed (high speed playback)
In the reproduction processing at these different reproduction speeds, the correspondence between the synchronization signal based on the clock information input to the output control unit 305 and the transfer data input from the buffer control unit 303 to the output control unit 305 is shown.

  In the reproduction process at 1.00 times normal speed (normal reproduction) shown in FIG. 8A, as described with reference to FIG. 6A, it corresponds to a clock signal having a frequency having n clocks in 1/60 seconds. A synchronization signal is input to the output control unit 305. The output control unit 305 inputs n pieces of pixel data, that is, pixel information constituting one field, from the buffer control unit 303 during n clocks of 1/60 seconds. , N pixel data are output to the output display unit 306 in 1/60 second n clocks.

  The time t1a to t2a shown in FIG. 8A is 1/60 second. Here, for example, n pieces of pixel data constituting the field F0 are input from the buffer control unit 303 and output to the output display unit 306. Further, in the next 1/60 seconds indicated by the times t2a to t3a, n pieces of pixel data constituting the field F1 are input from the buffer control unit 303 and output to the output display unit 306. By this processing, an image display with a field interval of 1/60 seconds is realized.

  Further, in the reproduction process at 1.50 times speed (high speed reproduction) shown in FIG. 8B, as described with reference to FIG. 6B, a clock signal having a frequency having n clocks in 1/90 seconds is used. A corresponding synchronization signal is input to the output control unit 305. The output control unit 305 receives n pieces of pixel data, that is, pixel information constituting one field from the buffer control unit 303 during n clocks of 1/90 seconds. Then, n pixel data are output to the output display unit 306 during n clocks of 1/90 seconds.

  The time t1b to t2b shown in FIG. 8B is 1/90 second. Here, for example, n pieces of pixel data constituting the field F0 are input from the buffer control unit 303 and output to the output display unit 306. Further, in the next 1/90 seconds indicated by time t2b to t3b, n pieces of pixel data constituting the field F1 are input from the buffer control unit 303 and output to the output display unit 306. By this processing, an image display with a field interval of 1/90 seconds is realized.

  In any of these display processes, processing of all data constituting the frame image is realized, and no thinning process is performed. Since the thinning process is not executed, jerkiness does not occur in the display image. The reason why jerkiness does not occur will be described with reference to FIG. FIG. 9 is a diagram corresponding to FIG. 1 used for the description of the high-speed reproduction process with the thinning process described above.

  Assume that high-speed playback is performed for temporally continuous frames 1 to 12 shown in FIG. Each frame 1 to 12 includes a moving object 321. The object 321 moves downward as the frame progresses. FIG. 9B is a diagram in which only the vertical lines of the image area including the object 321 are extracted and arranged from frames 1 to 12. The vertical grid is one pixel. The moving object 321 moves downward by one pixel for each frame.

  In FIG. 1, as described with reference to FIG. 1 (c), the moving object moves by one pixel between the playback frames 1 and 2 due to the occurrence of a thinned frame in high-speed playback. In between, it moves 2 pixels. In the high-speed playback, the frames are played back at equal intervals in the order of frames 1, 2, 4, 5, 7, 8, 10, and 11. As a result, the viewer observes an unnatural motion in which the motion of the object repeats faster or slower. This phenomenon causes so-called jerkiness that the movement of the display object is jerky.

  On the other hand, in the information reproducing apparatus of the present invention, a variable clock signal that is proportional to the reproduction speed is generated, and the variable clock signal is input to the data storage unit 301 that executes data processing in the content reproduction processing. Is sequentially transferred from the data storage unit 301 to the decoding unit 302, the buffer control unit 303, the output control unit 305, and the output display unit 306, and is proportional to the content playback speed in each processing unit. Data processing is executed by changing the processing speed according to the clock frequency. As a result, processing of all data constituting the frame image is realized in both high-speed reproduction and low-speed reproduction, and it is not necessary to perform a thinning process.

  Since the thinning process is not executed, for example, in high-speed playback, the display image is only displayed for one frame as shown in FIG. 9C, and all frame images are displayed sequentially. Thus, the object 321 is displayed so as to move smoothly according to all display frames, and jerkiness is not generated.

  A processing example using the variable system clock of the present invention and a conventional fixed system clock are applied to frame data input processing to the output control unit 305 and frame data output processing from the output control unit 305 to the output display unit 306. The processing example will be described with reference to FIGS.

  FIG. 10 shows an example of processing according to the present invention. The frame data input data (broken line) to the output control unit 305 and the output control unit 305 when data processing using a clock proportional to the content playback speed is executed. Frame data output data (solid line) to the output display unit 306 is shown for frames 1 and 2. The broken line corresponds to the data acquisition processing time from the buffer memory 304 shown in FIG. As described above, one frame includes two field data. (1A) corresponds to 1.00 × speed playback, and (1B) corresponds to 1.50 × speed high speed playback.

  In the processing example of the present invention, a clock or synchronization signal proportional to the content reproduction speed is supplied from the system clock 308 to each data processing unit, and each data processing unit has a clock signal clock having a frequency proportional to the supplied reproduction speed. Data processing is executed according to the cycle. Therefore, as shown in (1A) and (1B) of FIG. 10, the input data (broken line) of the frame data to the output control unit 305 is also the output data (solid line) of the frame data from the output control unit 305 to the output display unit 306. In either case, input / output of all pixels (n) is completed in a time corresponding to the content reproduction speed.

  On the other hand, FIG. 11 shows a processing example to which a conventional fixed system clock is applied. (2A) corresponds to 1.00 × speed playback, and (2B) corresponds to 1.50 × speed playback. In the processing using the conventional fixed system clock, the processing of the output control unit operates in accordance with a clock having the same clock cycle in both 1.00 × speed playback and 1.50 × speed playback. In the 1.00 × speed reproduction, as shown in (2A), the processing is executed for each frame without any problem and the image is displayed.

  On the other hand, in the 1.50-times high-speed playback shown in FIG. 11 (2B), for example, even if the data acquisition processing interval of the output control unit is reduced from the buffer memory, the time required for data acquisition is 1.00. The processing time in the double-speed playback is the same, and as a result, the time for displaying all the frames is insufficient. As a result, the output data (solid line) of the frame data from the output control unit to the output display unit shown in FIG. As shown in FIGS. 1, 2, and 4, display in which the frame 3 is thinned out must be performed. This processing is as described above with reference to FIG. 1, and as a result, jerkiness due to frame thinning occurs.

  As described above, in the information reproducing apparatus of the present invention, a variable clock signal having a frequency proportional to the reproduction speed is generated, and each data processing unit that executes processing related to content reproduction corresponds to the variable clock signal or the variable clock signal. Data processing is executed in accordance with the clock cycle of the clock frequency changed in accordance with the content playback speed by supplying the synchronization signal to be processed, so that all the data constituting the frame image can be processed in both high-speed playback and low-speed playback. As a result, data display of all frames is realized without performing thinning processing, and high-quality data display without jerkiness is realized.

  In the above-described embodiment, the change in the content playback speed has been described as an example of processing executed based on user input information input via the input unit 307 illustrated in FIG. For example, a feature amount of the content itself may be detected and the content playback speed may be adjusted based on the feature amount.

  With reference to FIG. 12, a configuration example of adjusting the content reproduction speed based on the feature amount will be described. FIG. 12 shows a content recording processing unit 400 in the information reproducing apparatus, a reproduction speed determining unit 451 as a part of the content reproduction control unit, and a system clock 452. The clock frequency of the clock output from the system clock 452 is changed based on the determination by the reproduction speed determination unit 451, and is output to the data storage unit to display unit that executes the content reproduction process. The clock supply configuration in the content reproduction system is the same as the configuration described with reference to FIG.

  In the configuration shown in FIG. 12, a content recording processing unit 400 includes a tuner 401 that receives distribution content using radio waves as a broadcast wave, a network interface 402 that receives distribution content via a network such as the Internet or a LAN, and these input contents. The data storage unit 404 includes an encoder 403 that executes the encoding process, for example, a hard disk. These configurations are the same as those described above with reference to FIG.

  Furthermore, the configuration example illustrated in FIG. 12 includes a feature amount extraction unit 405. The feature amount extraction unit 405 extracts the feature amount of the content stored in the data storage unit 404, and stores the extracted feature amount in the data storage unit 404 as attribute information corresponding to the content.

  The feature amount extracted from the content by the feature amount extraction unit 405 is, for example, a change point of an image as content data, a change point of audio data, a silent portion, or the like. For example, in a broadcast drama content or the like, a change point or the like of a drama body and a commercial part is extracted as a feature amount. These feature quantities corresponding to the content are stored in association with the content as attribute information of the content stored in the data storage unit 404.

  A playback speed determination unit 451 as a part of the content playback control unit acquires a feature amount corresponding to the playback content from the data storage unit 404 and determines the playback speed of the content based on the feature amount. For example, a silent portion, a portion with a small image change amount, or a commercial portion is set to be played back at high speed. This control is executed by the playback speed determination unit 451 in accordance with a preset program.

  In this way, the playback speed determination unit 451 determines the content playback speed and controls the clock output from the system clock 452 based on this determination. In other words, clock frequency control is performed in which the clock frequency is set higher as the content playback speed increases. The system clock 452 outputs a variable clock signal having a frequency controlled according to the reproduction speed in the reproduction speed determination unit 451 as described above.

  That is, the system clock 452 is a data storage shown in FIG. 5 that performs data processing in content playback processing on a variable clock signal having a clock frequency controlled according to playback speed information determined by the playback speed determination unit 451 based on the feature amount. The synchronization signal corresponding to the variable clock signal is sequentially transferred from the data storage unit 301 to the decoding unit 302, the buffer control unit 303, the output control unit 305, and the output display unit 306 for each processing. The data processing is executed by changing the processing speed according to the clock frequency proportional to the content reproduction speed. According to this processing configuration, it is possible to perform content reproduction processing in which the content reproduction speed is automatically adjusted without performing user input.

  Next, an example of an information reproducing apparatus having a configuration different from that in FIG. 5 will be described with reference to FIG. In the embodiment described with reference to FIG. 5, the system clock 309 that supplies one variable clock is set, and the clock output from the system clock 309 is input to the data storage unit 301 shown in FIG. .

  However, the processing speed in the data storage section and the decoding section can be set to a relatively high processing speed, and the clock for these processing sections is a fixed clock having a high frequency and a short clock cycle, and the buffer control section, Even if the frequency of the input clock for the output control unit and output display unit is changed according to the playback speed, it is possible to prevent content playback interruptions and occurrence of thinned frames within a certain range of high-speed playback. Is possible.

  A configuration example of an information reproducing apparatus having such a clock supply configuration is shown in FIG. In FIG. 13, the content stored in the data storage unit 501 configured by a hard disk or the like is decoded by the decoding unit 502. For example, decoding processing according to MPEG, NTSC, MUSE, etc. is executed.

  The decoding unit 502 outputs image and audio data as decoding processing result data to the buffer control unit 503, and the buffer control unit 503 stores the image and audio data in the buffer memory 504. Thereafter, the output control unit 505 inputs the data stored in the buffer memory 504 from the buffer control unit 503, and adds a necessary signal, for example, a synchronization signal, to the output display unit 506 in addition to the input image / audio data. Then, it outputs to the output display part 506 which has a display and a speaker.

  In this configuration, a system clock 521 that outputs a fixed clock outputs clock information having a fixed period to the data storage unit 501, the decoding unit 502, and the buffer control unit 503. Further, a variable clock signal with a variable period set to a clock frequency corresponding to the content reproduction speed is input to the buffer control unit 503, and a synchronization signal corresponding to the variable clock signal is output from the buffer control unit 303 to the output control unit 305. Are sequentially transferred to the output display unit 306, and the buffer control unit 303, the output control unit 305, and the output display unit 306 change the processing speed according to the clock frequency proportional to the content reproduction speed and execute data processing.

  For example, the playback speed set by the user input via the input unit 507 shown in FIG. 13 is input to the playback speed determination unit 508, and the clock frequency of the system clock 509 is adjusted based on the playback speed. The system clock 509 outputs a clock signal having a frequency set in proportion to the reproduction speed to the buffer control unit 503 that executes data processing associated with content reproduction.

  In the buffer control unit 503, data reading from the data storage unit 501 and the decoding unit 502 and input processing are executed by a supply clock from the system clock 521, and buffer data output to the output control unit 505 is made a variable clock of the system clock 509. It executes as a process according to. The buffer memory 504 has a clock for data writing and a clock for reading different from each other. For example, by using a dual port memory, processing can be realized without any problem.

  The fixed-frequency clock signal output from the system clock 521 that outputs a fixed clock is a fixed clock having a frequency equal to or higher than the clock signal having the highest frequency among the variable clock signals output from the system clock 509 that outputs a variable clock. It is preferable to set as With this setting, the variable clock output from the system clock 509 that outputs the variable clock is set to the highest frequency, and even when the content reproduction speed is the highest, data writing to the buffer memory 504 is performed at a higher frequency. Processing is performed at a fast speed according to a fixed clock with. Since the writing process is executed faster than the data reading, the contents of the buffer memory are not emptied, and the loss of display data is prevented.

  The information reproduction apparatus shown in FIG. 13 outputs a clock signal having a variable clock frequency proportional to the content reproduction speed to the buffer control unit 503 that executes data processing in the content reproduction process, and a synchronization signal corresponding to the variable clock signal is output. Transfer sequentially from the buffer control unit 303 to the output control unit 305 and the output display unit 306, and only the buffer control unit 303, the output control unit 305, and the output display unit 306 perform processing according to the clock frequency proportional to the content playback speed. Although the configuration is such that data processing is executed by changing the speed, an image that does not perform frame thinning at all even when the playback speed is changed, as in the configuration shown in FIG. 5, by satisfying the above-described requirements. Display is possible, and high-quality image reproduction without jerkiness is realized.

  The present invention has been described in detail above with reference to specific embodiments. However, it is obvious that those skilled in the art can make modifications and substitutions of the embodiments without departing from the gist of the present invention. In other words, the present invention has been disclosed in the form of exemplification, and should not be interpreted in a limited manner. In order to determine the gist of the present invention, the claims should be taken into consideration.

  The series of processes described in the specification can be executed by hardware, software, or a combined configuration of both. When executing processing by software, the program recording the processing sequence is installed in a memory in a computer incorporated in dedicated hardware and executed, or the program is executed on a general-purpose computer capable of executing various processing. It can be installed and run.

  For example, the program can be recorded in advance on a hard disk or ROM (Read Only Memory) as a recording medium. Alternatively, the program is temporarily or permanently stored on a removable recording medium such as a flexible disk, a CD-ROM (Compact Disc Read Only Memory), an MO (Magneto Optical) disk, a DVD (Digital Versatile Disc), a magnetic disk, or a semiconductor memory. It can be stored (recorded). Such a removable recording medium can be provided as so-called package software.

  The program is installed on the computer from the removable recording medium as described above, or is wirelessly transferred from the download site to the computer, or is wired to the computer via a network such as a LAN (Local Area Network) or the Internet. The computer can receive the program transferred in this manner and install it on a recording medium such as a built-in hard disk.

  Note that the various processes described in the specification are not only executed in time series according to the description, but may be executed in parallel or individually according to the processing capability of the apparatus that executes the processes or as necessary. Further, in this specification, the system is a logical set configuration of a plurality of devices, and the devices of each configuration are not limited to being in the same casing.

  As described above, according to the configuration of the embodiment of the present invention, the clock frequency is set higher according to the increase in the content playback speed, the system clock is output, and the variable clock signal output from the system clock is set. One data processing unit that executes data processing related to content reproduction processing, for example, a data storage unit, inputs a synchronization signal corresponding to the clock signal from the data storage unit to a second data processing unit, for example, a decoding unit, a buffer control unit , Input to each of the output control unit and the output display unit, data acquisition processing in the data storage unit, decoding processing in the decoding unit, writing and reading processing of decoded data to the buffer memory in the buffer control unit, display control processing in the output control unit , The data display processing in the output display section to the content playback speed Since the processing speed is changed according to the clock signal of the corresponding frequency or the synchronization signal corresponding to the clock signal, the high-speed display of all frames without frame thinning is performed, for example, during high-speed playback. This makes it possible to realize high-quality image reproduction without jerkiness.

It is a figure explaining the generation | occurrence | production mechanism of jerkiness. It is a figure explaining the structural example of the conventional information reproduction apparatus. It is a figure explaining the structural example of the conventional information reproduction apparatus. It is a figure explaining the structure of the information reproduction apparatus which concerns on one Example of this invention. It is a figure explaining the Example of the content reproduction processing structure of the information reproduction apparatus of this invention. It is a figure explaining the specific example of the clock which a system clock inputs into a data storage part-an output display part. It is a figure which shows the example of two field data which comprise 1 frame. It is a figure explaining the correspondence of the clock information input into an output control part, and the transfer data input from a buffer control part into an output control part. It is a figure explaining the reason why jerkiness does not occur in the information reproducing apparatus of the present invention. It is a figure explaining the input / output of the output control part in the process which applied the variable system clock in the information reproducing | regenerating apparatus of this invention. It is a figure explaining the input / output of the output control part in the process which does not apply a variable system clock. It is a figure explaining the structural example which adjusts content reproduction speed based on a feature-value. It is a figure which shows the structural example of the information reproduction apparatus set to change the input clock with respect to a buffer control part, an output control part, and an output display part according to reproduction speed.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Moving object 101 Data storage part 102 Decoding part 103 Buffer control part 104 Buffer memory 105 Output control part 106 Display part 107 Input part 108 System clock 109 Clock 111 System clock 200 Information reproduction apparatus 201 Tuner 202 Network interface 203 Encoder 203 Auxiliary storage apparatus 204 Data storage unit 205 Decoder 206 Buffer 207 Output control unit 208 Output display unit 301 Data storage unit 302 Decoding unit 303 Buffer control unit 304 Buffer memory 305 Output control unit 306 Output display unit 307 Input unit 308 Playback speed determination unit 309 System clock 321 Moving object 401 Tuner 402 Network interface 403 Encoder 404 Data storage unit 405 feature quantity extraction unit 451 playback speed determination unit 452 system clock 501 data storage unit 502 decoding unit 503 buffer control unit 504 buffer memory 505 output control unit 506 output display unit 507 input unit 508 playback speed determination unit 509 system clock 521 System clock

Claims (17)

In an information playback apparatus that executes content playback processing,
A playback speed determination unit that performs clock control for outputting a system clock based on the content playback speed, increases the clock frequency in response to an increase in the content playback speed, and decreases the clock frequency in response to a decrease in the content playback speed. When,
A system clock output unit for outputting a variable clock signal having a frequency controlled by the reproduction speed determination unit;
A content reproduction processing unit that executes data processing related to content reproduction;
The content reproduction processing unit
A first data processing unit that inputs a variable clock signal output from the system clock and executes data processing at a processing speed according to the input variable clock signal;
A second data processing unit that inputs a synchronization signal corresponding to the variable clock signal from the first data processing unit and executes data processing at a processing speed according to the synchronization signal;
An information reproducing apparatus comprising: The first data processing unit is a data storage unit;
Data acquisition and output processing from a storage medium is configured to execute at a processing speed according to a variable clock signal output by the system clock,
The second data processing unit
The information reproducing apparatus according to claim 1, wherein data processing is performed on data output from the data storage unit at a processing speed according to the synchronization signal. The first data processing unit is a data storage unit;
The second data processing unit includes a decoding unit, a buffer control unit, an output control unit, and an output display unit, and each of the decoding unit, the buffer control unit, the output control unit, and the output display unit includes the data storage unit The information reproducing apparatus according to claim 1, wherein the synchronization signal output from the computer is sequentially transferred, and data processing is executed at a processing speed according to the synchronization signal. The playback speed determination unit
When the content playback speed is set to n times the standard playback speed, the clock frequency control is performed to set the clock frequency of the variable clock to n times the clock frequency at the time of standard playback. Item 4. The information reproducing apparatus according to Item 1. The content reproduction processing unit
A data storage unit, a decoding unit, a buffer control unit, an output control unit, and an output display unit. Among these content reproduction processing units, the buffer control unit, the output control unit, and the output display unit are variable output by the system clock. A clock signal or a synchronization signal corresponding to the variable clock signal is input, and processing subsequent to data reading from the buffer memory controlled by the buffer control unit is executed by changing the processing speed according to the variable clock signal or synchronization signal. Configuration,
The data storage unit, the decoding unit, and the buffer control unit receive a fixed clock signal having a fixed frequency, and a fixed processing speed in accordance with the fixed clock signal for processing before data write processing to the buffer memory controlled by the buffer control unit The information reproducing apparatus according to claim 1, wherein the information reproducing apparatus is configured to be executed by   6. The information reproducing apparatus according to claim 5, wherein the frequency of the fixed clock signal is set to a frequency equal to or higher than the clock signal having the highest frequency among the variable clock signals output from the system clock. The playback speed determination unit
The content playback speed is determined based on user setting information input via an input unit, and a process of determining a clock frequency output from the system clock based on the determined playback speed is performed. The information reproducing apparatus according to claim 1. The playback speed determination unit
The configuration is such that the feature amount information of the content to be played is input, the content playback speed is determined based on the feature amount information, and the clock frequency output by the system clock is determined based on the determined playback speed. The information reproducing apparatus according to claim 1. In an information reproduction method for executing content reproduction processing,
This is a clock frequency control step for controlling the clock output from the system clock based on the content playback speed. The clock frequency is increased as the content playback speed increases, and the clock frequency is decreased as the content playback speed decreases. A clock frequency control step for controlling, and
A system clock output step of outputting a variable clock signal having a frequency controlled in the clock frequency control step from a system clock;
A content reproduction processing step of inputting a variable clock signal output from the system clock or a synchronization signal corresponding to the variable clock signal and executing data processing at a processing speed according to the input variable clock signal or synchronization signal;
The content reproduction processing step includes
In the first data processing unit, a first data processing step of inputting a variable clock signal output from the system clock and executing data processing at a processing speed according to the input variable clock signal;
In the second data processing unit, a second data processing step of inputting a synchronization signal corresponding to the variable clock signal from the first data processing unit and executing data processing at a processing speed according to the synchronization signal;
An information reproducing method characterized by comprising: The first data processing unit is a data storage unit;
The first data processing step is a step of executing data acquisition and output processing from a storage medium at a processing speed according to a variable clock signal output by the system clock,
The second data processing step includes
10. The information reproducing method according to claim 9, wherein the data processing for the output data from the data storage unit is a step of executing data processing at a processing speed according to the synchronization signal. The first data processing unit is a data storage unit;
The second data processing unit includes a decoding unit, a buffer control unit, an output control unit, and an output display unit,
The second data processing step includes
In each of the decoding unit, the buffer control unit, the output control unit, and the output display unit, the synchronization signal output from the data storage unit is sequentially transferred, and data processing is executed at a processing speed according to the synchronization signal. The information reproducing method according to claim 9, wherein the information reproducing method is provided. The clock frequency control step includes
When the content playback speed is set to n times the standard playback speed, the clock frequency control is performed to set the clock frequency of the variable clock to n times the clock frequency at the time of standard playback. Item 10. A method for reproducing information according to Item 9. The content reproduction processing step includes
It is a step including data acquisition processing from the data storage unit, decoding processing in the decoding unit, writing and reading processing of decoded data to the buffer memory in the buffer control unit, display control processing in the output control unit, and data display processing in the output display unit ,
The buffer control unit, the output control unit, and the output display unit receive a variable clock signal output from the system clock or a synchronization signal corresponding to the variable clock signal, and read data from the buffer memory controlled by the buffer control unit The subsequent processing is executed by changing the processing speed according to the variable clock signal or the synchronization signal corresponding to the variable clock signal,
The data storage unit, the decoding unit, and the buffer control unit receive a fixed clock signal having a fixed frequency, and a fixed processing speed in accordance with the fixed clock signal for processing before data write processing to the buffer memory controlled by the buffer control unit The information reproducing method according to claim 9, wherein the information reproducing method is executed.   14. The information reproducing method according to claim 13, wherein the frequency of the fixed clock signal is set to a frequency equal to or higher than the clock signal having the highest frequency among the variable clock signals output from the system clock. The clock frequency control step includes
It is a step of executing a process of determining a content playback speed based on user setting information input via an input unit and determining a clock frequency output from the system clock based on the determined playback speed. The information reproducing method according to claim 9. The clock frequency control step includes
This is a step of inputting the feature amount information of the content to be played, determining the content playback speed based on the feature amount information, and determining the clock frequency output from the system clock based on the determined playback speed. The information reproducing method according to claim 9. In a computer program for causing a content reproduction process to be executed in an information reproduction apparatus,
This is a clock frequency control step for controlling the clock output from the system clock based on the content playback speed. The clock frequency is increased as the content playback speed increases, and the clock frequency is decreased as the content playback speed decreases. A clock frequency control step for controlling, and
A system clock output step of outputting a variable clock signal having a frequency controlled in the clock frequency control step from a system clock;
A content reproduction processing step of inputting a variable clock signal output from the system clock or a synchronization signal corresponding to the variable clock signal and executing data processing at a processing speed according to the input variable clock signal or synchronization signal;
The content reproduction processing step includes
In the first data processing unit, a first data processing step of inputting a variable clock signal output from the system clock and executing data processing at a processing speed according to the input variable clock signal;
In the second data processing unit, a second data processing step of inputting a synchronization signal corresponding to the variable clock signal from the first data processing unit and executing data processing at a processing speed according to the synchronization signal;
A computer program characterized by comprising:

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