JP2007072025A - Drive device for organic el display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a leakage current without increasing the circuit scale. <P>SOLUTION: There is provided the data line drive device 10 for supplying a drive current through each data line in at least an output period during a period, when the organic EL light-emitting element is selected by scanning line driving section. A current mirror circuit 14, including an output transistor M2 which outputs the drive current in the output period, potential changing means (M6, 20, 32, M8) for approximating the potential of the gate terminal of the output transistor M2 to the potential of the source terminal of the output transistor, in anyone of the period other than the output period are provided made to correspond to at least several of the data lines. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a drive circuit for driving an organic EL display device, and more particularly to a drive circuit for driving an organic EL display device in a simple matrix.

  Conventionally, an organic electroluminescence display device (or organic light-emitting diode display device, hereinafter referred to as “organic EL display device”) that has high definition and excellent visibility, and has a wide range of applications such as display of portable terminals or industrial measuring instruments. Has been developed. FIG. 4 is a block diagram showing an electrical configuration of a conventional organic EL display device 100 that is driven by simple matrix driving (or duty driving). The organic EL display device 100 includes an organic EL display panel 110, a scanning line driving unit 120, a data line driving device 130, and a control circuit 140 for controlling the scanning line driving unit 120 and the data line driving device 130. Is done. The organic EL display panel 110 includes a plurality of organic EL light emitting elements 112 in a matrix of rows and columns. The organic EL light emitting device 112 is electrically connected to and driven by a plurality of scanning lines (scanning electrode wirings) 114 and a plurality of data electrodes (data electrode wirings) 116 arranged orthogonal to the scanning lines 114. Is done.

  The scanning lines 114 are sequentially scanned by the scanning line driving unit 120. This scanning is an operation in which one of the plurality of scanning lines 114 is selected and the selected scanning lines are sequentially switched. The data line 116 is used in combination with the selected scanning line to flow a driving current in accordance with display data to the organic EL light emitting element 112 connected to the data line 116. The selected scanning line 114 is set to the ground potential (0 V), for example. When the potential of the data line is a potential at which a current flows through the organic EL light emitting element 112 when viewed from the ground potential, a light emitting current flows through the organic EL light emitting element 112. At this time, the other scanning lines that are not selected are set to a high potential such that no current flows through the organic EL light emitting element 112 due to the output of the data lines.

  The data line driving device 130 is configured to include the same number of data lines or a larger number of constant current sources than the data lines, and performs modulation such as current modulation and pulse width modulation by a control signal from the control circuit 140. The gradation display of the organic EL light emitting element is performed according to the display data. Thus, the pixels addressed by the scan line and the data line are caused to emit light with a desired luminance.

  FIG. 5 shows a configuration of the final stage output circuit included in the conventional data line driving device 130. The output circuit shown in FIG. 5 is an output circuit when performing gradation control by pulse width modulation (PWM). In this data line driving device 130, an internally generated reference current (proportional to the constant current Iref) is amplified and output by an output circuit constituted by a PMOS current mirror. The output current value at this time can be set to an arbitrary current value by controlling the reference constant current value Iref.

  The pulse width control in the data line driving device 130 is performed by PWM signals (Ion1, Ion2,..., IonN and Ioff1, Ioff2,..., IoffN) generated by an internal digital circuit in accordance with external data. Do. Ion is set to “Hi” and Ioff is set to “Lo” by the output enable signal generated corresponding to the display data. At this time, current flows through the PMOS transistors PM11, PM21,... PMN1 on the input side of the current mirror circuit, and each data line passes through the PMOS transistors PM12, PM22,. Iout is output. When the pulse width corresponding to the display data is obtained for each line, Ion becomes “Lo” and Ioff becomes “Hi”. Accordingly, the current flowing through the PMOS transistors PM11, PM21,..., PMN1 is cut off, and the gate voltages of the PMOS transistors PM12, PM22,... PMN2 on the output side are increased to Vgs ≦ Vth. By the way, Iout stops. In the conventional data line driving device 130, the pulse width control of the output current is performed by the operation as described above.

Patent Document 1 (Japanese Patent Application No. 10-112391, particularly FIGS. 1 and 8, paragraph [0084]) and Patent Document 2 (Japanese Patent Laid-Open No. 2003-316319, particularly FIG. 1, paragraphs [0014] to [0025] ]) Discloses an organic EL display device that performs display using a current source realized by a current mirror circuit.
Japanese Patent Application No. 10-112391 JP 2003-316319 A

  If there is a variation in the threshold voltage of two transistors constituting the current mirror circuit, for example, the PMOS transistors PM11 and PM12 in FIG. 5 and the two bipolar transistors in FIG. Leak current flows in a state where it is not turned off. If a pixel that should not emit light due to this leakage current emits light, the dynamic range (contrast ratio) may deteriorate and display quality may deteriorate. In Patent Document 2, a transistor that prevents leakage current so as to be in series with an output side transistor of the current mirror circuit (Patent Document 2, FIG. 1, Tr2 of the unit circuit 5c) (FIG. 1, Tr1 of the unit circuit 5c). The structure which connects is disclosed. In such a configuration, it is necessary to modulate the gate voltage for turning off Tr2 between a high voltage equal to or higher than Vcc and the GND potential, and a level shift circuit and an amplifier circuit are required for each output terminal. An object of the present invention is to solve such a problem.

  The present invention provides a plurality of organic EL light emitting elements arranged in a matrix of rows and columns, a plurality of data lines connecting at least some of the plurality of organic EL light emitting elements in a column direction, and the plurality of organic ELs. Used in an organic EL display device having a plurality of scanning lines connecting at least some of the light emitting elements in the row direction, and a scanning line driving unit connected to the plurality of scanning lines for sequentially selecting and scanning the scanning lines. A data line driving device is provided. Specifically, with respect to the organic EL light emitting element connected to the data line, the organic EL light emitting element is driven through each data line during an output period which is at least a part of a period selected by the scanning line driving unit. A data line driving device for supplying current, an output current mirror circuit including an output transistor that outputs a driving current during the output period, and a gate terminal of the output transistor during any period other than the output period There is provided a data line driving device provided with potential changing means for bringing the potential of the output transistor close to the potential of the source terminal of the output transistor in correspondence with at least some of the data lines.

  As described in Patent Document 2, when a transistor (Tr1) for controlling leakage current is connected in series with an output transistor, the transistor on the input side (unit circuit 5b) is not the output side because of the symmetry of the current mirror circuit. It is necessary to connect a similar transistor (Tr1). Moreover, each transistor Tr1 on the output side needs to be a transistor having a large current capacity. Furthermore, in order to control the transistor Tr1, it is necessary to prepare a gate signal that operates at a voltage as high as the power supply voltage, and a level shift circuit is also required for each line. Therefore, the method of Patent Document 2 inevitably increases the circuit scale. On the other hand, if the potential changing means for controlling the potential of the gate terminal is used to reliably reduce the leakage current as in the present invention, the leakage current can be sufficiently reduced with a relatively small circuit scale.

  In the present invention, the potential changing means includes a switching transistor having a source terminal connected to the source terminal of the output transistor and a drain terminal connected to the gate terminal of the output transistor, and a gate of the switching transistor. It is preferable that the terminal includes a control unit that supplies an opening / closing signal that makes the switching transistor in an insulating state in the output period and makes the switching transistor conductive in any period other than the output period.

  When a switching transistor is used for the potential changing means of the present invention, a leakage current can be reliably suppressed by an element (switching transistor) having a small current capacity enough to adjust the potential of the gate terminal of the output transistor. In this case, the gate terminal of the switching transistor is further provided with a control unit for connecting or insulating the gate terminal and the source terminal of the output transistor for control.

  Furthermore, in the present invention, the potential changing means includes a first control transistor having a source terminal connected to the source terminal of the output transistor and a drain terminal connected to the gate terminal of the output transistor, A second control transistor that forms a control current mirror circuit in a pair with the control transistor, and the current of the second control transistor is stopped during the output period and flows during any period other than the output period Thus, it is preferable that the current of the first control transistor is controlled so that the potential of the gate terminal of the output transistor approaches the potential of the source terminal of the output transistor in any period other than the output period.

  In the present invention, when a control current mirror circuit having first and second control transistors is used, the current of the second control transistor is controlled in order to control the potential of the gate terminal of the output transistor. The current of the second control transistor is controlled by using a signal having the same potential as the signal for controlling the current of the output transistor. Therefore, it is necessary to use a level shift circuit as in Patent Document 2. As a result, the leakage current can be suppressed by a circuit having a smaller circuit scale with a smaller number of transistors.

  In the case of using a control current mirror circuit in the present invention, the potential changing means further includes a control switching transistor provided between a source terminal of the first control transistor and a gate terminal of the first control transistor, It is preferable that the control switching transistor is turned on during the output period so that no current flows through the first control transistor.

  When the control switching transistor is turned on during the output period, no current flows through the first control transistor of the control current mirror circuit, and the control current mirror circuit does not affect the operation of the output current mirror circuit.

  In the present invention, a reference current is supplied to the input transistor paired with the output transistor in the output current mirror circuit in the output period, and the second control transistor is supplied in any period other than the output period. It is preferable that it is flowed through.

  The reference current is a reference current for the output current of the output current mirror circuit, but if this current path is passed through the second control transistor during a period other than the output period, it becomes the reference current of the control current mirror circuit. There is no need to newly generate a reference current, and an increase in circuit scale can be prevented.

  According to the data line driving circuit of the present invention, the leakage current can be effectively suppressed even with a small circuit scale, and an organic EL display device with high display quality can be realized at a lower cost.

  Embodiments of the present invention will be described below with reference to the drawings.

[Embodiment 1]
1 and 2 are circuit diagrams for explaining the circuit configuration of the first embodiment of the data line driving device according to the present invention. The data line driving device 10 in FIG. 1 shows the configuration of the output unit 12 for one line. The output transistor M2 is a PMOS transistor, and together with the input-side transistor M1, which is also a PMOS transistor, the gate terminals of each other are connected to form a current mirror circuit. In this current mirror circuit 14, a current substantially the same as the current flowing through the input-side transistor M1 or a current amplified according to the size ratio of the transistors M1 and M2 flows through the output transistor M2 and is used as a data line (not shown). ) To generate a display current.

  In the present embodiment, the source terminal and drain terminal of the transistor M6 (switching transistor) are electrically connected to the source terminal and gate terminal of the output transistor M2, respectively. The output transistor M2 has a source terminal connected to the power supply Vcc, a drain terminal connected to the terminal of the power supply Iout, and a drain terminal of the NMOS transistor M4 controlled by the Ioff signal. The source terminal of the transistor M4 is connected to GND. The input side transistor M1 has a source terminal connected to the power supply Vcc, a drain terminal connected to the gate terminal, and a drain terminal of the NMOS transistor M3 controlled by the Ion signal. The source terminal of the transistor M3 is connected to the drain terminal of the NMOS transistor M5 that supplies a current proportional to the reference current Iref, and the source terminal of the transistor M5 is connected to GND.

  The output of the level shift circuit 20 for controlling the operation of the transistor M6 is connected to the gate terminal of the transistor M6. In the present embodiment, the potential changing means of the present invention includes the transistor M6 and the level shift circuit 20 (control unit) as the main part of the invention. The circuit configuration of the level shift circuit 20 is shown in FIG.

  The level shift circuit 20 shown in FIG. 2 boosts the voltage levels of Ion and Ioff to generate a signal between the power supply voltage level (Vcc) and the GND level. That is, when Ion is Hi and Ioff is Lo, the transistor 22 is turned on, so that the gate terminals of the CMOS output stage transistors 24P and 24N are at the GND level, and Vcc is output. On the other hand, when Ion is Lo and Ioff is Hi, the gate terminal of the PMOS transistor 26 becomes the GND level and the transistor 26 becomes conductive, so that the gate terminals of the output stage transistors 24P and 24N in the CMOS configuration are Vcc. At the level, GND is output.

  Since the output of the level shift circuit 20 becomes Vcc when Ion is Hi and Ioff is Lo, it is applied to the gate terminal of the transistor M6 of the output unit 12 of the data line driving device 10 in FIG. Become. At this time, since the transistor M3 is ON and the transistor M4 is OFF, a current corresponding to the current flowing through the transistor M1 flows through the transistor M2 and is output as Iout. This current causes the organic EL light emitting element to emit light. When Ion becomes Lo and Ioff becomes Hi according to the display data, the output GND of the level shift circuit 20 is applied to the gate terminal of the transistor M6, and the transistor M6 is turned on. At this time, the transistor M3 is OFF and the transistor M4 is ON. The potentials of the gate terminals of the transistors M1 and M2 are the power supply voltage Vcc because the transistor M6 is ON. Therefore, since both the transistors M1 and M2 are sufficiently turned off, a leak current that causes the organic EL light emitting element to emit light is not output.

[Embodiment 2]
Next, a second embodiment using a control current mirror circuit will be described. FIG. 3 is a circuit diagram illustrating the circuit configuration of the second embodiment of the data line driving device according to the present invention. Elements similar to those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted. The data line driving device 30 according to the second embodiment does not use the level shift circuit (FIG. 2) used in the driving unit according to the first embodiment. In the data line driving device 30, a PMOS transistor that becomes a second control transistor that forms a control current mirror circuit 32 in a pair with a PMOS transistor M6 ′ (first control transistor) that becomes a control transistor (first control transistor). M7 (second control transistor) is provided. The current flowing through the transistor M7 is controlled by the PMOS transistor M8 (control switching transistor) and the NMOS transistor M9. That is, when Ion becomes Hi and Ioff becomes Lo by the output enable signal, the current I1 (reference current) flows through the transistors M3 and M5. Therefore, the potentials of the gate terminals of the input side transistor M1 and the output transistor M2 constituting the current mirror circuit are lowered, and as in the case of the first embodiment, Iout is output and the organic EL light emitting element emits light. Note that at this time, the transistor M9 is turned off and the potential of the gate terminal of the transistor M8 is also lowered, so that the transistor M8 is turned on and the potential of the gate terminal of the transistor M7 is raised, and the transistor M7 and the transistor M7 are paired. No current flows through the transistor M6 ′. In the present embodiment, the potential changing means of the present invention includes a control current mirror circuit 32 and a transistor M8.

  On the other hand, when the output period of Iout is a period corresponding to the display data, Ion is Lo and Ioff is Hi. At this time, the transistor M3 is turned OFF and the transistor M4 is turned ON, and the transistor M9 is also turned ON. Therefore, the current I2 flows through the transistor M9 and the second control transistor M7, the potential of the gate terminal of the first control transistor M6 ′ paired with the second control transistor M7 decreases, and the first control transistor M6 ′ and the second control transistor M7 The control transistor M7 is turned on and the same current flows. For this reason, the gate potential of the transistor M1 and the output transistor M2 is raised to the source voltage, and the gate-source voltage of the output transistor M2 becomes zero. Thus, the output transistor M2 is surely turned off. Leakage current through the output transistor M2 can be prevented.

  When the second embodiment is compared with the first embodiment, the number of transistors required is smaller than that in the case where the level shift circuit is provided, so that a configuration capable of preventing leakage current is realized with a smaller circuit scale.

  Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications, changes and combinations can be made based on the technical idea of the present invention. is there.

It is a circuit diagram which shows the structure of the data line output part of the 1st Embodiment of this invention. It is a circuit diagram which shows the structure of the level shift circuit used with the data line output part of the 1st Embodiment of this invention. It is a circuit diagram which shows the structure of the data line output part of the 2nd Embodiment of this invention. It is a block diagram which shows the structure of the conventional organic EL display apparatus. It is a circuit diagram which shows the structure of the conventional data line output part.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10, 30 Data line drive device 14 Current mirror circuit 20 Level shift circuit 32 Current mirror circuit 100 for control Organic EL display device

Claims (5)

In order to supply a driving current to each organic EL light emitting element connected to the data line through each data line during an output period that is at least a part of a period in which the organic EL light emitting element is selected by the scanning line driving unit. A data line driving device of
An output current mirror circuit including an output transistor that outputs the drive current in the output period;
A data line provided with potential changing means for bringing the potential of the gate terminal of the output transistor close to the potential of the source terminal of the output transistor in any period other than the output period, corresponding to at least some of the data lines Drive device. The potential changing means is
A switching transistor having a source terminal connected to the source terminal of the output transistor and a drain terminal connected to the gate terminal of the output transistor;
2. The control unit according to claim 1, further comprising: a control unit that supplies an open / close signal to the gate terminal of the switching transistor so that the switching transistor is in an insulated state in the output period and in a conductive state in any period other than the output period. Data line driving device. The potential changing means is
A first control transistor having a source terminal connected to the source terminal of the output transistor and a drain terminal connected to the gate terminal of the output transistor;
A second control transistor paired with the first control transistor to form a control current mirror circuit;
When the current of the second control transistor is stopped during the output period and is caused to flow during any period other than the output period, the current of the first control transistor is controlled, and any period other than the output period 2. The data line driving device according to claim 1, wherein the potential of the gate terminal of the output transistor is brought close to the potential of the source terminal of the output transistor. The potential changing means further comprises a control switching transistor provided between a source terminal of the first control transistor and a gate terminal of the first control transistor;
4. The data line driving device according to claim 3, wherein, during the output period, the control switching transistor is turned on so that no current flows through the first control transistor. 5.   The reference current is supplied to the input transistor paired with the output transistor in the output current mirror circuit in the output period, and is supplied to the second control transistor in any period other than the output period. 4. The data line driving device according to 3.

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