JP2007060675A - Timing generator, testing device, and timing generating method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a timing generator which measures delay amount with high accuracy and generates a timing signal whose delay amount is controlled with high accuracy, and to provide a semiconductor testing device, and a timing generating method. <P>SOLUTION: The timing generator is provided with a reference signal generating part for generating a predetermined frequency, a variable delay circuit part for outputting a timing signal which the reference signal is delayed for a predetermined time, and a delay amount measuring part for measuring delay amount in the variable delay circuit part. The timing generator controls the delay amount of the variable delay circuit part, based on the delay amount measured by the delay amount measuring part. By continuously modulating the frequency of the reference signal within a minute frequency range, the delay amount measuring part can measure the delay amount of the variable delay circuit part with high accuracy. Also, by controlling the delay amount of the variable delay circuit part, based on the measured delay amount, a timing signal delayed with high accuracy can be generated. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a timing generator, a semiconductor test apparatus, and a timing generation method that generate a timing signal obtained by delaying a reference signal by a predetermined time. In particular, the present invention relates to a timing generator, a semiconductor test apparatus, and a timing generation method for accurately measuring a delay amount of a reference signal and controlling the delay amount.

  FIG. 1 shows a conventional timing generator 100. The timing generator 100 includes a reference signal generator 10, a selector 12, a variable delay circuit 14, a control circuit 16, a waveform shaping circuit 32, and a frequency counter 18. The timing generator 100 is used in, for example, a semiconductor test apparatus that tests a semiconductor.

  The reference signal generation unit 10 generates a reference signal having a predetermined frequency and supplies the reference signal to the selection unit 12 and the control circuit 16. For example, when the timing generator 100 is used in a semiconductor test apparatus, the reference signal generation unit 10 supplies the reference signal to other parts of the semiconductor test apparatus. The selection unit 12 selects either the reference signal supplied from the reference signal generation unit 12 or the signal output from the waveform shaping circuit 32 and inputs the selected signal to the variable delay circuit unit 14. The variable delay circuit unit 14 outputs the signal selected by the selection unit 12 with a predetermined time delay. The control unit 16 controls the delay amount of the variable delay circuit unit 14.

  The timing generator 100 first measures whether or not the delay amount of the variable delay circuit unit 14 is a desired delay amount. As shown in FIG. 1, the start pulse is input to the timing generator 100. The selection unit 12 selects the path B and forms a loop in which the output of the variable delay circuit unit 14 is fed back to the input of the variable delay circuit unit 14. The start pulse goes around the formed loop. The start pulse is delayed by a predetermined delay amount by the variable delay circuit unit 14 every time it circulates in the loop. In other words, an oscillation signal whose period is substantially equal to the delay amount of the variable delay circuit unit 14 is generated in the loop.

  The conventional timing generator 100 can calculate the delay amount of the variable delay circuit unit 14 by measuring the frequency of the oscillation signal in the loop. The frequency counter 18 is a counter that measures the number of oscillations of the oscillation signal in the loop. Based on the number of laps measured by the frequency counter 18, the frequency of the signal in the feedback loop, that is, the delay amount of the variable delay circuit unit 14 is calculated. Based on the calculated delay amount, the control unit 16 controls the delay amount of the variable delay circuit unit 14 to a desired delay amount.

  Usually, since it is necessary to precisely match the delay amount of the variable delay circuit unit 14 with a desired delay amount, the delay set value of the variable delay circuit unit 14 is changed, and the oscillation in the loop for each delay set value is performed. Calculate the period. The control unit 16 controls the delay amount of the variable delay circuit unit 14 so that the expected value of the delay change amount according to the change of the delay setting value matches the change amount of the oscillation period. Thereby, a delay time existing as a constant offset such as a delay time by a circuit other than the variable delay circuit unit 14 can be canceled in calculation. However, in the following description, for the sake of clarity, it is assumed that the offset delay amount in the loop is zero.

  After adjusting the delay amount of the variable delay circuit unit 14, the selection unit 12 selects the path A and inputs the reference signal generated by the reference signal generation unit 10 to the variable delay circuit unit 14. The variable delay circuit unit 14 delays the input reference signal by the adjusted delay amount and outputs the delayed reference signal. Since related patent documents are not recognized at present, the description is omitted.

  However, in the conventional timing generator 100, when the reference signal generator 10 is used in, for example, a semiconductor test apparatus, the reference signal is supplied to other parts, so the reference signal supplied to the other parts is used. Noise affects the oscillation signal in the loop. For this reason, it is difficult to accurately measure the frequency of the oscillation signal in the loop. For example, when the period of the reference signal is close to the delay amount of the variable delay circuit unit 14, the period of the signal in the feedback loop of the timing generator 100 is equal to the period of the reference signal. This is a so-called suction phenomenon. The suction phenomenon will be described below.

FIG. 2 is an explanatory diagram of the suction phenomenon. Reference signal the reference signal generator 10 generates, as shown in FIG. 2 (a), a square wave signal with a period T _1. The period T ₁ is a value slightly smaller than the delay amount T ₂ of the variable delay circuit unit 14. For example, noise as shown in FIG. 2B is superimposed on the oscillation signal in the loop by the reference signal shown in FIG.

Oscillation signal by a start pulse supplied to the loop, when ignoring the influence of the noise, as shown in FIG. 2 (c), the period is substantially equal oscillation signal to the delay amount T ₂ of the variable delay circuit section 14 . In other words, it is possible by measuring the period of the oscillation signal shown in FIG. 2 (c), calculates the delay amount T ₂ of the variable delay circuit section 14. However, in practice, due to noise shown in FIG. 2 (b), the period of the loop, the delay amount T ₂ of the variable delay circuit section 14, thereby taking different values.

FIG. 2D shows an oscillation signal in the loop when the noise of FIG. 2B is superimposed on the oscillation signal shown in FIG. First, the start pulse shown by the rectangular wave 22c in FIG. As an example, the start pulse is assumed to be synchronized with one rectangular wave of the reference signal. The rectangular wave 22d is obtained by superimposing noise on the rectangular wave 22c by the start pulse. The rectangular wave 22 d is shaped by the waveform shaper 32 and input to the variable delay circuit unit 14 via the selection unit 12. The shaped rectangular wave 22d is delayed by a predetermined time by the variable delay circuit unit 14, and becomes a rectangular wave 24d on which the noise of FIG. And the rectangular wave 22 d, when the period of a rectangular wave 24d and T _3, the period T ₃ is should be equal to the delay amount T ₂ of the variable delay circuit section 14, a different value due to the influence of the superimposed noise Take. In this case, since the noise cycle T ₁ takes a value slightly smaller than the delay amount of the variable delay circuit section 14, the value is close to the cycle T ₁ , T ₂ −α. The rectangular wave 24d is shaped by the waveform shaper 32 to become a rectangular wave 24e shown in FIG. FIG. 2E shows a signal obtained by shaping the signal shown in FIG. The rectangular wave 24e is delayed by the delay circuit unit 14 and becomes a rectangular wave 26d on which noise is superimposed. The rectangular wave 26d is a signal obtained by delaying the rectangular wave 24e by the variable delay circuit unit 14 instead of the rectangular wave 24c. Further, the rectangular wave 26d is a rectangular wave 24e, is a delay T ₂ signal delayed by the variable delay circuit section 14, due to noise, the delay amount is closer to T ₁ than T _2-.alpha. Value.

By repeating the above loop, the cycle of the oscillation signal approaches the cycle of the reference signal. By repeating a certain number of times, the period of the oscillation signal reaches an equilibrium state. That is, when the period of the reference signal and the delay amount of the variable delay circuit unit 14 are close to each other and the period of the reference signal is constant, the influence of the noise due to the reference signal on the period of the oscillation signal is balanced. Accumulate until it reaches. Since the cycle of the reference signal and the delay amount of the variable delay circuit unit 14 are close to each other, the cycle of the oscillation signal that has reached the equilibrium state continues to be affected by noise due to the reference signal and is the same as the cycle of the reference signal. Continue to take the cycle. The period of the oscillation signal that has reached the equilibrium state is substantially equal to the period of the reference signal. Therefore, the period of the oscillation signal, an error occurs between the delay of the variable delay circuit section 14, it is difficult to calculate the delay amount T ₂ of the precisely variable delay circuit section 14. Therefore, it becomes difficult to control the delay amount of the variable delay circuit unit 14 with high accuracy. Further, when the timing generator 100 is used in a semiconductor test apparatus, it becomes difficult to test a semiconductor device with high accuracy.

  Therefore, an object of one aspect of the present invention is to provide a timing generator, a test apparatus, and a timing generation method that solve the above-described problems. This object is achieved by a combination of features described in the independent claims. The dependent claims define further advantageous specific examples of the present invention.

  In order to solve the above-described problem, according to a first aspect of the present invention, a timing generator that generates a timing signal obtained by delaying a reference signal by a predetermined time, the reference signal generating a reference signal having a predetermined frequency. A signal generation unit, a modulation unit that modulates the frequency of the reference signal generated by the reference signal generation unit, a variable delay circuit unit that receives the reference signal and delays the reference signal for a predetermined time, and outputs a timing signal; A delay amount measurement unit that measures the delay amount of the variable delay circuit unit, the delay amount measurement unit includes a signal feedback unit that feeds back a timing signal to the input of the variable delay circuit unit, The signal feedback unit measures the frequency of the oscillation signal oscillated by feeding back the timing signal to the variable delay circuit unit, and based on the measured frequency of the oscillation signal, the variable delay circuit unit The timing generator generates a delay amount, and the timing generator selects either the signal supplied from the modulation unit or the signal fed back by the signal feedback unit to the variable delay circuit unit and inputs the selected signal to the variable delay circuit unit A timing generator is provided.

  The reference signal generation unit may supply the reference signal to another circuit that shares the power supply with the variable delay circuit unit. Further, the modulation unit may modulate the frequency of the reference signal continuously for a predetermined time. The timing generator may further include a control unit that controls the delay amount of the variable delay circuit unit based on the delay amount measured by the delay amount measurement unit.

  The modulation unit receives two signals, outputs a phase difference signal having a voltage value based on the frequency difference between the two signals, a superimposing unit that superimposes a predetermined modulation signal on the phase difference signal, The phase difference signal on which the modulation signal is superimposed is input, and the voltage controlled variable frequency oscillator that outputs the output signal whose frequency increases or decreases in proportion to the voltage value of the phase difference signal, and the period of the output signal are multiplied by an integer, And a frequency divider that feeds back to the first input of the phase difference comparator, and the reference signal may be input to the second input of the phase difference comparator. The superimposing unit may superimpose a modulation signal whose voltage value continuously changes for a predetermined time on the phase difference signal.

  In the second embodiment of the present invention, a test apparatus for testing a semiconductor device, a reference signal having a predetermined frequency, a pattern generation unit for generating a test signal for testing a semiconductor device, and a reference signal are input. A timing generator that outputs a timing signal obtained by delaying a reference signal by a predetermined time, and a waveform shaper that receives the test signal and the timing signal and supplies a shaped signal obtained by delaying the test signal based on the timing signal to the semiconductor device. And a determination unit that receives an output signal from the semiconductor device based on the shaping signal and determines the quality of the semiconductor device based on the output signal, and the timing generator generates the frequency of the reference signal generated by the pattern generation unit. Modulation unit to be modulated and a reference signal are input, and a timing signal obtained by delaying the reference signal for a predetermined time can be output. A delay circuit unit, and a delay amount measurement unit that measures a delay amount of the variable delay circuit unit. The delay amount measurement unit includes a signal feedback unit that feeds back a timing signal to the input of the variable delay circuit unit. The measurement unit measures the frequency of the oscillation signal oscillated by feeding back the timing signal to the variable delay circuit unit, and calculates the delay amount of the variable delay circuit unit based on the measured frequency of the oscillation signal. The timing generator further includes a selection unit that selects either the signal supplied from the modulation unit or the signal fed back by the signal feedback unit and inputs the signal to the variable delay circuit unit in the variable delay circuit unit. A test device is provided.

  According to a third aspect of the present invention, there is provided a timing generation method for generating a timing signal by delaying a reference signal by a predetermined time, a reference signal generation stage for generating a reference signal of a predetermined frequency, and a reference signal generation The modulation stage that modulates the frequency of the reference signal, the delay stage that outputs the timing signal, the reference signal is input and is delayed by a predetermined time, and the delay that measures the delay amount in the delay stage. The delay amount measurement stage includes a signal feedback stage that feeds back a timing signal to the input of the variable delay circuit unit. In the delay amount measurement stage, the timing signal is supplied to the variable delay circuit unit. The frequency of the oscillation signal oscillated by feedback is measured, and the delay amount of the variable delay circuit is calculated based on the measured frequency of the oscillation signal. The delay stage further includes a selection stage in which the variable delay circuit section selects either the signal modulated in the modulation stage or the signal fed back in the signal feedback stage and inputs the selected signal to the variable delay circuit section. A characteristic timing generation method is provided.

  The above summary of the invention does not enumerate all the necessary features of the present invention, and sub-combinations of these feature groups can also be the invention.

  Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the scope of claims, and all combinations of features described in the embodiments are included. It is not necessarily essential for the solution of the invention.

  FIG. 3 shows an example of the configuration of the timing generator 200 according to the present invention. The timing generator 200 includes a reference signal generation unit 10, a modulation unit 30, a control unit 16, a selection unit 12, a variable delay circuit unit 14, and a delay amount measurement unit 40.

  The reference signal generator 10 generates a reference signal having a predetermined frequency. The reference signal is input to the selection unit 12 and the control unit 16 via the modulation unit 30. The modulation unit 30 modulates the frequency of the reference signal generated by the reference signal generation unit 10. The modulation unit 30 preferably modulates the frequency of the reference signal continuously for a predetermined time. The modulation unit 30 supplies the reference signal whose frequency is modulated to the control unit 16 and the selection unit 12. When the timing generator 200 is used in, for example, a semiconductor test apparatus, the reference signal generation unit 10 supplies a reference signal to other circuits (not shown) including the variable delay circuit unit 14 via the modulation unit 30. May be. For example, when the timing generator 100 is used in a semiconductor test apparatus, the reference signal generator 10 supplies a reference signal whose frequency is modulated to other apparatuses of the semiconductor test apparatus. The selection unit 12 selects either the supplied reference signal or the signal output from the waveform shaping circuit 32 and supplies the selected signal to the variable delay circuit 14. The control unit 16 controls the delay amount of the variable delay circuit 14 at a timing based on the supplied reference signal. The variable delay circuit unit 14 outputs a timing signal obtained by delaying the supplied reference signal for a predetermined time. The control unit 16 also controls the variable delay circuit unit 14 to generate a predetermined delay amount for the received signal.

  The delay amount measuring unit 40 measures the delay amount generated by the variable delay circuit unit 14. The delay amount measuring unit 40 includes a frequency counter 18 and a signal feedback unit 50. The signal feedback unit 50 includes a waveform shaping circuit 32. When the delay amount measurement unit 40 measures the delay amount of the variable delay circuit unit 14, the measurement unit 12 selects the path B, and the variable delay circuit unit 14 and the signal feedback unit 50 form a loop. A start pulse is input to the signal feedback unit 50. The start pulse is a signal having one pulse, for example. The start pulse input to the signal feedback unit 50 is input to the variable delay circuit unit 14 via the waveform shaping circuit and selection unit 12. The variable delay circuit unit 14 delays the input start pulse for a predetermined time and outputs the delayed start pulse to the signal feedback unit 50. The output start pulse is fed back to the input of the variable delay circuit unit 14 via the signal feedback unit 50 and the selection unit 12. By repeating this feedback, an oscillation signal that circulates in a loop including the variable delay circuit unit 14 and the signal feedback unit 50 is generated.

  The frequency counter 18 counts the number of circulations within a predetermined time of the oscillation signal in the loop having the variable delay circuit unit 14 and the signal feedback unit 50. Based on the measured number of oscillations of the oscillation signal, the delay amount of the variable delay circuit unit 14 is calculated. Since the timing generator 200 according to the present invention can prevent accumulation of the influence of noise due to the reference signal by modulating the frequency of the reference signal, the timing generator 200 is variable by modulating the frequency of the reference signal. It is possible to calculate the delay amount generated by the delay circuit unit 14 with high accuracy. As a whole, the influence of noise caused by the reference signal can be removed from the oscillation signal. Hereinafter, an example of the period of the oscillation signal when the frequency of the reference signal is modulated will be described.

FIG. 4 is an explanatory diagram of an example of the period of the oscillation signal when the frequency of the reference signal is modulated. FIG. 4A shows a reference signal supplied from the reference signal generator 10 via the modulator 30. Reference signal generator 10 generates a square wave signal having a period T _4, the modulation unit 30, the reference signal generator 10 outputs by modulating the frequency of the square wave signal generated. In the present embodiment, the period of the reference signal by the reference signal generating unit 10 is generated, and increases or decreases the period of any short time from T _4.

FIG. 4B shows an example of noise due to the reference signal. The period of noise is the same as the period of the reference signal. FIG. 4C shows an oscillation signal generated by the start pulse when the influence of noise is ignored. The rectangular wave 44c is a rectangular wave by a start pulse. As an example, it is assumed that the rectangular wave 44c and one of the rectangular waves of the reference signal are synchronized. The period of the oscillation signal shown in FIG. 4C is substantially equal to the delay amount T ₅ of the variable delay circuit unit 14.

FIG. 4D shows a signal in which the noise shown in FIG. 4B is superimposed on the oscillation signal shown in FIG. The rectangular wave 44d is delayed by the variable delay circuit unit 14 to become a rectangular wave 46d. Period of a rectangular wave 44d and the rectangular wave 46d is due to noise, the delay amount T _5, slightly a shift value to the period T ₄ of the reference signal. The rectangular wave 46d is shaped by the waveform shaping circuit 32 to become a rectangular wave 46e as shown in FIG. FIG. 4E shows a signal obtained by shaping the signal shown in FIG. The rectangular wave 46e is delayed by the variable delay circuit unit 14 to become a rectangular wave 48d. Since the timing generator 200 according to the present invention modulates the frequency of the reference signal, the timing of the rectangular wave 48d and the timing of noise due to the reference signal can be shifted. Therefore, the period of a rectangular wave 46d and the rectangular wave 48d is not affected by noise caused by the reference signal becomes the same as the delay amount T ₅ in the variable delay circuit section 14. The same applies to the rectangular wave 48d and thereafter. In other words, even if a certain rectangular wave is affected by noise and the period is different from T ₅ , the next rectangular wave is not influenced by noise and the period is equal to the delay amount T ₅ of the variable delay circuit unit 14. Value. Further, a plurality of rectangular wave, the influence of noise, even if the period during which take different values and T _5, since modulates the period of the noise, noise is generated at a timing that does not affect the oscillation signal The period of the oscillation signal is corrected to the delay amount T ₅ of the variable delay circuit unit 14. Therefore, the cycle of the entire oscillation signal is equal to the delay amount T ₅ of the variable delay circuit unit 14.

  In the conventional timing generator, since the cycle of the reference signal is constant, if the cycle of the reference signal and the delay amount of the variable delay circuit unit 14 are close to each other, the oscillation signal is once affected by noise. The period of the oscillation signal is sucked into the period of the reference signal. The timing generator 200 described with reference to FIGS. 3 and 4 modulates the period of the reference signal, and modulates the period of noise by the reference signal, thereby changing the timing at which the noise affects the oscillation signal. ing. By changing the timing at which the noise affects the oscillation signal, it is possible to prevent the period of the oscillation signal from being absorbed into the period of the reference signal.

  In this example, the noise due to the reference signal generated by the reference signal generator 10 has been described. However, in another example, the timing generator 200 includes a modulation unit that modulates the frequency with respect to noise caused by other causes. Also good.

  FIG. 5 shows an example of the configuration of the modulation unit 30. The modulation unit 30 includes a frequency divider 32, a frequency divider 34, a phase comparator 36, an amplifier 38, a superposition unit 40, and a voltage controlled variable frequency oscillator 42.

  In the period 44, the reference signal is input from the reference signal generator 10 (see FIG. 3), and a signal obtained by multiplying the frequency of the input reference signal by 1 / M times (M is a natural number) is supplied to the phase comparator 36. The phase comparator 36 receives two signals and outputs a phase difference signal having a voltage value based on the phase difference between the two signals. The amplifier 38 receives the phase difference signal output from the phase difference comparator 36 and supplies the signal amplified at a predetermined ratio to the superimposing unit 40. The superimposing unit 40 superimposes a predetermined modulation signal on the signal received from the amplifier 38 and supplies the signal to the voltage controlled variable frequency oscillator 42. The superimposing unit 40 preferably superimposes the modulation signal whose voltage value continuously changes for a predetermined time on the phase difference signal. The voltage controlled variable frequency oscillator 42 outputs an output signal having a frequency based on the voltage value of the signal received from the superimposing unit 40. In the division period 34, the output signal output from the voltage controlled variable frequency oscillator 42 is received, and a signal obtained by multiplying the frequency of the output signal by 1 / N (N is a natural number) is fed back to the input of the phase difference comparator 36.

  According to the modulation unit 30 described in this example, a signal obtained by modulating the frequency of the input reference signal can be output. The modulation signal superimposed in the superimposing unit 40 may be, for example, a sine wave, white noise, or the like. The frequency of the output signal output from the modulation unit 30 is modulated in a minute frequency range with a frequency obtained by multiplying the frequency of the reference signal input to the modulation unit 30 by N / M. Since the signal output from the modulation unit 30 is also supplied to devices other than the timing generator 200, the frequency range in which the signal output from the modulation unit 30 is modulated affects the operation of devices other than the timing generator 200. Is preferably within a range that does not give the. For example, the period corresponding to the frequency range in which the modulation unit 30 modulates the frequency of the signal may be several picoseconds to several tens of picoseconds. According to the timing generator according to the present invention, the frequency of the signal is modulated by several picoseconds to several tens of picoseconds, so that the operation of devices other than the timing generator 200 is hardly affected. It is possible to prevent the suction phenomenon described in relation to it. In addition, the modulation unit 30 may modulate the frequency of the reference signal only when the delay amount measurement unit 40 measures the delay amount of the variable delay circuit unit 14.

  FIG. 6 shows an example of the configuration of a semiconductor test apparatus 300 that determines the quality of a semiconductor device. The semiconductor test apparatus 300 includes a pattern generator 60, a waveform shaper 62, a signal input / output unit 66, a determination unit 68, and a timing generator 200. The pattern generator 60 generates a reference signal having a predetermined frequency and a test signal for testing the semiconductor device 64. The pattern generator 60 supplies a reference signal having a predetermined frequency to the timing generator 200 and supplies a test signal to the waveform shaper 62. The timing generator 200 may have the same or similar functions and configurations as the timing generator 200 described with reference to FIGS. In this case, the reference signal generation unit 10 of the timing generator 200 described with reference to FIGS. 3 to 5 supplies the reference signal received from the pattern generator 60 to the modulation unit 30 as it is.

  The timing generator 200 supplies a timing signal obtained by delaying the received reference signal by a predetermined time to the waveform shaper 62, the signal input / output unit 66, and the determination unit 68. The timing signals supplied to the waveform shaper 62, the signal input / output unit 66, and the determination unit 68 may be different timing signals. The waveform shaper 62 shapes the received test signal and supplies it to the signal input / output unit 66 at a timing based on the received timing signal. The signal input / output unit 66 inputs the test signal received from the waveform shaper 62 to the semiconductor device 64 at a timing based on the received timing signal. The signal input / output unit 66 receives a signal output from the semiconductor device 64 based on the input test signal, and inputs the signal to the determination unit 68. The determination unit 68 determines the quality of the semiconductor device 64 based on the signal received from the signal input / output unit 66. The determination unit 68 may compare the expected value based on the test signal generated by the pattern generator 60 with the signal received from the signal input / output unit 66 to determine whether the semiconductor device 64 is good or bad. The pattern generator 60 may supply an expected value based on the generated test signal to the determination unit 68.

  According to the semiconductor test apparatus 300 described in this example, an accurate timing signal can be generated, and the semiconductor device 64 is tested based on the timing signal, so that an accurate test can be performed.

  FIG. 7 shows a flowchart of a timing generation method according to the present invention. This timing generation method generates a timing signal obtained by delaying a reference signal by a predetermined time. In the reference signal generation step, a reference signal having a predetermined frequency is generated (S100). The reference signal may be generated using the reference signal generator 10 described with reference to FIGS. In the delay stage, a reference signal is input, and a timing signal obtained by delaying the reference signal by a predetermined time is output (S102). The reference signal may be delayed for a predetermined time using the variable delay circuit unit 14 described with reference to FIGS.

  In the delay amount measurement stage, the delay amount in the delay stage is measured (S104). The delay amount in the delay stage may be measured using the delay amount measuring unit 40 described with reference to FIGS. In the control step, the delay amount in the delay step is controlled based on the delay amount measured in the delay amount measurement step (S106). The amount of delay in the delay stage may be controlled using the control unit 16 described with reference to FIGS.

  Further, the delay amount measurement stage may include a signal feedback stage that feeds back the timing signal to the input in the delay stage. In the delay amount measurement stage, the frequency of the oscillation signal oscillated by the signal feedback stage feeding back the timing signal to the delay stage is measured, and the delay amount of the delay stage is calculated based on the measured frequency of the oscillation signal. The timing signal may be fed back to the delay stage using the signal feedback unit 50 described with reference to FIGS.

  According to the timing generation method described above, the delay amount of the reference signal in the delay stage can be accurately measured as in the timing generator described in relation to FIGS. The amount can be controlled with high accuracy.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

The structure of the conventional timing generator 100 is shown. The suction phenomenon in the conventional timing generator 100 will be described. (A) shows an example of a reference signal. (B) shows an example of noise. (C) shows an example of an oscillation signal in which the influence of noise is ignored. (D) shows an example of an oscillation signal affected by noise. (E) shows an example of the shaped oscillation signal. An example of the structure of the timing generator 200 in the present invention is shown. An example of the period of the oscillation signal generated by the timing generator 200 is shown. (A) shows an example of a reference signal. (B) shows an example of noise. (C) shows an example of an oscillation signal in which the influence of noise is ignored. (D) shows an example of an oscillation signal affected by noise. (E) shows an example of the shaped oscillation signal. An example of the structure of the modulation | alteration part 30 is shown. 1 shows an example of the configuration of a semiconductor test apparatus 300 according to the present invention. 2 shows a flowchart of a timing generation method in the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Reference signal generation part, 12 ... Selection part 14 ... Variable delay circuit part, 16 ... Control part 18 ... Frequency counter, 32 ... Waveform shaping circuit 34 ... Minute period 36... Phase comparator 38... Amplifier 40... Delay amount measuring unit 42... Voltage controlled variable frequency oscillator 44. Pattern generator 62 ... Waveform shaper, 64 ... Semiconductor device 66 ... Signal input / output unit, 68 ... Determination unit 100 ... Timing generator, 200 ... Timing generator 300 ...・ Semiconductor test equipment

Claims (9)

A timing generator for generating a timing signal, which is a reference signal delayed by a predetermined time,
A reference signal generator for generating the reference signal of a predetermined frequency;
A modulation unit that modulates the frequency of the reference signal generated by the reference signal generation unit;
A variable delay circuit unit that receives the reference signal and outputs the timing signal obtained by delaying the reference signal by a predetermined time;
A delay amount measuring unit for measuring a delay amount of the variable delay circuit unit,
The delay amount measurement unit has a signal feedback unit that feeds back the timing signal to the input of the variable delay circuit unit,
The delay amount measurement unit measures the frequency of an oscillation signal oscillated by feeding back the timing signal to the variable delay circuit unit by the signal feedback unit, and the variable delay based on the measured frequency of the oscillation signal Calculate the delay amount of the circuit part,
The timing generator selects a selection unit that selects either the signal supplied from the modulation unit or the signal fed back by the signal feedback unit and inputs the variable delay circuit unit to the variable delay circuit unit. A timing generator further comprising: The timing generator according to claim 1, wherein the reference signal generation unit supplies the reference signal to another circuit including the variable delay circuit unit. The timing generator according to claim 2, wherein the modulation unit continuously modulates the frequency of the reference signal for a predetermined time. The timing generator according to claim 3, further comprising a control unit that controls a delay amount of the variable delay circuit unit based on the delay amount measured by the delay amount measurement unit. The modulator is
A phase difference comparator that receives two signals and outputs a phase difference signal having a voltage value based on a frequency difference between the two signals;
A superimposing unit that superimposes a predetermined modulation signal on the phase difference signal;
A voltage controlled variable frequency oscillator that receives the phase difference signal on which the modulation signal is superimposed and outputs an output signal whose frequency increases or decreases in proportion to the voltage value of the phase difference signal;
A frequency divider that multiplies the period of the output signal by an integer and feeds back to the first input of the phase difference comparator;
The timing generator according to claim 4, wherein the reference signal is input to a second input of the phase difference comparator. The timing generator according to claim 5, wherein the superimposing unit superimposes the modulation signal whose voltage value continuously changes for a predetermined time on the phase difference signal. A test apparatus for testing a semiconductor device,
A reference signal having a predetermined frequency, and a pattern generator for generating a test signal for testing the semiconductor device;
A timing generator that receives the reference signal and outputs a timing signal obtained by delaying the reference signal by a predetermined time;
A waveform shaper that receives the test signal and the timing signal, and supplies a shaped signal obtained by delaying the test signal based on the timing signal to the semiconductor device;
A determination unit that receives an output signal from the semiconductor device based on the shaping signal, and determines the quality of the semiconductor device based on the output signal;
The timing generator includes a modulation unit that modulates the frequency of the reference signal generated by the pattern generation unit;
A variable delay circuit unit that receives the reference signal and outputs the timing signal obtained by delaying the reference signal by a predetermined time;
A delay amount measuring unit for measuring a delay amount of the variable delay circuit unit,
The delay amount measurement unit includes a signal feedback unit that feeds back the timing signal to an input of the variable delay circuit unit,
The delay amount measurement unit measures the frequency of an oscillation signal oscillated by feeding back the timing signal to the variable delay circuit unit by the signal feedback unit, and the variable delay based on the measured frequency of the oscillation signal Calculate the delay amount of the circuit part,
The timing generator selects a selection unit that selects either the signal supplied from the modulation unit or the signal fed back by the signal feedback unit and inputs the variable delay circuit unit to the variable delay circuit unit. A test apparatus further comprising: A timing generation method for generating a timing signal by delaying a reference signal by a predetermined time,
A reference signal generation stage for generating the reference signal of a predetermined frequency;
A modulation step for modulating the frequency of the reference signal generated by the reference signal generation step;
A delay stage for inputting the reference signal to a variable delay circuit unit, delaying the reference signal for a predetermined time, and outputting the timing signal;
A delay amount measuring step for measuring a delay amount in the delay step,
The delay amount measuring step includes a signal feedback step of feeding back the timing signal to an input of the variable delay circuit unit,
In the delay amount measurement step, in the signal feedback step, the timing signal is fed back to the variable delay circuit unit to measure the frequency of the oscillation signal that oscillates. Based on the measured frequency of the oscillation signal, the variable delay circuit Calculating the amount of delay
The delay step further includes a selection step of selecting either the signal modulated in the modulation step in the variable delay circuit unit or the signal fed back in the signal feedback step and inputting the signal to the variable delay circuit unit. A timing generation method comprising: 9. The timing generation method according to claim 8, further comprising a control step of controlling a delay amount in the delay step based on the delay amount measured in the delay amount measurement step.

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