JP2007060198A - Digital composite machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a digital composite machine of a simple composition, and effectively performs parallel operation of image processing in a low cost. <P>SOLUTION: The digital composite machine 1 is provided with a scanner engine 50 which performs predetermined image processing, a printer engine 60, and a FAX engine 70, and performs image processing, based on control of a DSP 15, and a CPU 14. The CPU14 determines whether new image processing is performed by a DSP 15 or the CPU 14, based on processing scheduled time of the image processing which the DSP 15 is processing when new image processing is performed. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a digital multi-function peripheral that performs image processing by software of a digital signal processing device or a central processing unit.

  Conventionally, in digital multi-function peripherals that perform image processing and the like, image processing such as compression / decompression, dither / error diffusion, and γ conversion has been realized by hardware. However, recently, a method of realizing image processing using a general-purpose digital signal processing device (hereinafter referred to as a DSP (Digital Signal Processor)) without using dedicated hardware for reducing the cost of the device is generally used. (For example, refer to Patent Document 1).

  A conventional digital multi-function machine that performs image processing using a DSP will be described below. FIG. 9 is a block diagram showing a configuration of a conventional digital multifunction peripheral. In FIG. 9, reference numeral 1 denotes a digital multifunction peripheral that performs predetermined image processing, 2 denotes a host computer connected to the digital multifunction peripheral 1, and 3 denotes an external medium connected to the digital multifunction peripheral 1.

  In the digital multi-function peripheral 1, 10 is a controller unit, 50 is a scanner engine connected to the controller unit 10, 60 is a printer engine connected to the controller unit 10, and 70 is a FAX (Facsimile) engine connected to the controller unit 10. , 80 are panel control devices connected to the controller unit 10.

  The controller unit 10 controls image processing such as document copying, FAX transmission / reception, and image information capture. In the controller unit 10, reference numeral 25 denotes a system bus. Also, 11 is a ROM (Read Only Memory) in which each interface unit and programs are stored, 12 is an external interface, 13 is an external media interface, 14 is a CPU (Central Processing Unit) that controls the entire digital multi-function peripheral 1, Dedicated DSPs 15 for performing image processing are connected to the system bus 25, respectively. 16 is a scanner engine interface, 17 is a printer engine interface, 18 is a FAX engine interface, 19 is image data (image information), RAM (Random Access Memory) used as various work areas, and 20 is a panel interface. Are respectively connected to the system bus 25.

  The host computer 2 is an apparatus such as a computer that captures image information transmitted from the digital multifunction peripheral 1 and provides image information to the digital multifunction peripheral 1. The digital multifunction peripheral 1 is an external interface of the controller unit 10. 12 is connected.

  The external medium 3 is a recording medium such as an SD (Secure Digital) card (SD memory card) or MMC (MultiMedia Card), and is connected to the digital multi-function peripheral 1 via an external media interface 13 of the controller unit 10. .

  The scanner engine 50 converts a document placed on a document table (not shown) into an electrical signal and acquires image information of the document. The scanner engine 50 instructs the DSP 15 to perform image processing such as gamma correction and dither processing. The printer engine 60 prints image information and the like, and the FAX engine 70 performs FAX transmission / reception.

  The scanner engine 50, the printer engine 60, and the FAX engine 70 are connected to the controller unit 10 via the scanner engine interface 16, the printer engine interface 17, and the FAX engine interface 18, respectively.

  The panel control device 80 is a device for a user (user) to operate the digital multi-function peripheral 1, and is connected to the controller unit 10 via the panel interface 20.

  Next, an operation procedure of a conventional digital multi-function peripheral that performs image processing using a DSP will be described. First, the operation when copying a document with a conventional digital multifunction peripheral will be described. When the user places a document on the document table and inputs instruction information for copying the document (image) from the panel control device 80, the copy control program stored in the ROM 11 is activated.

  The CPU 14 starts control of the copy operation based on the copy control program. Each process is performed in memory units for a plurality of lines in order to save the RAM 19 and realize control in real time.

  First, the CPU 14 drives the scanner engine 50 to convert the document placed on the document table into an electrical signal (information). This electrical signal is sent from the scanner engine interface 16 to the RAM 19 via the system bus 25 and stored as image information.

  The CPU 14 instructs the DSP 15 to perform image processing such as gamma correction and dither processing after image information for a plurality of lines has been prepared (after being stored). The image information processed by the DSP 15 is stored in the RAM 19 while reading the original (data) from the scanner engine 50 is operating in parallel.

  The CPU 14 transmits the image information stored in the RAM 19 to the printer engine 60 via the printer engine interface 17. The printer engine 60 outputs image information as an image. As described above, the CPU 14 performs a series of controls in the digital multi-function peripheral 1 so that a digital copy of the document can be realized.

  Next, an operation when a FAX is sent by the digital multi-function peripheral 1 will be described. When the user places a document on the document table and inputs instruction information for fax transmission from the panel control device 80, the FAX control program stored in the ROM 11 is activated. The CPU 14 starts controlling the FAX operation of the digital multi-function peripheral 1 based on the FAX control program.

  First, the CPU 14 drives the scanner engine 50 to convert the document placed on the document table into an electrical signal. This electrical signal is sent from the scanner engine interface 16 to the RAM 19 via the system bus 25 and stored as image information.

  When the image information for a plurality of lines is prepared, the CPU 14 instructs the DSP 15 to perform image processing such as gamma correction, dither processing, and image compression. The image information processed by the DSP 15 is stored in the RAM 19 while reading the original from the scanner engine 50 is operating in parallel.

  The CPU 14 transmits the image information stored in the RAM 19 to the FAX engine 70 via the FAX engine interface 18. The FAX engine 70 transmits the image information by FAX to a predetermined transmission destination. As described above, the CPU 14 performs a series of controls in the digital multi-function peripheral 1 so that the FAX transmission of the document can be realized.

  Next, an operation when the digital multi-function peripheral 1 reads a document to the host computer 2 (hereinafter referred to as PC (Personal Computer) scan) will be described. When the user places a document on the document table and inputs instruction information for reading the document from the host computer 2, the instruction information is sent to the ROM 11 via the external interface 12. As a result, the PC scan control program stored in the ROM 11 is activated. The CPU 14 starts PC scan control of the digital multi-function peripheral 1 based on the PC scan control program.

  First, the CPU 14 drives the scanner engine 50 to convert the document placed on the document table into an electrical signal. This electrical signal is sent from the scanner engine interface 16 to the RAM 19 via the system bus 25 and stored as image information.

  When the image information for a plurality of lines is prepared, the CPU 14 instructs the DSP 15 to perform image processing such as gamma correction, dither processing, and image compression. The image information processed by the DSP 15 is stored in the RAM 19 while reading the original from the scanner engine 50 is operating in parallel.

  The CPU 14 transmits the image information stored in the RAM 19 to the host computer 2 via the external interface 12. The host computer 2 receives and stores the image information transmitted from the RAM 19. As described above, the CPU 14 performs a series of controls in the digital multi-function peripheral 1 so that the PC scan of the document can be realized.

  Next, an operation for storing a document read by the digital multifunction machine 1 in the external medium 3 will be described. When a user places a document on the document table and inputs instruction information for storing data in the external medium 3 from the panel control device 80, the external media storage control program stored in the ROM 11 is activated. The CPU 14 starts the external media storage control of the digital multi-function peripheral 1 based on the external media storage control program.

  First, the CPU 14 drives the scanner engine 50 to convert the document placed on the document table into an electrical signal. This electrical signal is sent from the scanner engine interface 16 to the RAM 19 via the system bus 25 and stored as image information.

  When the image information for a plurality of lines is prepared, the CPU 14 instructs the DSP 15 to perform image processing such as gamma correction, dither processing, and image compression. The image information processed by the DSP 15 is stored in the RAM 19 while reading the original from the scanner engine 50 is operating in parallel.

  The CPU 14 transmits the image information stored in the RAM 19 to the external media 3 via the external media interface 13. The external medium 3 receives and stores the image information transmitted from the RAM 19. As described above, the CPU 14 performs a series of controls in the digital multi-function peripheral 1 so that the original can be stored in the external medium 3.

  Next, an operation (hereinafter referred to as PC printing) in which the digital multi-function peripheral 1 prints data in the host computer 2 will be described. When the user selects a file to be printed from the host computer 2 and gives a print instruction (when PC print instruction information is input), the instruction information is sent to the ROM 11 via the external interface 12. As a result, the PC print control program stored in the ROM 11 is activated.

  The CPU 14 starts print control of data sent from the host computer 2 based on the PC print control program.

  The digital multi-function peripheral 1 receives print instruction information sent from the host computer 2 via the external interface 12. This print instruction information is transmitted to the RAM 19 via the system bus 25 and stored in the RAM 19. This print instruction information is analyzed by the CPU 14 and information necessary for printing such as the printing method and paper size is extracted.

  Next, the CPU 14 extracts image information from the print instruction information, and when the image information has been prepared for a plurality of lines, instructs the DSP 15 to perform image processing such as image expansion. While receiving the print instruction information from the host computer 2, the image processed by the DSP 15 is stored in the RAM 19.

  The CPU 14 transmits the image information stored in the RAM 19 to the printer engine 60 via the printer engine interface 17. The printer engine 60 prints image information. In this way, PC printing can be realized by the CPU 14 performing a series of controls in the digital multi-function peripheral 1.

  Next, the FAX reception operation by the digital multifunction device 1 will be described. When a user at a remote location sends a FAX to the digital multifunction peripheral 1, FAX reception start instruction information is sent from the FAX engine 70 to the ROM 11 via the FAX engine interface 18. As a result, the FAX reception control program stored in the ROM 11 is activated. The CPU 14 starts FAX reception control of the digital multi-function peripheral 1 based on the FAX reception control program.

  The FAX engine 70 sends the received FAX data (image information and information related to reception) to the RAM 19 via the FAX engine interface 18 and the system bus 25. The RAM 19 stores this FAX data. Information relating to the reception of the FAX data is analyzed by the CPU 14, and information necessary for FAX reception, such as the destination (FAX transmission source) and paper size, is extracted.

  Next, the CPU 14 extracts image information from the FAX data, and when image information for a plurality of lines is prepared, instructs the DSP 15 to perform image processing such as image expansion. While receiving the next FAX data from the FAX engine 70, the image information processed by the DSP 15 is stored in the RAM 19.

  The CPU 14 transmits this image information to the printer engine 60 via the printer engine interface 17. Thus, the FAX reception can be realized by the CPU 14 performing a series of controls in the digital multi-function peripheral 1.

  Next, an operation for printing image information stored in the external medium 3 by the digital multi-function peripheral 1 will be described. When a user attaches (connects) the external medium 3 to the digital multifunction peripheral 1 and inputs instruction information regarding printing from the external medium 3 from the panel control device 80, a print control program from the external medium 3 stored in the ROM 11 Starts. The CPU 14 starts external media printing control based on the printing control program from the external media 3.

  First, image information is read from the external medium 3 via the external media interface 13 and stored in the RAM 19 via the system bus 25. When the image information for a plurality of lines is prepared, the CPU 14 instructs the DSP 15 to perform image processing such as image expansion.

While reading image information from the external medium 3 is operating in parallel, the image information processed by the DSP 15 is stored in the RAM 19. The CPU 14 transmits this image information to the printer engine 60 via the printer engine interface 17. As described above, the CPU 14 performs a series of controls in the digital multifunction peripheral 1 so that the image information stored in the external medium 3 can be printed by the digital multifunction peripheral 1.
JP 7-221996 A

  According to the above-described conventional technology, the digital multifunction peripheral realizes the above-described various functions by a single unit. Therefore, if the digital multifunction peripheral is to be used efficiently, the various functions need to operate in parallel. However, the above-described conventional method has a problem that parallel operation cannot be performed because image processing is performed by one DSP.

  The present invention has been made in view of the above, and an object of the present invention is to provide a digital multi-function peripheral that performs a parallel operation of image processing efficiently with a simple configuration and low cost.

  In order to solve the above problems, the present invention includes a plurality of image processing means for performing predetermined image processing, and in the digital multi-function peripheral that performs the image processing based on control of a digital signal processing unit or CPU, the CPU includes: When performing the new image processing, it is determined whether the new image processing is performed by the digital signal processing unit or the CPU based on the scheduled processing time of the image processing being processed by the digital signal processing device. Features.

  According to the present invention, it is possible to obtain a digital multi-function peripheral that realizes a parallel operation of image processing efficiently with a simple configuration and low cost.

  According to a first aspect of the present invention, there is provided a digital multi-function peripheral comprising a plurality of image processing means for performing predetermined image processing, wherein the CPU performs processing based on control of a digital signal processing section or CPU. When performing new image processing, the digital signal processing device determines whether the new image processing is performed by the digital signal processing unit or the CPU based on the scheduled processing time of the image processing being processed. With this configuration, since the new image processing is performed by either the digital signal processing unit or the CPU based on the scheduled processing time of the image processing being processed by the digital signal processing device, the digital signal processing device is performing image processing. Even so, the CPU can perform new image processing.

  According to a second aspect of the present invention, in the digital multifunction peripheral according to the first aspect, when the CPU performs a new image process, the digital signal processing apparatus is processing the scheduled processing time of the image processing and a new image. The processing time when the digital signal processing apparatus performs processing and the processing time when the CPU performs new image processing are compared, and image processing is performed by either the digital signal processing unit or the CPU based on the comparison result. It is a judgment. With this configuration, it is possible to determine whether the new image processing is performed by the digital signal processing unit or the CPU according to the image size, the image processing capability of the digital signal processing apparatus, and the image processing capability of the CPU. Have.

  According to a third aspect of the present invention, there is provided a digital multi-function peripheral according to any one of the first and second aspects of the present invention, wherein a processing time corresponding to the image size when the digital signal processing apparatus performs a new image processing. Information regarding the processing time corresponding to the image size when the CPU performs new image processing and processing time information for each type of image processing performed by each image processing means is set in advance as the processing time information. The processing times are compared based on the processing time information and the image size. With this configuration, it is possible to quickly determine whether a new image processing is performed by the digital signal processing unit or the CPU with a simple configuration.

  According to a fourth aspect of the present invention, there is provided a digital multifunction peripheral according to any one of the first to third aspects of the present invention, wherein the CPU performs an image being processed by the digital signal processing device when performing new image processing. The digital signal processing device is processing based on the processing time of the already processed image processing, the image size of the already processed image processing and the image size of the image being processed by the digital signal processing device. The scheduled processing time for image processing is calculated. With this configuration, even when the scheduled processing time for image processing cannot be determined from the image size, the digital signal processing apparatus can calculate the scheduled processing time for image processing during processing.

  Embodiments of the present invention will be described below.

(Embodiment 1)
In the first embodiment, image processing is efficiently performed by performing parallel image processing as necessary. FIG. 1 is a block diagram showing a configuration of a digital multi-function peripheral according to Embodiment 1 of the present invention.

  In FIG. 1, reference numeral 1 denotes a digital multi-function peripheral that performs predetermined image processing, 2 denotes a host computer connected to the digital multi-function peripheral 1, and 3 denotes an external medium connected to the digital multi-function peripheral 1.

  In the digital multi-function peripheral 1, 10 is a controller unit, 50 is a scanner engine connected to the controller unit 10, 60 is a printer engine connected to the controller unit 10, and 70 is a FAX (Facsimile) engine connected to the controller unit 10. , 80 are panel control devices connected to the controller unit 10.

  The scanner engine 50, the printer engine 60, the FAX engine 70, the host computer 2, and the external medium 3 here correspond to the image processing means described in the claims.

  The controller unit 10 controls image processing such as document copying, FAX transmission / reception, and image information capture. In the controller unit 10, reference numeral 25 denotes a system bus. Also, 11 is a ROM (Read Only Memory) in which each interface unit and programs are stored, 12 is an external interface, 13 is an external media interface, 14 is a CPU (Central Processing Unit) that controls the entire digital multi-function peripheral 1, Dedicated DSPs (digital signal processing units) 15 for performing image processing are connected to the system bus 25, respectively. 16 is a scanner engine interface, 17 is a printer engine interface, 18 is a FAX engine interface, 19 is image data (image information), RAM (Random Access Memory) used as various work areas, and 20 is a panel interface. Are respectively connected to the system bus 25.

  Reference numeral 33 denotes a subtraction timer for measuring the processing time of image processing, and is connected to the system bus 25. Reference numeral 31 denotes a local memory for downloading a program (image processing program (CPU) 111 described later) when the CPU 14 performs image processing, and is connected to the CPU 14.

  Reference numeral 32 denotes a local memory for downloading a program (image processing program (DSP) 110 described later) when the DSP 15 performs image processing, and is connected to the DSP 15.

  The host computer 2 is an apparatus such as a computer that captures image information transmitted from the digital multifunction peripheral 1 and provides image information to the digital multifunction peripheral 1. The digital multifunction peripheral 1 is an external interface of the controller unit 10. 12 is connected.

  The external medium 3 is a recording medium such as an SD (Secure Digital) card (SD memory card) or MMC (MultiMedia Card), and is connected to the digital multi-function peripheral 1 via an external media interface 13 of the controller unit 10. .

  The scanner engine 50 converts a document placed on a document table (not shown) into an electrical signal and acquires image information of the document. The scanner engine 50 instructs the DSP 15 to perform image processing such as gamma correction and dither processing.

  The printer engine 60 prints image information and the like, and the FAX engine 70 performs FAX transmission / reception. The scanner engine 50, the printer engine 60, and the FAX engine 70 are connected to the controller unit 10 via the scanner engine interface 16, the printer engine interface 17, and the FAX engine interface 18, respectively.

  The panel control device 80 is a device for a user (user) to operate the digital multi-function peripheral 1, and is connected to the controller unit 10 via the panel interface 20.

  Next, a detailed configuration of the controller unit 10 (a detailed configuration around the CPU 14 and the DSP 15) will be described.

  FIG. 2 is a block diagram showing the configuration of the controller unit of the digital multi-function peripheral according to Embodiment 1 of the present invention, and shows the controller unit 10 of the digital multi-function peripheral 1.

  In FIG. 2, the ROM 11 stores various control programs and information on the processing time of image processing (a processing time table 113 described later).

  In the ROM 11, an image processing program 110 for executing image processing by the DSP 15, an image processing program 111 for executing image processing by the CPU 14, and a schedule arbitration program 112 are stored as control programs. The schedule arbitration program 112 is a program for arbitrating execution (image processing) of the image processing programs 110 and 111 and operates on the CPU 14.

  The RAM 19 functions as a work area during program operation. The RAM 19 includes an area (execution type area 190) for storing the image processing type of the DSP 15 currently being executed. When the image processing of the DSP 15 is in an unexecuted state, “0” is set in the execution type area 190. When the image processing of the DSP 15 is in the execution state, “1” is set in the execution type area 190.

  The RAM 19 includes an area (waiting image processing queue 191) for storing a waiting image processing type to be processed by the DSP 15 in a queue structure. Since the waiting image processing queue 191 has a queue structure, a plurality of queues can be created.

  When executing the program in the DSP 15, the DSP 15 acquires the image processing program 110 for the DSP 15 from the CPU 14 via the system bus 25 and transfers it to the local memory 32 connected to the DSP 15. Thereafter, the DSP 15 can be activated to execute image processing. During this time, the CPU 14 can perform another process.

  The processing time table 113 in the ROM 11 is an information table for storing measured values of processing time when processing, for example, 1 KB image data for each type of image processing. In the processing time table 113, the time when image processing is performed by the DSP 15 (“processing time by DSP”) and the time when image processing is performed by the CPU (“processing time by CPU”) are displayed as image processing. Are stored in association with each processing type.

  Hereinafter, the operation procedure of the controller unit 10 of the digital multi-function peripheral 1 according to the first embodiment will be described with reference to the flowcharts of FIGS. 3 and 4. First, the schedule arbitration program 112 is called from the host program by designating the image processing type to be executed. For example, instruction information for starting a higher-level program is input from the panel control device 80 and instruction information for specifying a desired image processing type in the higher-level program. Instruction information for specifying the image processing type is input to the CPU 14 via the panel interface 20 and the system bus 25. The CPU 14 calls the schedule arbitration program 112 from the ROM 11 based on this instruction information.

  FIG. 3 is a flowchart showing an operation procedure of the arbitration program according to the first embodiment of the present invention. FIG. 4 is a flowchart showing an operation procedure of image processing after waiting for completion of the DSP processing of the arbitration program according to the first embodiment of the present invention.

  The CPU 14 reads the value of the execution type area 190 in the RAM 19 in order to confirm whether the DSP 15 is in use (step S110). When the value of the execution type area 190 is “0” (step S110, NO), the DSP 15 is not operating, so that the DSP 15 can execute new image processing.

  For this reason, the CPU 14 retrieves the designated image processing type from the processing time table 113, and extracts the “processing time in the DSP” corresponding to this image processing type (step S120).

  The CPU 14 calculates the estimated processing time (actual total processing time) Td in the DSP 15 by multiplying the image size of the image to be processed by the DSP processing time per 1 KB (“processing time in the DSP”) ( Step S130).

  The CPU 14 sets the value of the estimated processing time Td calculated in the subtraction timer 33, and starts (starts) the subtraction timer 33 (step S140). The CPU 14 downloads the image processing program 110 for the DSP 15 stored in the ROM 11 to the local memory 32 connected to the DSP 15 (step S150). The CPU 14 writes the current processing type (for example, information indicating dither) in the execution type area 190 in the RAM 19 (step S160).

  The CPU 14 activates the DSP 15 (step S170), and the DSP 15 executes image processing. Thereafter, the CPU 14 waits for completion of image processing by the DSP 15 (step S240).

  On the other hand, when the DSP 15 is already used for other image processing (when the value of the execution type area 190 is “1”) (step S110, YES), the designated image processing type is searched from the processing time table 113. Then, the value of “processing time in CPU” corresponding to this image processing type is extracted (step S180).

  The CPU 14 calculates the estimated processing time (actual total processing time) Tc in the CPU 14 by multiplying the image size of the image to be processed by the CPU processing time per 1 KB (“processing time in the CPU”) ( Step S190).

  The CPU 14 reads the value (time) indicated by the subtraction timer 33 and acquires the time until the DSP 15 is released (the time until the image processing being executed is completed) (step S200).

  The CPU 14 determines which of the case where the image processing is performed by the DSP 15 after the DSP 15 completes the current image processing and the case where the image processing is performed by the CPU 14 can be performed earlier (step S210). .

  When the CPU 14 determines that image processing can be performed earlier by the CPU 14 (YES in step S210), the CPU 14 calls an image processing program (CPU) 111 from the ROM 11 and executes image processing in the CPU 14 (step S210). S220). At this time, the CPU 14 downloads an image processing program (CPU) 111 to the local memory 31 and executes image processing. Thereafter, the CPU 14 waits for completion of image processing by the DSP 15 (step S240).

  On the other hand, when the CPU 14 waits for the end of the current image processing by the DSP 15 and determines that the image processing can be performed earlier by the DSP 15 (NO in step S210), the CPU 14 waits for the waiting image in the RAM 19. The waiting image processing type is set in the processing queue 191 (step S230). Thereafter, the CPU 14 waits for completion of image processing by the DSP 15 (step S240).

  Next, a processing procedure after the image processing is finished in the DSP 15 will be described using the flowchart of FIG. In the controller unit 10 of the digital multi-function peripheral 1, when the CPU 14 is waiting for an end interrupt from the DSP 15 (step S310), the CPU 14 executes any other processing.

  When a termination interrupt is issued from the DSP 15 to the CPU 14, the CPU 14 initializes the subtraction timer 33 and clears the value of the execution type area 190 in the RAM 19 to zero (step S320).

  The CPU 14 extracts the image processing type to be processed next from the waiting image processing queue 191 of the RAM 19. If there is no image processing type to be processed next in the waiting image processing queue 191 (step S330, NO), the image processing by the digital multi-function peripheral 1 is terminated.

  If there is an image processing type to be processed next in the waiting image processing queue 191 (step S330, YES), the CPU 14 searches the processing time table 113 for the designated image processing type and corresponds to this image processing type. The “processing time in the DSP” is extracted (step S340).

  The CPU 14 calculates the estimated processing time (actual total processing time) Td in the DSP 15 by multiplying the image size of the image to be processed by the DSP processing time per 1 KB (“processing time in the DSP”) ( Step S350).

  The CPU 14 sets the value of the estimated processing time Td calculated in the subtraction timer 33, and starts (starts) the subtraction timer 33 (step S360). The CPU 14 causes the image processing program 110 for the DSP 15 stored in the ROM 11 to be downloaded to the local memory 32 connected to the DSP 15 (step S370). The CPU 14 writes the current processing type in the execution type area 190 in the RAM 19 (step S380).

  The CPU 14 activates the DSP 15 (step S390), and the DSP 15 executes image processing. Thereafter, the CPU 14 waits for an end interrupt from the DSP 15 (step S310), and thereafter the processing of steps S310 to S390 is repeated.

  As described above, conventionally, when the DSP 15 is in use, the next processing such as FAX reception is in a waiting state until the processing by the DSP 15 becomes empty. The processing time in the CPU 14 is predicted, and the processing is switched to the one that can be processed quickly. As a result, the CPU 14 and the DSP 15 can be efficiently operated without adding hardware to the digital multifunction peripheral 1, and the parallelism of image processing can be increased. Therefore, the digital multi-function peripheral 1 can perform image processing efficiently and quickly, and can achieve parallel operation of image processing efficiently with a simple configuration and low cost.

(Embodiment 2)
Next, a second embodiment of the present invention will be described with reference to FIGS. 1 and 5 to 8. In the second embodiment, even when the processing time cannot be determined from the image size, such as compression / decompression processing, image processing is performed with accurate scheduling. For example, the compression / decompression process differs greatly in processing time between complex image data having different values for each pixel and when the same pixels are continuous such as a white background. In the second embodiment, the remaining processing time is predicted from the actual processing time measurement to predict how much the DSP 15 will be free later. Further, scheduling is realized by predicting the processing time of the image processing using a predetermined learning table.

  First, a detailed configuration of the controller unit 10 (a detailed configuration around the CPU 14 and the DSP 15) will be described. FIG. 5 is a block diagram showing the configuration of the controller unit of the digital multifunction peripheral according to Embodiment 2 of the present invention. Of the constituent elements in FIG. 5, constituent elements that achieve the same functions as those of the controller unit 10 of the first embodiment shown in FIG. 2 are given the same numbers, and redundant descriptions are omitted.

  The controller unit 10 according to the second embodiment includes an addition timer 35 for measuring the processing time of image processing by the DSP 15 and is connected to the system bus 25. In the ROM 11, in addition to an image processing program (DSP) 110, an image processing program (CPU) 111, and a schedule arbitration program 112, a processing time ratio table 115 is stored as a control program. The processing time ratio table 115 is an information table in which the ratio of CPU / DSP processing time when processing image data (“processing comparison in CPU / DSP”) is stored.

  The RAM 19 stores a processed size 192 and processing time result information 193 in addition to the execution type area 190 and the waiting image processing queue 191. The processed size 192 is an area in which the image size actually processed by the DSP 15 is stored. The processed image size (value) is written into the processed size 192 via the system bus 25 by the DSP 15 during the processing.

  The processing time result information 193 is a learning table regarding the processing result of image processing. In the processing time result information 193, the image processing type and the processing result of the image processing (“actual result in DSP”) are associated with each other.

  The processing time result information 193 stores the processing time actually required for image processing by the DSP 15 for each processing type. In the processing time result information 193, for example, an average value of processing times for each 1 KB is stored as the processing time. The initial value of the processing time stored in the processing time result information 193 is set to “0”.

  Hereinafter, the operation procedure of the controller unit 10 of the digital multifunction peripheral 1 according to the second embodiment will be described with reference to the flowcharts of FIGS. 6 and 7. First, the schedule arbitration program 112 is called from the host program by designating the image processing type to be executed. For example, instruction information for starting a higher-level program is input from the panel control device 80 and instruction information for specifying a desired image processing type in the higher-level program. Instruction information for specifying the image processing type is input to the CPU 14 via the panel interface 20 and the system bus 25. The CPU 14 calls the schedule arbitration program 112 from the ROM 11 based on this instruction information.

  FIG. 6 is a flowchart showing an operation procedure of the arbitration program according to the second embodiment of the present invention. FIG. 7 is a flowchart showing an operation procedure of image processing after waiting for completion of the DSP processing of the arbitration program according to the second embodiment of the present invention.

  The CPU 14 reads the value of the execution type area 190 in the RAM 19 to confirm whether the DSP 15 is in use (step S410). If the value of the execution type area 190 is “0” (step S410, NO), the DSP 15 is not operating, and therefore the DSP 15 can execute new image processing. Therefore, the CPU 14 causes the image processing program 110 for the DSP 15 stored in the ROM 11 to be downloaded to the local memory 32 connected to the DSP 15 (step S420).

  The CPU 14 starts (starts) the addition timer 35 for measuring the processing time of the image processing by the DSP 15 (step S430). The CPU 14 writes the current process type in the execution type area 190 in the RAM 19 (step S440).

  The CPU 14 activates the DSP 15 (step S450), and the DSP 15 executes image processing. Thereafter, the CPU 14 waits for the end of image processing by the DSP 15 (step S520).

  On the other hand, when the value of the execution type area 190 is not “0” (step S410, YES), since the DSP 15 is already used for other image processing, the CPU 14 actually uses the processed size 192 in the RAM 19 as the DSP 15. Retrieve the size of the processed image. Then, the CPU 14 reads the processing time of the actual image from the addition timer 35 and calculates the scheduled end time Tr of the image processing by the DSP 15 based on the image size, the size of the processed image, and the processing time of the actual image ( Step S460).

  Next, the CPU 14 retrieves the designated image processing type from the processing time result information 193 in the RAM 19 and extracts the value of “actual result in DSP” corresponding to this image processing type.

  The CPU 14 multiplies the image size of the image to be subjected to image processing by the extracted “actual result in DSP”, and calculates an estimated processing time Td when this image is processed by the DSP 15 (step S470).

  Further, the CPU 14 calculates an estimated processing time Td when the image is processed by the DSP 15 and an estimated processing time Tc when the CPU 14 performs image processing based on the processing time ratio table 115 in the ROM 11 (step S480). .

  Whether the CPU 14 executes the image processing by the CPU 14 based on the calculated estimated end time Tr of the image processing by the DSP 15, the estimated processing time Td when image processing is performed by the DSP 15, and the estimated processing time Tc when image processing is performed by the CPU 14. It is determined whether the DSP 15 is to execute (step S490).

  Specifically, when Tc is greater than or equal to Tr + Td, the CPU 14 determines that image processing is performed, and when Tc is smaller than or equal to Tr + Td, it is determined that DSP15 image processing is performed. When it is faster to execute the image processing by the CPU 14 (when Tc is larger than Tr + Td or the like) (step S490, YES), the CPU 14 calls the image processing program (CPU) 111 from the ROM 11, and the CPU 14 executes the image processing. At this time, the CPU 14 downloads an image processing program (CPU) 111 to the local memory 31 and executes image processing. Thereafter, the CPU 14 waits for the end of image processing by the DSP 15 (step S520).

  On the other hand, when the CPU 14 waits for the DSP 15 to finish the current image processing and determines that the image processing can be performed earlier by the DSP 15 (NO in step S490), the CPU 14 waits for the image in the RAM 19 to be processed. The waiting image processing type is set in the processing queue 191 (step S510). Thereafter, the CPU 14 waits for the end of image processing by the DSP 15 (step S520).

  Next, a processing procedure after the image processing is finished in the DSP 15 will be described using the flowchart of FIG. In the controller unit 10 of the digital multi-function peripheral 1, when the CPU 14 is waiting for an end interrupt from the DSP 15 (step S610), the CPU 14 executes any other processing.

  When a termination interrupt is issued from the DSP 15 to the CPU 14, the time indicated by the addition timer 35 is divided by the actual image processing size (for example, in units of 1 KB), and the processing time of the image per 1 KB by the DSP 15 is calculated. CPU14 reads the value of the processing time until now from processing time result information 193, calculates | requires an average value, and updates the processing time ratio table 115 (step S620).

  The CPU 14 initializes the addition timer 35 and clears the value of the execution type area 190 in the RAM 19 to zero (step S630). The CPU 14 extracts the image processing type to be processed next from the waiting image processing queue 191 of the RAM 19. If there is no image processing type to be processed next in the waiting image processing queue 191 (step S640, NO), the image processing by the digital multi-function peripheral 1 is terminated.

  If there is an image processing type to be processed next in the waiting image processing queue 191 (step S640, YES), the CPU 14 loads the image processing program 110 for the DSP 15 stored in the ROM 11 to the local connected to the DSP 15. Download to the memory 32 (step S650).

  The CPU 14 starts (starts) the addition timer 35 (step S660). The CPU 14 writes the current processing type in the execution type area 190 in the RAM 19 (step S670).

  The CPU 14 activates the DSP 15 (step 680), and the DSP 15 executes image processing. Thereafter, the CPU 14 waits for an end interrupt from the DSP 15 (step S610), and the processing of steps S610 to S680 is repeated thereafter.

  Next, the operation procedure of the DSP 15 will be described. FIG. 8 is a flowchart showing the operation procedure of the DSP. When the DSP is activated from the CPU 14 (input of instruction information for activation), the DSP 15 starts operation. The DSP 15 executes an image processing program (DSP) 110 loaded in advance in the local memory 32.

  The DSP 15 performs image processing, for example, in units of n (n is a natural number) KB (step S710). The DSP 15 determines whether or not the image processing is finished (step S720). If the DSP 15 determines that the image processing has not ended (step S720, NO), the current processed image size is written into the processed size 192 of the RAM 19 via the system bus 25 (step S730). Thereafter, the processing in steps S710 to S730 is repeated until the DSP 15 determines that the image processing has been completed.

  On the other hand, when the DSP 15 determines that the image processing has been completed (step S720, YES), the DSP 15 generates an interrupt for the completion of the image processing to the CPU 14 (step S740).

  As described above, in the second embodiment, even when the processing time of the image by the DSP 15 is not proportional to the image data amount (size), the processing time and the data amount during the image processing are periodically stored. The CPU 14 can calculate (estimate) the image processing time by the DSP 15.

  Further, since the processing time result information 193 is stored on the RAM 19, the image processing time by the DSP 15 can be calculated (predicted). By setting “0” to the processing time result information 193 first, scheduling for determining whether image processing is performed by the CPU 14 or the DSP 15 is always performed by the DSP 15 for the first time. Therefore, it is possible to perform image processing efficiently and quickly in the digital multi-function peripheral 1.

  As described above, the digital multifunction peripheral according to the present invention is suitable for parallel processing of a plurality of image processes.

1 is a block diagram showing the configuration of a digital multifunction peripheral according to Embodiment 1 of the present invention. 1 is a block diagram showing a configuration of a controller unit of a digital multifunction peripheral according to a first embodiment of the present invention. The flowchart which shows the operation | movement procedure of the arbitration program which concerns on Embodiment 1 of this invention. The flowchart which shows the operation | movement procedure of the arbitration program which concerns on Embodiment 1 of this invention. FIG. 3 is a block diagram showing a configuration of a controller unit of a digital multifunction peripheral according to a second embodiment of the present invention. The flowchart which shows the operation | movement procedure of the arbitration program which concerns on Embodiment 2 of this invention. The flowchart which shows the operation | movement procedure of the arbitration program which concerns on Embodiment 2 of this invention. Flow chart showing operation procedure of DSP Block diagram showing the configuration of a conventional digital multifunction peripheral

Explanation of symbols

1 Digital MFP 2 Host Computer 3 External Media 10 Controller 11 ROM
12 External interface 13 External media interface 14 CPU
15 DSP
16 Scanner Engine Interface 17 Printer Engine Interface 18 FAX Engine Interface 19 RAM
20 Panel interface 25 System bus 31, 32 Local memory 33 Subtraction timer 35 Addition timer 50 Scanner engine 60 Printer engine 70 FAX engine 80 Panel controller 110, 111 Image processing program 112 Schedule arbitration program 113 Processing time table 115 Processing time ratio table 190 Execution type area 191 Waiting image processing queue 192 Processed size 193 Processing time result information

Claims (4)

In a digital complex machine comprising a plurality of image processing means for performing predetermined image processing, and performing the image processing based on control of a digital signal processing unit or CPU,
When the CPU performs new image processing, the digital signal processing unit or the CPU performs the new image processing based on the scheduled processing time of the image processing being processed by the digital signal processing device. A digital multifunction device characterized by judging. When the CPU performs a new image process, the CPU performs a scheduled processing time of the image processing being processed by the digital signal processing device, a processing time when the digital signal processing device performs the new image processing, and the new processing. 2. The processing time when the CPU performs the image processing is compared, and based on the comparison result, it is determined whether the image processing is performed by the digital signal processing unit or the CPU. The digital multifunction machine described. Information regarding processing time according to the image size when the digital image processing apparatus performs the new image processing and information regarding processing time according to the image size when the CPU performs the new image processing, Set as processing time information in advance for each type of image processing performed by each of the image processing means,
3. The digital multi-function peripheral according to claim 1, wherein the CPU compares the processing times based on the set processing time information and an image size. The CPU, when performing a new image processing, is the image processing being processed by the digital signal processing device, the processing time of the image processing already processed, the image size of the image processing already processed, and the 4. The scheduled processing time of image processing being processed by the digital signal processing device based on an image size of an image being processed by the digital signal processing device. The digital multifunction machine described.

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