JP2007059721A - Method and system for manufacturing semiconductor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To stably manufacture a semiconductor product of high quality with high yield even from the start of a manufacturing process. <P>SOLUTION: A correlation analysis arithmetic unit 7 forms analysis data on a correlation between a semiconductor characteristic value and a product characteristic value, and performs a correlation analysis using the formed correlation analysis data so as to subject process specifications to feedback control. By this setup, a usual system for manufacturing semiconductor requires a process of previously modeling a correlation between process parameters and device characteristics so as to optimize process specifications, but this manufacturing system does not require the above process, so that semiconductor products of high quality can be stably manufactured with high yield from the start of a manufacturing process through this manufacturing system. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor manufacturing method and a semiconductor manufacturing system for manufacturing a semiconductor element from a semiconductor wafer.

Conventionally, evaluation parameters used for semiconductor element manufacturing process management are calculated, device characteristics corresponding to fluctuations in the evaluation parameters are analyzed using an evaluation function indicating the correlation between the process parameters and the device characteristics, and semiconductors are analyzed based on the analysis results. 2. Description of the Related Art A semiconductor manufacturing system that optimizes device manufacturing conditions is known (see Patent Document 1). According to such a system, it is possible to stably manufacture a high-quality semiconductor product with a high yield.
Japanese Patent Laid-Open No. 10-163080

  However, in the conventional semiconductor manufacturing system, when optimizing the manufacturing conditions of semiconductor elements, the correlation between process parameters and device characteristics needs to be modeled using past process data. At the start of an incomplete manufacturing process, it is impossible to stably manufacture a high-quality semiconductor product with a high yield by optimizing the manufacturing conditions.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor manufacturing method capable of stably manufacturing a high-quality semiconductor product with high yield at an early stage when the manufacturing process is started up. And providing a semiconductor manufacturing system.

  In order to solve the above problems, a semiconductor manufacturing method and a semiconductor manufacturing system according to the present invention analyze a correlation between a semiconductor characteristic test value of a semiconductor wafer and a product characteristic test value of a semiconductor element during the manufacturing process, and according to the analysis result. Feedback control is performed to change the manufacturing conditions of the semiconductor element.

  According to the semiconductor manufacturing method and the semiconductor manufacturing system according to the present invention, it is not necessary to model the correlation between process parameters and device characteristics in advance in order to optimize the manufacturing conditions. In addition, high-quality semiconductor products can be stably manufactured with a high yield.

  Hereinafter, a configuration of a semiconductor manufacturing system according to an embodiment of the present invention will be described with reference to the drawings.

[Configuration of semiconductor manufacturing system]
First, the configuration of a semiconductor manufacturing system according to an embodiment of the present invention will be described with reference to FIG.

  As shown in FIG. 1, a semiconductor manufacturing system 1 according to an embodiment of the present invention is a semiconductor that manufactures a semiconductor element by processing each of a plurality of semiconductor wafers constituting a lot according to a process standard value (apparatus setting value). The manufacturing apparatus 2, the semiconductor characteristic inspection apparatus 3 for inspecting the semiconductor characteristic of the semiconductor wafer (intermediate product) being processed, and the semiconductor characteristic value obtained by the semiconductor characteristic inspection apparatus 3 are used at any position in the semiconductor wafer. An approximate interpolation calculation device 4 that calculates semiconductor characteristic values by approximate interpolation, and a product inspection device 5 that inspects element characteristics of semiconductor elements (products) manufactured by the semiconductor manufacturing apparatus 2 as product characteristic values.

  Further, the semiconductor manufacturing system 1 collects the semiconductor characteristic value obtained by the semiconductor characteristic inspection device 3, the semiconductor characteristic value calculated by the approximate interpolation calculation device 4, and the product characteristic value obtained by the product inspection device 5. Using the characteristic value collection device 6 and the values collected by the characteristic value collection device 6, the data for correlation analysis between the semiconductor characteristic value and the product characteristic value is created, and the correlation analysis is performed using the created correlation analysis data. And a correlation analysis calculation device 7 that feedback-controls the process standard value. The approximate interpolation calculation device 4, the characteristic value collection device 6, and the correlation analysis calculation device 7 are configured by known information processing devices such as workstations and personal computers.

[How to create data for correlation analysis]
Next, a method for creating data for correlation analysis will be described.

  Generally, a semiconductor element is manufactured through 100 or more manufacturing processes using a plurality of semiconductor manufacturing apparatuses. In addition, each manufacturing process is performed by using several tens of semiconductor wafers as one lot, and when one manufacturing process is completed, the semiconductor characteristic value is inspected to confirm the quality of the manufacturing process.

  Usually, the semiconductor characteristic values are as follows: (1) As shown in FIG. 2, a semiconductor wafer in which no semiconductor element is formed is inserted as a dummy wafer 11 into a plurality of semiconductor wafers (main wafers) 10 constituting one lot. Either a semiconductor characteristic value is measured, or (2) a test circuit 12 is formed on the wafer 10 as shown in FIG. 3 and the semiconductor characteristic value at the position of the test circuit 12 is measured. Obtained by

  Here, the reason for using the inspection circuit 12 without using the semiconductor element formed on the wafer 10 is that the inspection content may be a destructive inspection or that the circuit is not formed on the wafer 10. This is because the semiconductor characteristic value can be measured stably. In the present specification, the “semiconductor characteristic value” is a physical quantity indicating the characteristics of the semiconductor wafer itself, and examples thereof include wafer resistance, wafer thickness, and wafer warpage.

  Product characteristic values are measured for all semiconductor elements (hundreds to thousands of semiconductor elements are formed on a single wafer). In the semiconductor characteristic inspection, productivity is taken into consideration. Therefore, the measurement is often performed only at several semiconductor characteristic inspection points 13 provided on the dummy wafer 11 as shown in FIG. In the present specification, the “product characteristic value” is a physical quantity indicating the electrical characteristics of a semiconductor element, and may be exemplified by circuit resistance, leakage current, sensitivity voltage, etc., although it varies depending on the type of semiconductor element.

  Therefore, the correlation analysis data between the semiconductor characteristic value and the product characteristic value is created by extracting (1) the product characteristic value of the semiconductor element formed at the position on the wafer where the semiconductor characteristic value is measured, or (2 It is necessary to create a semiconductor characteristic value corresponding to the position of each semiconductor element by estimating the semiconductor characteristic value. Therefore, in this embodiment, the correlation analysis data is created by any one of the following four methods. Hereinafter, each method will be described in detail.

[Method 1]
In the method 1, the measurement value of the inspection circuit 12 of the wafer 10 is used as the semiconductor characteristic value, and the product characteristic value of the semiconductor element formed around the inspection circuit 12 of the wafer 10 is used to determine the position of the inspection circuit 12. Data for correlation analysis is created by estimating the product characteristic value of the semiconductor element. Specifically, in this method 1, as shown in FIG. 5, n inspection circuits 12 are provided on the wafer 10, and the measured values of the inspection circuits 12 are converted into semiconductor characteristic values Hi (i = 1 to n). ). On the other hand, as shown in FIG. 6, if the semiconductor elements around the inspection circuit 12 are Ci1 to Ci8 and the product characteristic values of these semiconductor elements are Si1 to Si8, the product characteristic value Si of the semiconductor element at the position of the inspection circuit 12 is obtained. Can be estimated as shown in Equation 1 below.

Therefore, by performing the same processing for each of the n inspection circuits 12, the relationship between the n semiconductor characteristic values and the product characteristic values as shown in Table 1 below can be created as correlation analysis data. it can.

[Method 2]
In the method 2, the semiconductor characteristic value at the position on the wafer 10 corresponding to the position of the semiconductor characteristic inspection point 13 is estimated from the semiconductor characteristic value at the semiconductor characteristic inspection point 13 of the dummy wafer 11 and at the position of the semiconductor characteristic inspection point 13. Correlation analysis data is created by measuring product characteristic values at corresponding positions on the wafer 10. Specifically, there are m main wafers 10 between two dummy wafers 11a and 11b as shown in FIG. 7, and n semiconductor characteristic inspection points 13 are arranged on the dummy wafers 11a and 11b as shown in FIG. Assuming that the semiconductor characteristic values at the semiconductor characteristic inspection points 13 of the dummy wafers 11a and 11b are Hi1 and Hi2 (i = 1 to n), respectively, the positions of the semiconductor characteristic inspection points 13 on the P-th main wafer 10 from the dummy wafer 11a. The semiconductor characteristic value Hi at the corresponding position can be estimated by the weighted average of the semiconductor characteristic values H1i and H2i as shown in Equation 2 below.

  Accordingly, the semiconductor characteristic value Hi of the P-th main wafer 10 is calculated for the position corresponding to each position of the semiconductor characteristic inspection point 13 and the product at the position corresponding to the position of the semiconductor characteristic inspection point 13 on the main wafer 10. By measuring the characteristic value, the same correlation analysis data as in Table 1 above can be created.

[Method 3]
In the method 3, the semiconductor characteristic values at the positions of all the elements of the wafer 10 are estimated from the measured values of the inspection circuit 12 on the wafer 10, and the product characteristic values of all the elements of the wafer 10 are measured to correlate. Create analytical data. Specifically, as shown in FIG. 5, n inspection circuits 12 are provided on the wafer 10, and measured values of the inspection circuit i (i = 1 to n) are converted into semiconductor characteristic values zi (i = 1 to 1). n). Then, assuming that the semiconductor characteristic value zi changes continuously with respect to the position and changes into a curved surface, the semiconductor characteristic value at an arbitrary position on the wafer 10 is calculated from the semiconductor characteristic value zi by the following method. In general, an explicit function expression, an implicit function expression, or a parametric expression is often used as a method of expressing a curved surface. Here, a case where an explicit function expression is used will be described as an example.

Now, as shown in FIG. 9, the position and measurement value of the inspection circuit i are (xi, yi) and zi (1 ≦ i ≦ n, n: number of measurement points), respectively, and the semiconductor characteristic value distribution F (x, y ) Can be approximated by the following formula 3, the following formula 4 is obtained by calculating the values of the constants a, b, and c from the following formula 3 by the least square method. Therefore, the semiconductor characteristic value distribution F (x, y) can be approximated as the following Expression 5 by solving the simultaneous equations of Expression 4. In this example, in order to simplify the description, the semiconductor characteristic value distribution F (x, y) is approximated by a linear expression, but it may be a high-order polynomial.

Therefore, in this method 3, the semiconductor characteristic values at the positions (xi, yi) of all the elements of the wafer 10 are estimated from the semiconductor characteristic value zi obtained by the inspection circuit i using the above formula 5, By associating these semiconductor characteristic values with the product characteristic values Si of k semiconductor elements on the wafer 10, the relationship between the k semiconductor characteristic values and the product characteristic values as shown in Table 2 below is shown. Create data for correlation analysis.

[Method 4]
In the method 4, the semiconductor characteristic values at the positions of all the elements of the wafer 10 are estimated from the semiconductor characteristic values at the semiconductor characteristic inspection point 13 of the dummy wafer 11, and the product characteristic values of all the elements of the wafer 10 are measured, thereby obtaining the correlation. Create analytical data. Specifically, the semiconductor characteristic value at an arbitrary position of the dummy wafer 11 can be calculated by using the measured value at the semiconductor characteristic inspection point 13 as shown in the following Expression 6, similarly to the method 3 described above. Accordingly, the semiconductor characteristic values at the positions (xi, yi) of the dummy wafers 11a and 11b are calculated as F1 (xi, yi) and F2 (xi, yi), respectively.

On the other hand, the semiconductor characteristic value Hi at the position (xi, yi) on the p-th main wafer 10 from the dummy wafer 11a is the semiconductor characteristic value F1 (at the position (xi, yi) of the dummy wafers 11a, 11b, as in the above method 2. x i, y i) and F 2 (xi, y i) can be estimated as the following Expression 7.

  Therefore, by performing the above processing on all k semiconductor elements on the wafer 10, it is possible to create correlation analysis data similar to Table 1 showing the relationship between the k semiconductor characteristic values and the product characteristic values. it can.

[Correlation analysis method]
Finally, a correlation analysis method using correlation analysis data will be described.

Now, assuming that the data of the semiconductor characteristic J and the product characteristic K are Hi and Si (i = 1 to n), the correlation coefficient R between the semiconductor characteristic J and the product characteristic K can be calculated by the following formula 8.

Then, when the correlation function R is obtained for all combinations of the data of the semiconductor characteristic J and the product characteristic K, it is as shown in Table 3 below.

Therefore, in this embodiment, the correlation analysis calculation device 7 extracts a combination of data of the semiconductor characteristic J and the product characteristic K having a large correlation coefficient R from Table 3 and performs regression analysis. Specifically, assuming that the data of the semiconductor characteristic J and the product characteristic K are Hi and Si (i = 1 to n), respectively, the relationship between the data H of the semiconductor characteristic J and the data S of the product characteristic K is expressed by Equation 9 below. It is expressed as follows.

Therefore, as shown in FIG. 10, the correlation analysis calculation device 7 sets the upper limit value and lower limit value of the non-defective standard value of the product characteristic K as Smax and Smin, respectively, and uses the above formula 9 to set the upper limit of the process standard value of the semiconductor characteristic J The value Hmax and the lower limit value Hmin are calculated as in the following Equation 10, and feedback control is performed to change the process standard value so that the product characteristic K is within the range of the non-defective product standard value.

  As is clear from the above description, in the semiconductor manufacturing system 1 according to the embodiment of the present invention, the correlation analysis calculation device 7 creates data for correlation analysis between the semiconductor characteristic value and the product characteristic value, and the created correlation analysis. Since the process specification value is feedback controlled by performing correlation analysis using the data for the process, the correlation between the process parameter and the device characteristic is preliminarily set in order to optimize the process specification value as in the conventional semiconductor manufacturing system. There is no need for modeling, and a high-quality semiconductor product can be quickly and stably manufactured with high yield at the start of the manufacturing process.

  It should be noted that it is desirable to obtain the semiconductor characteristic value from a dummy wafer instead of from this wafer. Since the dummy wafer does not actually become a semiconductor element, according to such processing, it is possible to accurately grasp the state of the manufacturing process. Further, as the semiconductor characteristic value, it is desirable to calculate the thickness of the dummy wafer position corresponding to the position of the semiconductor element by extrapolating or interpolating the thickness values of the plurality of dummy wafers.

  As mentioned above, although embodiment which applied the invention made by the present inventors was described, this invention is not limited by the description and drawing which make a part of indication of this invention by this embodiment. That is, it should be added that other embodiments, examples, operation techniques, and the like made by those skilled in the art based on the above-described embodiments are all included in the scope of the present invention.

It is a block diagram which shows the structure of the semiconductor manufacturing system used as embodiment of this invention. It is a schematic diagram which shows an example of the lot which consists of this wafer and one dummy wafer. It is a schematic diagram which shows the circuit for a test | inspection provided on this wafer. It is a schematic diagram which shows the semiconductor characteristic test | inspection point provided on the dummy wafer. It is a schematic diagram which shows n test | inspection circuits provided on this wafer. It is a figure for demonstrating the method to estimate the product characteristic value of the semiconductor element in the position of a test circuit from the product characteristic value of the semiconductor element around a test circuit. It is a schematic diagram which shows an example of the lot which consists of this wafer and two dummy wafers. It is a schematic diagram which shows n semiconductor characteristic test | inspection points provided on the dummy wafer. It is a figure for demonstrating the calculation method of semiconductor characteristic value distribution. It is a figure which shows the relationship of the product characteristic with respect to a semiconductor characteristic.

Explanation of symbols

1: Semiconductor manufacturing system 2: Semiconductor manufacturing apparatus 3: Semiconductor characteristic inspection apparatus 4: Approximate interpolation calculation apparatus 5: Product inspection apparatus 6: Characteristic value collection apparatus 7: Correlation analysis calculation apparatus

Claims (4)

A semiconductor manufacturing method for manufacturing a semiconductor element from a semiconductor wafer,
A first step of manufacturing a semiconductor element by performing a predetermined process on each of a plurality of semiconductor wafers constituting a lot according to manufacturing conditions;
A second step of acquiring, as a semiconductor characteristic distribution, data indicating a relationship of semiconductor characteristics with respect to a position in the semiconductor wafer for the semiconductor wafer in the middle of the predetermined process;
A third step of acquiring, as a product characteristic value, the element characteristic of the semiconductor element manufactured by the first step;
A fourth step of evaluating a correlation between the product characteristic value and the semiconductor characteristic distribution;
And a fifth step of performing feedback control for changing the manufacturing condition based on the evaluation result of the fourth step. A semiconductor manufacturing method according to claim 1,
The lot includes a dummy wafer that does not manufacture a semiconductor element, and the second step is performed on the dummy wafer. A semiconductor manufacturing method according to claim 2,
A plurality of dummy wafers are included per lot, and the thickness data of the dummy wafer corresponding to the position of the semiconductor element is calculated as the semiconductor characteristic distribution by extrapolating or interpolating the thickness values of the plurality of dummy wafers. A method of manufacturing a semiconductor. A semiconductor manufacturing system for manufacturing a semiconductor element from a semiconductor wafer,
A semiconductor manufacturing apparatus for manufacturing a semiconductor element by performing predetermined processing on each of a plurality of semiconductor wafers constituting a lot according to manufacturing conditions;
For a semiconductor wafer in the middle of the predetermined processing, a semiconductor characteristic inspection apparatus that acquires data indicating a relationship of semiconductor characteristics with respect to a position in the semiconductor wafer as a semiconductor characteristic distribution;
A product inspection apparatus for obtaining the element characteristic of the semiconductor element manufactured by the semiconductor manufacturing apparatus as a product characteristic value;
A semiconductor manufacturing system comprising: a correlation analysis computing device that performs a feedback control for evaluating a correlation between the product characteristic value and the semiconductor characteristic distribution and changing a manufacturing condition based on the evaluation result.

Images