JP2007049460A - Digital broadcast receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a digital broadcast receiver 20 for reducing sense of incongruity of display given to a televiewer by reducing a gap of time in switching high-resolution video image and low-resolution video image. <P>SOLUTION: In the digital broadcast receiver 20, a frame with faster display timing is delayed by a time corresponding to an offset value and displayed based on the offset value, which indicates a time gap of display timing between high-resolution and low-resolution video image frames for indicating the video image for the same content. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a digital broadcast receiving apparatus that multiplexes and broadcasts the same video into one radio wave with different resolutions.

  In terrestrial digital broadcasting recently started, hierarchical transmission is performed in which a transmission band assigned to each broadcasting station is divided into a number of segments, and a plurality of layers composed of one or more segments are simultaneously transmitted. In hierarchical transmission, the higher the number of segments that make up a hierarchy, the higher the resolution of the video that can be transmitted. However, it becomes difficult to receive a stream without error during movement in a vehicle or the like. Therefore, for example, in the ISDB-T system compliant with Japan, one channel of the digital broadcasting band is divided into 13 segments, and 12 segments among them are used to achieve high resolution for a fixed receiver. An image is provided, and a low-resolution image is provided by a transmission method that is highly resistant to transmission errors using the remaining one segment.

  As a result, a high-resolution digital broadcast can be received by a fixed receiver installed in a home or the like, and a mobile receiver such as a mobile phone or a PDA can receive a stable digital broadcast even while moving, although the resolution is low. It becomes possible.

  However, in the case of receiving and displaying a digital broadcast in a mobile reception device that is mounted on a mobile body and has a relatively larger screen than a mobile phone, PDA, or the like, such as a navigation device mounted on a vehicle, There is a desire to display a high-resolution video using 12 segments as much as possible even in the middle.

  In order to realize this, for example, in Patent Document 1, a reception error rate (bit error rate) of a digital broadcast signal is measured while decoding high-layer transmission information broadcast using 12 segments, and a reception error is measured. When the rate exceeds a predetermined threshold, low-layer transmission information transmitted using one segment is decoded.

JP 2003-143503 A

  By the way, the broadcasting station of digital broadcasting transmits the same PTS (Presentation Time Stamp) in association with information to be displayed at the same time, such as video frames, audio signals, caption information, and attached data, and the receiver side has the same information. By simultaneously displaying the data associated with the PTS, audio and other data can be reproduced in synchronization with the video.

  However, such a mechanism is a regulation for synchronizing the video and other information for each of the high-resolution video and the low-resolution video, and the high-resolution video frame and the low-resolution video frame showing the same contents are combined. It is not defined until synchronization. That is, the PTS of the high resolution video frame and the low resolution video frame showing the same contents are not necessarily the same value.

  For this reason, when the receiver switches between a high-resolution video using 12 segments and a low-resolution video using one segment, the video and audio may become discontinuous. When video and audio are discontinuous, some of broadcast information may be lost or information with the same content may be repeated. In particular, in a program that plays music, even if the time difference generated by switching between high-resolution video and low-resolution video is slight, the rhythm shifts due to the audio synchronized with those videos, and the viewer May give a sense of incongruity.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to reduce a time lag when switching between a high-resolution video and a low-resolution video.

  In order to solve the above-described problem, the digital broadcast receiving apparatus of the present invention has an earlier display timing based on an offset value indicating a time difference between display timings of a high-resolution video frame and a low-resolution video frame indicating the same content video. One frame is displayed after being delayed by a time corresponding to the offset value.

  For example, a first aspect of the present invention is a digital broadcast receiving apparatus that receives and displays digital broadcasts that broadcast the same video at different resolutions, and demodulates digital broadcast radio waves including high-resolution video and low-resolution video. Demodulating means for outputting TS (Transport Stream) packets including high-resolution video and TS packets including low-resolution video, and an internal counter operated by an internal clock generated from a PCR (Program Clock Reference) included in the TS packets. And the counter value for the high-resolution video by delaying the counter value of the internal counter by the offset value based on the offset value indicating the time difference between the display timings of the high-resolution video frame and the low-resolution video frame showing the same content video Delay control means, The TS packet including the resolution video is decoded to generate a low-resolution video frame, and the PTS is based on the PTS (Presentation Time Stamp) stored in the TS packet in association with the generated low-resolution video frame. Receiving a TS packet including a high-resolution video output from a low-resolution video decoder that outputs a generated low-resolution video frame and a demodulating means when the difference between the value of and the internal counter value is within a predetermined value Receiving the offset value from the delay control means, referring to the internal counter, and decoding the TS packet output from the high resolution video buffer and the high resolution video buffer that delays the received TS packet by the offset value and outputs it Generate high resolution video frames and high resolution When the difference between the PTS value and the high-resolution video counter value is within a predetermined value based on the PTS stored in the TS packet in association with the video frame, the generated high-resolution video frame The display device displays either the high-resolution video decoder for output and the low-resolution video frame output by the low-resolution video decoder or the high-resolution video frame output by the high-resolution video decoder according to a predetermined condition. And a switching means for providing the digital broadcast receiving apparatus.

  According to a second aspect of the present invention, there is provided a digital broadcast receiving apparatus for receiving and displaying a digital broadcast for broadcasting the same video at different resolutions, and demodulating a digital broadcast radio wave including a high resolution video and a low resolution video. Demodulating means for outputting TS (Transport Stream) packets including high-resolution video and TS packets including low-resolution video, and an internal counter operated by an internal clock generated from a PCR (Program Clock Reference) included in the TS packets. And decoding a TS packet including a low-resolution video to generate a low-resolution video frame, and based on a PTS (Presentation Time Stamp) stored in the TS packet in association with the generated low-resolution video frame When the difference between the PTS value and the internal counter value is within a predetermined value, the low-resolution video decoder that outputs the generated low-resolution video frame, the high-resolution video frame that shows the same content video, and the low-resolution The offset storage means for storing the offset value indicating the time difference of the display timing with the video frame and the TS packet including the high resolution video output from the demodulation means are received, the offset value is read from the delay control means, and the internal counter is Referring to, a high-resolution video buffer that outputs the received TS packet with a delay by an offset value, and a TS packet output from the high-resolution video buffer is decoded and associated with the high-resolution video frame and the high-resolution video frame Frame decoding means for outputting the generated PTS, and frame decoding means A frame buffer that stores the high-resolution video frame output in association with the PTS output from the frame decoding unit together with the high-resolution video frame, and a new high-resolution video frame stored in the frame buffer. The PTS stored together with the high-resolution video frame is read out, the offset value stored in the offset storage means is added to the read PTS, and the corresponding PTS in the frame buffer is changed with the PTS to which the offset value has been added. A frame output unit for outputting a high-resolution video frame associated with a PTS whose difference from the internal counter value is within a predetermined value based on the PTS stored in the frame buffer; The low resolution output by the low resolution video decoder To provide a digital broadcast receiving apparatus characterized by comprising a switching means for displaying on the display device either of the high resolution image frame output by the image frame and the frame output unit.

  According to a third aspect of the present invention, there is provided a digital broadcast receiving apparatus for receiving and displaying a digital broadcast for broadcasting the same video at different resolutions, and demodulating a digital broadcast radio wave including a high resolution video and a low resolution video. Demodulating means for outputting TS (Transport Stream) packets including high-resolution video and TS packets including low-resolution video, and an internal counter operated by an internal clock generated from a PCR (Program Clock Reference) included in the TS packets. And decoding a TS packet including a low-resolution video to generate a low-resolution video frame, and based on a PTS (Presentation Time Stamp) stored in the TS packet in association with the generated low-resolution video frame When the difference between the supplied counter value and the value of the PTS is within a predetermined value, a low-resolution video decoder that outputs the generated low-resolution video frame and a TS packet that includes the high-resolution video are decoded. A high-resolution video frame is generated, and the difference between the supplied counter value and the value of the PTS is within a predetermined value based on the PTS stored in the TS packet in association with the generated high-resolution video frame The high-resolution video decoder that outputs the generated high-resolution video frame, and an offset value that indicates the time difference between the display timings of the high-resolution video frame indicating the same content video and the low-resolution video frame. Of the resolution video decoder and low-resolution video decoder, the one that outputs the frame with the earlier display timing counts the internal counter. The delay control means supplies the value delayed by the offset value and supplies the counter value of the internal counter as it is to output the frame with the later display timing, and the low resolution video decoder according to a predetermined condition. There is provided a digital broadcast receiving apparatus comprising switching means for displaying on a display device either an output low-resolution video frame or a high-resolution video frame output by a high-resolution video decoder.

  According to the digital broadcast receiving apparatus of the present invention, it is possible to reduce a time lag when switching between a high-resolution video and a low-resolution video, and it is possible to reduce discomfort in display given to the viewer.

  Hereinafter, a first embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 shows an example of the configuration of a digital broadcast receiving system 10 according to the first embodiment of the present invention. The digital broadcast receiving system 10 includes an antenna 11, a display device 12, and a digital broadcast receiving device 20. The digital broadcast receiver 20 includes a demodulation unit 200, a switching determination unit 201, a separation processing unit 202, a clock synchronization unit 203, a low resolution video decoder 204, a TS buffer 205, an internal counter 206, a delay control unit 207, and a high resolution video decoder 208. And a switching unit 209.

  The demodulator 200 receives the digital broadcast radio wave transmitted from the digital broadcast relay station via the antenna 11. Then, the demodulator 200 demodulates the received signal and performs processes such as deinterleaving, descrambling, error detection / correction processing, and the like, and a TS (Transport Stream) packet including a high-resolution video and a TS including a low-resolution video. Output the packet.

  Further, the demodulator 200 generates a value indicating the reception quality of the digital broadcast signal received via the antenna 11 and sends the value to the switching determination unit 201. The value indicating the reception quality is, for example, the received electric field strength of the currently received digital broadcasting radio wave, the CNR (Carrier to Noise ratio) of the digital broadcasting radio wave, or the bit error rate. For example, when the value indicating the reception quality is a high value, the reception state of the digital broadcast signal is good.

  The demodulator 200 includes, for example, a tuner circuit and an OFDM receiver circuit. The demodulator 200 according to the present embodiment includes one tuner circuit and one OFDM receiver circuit. As another embodiment, the demodulator 200 may have a diversity reception function including a plurality of tuner circuits and a plurality of OFDM reception circuits.

  Based on the ID (PID) stored in the header information of the TS packet output from the demodulation unit 200, the separation processing unit 202, among the TS packets, includes a TS packet that includes a high-resolution video and a TS that includes a low-resolution video. The packets are separated, and TS packets including high-resolution video are supplied to the TS buffer 205, and TS packets including low-resolution video are supplied to the low-resolution video decoder 204, respectively. Further, the separation processing unit 202 supplies the TS packet output from the demodulation unit 200 to the clock synchronization unit 203.

  Based on a PCR (Program Clock Reference) stored in each TS packet, the clock synchronization unit 203 generates a 27 MHz internal clock synchronized with the PCR. The internal counter 206 is a counter that operates in synchronization with the internal clock generated by the clock synchronization unit 203, and supplies the generated internal counter value to the low-resolution video decoder 204, the TS buffer 205, and the delay control unit 207.

  In the present embodiment, the clock synchronization unit 203 generates an internal clock based on the PCR associated with the high resolution video. As another embodiment, an internal clock may be generated based on a PCR associated with a low resolution video.

  The delay control unit 207 holds the same content, that is, the value of the offset (Td) indicating the time difference between the display timings of the high-resolution video frame and the low-resolution video frame that are different in resolution but substantially the same image. The offset value is notified to the TS buffer 205. Also, the delay control unit 207 rewrites the internal counter value generated by the internal counter 206 with a value delayed by the offset value and supplies the rewritten value to the high-resolution video decoder 208. In the present embodiment, it is assumed that the delay control unit 207 holds a preset offset value.

  When the TS buffer 205 receives a TS packet including a high-resolution video from the separation processing unit 202, the TS buffer 205 delays the received TS packet by the offset value received from the delay control unit 207 and outputs the delayed TS packet to the high-resolution video decoder 208. To do. The TS buffer 205 refers to, for example, the internal counter value supplied from the internal counter 206, identifies the internal counter value at the time when the TS packet is received, and sets the identified internal counter value from the delay control unit 207. A new internal counter value is calculated by adding the acquired offset value. When the internal counter value received from the internal counter 206 matches the calculated new internal counter value, the TS buffer 205 outputs the held TS packet to the high resolution video decoder 208.

Note that the capacity S (bits) of the TS buffer 205 is determined so as to satisfy the following conditions, for example, using the offset Td (sec) and the data rate R (bit / sec) of the high-resolution video stream. Is preferred.
S ≧ Td × R

  The high resolution video decoder 208 connects the TS packets output from the TS buffer 205 to construct a video PES (Packetized Elementary Stream), and generates a high resolution video frame from the constructed video PES. The high-resolution video decoder 208 constructs an audio PES from TS packets including audio data corresponding to the high-resolution video, and generates audio data from the constructed audio PES. Further, the high resolution video decoder 208 extracts a PTS (Presentation Time Stamp) corresponding to the generated high resolution video frame and audio data from the constructed PES.

  Then, the high resolution video decoder 208 compares the extracted PTS with the internal counter value supplied from the delay control unit 207 and delayed by the offset value. When the difference between the extracted PTS value and the internal counter value delayed by the offset value is within a predetermined value, the high resolution video decoder 208 sends the generated high resolution video frame and audio data to the switching unit 209. Output.

  The low resolution video decoder 204 constructs a video PES by connecting TS packets including the low resolution video supplied from the separation processing unit 202, and generates a low resolution video frame from the constructed video PES. The low resolution video decoder 204 constructs an audio PES from TS packets including audio data corresponding to the low resolution video, and generates audio data from the constructed audio PES. Further, the low resolution video decoder 204 extracts a PTS corresponding to the generated low resolution video frame and audio data from the constructed PES.

  Then, the low-resolution video decoder 204 compares the extracted PTS with the internal counter value supplied from the internal counter 206, and generates when the difference between the PTS value and the internal counter value is within a predetermined value. The low-resolution video frame and audio data thus output are output to the switching unit 209. In the present embodiment, the PTS value of the high-resolution video frame is broadcast with the display timing set to a value that precedes the PTS value of the low-resolution video frame. To do.

  The switching determination unit 201 instructs the switching unit 209 to display a high-resolution video frame on the display device 12 when the reception quality of the digital broadcast signal is equal to or higher than a predetermined threshold. In addition, the switching determination unit 201 instructs the switching unit 209 to display the low-resolution video frame on the display device 12 when the reception quality is less than the threshold value.

  When the switching determination unit 201 is instructed to display the high resolution video frame on the display device 12, the switching unit 209 displays the high resolution video frame output from the high resolution video decoder 208 on the display device 12, and Audio data corresponding to the high-resolution video frame is output to an audio output device (not shown). When the switching determination unit 201 instructs the display device 12 to display the low resolution video frame, the switching unit 209 displays the low resolution video frame output from the low resolution video decoder 204 on the display device 12. At the same time, audio data corresponding to the low-resolution video frame is output to an audio output device (not shown).

  As described above, when the reception quality of the digital broadcasting radio wave is better than the predetermined quality, the high-resolution video frame is displayed, and when the reception quality of the digital broadcasting signal is worse than the predetermined quality, the low-resolution video frame is displayed. As a result, the digital broadcast receiving apparatus 20 can continue to display programs broadcast by simulcast even if the reception quality varies.

  However, the high-resolution video frame and the low-resolution video frame that are different in resolution but are substantially the same image are not necessarily associated with the PTS having the same value. Therefore, if the digital broadcast receiving apparatus 20 performs only the process of switching the frame to be displayed according to the reception quality, the continuity of the program content is lost and the viewer may feel uncomfortable.

  On the other hand, the digital broadcast receiving apparatus 20 according to the present embodiment replaces a frame whose display timing is earlier in time among the high-resolution video frame and the low-resolution video frame having the same contents, and an offset value that is a time difference between both frames. By delaying by a minute, it is possible to maintain the continuity of the program when switching between a high-resolution video frame and a low-resolution video frame. Therefore, the digital broadcast receiving apparatus 20 of the present embodiment can continue to properly display programs broadcast by simulcast even if the reception quality varies.

  In addition, when the display timing delays the previous frame with respect to time, the digital broadcast receiving apparatus 20 needs to hold the data of the previous frame with the display timing for a period corresponding to the offset value. In particular, as in this embodiment, when the display timing of a high-resolution video frame is earlier in time, the amount of data to be stored in the buffer may be enormous. On the other hand, the digital broadcast receiving apparatus 20 of the present embodiment holds the data of the frame whose display timing is earlier in the state of the TS packet before being developed into the video frame. As a result, the required storage capacity can be reduced, the digital broadcast receiving apparatus 20 can be reduced in size, and the component cost for the digital broadcast receiving apparatus 20 can be kept low.

  The switching unit 209 is configured to display the frame output from the low resolution video decoder 204 on the display device 12 while displaying the frame output from the high resolution video decoder 208 on the display device 12. When instructed from 201, the frame displayed on the display device 12 is switched to the frame output from the low-resolution video decoder 204 at the time when the time corresponding to the offset value has elapsed since the time when the instruction was received. When the switching determination unit 201 instructs the display device 12 to display the frame output from the high-resolution video decoder 208 while the frame output from the low-resolution video decoder 204 is displayed on the display device 12. The time corresponding to the offset value has elapsed since the time the instruction was accepted In time, it may be switched to a frame outputted frame to be displayed on the display device 12 from the high-resolution video decoder 208.

  2 and 3 are conceptual diagrams for explaining a display timing shift between a high-resolution video frame and a low-resolution video frame showing the same content. This figure shows an example in which the frame rate of the low-resolution video frame is half the frame rate of the high-resolution video frame. Further, in the drawing, an example is shown in which the display timing of the high-resolution video frame is temporally ahead of the display timing of the low-resolution video frame.

  As shown in FIG. 2, the PTS is set such that the display timing is 300 to 304 for the high resolution video frame, and the display timing is 310 to 314 for the low resolution video frame. PTS is set. The time difference in display timing between the high-resolution video frame 300 and the low-resolution video frame 310 that are the same image with different resolutions is an offset Td. Similarly, the time difference in display timing between the high resolution video frame 302 and the low resolution video frame 312 and between the high resolution video frame 304 and the low resolution video frame 314 is also an offset Td.

  The TS buffer 205 delays the received TS packet including the high-resolution video by the offset Td. However, since the PTS value associated with the high-resolution video frame does not change only by delaying, the high-resolution video frame generated based on the TS packet output from the TS buffer 205 and The audio data is discarded without being output from the high resolution video decoder 208.

  Therefore, the delay control unit 207 rewrites and supplies the internal clock supplied to the high resolution video decoder 208 to a value delayed by the offset Td. As a result, the high-resolution video decoder 208 outputs the high-resolution video frame generated based on the TS packet delayed by the TS buffer 205 at a time delayed by the offset Td from the display timing specified by the PTS. be able to.

  Thereby, as shown in FIG. 3, the switching unit 209 has a high-resolution video frame 300 and a low-resolution video frame 310, which have different resolutions but the same image, a high-resolution video frame 302 and a low-resolution video frame 312, and The high resolution video frame 304 and the low resolution video frame 314 can be received at substantially the same timing. Therefore, the digital broadcast receiving apparatus 20 can appropriately maintain the continuity of the program when the high resolution video frame and the low resolution video frame are switched.

  The first embodiment of the present invention has been described above.

  As is clear from the above description, according to the digital broadcast receiver 20 of the present invention, the time lag when switching between the high resolution video frame and the low resolution video frame can be reduced, and the display given to the viewer The above uncomfortable feeling can be reduced.

  In addition, this invention is not limited to said embodiment, Many deformation | transformation are possible within the range of the summary.

  The second embodiment of the present invention will be described below.

  FIG. 4 shows an example of the configuration of a digital broadcast receiving system 10 according to the second embodiment of the present invention. Except for the points described below, in FIG. 4, the components denoted by the same reference numerals as those in FIG. 1 have the same or similar functions and configurations as those in FIG.

  The digital broadcast receiving apparatus 20 further includes an offset table 210. The offset table 210 stores an offset value, which is a time difference between a high-resolution video frame and a low-resolution video frame having the same content, in association with identification information of a broadcaster that provides digital broadcasting.

  Based on the ID (PID) stored in the header information of the TS packet output from the demodulation unit 200, the separation processing unit 202 further extracts a TS packet including a BIT (Broadcaster Information Table) from the TS packet. To the delay control unit 207.

  The delay control unit 207 extracts the BIT from the TS packet supplied from the separation processing unit 202, and extracts the identification information of the broadcaster of the digital broadcast currently received from the extracted BIT. Then, the delay control unit 207 refers to the offset table 210 and acquires an offset value corresponding to the extracted broadcaster identification information.

  Different broadcasters may have different devices used for broadcasting and PTS allocation rules. On the other hand, the digital broadcast receiving apparatus 20 of the present embodiment stores the offset value for each broadcaster in advance, and uses the corresponding offset value when actually receiving the digital broadcast to display the display timing. Delays the previous frame in time. As a result, the digital broadcast receiving apparatus 20 of the present embodiment can accurately correct a time lag when switching between a high-resolution video frame and a low-resolution video frame even when the broadcasters are different. it can.

  FIG. 5 shows an example of the structure of data stored in the offset table 210. The offset table 210 stores the offset value 2101 in association with a broadcaster ID 2100 that identifies each broadcaster. By referring to the offset table 210, the delay control unit 207 can obtain an offset value corresponding to the broadcaster of the digital broadcast currently being received.

  As another example, the offset table 210 may store an offset value for each program in the same broadcaster. As a result, by performing real-time encoding on the broadcast station side, live broadcasts that cause display timing shifts due to differences in processing delay between high-resolution video and low-resolution video, and pre-encoded video streams are broadcast. Even when the amount of deviation in display timing varies depending on the recorded broadcast or the like, the digital broadcast receiver 20 can appropriately correct the deviation.

  The second embodiment of the present invention has been described above.

  Next, a third embodiment of the present invention will be described.

  FIG. 6 shows an example of the configuration of a digital broadcast receiving system 10 according to the third embodiment of the present invention. Except for the points described below, in FIG. 6, the components denoted by the same reference numerals as those in FIG. 4 have the same or similar functions and configurations as those in FIG.

  The digital broadcast receiving system 10 further includes a remote controller 13. The remote controller 13 is configured as shown in FIG. 7, for example, and includes a − button 130, a + button 131, a start button 132, and an end button 133. When the start button 132 is pressed, the remote controller 13 notifies the digital broadcast receiver 20 of an instruction to start an offset adjustment process for adjusting the offset value using wireless communication such as infrared rays or radio waves.

  When the + button 131 or the − button 130 is pressed, the remote controller 13 notifies the digital broadcast receiving device 20 of an instruction to increase or decrease the offset value using wireless communication. When the end button 133 is pressed, the remote controller 13 notifies the digital broadcast receiving apparatus 20 of an instruction to end the offset adjustment process using wireless communication.

  The digital broadcast receiving apparatus 20 further includes a receiving unit 211. The receiving unit 211 receives an instruction from the user from the remote controller 13 using wireless communication, and sends the received instruction to the delay control unit 207.

  When the delay control unit 207 receives an instruction to start offset adjustment processing via the reception unit 211, the delay control unit 207 reads the offset value corresponding to the currently received digital broadcaster from the offset table 210 and reads the read offset. Based on the values, the TS buffer 205 and the high resolution video decoder 208 are controlled to delay the high resolution video frame.

  Then, the delay control unit 207 instructs the switching unit 209 to display the high resolution video frame output from the high resolution video decoder 208 and the low resolution video frame output from the low resolution video decoder 204, respectively. As shown in FIG. 8, it is displayed in each of the divided areas.

  As shown in FIG. 8, on the screen 40, a high-resolution video frame display area 41 in which a high-resolution video frame output from the high-resolution video decoder 208 is displayed, and a low-resolution video frame output from the low-resolution video decoder 204 is displayed. Is displayed, and an offset adjustment amount display region 43 indicating the adjustment amount of the offset value is displayed. The offset adjustment amount display area 43 displays a scale 44 that is the position of the offset value before adjustment and an adjustment amount indicator 45 that indicates the position of the offset value after adjustment.

  When receiving an instruction to increase or decrease the offset value via the reception unit 211, the delay control unit 207 sends the current value to the TS buffer 205 and the high-resolution video decoder 208 according to the received instruction. The offset value is adjusted by increasing or decreasing the applied offset value by a predetermined amount. Based on the adjusted offset value, the TS buffer 205 and the high-resolution video decoder 208 are controlled, and the high-resolution video frame is adjusted. Delay.

  When an instruction to end the offset adjustment process is received via the reception unit 211, the delay control unit 207 uses the offset value adjusted immediately before to offset the offset corresponding to the currently received digital broadcaster. The offset value stored in the table 210 is updated.

  Note that during the offset value adjustment processing, the switching unit 209 preferably reproduces the audio associated with each of the high resolution video frame and the low resolution video frame via an audio output device (not shown). This allows the user to adjust the display timing shift between the high resolution video frame and the low resolution video frame while listening to the audio associated with each of the high resolution video frame and the low resolution video frame. A shift in display timing between the resolution video frame and the low resolution video frame can be corrected with higher accuracy.

  FIG. 9 is a flowchart showing an example of the operation of the digital broadcast receiving apparatus 20 according to the third embodiment. For example, by starting reception of digital broadcast, the digital broadcast receiving apparatus 20 starts the processing shown in this flowchart.

  First, the digital broadcast receiving apparatus 20 operates in the normal operation mode (S100). In the normal operation mode, the low-resolution video decoder 204 generates a low-resolution video frame from the TS packet and outputs it to the switching unit 209, and the high-resolution video decoder 208 outputs the high-resolution video frame to the switching unit 209 for switching. The unit 209 performs a process of switching the video frame to be displayed on the display device 12 between the high resolution video frame and the low resolution video frame according to the instruction of the switching determination unit 201.

  Next, the delay control unit 207 determines whether or not the start button 132 of the remote controller 13 has been pressed via the reception unit 211 (S101). If the start button 132 has not been pressed (S101: No), the delay control unit 207 repeats step 101 until the start button 132 is pressed.

  When the start button 132 is pressed (S101: Yes), the delay control unit 207 shifts to the offset value adjustment mode (S102). In step 102, the delay control unit 207 instructs the switching unit 209 to display each of the high resolution video frame output from the high resolution video decoder 208 and the low resolution video frame output from the low resolution video decoder 204. As shown in FIG. 8, it is displayed in each area obtained by dividing the screen of the apparatus 12.

  Then, the delay control unit 207 determines whether the + button 131 or the − button 130 is pressed (S103). If not pressed (S103: No), the delay control unit 207 performs the process shown in step 107. When the + button 131 or the − button 130 is pressed (S103: Yes), if the + button 131 is pressed (S104: Yes), the delay control unit 207 sets the current offset value by a predetermined amount. A new increased offset value is calculated, and the high-resolution video frame is delayed using the calculated offset value (S105).

  If the pressed button is the-button 130 (S104: No), the delay control unit 207 calculates a new offset value by reducing the current offset value by a predetermined amount, and uses the calculated offset value to increase the value. The resolution video frame is delayed (S106). Then, the delay control unit 207 determines whether or not the end button 133 has been pressed (S107). When the end button 133 has not been pressed (S107: No), the delay control unit 207 performs the process shown in step 103 again.

  When the end button 133 is pressed (S107: Yes), the delay control unit 207 performs a transition process to the normal operation mode (S108), and the digital broadcast receiving apparatus 20 performs the process shown in step 100 again. In step 108, the delay control unit 207 updates the offset value stored in the offset table 210 in association with the currently received digital broadcaster with the offset value adjusted immediately before, a switching unit In response to the instruction from the switching determination unit 201, the display device 12 displays either the high resolution video frame output by the high resolution video decoder 208 or the low resolution video frame output by the low resolution video decoder 204. Perform processing.

  Heretofore, the third embodiment of the present invention has been described.

  Next, a fourth embodiment of the present invention will be described.

  FIG. 10 shows an example of the configuration of a digital broadcast receiving system 10 according to the fourth embodiment of the present invention. Except for the points described below, in FIG. 10, the components denoted by the same reference numerals as those in FIG. 1 have the same or similar functions and configurations as those in FIG.

  The digital broadcast receiving apparatus 20 includes a demodulation unit 200, a switching determination unit 201, a separation processing unit 202, a clock synchronization unit 203, a low resolution video decoder 204, a TS buffer 205, an internal counter 206, a switching unit 209, an offset value storage unit 220, A frame decoding unit 221, a PTS changing unit 222, a frame buffer 223, and a frame output unit 224 are included.

  The offset value storage unit 220 holds offset values of the high-resolution video frame and the low-resolution video frame having the same content, and notifies the TS buffer 205 of the offset value.

  The frame decoding unit 221 connects the TS packets output from the TS buffer 205 to construct a video PES, and generates a high-resolution video frame from the constructed video PES. In addition, the frame decoding unit 221 constructs an audio PES from TS packets including audio data corresponding to high-resolution video, and generates audio data from the constructed audio PES. Also, the frame decoding unit 221 extracts a PTS corresponding to the generated high-resolution video frame from the constructed PES, and stores the generated high-resolution video frame and audio data in the frame buffer 223 together with the extracted PTS.

  When a new high-resolution video frame is stored in the frame buffer 223, the PTS changing unit 222 reads the PTS stored together with the high-resolution video frame. Then, the PTS changing unit 222 reads the offset value from the offset value storage unit 220, and changes the PTS read from the frame buffer 223 to a value delayed by a time corresponding to the offset value read from the offset value storage unit 220. The corresponding PTS in the frame buffer 223 is updated with the changed PTS.

  The frame output unit 224, based on the PTS stored in the frame buffer 223, is a high-resolution video frame and audio data associated with a PTS whose difference from the internal counter value output from the internal counter 206 is within a predetermined value. Is output to the switching unit 209.

  Heretofore, the fourth embodiment of the present invention has been described.

  The present invention is not limited to the embodiment described above.

  For example, the correlation coefficient of an image between a high-resolution video frame and a low-resolution video frame is measured, and a frame with the correlation coefficient equal to or greater than a predetermined value is determined to be substantially the same image with different resolutions. A difference in display timing of video frames may be automatically stored as an offset value. In this case, the correlation coefficient of the image is also calculated for a combination of a plurality of other high resolution video frames and low resolution video frames having different display timings by the calculated offset value, and the calculated correlation coefficient is equal to or greater than a predetermined value. It is preferable to store the offset value after verifying that

  In the above-described embodiment, the case where the display timing of the high-resolution video frame is earlier in the high-resolution video frame and the low-resolution video frame having the same content has been described as an example. However, the present invention is not limited to this. Even when the display timing of the low-resolution video frame is earlier in time, the function of the present invention can be applied. In this case, the digital broadcast receiving apparatus 20 is provided with a buffer for delaying TS packets including low resolution video by a time corresponding to the offset value between the separation processing unit 202 and the low resolution video decoder 204, and a delay control unit. In 207, the internal clock delayed by the offset value is supplied to the low resolution video decoder 204.

  Further, in the above-described embodiment, an example has been described in which a video whose display timing is earlier in time is held as a TS packet, but the present invention is not limited to this. For example, when there is a margin in the memory, the digital broadcast receiving apparatus 20 has display timing in a block that generates a high-resolution video frame from a TS packet and a block that generates a low-resolution video frame from a TS packet. A clock obtained by delaying the internal clock by an offset value may be supplied to the one outputting the previous frame. Even in this way, the digital broadcast receiving apparatus 20 can delay the previous frame in display timing by an offset amount.

1 shows an example of the configuration of a digital broadcast receiving system 10 according to a first embodiment of the present invention. It is a conceptual diagram for demonstrating the shift | offset | difference of the display timing of the high resolution video frame which shows the same content, and a low resolution video frame. It is a conceptual diagram for demonstrating the shift | offset | difference of the display timing of the high resolution video frame which shows the same content, and a low resolution video frame. 2 shows an exemplary configuration of a digital broadcast receiving system 10 according to a second embodiment of the present invention. An example of the structure of the data stored in the offset table 210 is shown. An example of the structure of the digital broadcast receiving system 10 which concerns on the 3rd Embodiment of this invention is shown. An example of the configuration of the remote controller 13 is shown. An example of the screen 40 displayed on the display device 12 when the offset adjustment is performed is shown. It is a flowchart which shows an example of operation | movement of the digital broadcast receiver 20 which concerns on 3rd Embodiment. An example of the structure of the digital broadcast receiving system 10 which concerns on the 4th Embodiment of this invention is shown.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Digital broadcast receiving system, 11 ... Antenna, 12 ... Display device, 13 ... Remote control, 130 ...-button, 131 ... + button, 132 ... Start button, 133 ... End button, 20 ... Digital broadcast receiver, 200 ... Demodulation unit, 201 ... Switch determination unit, 202 ... Separation processing unit, 203 ... Clock synchronization unit, 204 ... Low resolution video decoder, 205 ... TS buffer, 206 ... internal counter, 207 ... delay control unit, 208 ... high resolution video decoder, 209 ... switching unit, 210 ... offset table, 2100 ... Broadcaster ID, 2101 ... Offset value, 211 ... Receiving unit, 220 ... Offset value storage unit, 221 ... Frame decoding unit, 222 ... PTS change unit, 223 ... frame buffer, 224 ... frame output unit, 300, 301, 302, 303, 304 ... high resolution video frame, 310, 312, 314 ... low resolution video frame, 40 ... Screen, 41 ... High-resolution video frame display area, 42 ... Low-resolution video frame display area, 43 ... Offset adjustment amount display area, 44 ... Scale, 45 ... Adjustment amount indicator

Claims (6)

A digital broadcast receiver for receiving and displaying a digital broadcast that broadcasts the same video at different resolutions,
Demodulating means for demodulating digital broadcast radio waves including high-resolution video and low-resolution video, and outputting TS (Transport Stream) packets including high-resolution video and TS packets including low-resolution video;
An internal counter operated by an internal clock generated from a PCR (Program Clock Reference) included in the TS packet;
A high-resolution video counter value obtained by delaying the counter value of the internal counter by the offset value based on an offset value indicating a time difference between display timings of the high-resolution video frame and the low-resolution video frame indicating the same content video Delay control means for generating
Based on a PTS (Presentation Time Stamp) stored in the TS packet in association with the generated low resolution video frame, the TS packet including the low resolution video is decoded to generate a low resolution video frame. A low-resolution video decoder that outputs a generated low-resolution video frame when a difference between the PTS value and the internal counter value is within a predetermined value;
The TS packet including the high-resolution video output from the demodulating unit is received, the offset value is received from the delay control unit, and the received TS packet is delayed by the offset value with reference to the internal counter. A high-resolution video buffer to output,
The TS packet output from the high-resolution video buffer is decoded to generate a high-resolution video frame, and based on the PTS stored in the TS packet in association with the generated high-resolution video frame, the PTS A high-resolution video decoder that outputs a generated high-resolution video frame when a difference between the value of the high-resolution video counter value is within a predetermined value;
Switching means for displaying either the low resolution video frame output by the low resolution video decoder or the high resolution video frame output by the high resolution video decoder on a display device according to a predetermined condition; A digital broadcast receiving apparatus comprising: The digital broadcast receiver according to claim 1,
An offset table that stores the offset value for each broadcaster that provides digital broadcasting;
The delay control means includes
By referring to a BIT (Broadcaster Information Table) included in any one of the TS packets demodulated by the demodulating means, a broadcaster of the digital broadcast currently being received is identified, and an offset corresponding to the identified broadcaster A digital broadcast receiving apparatus, wherein a value is extracted from the offset table, and the high-resolution video counter value is generated based on the extracted offset value. The digital broadcast receiving apparatus according to claim 2,
Instructions for starting and ending the offset value adjustment process, and input means for receiving an adjustment amount of the offset value,
The delay control means includes
When receiving an instruction to start the adjustment process via the input means, the high resolution video frame is delayed based on an offset value corresponding to a broadcaster of the digital broadcast currently being received, and the switching means And displaying each of the high-resolution video frame and the low-resolution video frame in respective areas obtained by dividing the screen of the display device,
When the offset adjustment amount is received via the input unit, the offset value currently applied is adjusted according to the received adjustment amount, and the high-resolution video frame is delayed based on the adjusted offset value. ,
When the adjustment processing end instruction is received via the input means, the offset value adjusted immediately before is stored in the offset table in association with the currently received digital broadcaster. A digital broadcast receiver characterized by updating a value. The digital broadcast receiver according to claim 3,
The switching means is
When displaying the high-resolution video frame on the display device, the audio output device outputs audio associated with the high-resolution video frame,
When displaying the low-resolution video frame on the display device, the audio associated with the low-resolution video frame is output from the audio output device,
During the adjustment process of the offset value, when the delay control unit instructs to display each of the high resolution video frame and the low resolution video frame by dividing the screen, the high resolution video frame and the low resolution video frame are displayed. Each of the low-resolution video frames is displayed in each area obtained by dividing the screen of the display device, and the audio associated with the high-resolution video frame and the audio associated with the low-resolution video frame are displayed as the sound. A digital broadcast receiver characterized by outputting to an output device. A digital broadcast receiver for receiving and displaying a digital broadcast that broadcasts the same video at different resolutions,
Demodulating means for demodulating digital broadcast radio waves including high-resolution video and low-resolution video, and outputting TS (Transport Stream) packets including high-resolution video and TS packets including low-resolution video;
An internal counter operated by an internal clock generated from a PCR (Program Clock Reference) included in the TS packet;
Based on a PTS (Presentation Time Stamp) stored in the TS packet in association with the generated low-resolution video frame, the TS packet including the low-resolution video is decoded to generate a low-resolution video frame. A low-resolution video decoder that outputs a generated low-resolution video frame when a difference between the PTS value and the internal counter value is within a predetermined value;
Offset storage means for storing an offset value indicating a time difference between display timings of the high-resolution video frame and the low-resolution video frame indicating the same content video;
The TS packet including the high-resolution video output from the demodulating unit is received, the offset value is read from the delay control unit, and the received TS packet is delayed by the offset value with reference to the internal counter. A high-resolution video buffer to output,
Frame decoding means for decoding TS packets output from the high resolution video buffer and outputting a high resolution video frame and a PTS associated with the high resolution video frame;
A frame buffer for storing the high resolution video frame output by the frame decoding means in association with the PTS output from the frame decoding means together with the high resolution video frame;
When a new high-resolution video frame is stored in the frame buffer, the PTS stored together with the high-resolution video frame is read, and the offset value stored in the offset storage unit is added to the read PTS, and the offset PTS changing means for changing the corresponding PTS in the frame buffer with the added PTS;
Based on a PTS stored in the frame buffer, a frame output means for outputting a high-resolution video frame associated with a PTS whose difference from the internal counter value is within a predetermined value, and in accordance with a predetermined condition, And a switching means for displaying on the display device either the low resolution video frame output by the low resolution video decoder or the high resolution video frame output by the frame output means. Receiver device. A digital broadcast receiver for receiving and displaying a digital broadcast that broadcasts the same video at different resolutions,
Demodulating means for demodulating digital broadcast radio waves including high-resolution video and low-resolution video, and outputting TS (Transport Stream) packets including high-resolution video and TS packets including low-resolution video;
An internal counter operated by an internal clock generated from a PCR (Program Clock Reference) included in the TS packet;
Based on a PTS (Presentation Time Stamp) stored in the TS packet in association with the generated low-resolution video frame, the TS packet including the low-resolution video is decoded to generate a low-resolution video frame. A low-resolution video decoder that outputs a generated low-resolution video frame when a difference between the supplied counter value and the value of the PTS is within a predetermined value;
The TS packet including the high-resolution video is decoded to generate a high-resolution video frame, and the counter value supplied based on the PTS stored in the TS packet in association with the generated high-resolution video frame A high-resolution video decoder that outputs a generated high-resolution video frame when a difference between the value and the PTS value is within a predetermined value;
Based on the offset value indicating the time difference between the display timings of the high-resolution video frame and the low-resolution video frame indicating the same content video, the earlier of the display timing of the high-resolution video decoder and the low-resolution video decoder The delay control means for supplying the counter value of the internal counter to the one that outputs the frame at a later time by the offset value and supplying the counter value of the internal counter as it is to the one that outputs the frame with the later display timing When,
Switching means for displaying either the low resolution video frame output by the low resolution video decoder or the high resolution video frame output by the high resolution video decoder on a display device according to a predetermined condition; A digital broadcast receiving apparatus comprising:

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