JP2007037051A - Imaging apparatus and control method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce capacity of memory required to generate a compensating image signal from the main image signal and the black image signal and assure that the band of data bus connected with the memory becomes the band required for compensating process in the case where the image signal is outputted via a plurality of channels. <P>SOLUTION: The imaging apparatus comprises CCDs (141 to 143) for outputting the generated image signal via a plurality of channels, a shutter (151), a CPU (102) for outputting in parallel the main image signal generated by the CCD under the exposure condition from a plurality of channels and controlling the black image signal generated by the CCD under the light shielding condition to be outputted from the CCD on the time division basis among a plurality of channels, a RAM (115) for storing in parallel the main image signal, and an arithmetic means for obtaining the compensating image signal on the basis of the main image signal stored in the RAM and black image signal. The corresponding compensating image signal is stored in the RAM region storing the main image signal. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an imaging apparatus and a control method thereof, and more particularly to a technique for correcting solid pattern noise of an imaging element of the imaging apparatus.

  In general, an imaging device such as a digital camera drives an imaging device such as a CCD or CMOS to convert an object image incident on a light receiving surface via a lens into an electrical signal, and stores the obtained image signal in a memory. Record on a recording medium such as a card. A mechanical shutter is provided between the light receiving surface of the image sensor and the lens, and the light receiving surface is brought into an exposure state or a light shielding state by controlling the open / close state of the mechanical shutter. In particular, when shooting in a dark scene, the mechanical shutter may be kept open for a relatively long time to ensure the amount of light, and charge accumulated in the image sensor may be secured. However, if exposure is performed for a long time, the influence of high-speed pulses generated around the image sensor and noise (hereinafter, fixed pattern noise) generated due to the structure of the image sensor becomes very large.

  Therefore, the conventional digital camera performs the following correction processing in order to remove fixed pattern noise included in the image signal (see, for example, Patent Document 1). That is, when the user presses the shutter button, first, an image signal (hereinafter referred to as “main image signal”) is acquired from the image sensor in an exposure state in which the mechanical shutter is opened, and stored in the memory. Thereafter, charges are accumulated by the image sensor for the same time as the main image signal in the light-shielded state with the mechanical shutter closed, and an image signal (hereinafter referred to as “black image signal”) is obtained and stored in the memory. Thereafter, the main image signal and the black image signal are read from the memory, the black image signal is subtracted from the main image signal, and the obtained corrected image signal is stored in the memory.

Japanese Patent Laid-Open No. 2005-020593

  However, in the conventional digital camera that performs the correction process, the main image signal and the black image signal are stored in the memory, so that a larger memory area is required compared to a digital camera that does not perform the correction process. In particular, in recent years, since the number of pixels of an image sensor has been increased, if a memory area is divided to store a black image signal, other functions such as continuous shooting using a large number of memory areas may be limited. There is sex.

  Therefore, it is conceivable to acquire the black image signal from the image sensor and simultaneously read the main image signal stored in the memory, subtract the black image signal from the main image signal, and store the obtained corrected image signal in the memory. It is done.

  However, in this case, since it is necessary to read the main image signal from the memory and store the corrected image signal in synchronization with the process of acquiring the black image signal from the image sensor, The amount of data transfer becomes very large. As described above, since the number of pixels in the image sensor is increasing, the data amount of the image signal tends to increase, and such correction processing may not be realized depending on the bandwidth of the data bus to which the memory is connected.

  In particular, in an image pickup apparatus including a plurality of image pickup elements such as a 3CCD digital camera, the amount of image signal data is further increased, so that it is difficult to realize such correction processing.

  The present invention has been made in view of the above problems, and is necessary for generating a corrected image signal from a main image signal and a black image signal in an imaging apparatus in which an image sensor outputs an image signal via a plurality of channels. An object of the present invention is to reduce the capacity of the memory and to ensure that the bandwidth of the data bus to which the memory is connected becomes a bandwidth necessary for the correction processing.

  In order to achieve the above object, an imaging apparatus according to the present invention includes an imaging unit that photoelectrically converts an optical image of an incident subject to generate an image signal, and outputs the generated image signal through a plurality of channels; A shutter unit that switches a light receiving surface of the imaging unit to an exposure state or a light shielding state; and a first image signal generated by the imaging unit in an exposure state by the shutter unit is output in parallel from the plurality of channels; Control means for controlling the second image signal generated by the imaging means in a light-shielded state by the means to be output from the imaging means in a time-sharing manner among the plurality of channels, and the first image signal in parallel. Storage means, and a calculation means for obtaining a third image signal based on the first image signal and the second image signal stored in the storage means, A region for storing the first image signal memory means, stores the third image signals corresponding.

  In addition, an optical image of an incident subject is photoelectrically converted to generate an image signal, and the generated image signal is output via a plurality of channels, and a light receiving surface of the imaging unit is switched between an exposure state and a light shielding state. The control method of the present invention for an image pickup apparatus having shutter means and storage means capable of storing image signals output in parallel from the plurality of channels in parallel is generated by the image pickup means in an exposure state by the shutter means. A first output step for outputting the first image signal to be output from the plurality of channels in parallel, and a first output step for storing the first image signal output in the first output step in parallel. A second step of storing the second image signal generated by the imaging means in a light-shielded state by the shutter means and outputting from the imaging means in a time division manner among the plurality of channels; Obtaining a third image signal based on the output step, the first image signal stored in the first storage step, and the second image signal output in the second output step And a second storage step of storing the corresponding third image signal in the area of the storage means storing the first image signal.

  According to another configuration, the imaging apparatus of the present invention photoelectrically converts an optical image of an incident subject to generate an image signal, and outputs the generated image signal in parallel via a plurality of channels. A first image signal obtained from the imaging means in any one of an exposure state or a light shielding state by the shutter means, a shutter means for switching the light receiving surface of the imaging means to an exposure state or a light shielding state, Obtained from the imaging means in a plurality of storage means for storing in parallel via a plurality of buses, a first image signal stored in the storage means, and an exposure state or a light shielding state by the shutter means. Calculation means for obtaining a third image signal based on the second image signal, and the third image corresponding to the area of the storage means storing the first image signal. And stores the issue.

  In addition, an optical image of an incident subject is photoelectrically converted to generate an image signal, and the generated image signal is output in parallel via a plurality of channels, and a light receiving surface of the imaging unit is exposed or shielded. The control method of the present invention for an imaging apparatus having shutter means for switching to a state and a plurality of storage means capable of storing image signals output in parallel from the plurality of channels in parallel via a plurality of buses, A first output step for outputting, in parallel from the plurality of channels, a first image signal generated by the imaging unit in either one of an exposure state or a light shielding state by the shutter unit; A first storage step for storing the first image signal output in the output step in parallel in a plurality of storage means via a plurality of buses; and exposure by the shutter means A second output step for outputting the second image signal generated by the imaging means in parallel from the plurality of channels in the other state of the state or the light-shielding state, and the first stored in the first storage step A calculation step of obtaining a third image signal based on the first image signal and the second image signal output in the second output step; and storing the first image signal of the storage means And a second storage step for storing the corresponding third image signal in the area.

  According to the present invention, in an image pickup apparatus in which an image pickup device outputs an image signal via a plurality of channels, the memory capacity required for generating a corrected image signal from the main image signal and the black image signal is reduced. It is possible to ensure that the bandwidth of the data bus to which the memory is connected is the bandwidth required for the correction process.

  The best mode for carrying out the present invention will be described below in detail with reference to the accompanying drawings.

<First Embodiment>
In the first embodiment, an image pickup apparatus typified by a digital camera including a 3CCD image pickup device will be described. This image pickup apparatus has a configuration in which after acquiring image signals of three channels at the same time, correction processing for fixed pattern noise is performed in a time division manner for each channel and the corrected image signal is stored in a memory. In the following description, it is assumed that the imaging device is a CCD. However, in addition to the CCD image sensor, a MOS image sensor, a CdS-Se contact image sensor, an a-Si (amorphous silicon) contact image sensor, a bipolar contact sensor. There are type image sensors, and any of them may be used.

  FIG. 1 is a block diagram illustrating a configuration of the imaging apparatus 100 according to the first embodiment.

  In the imaging apparatus 100, a CPU 102 is connected to a RAM 103, a ROM 104, a key operation processing unit (KEY) 105, an input image processing engine (INPUT) 111, and an output image processing engine (OUTPUT) 121 via a bus 101. Yes. Further, it is also connected to a lens control unit (LENS) 140 and three analog front ends (AFE) 144 to 146. The CPU 102 operates based on a control program stored in the ROM 104, and uses the RAM 103 as a temporary information storage location during operation.

  Although not shown, the image recording apparatus 100 has operation keys such as a mode dial, a shutter button, and a cross key. The key operation state of the user is held by the key operation processing unit 105. The control program of the CPU 102 periodically acquires the operation state of the operation key from the key operation processing unit 105. Then, the control program of the CPU 102 controls the lens control unit 140, the AFEs 144 to 146, the input image processing engine 111, and the output image processing engine 121 based on the acquired operation state of the operation keys, and a still image to be described later. Perform the recording process. Note that these controls are performed in synchronization with interruptions of a certain period from the input image processing engine 111 described later.

  The AFEs 144 to 146 operate based on the control of the control program, and output R, G, and B channel image signals acquired by driving the CCDs 141 to 143 to the input image processing engine 111, respectively.

  The input image processing engine 111 is an ASIC (Application Specific IC) that operates based on control by the control program of the CPU 102. The input image processing engine 111 generates an HD (horizontal synchronization) signal and a VD (vertical synchronization) signal that are asserted at a constant period. When the VD signal is asserted, the input image processing engine 111 interrupts the CPU 102. Further, signal processing is performed on R, G, and B channel image signals input from the AFEs 144, 145, and 146. Here, two RAMs 114 and 115 are used as temporary image signal storage locations for signal processing.

  Then, the input image processing engine 111 outputs an output image signal obtained by performing signal processing to the output image processing engine 121. Further, the recorded image signal obtained by performing the signal processing is encoded by the JPEG codec 112 and written into a memory card set in a memory card slot (not shown) via the memory card control unit (CARD) 116.

  The output image processing engine 121 is an ASIC that operates based on control by the control program of the CPU 102, and performs signal processing on the image signal input from the input image processing engine 111. Here, the RAM 124 is used as a temporary image signal storage location for signal processing. An output image signal obtained by performing the signal processing is output from the LCD control unit 126 to an LCD screen (not shown) or output from the video output control unit 128 to a video output terminal (not shown). Further, the output image signal obtained by performing the signal processing is recorded on a magnetic tape (not shown) from the magnetic tape recording control unit (TAPE) 125 or converted into a predetermined communication format by the communication control unit (1394) 129. After that, it is output to a communication output terminal (not shown). Further, the sound generation control unit (SPEAKER) 127 performs sound reproduction when a warning sound is sounded from a speaker (not shown) or when sound is recorded together with an image signal.

  FIG. 2 is a block diagram showing the configuration of the optical system of the image recording apparatus 100. The subject image incident from the lens 150 is split into three primary colors R, G, and B by the prism 152, and the light receiving surfaces of the CCDs 141, 142, and 143 are exposed. A mechanical shutter 151 is provided between the prism 152 and the lens 150. When the control program of the CPU 102 controls the open / close state of the mechanical shutter 151 by the lens control unit 140, the light receiving surfaces of the CCDs 141, 142, and 143 are in an exposure state or a light shielding state.

  Next, the still image recording process performed by the input image processing engine 111 in the first embodiment of the present invention will be described.

  Note that the user can set the shutter speed at the time of recording a still image in advance by interactively operating the cross key by the menu display displayed on the LCD screen by the control program. The input shutter speed corresponds to the charge accumulation time (or the exposure time of the imaging device) in the CCDs 141 to 143. When the shutter speed is relatively slow (that is, the exposure time is long), correction processing is performed to correct high-speed pulses generated around the image sensor and noise generated due to the structure of the image sensor. On the other hand, when the shutter speed is relatively fast (that is, the exposure time is short), the influence of such noise is small, so that the correction process is not performed. The determination as to whether or not to perform the correction process is made based on the result of determining whether the shutter speed is longer or shorter than a predetermined time set in advance. The predetermined time serving as the determination reference is, for example, that of the CCDs 141 to 143. It can be appropriately changed depending on characteristics or the like.

[No correction]
First, the still image recording process in which the correction process is not performed in the image recording apparatus 100 having the above configuration will be described.

  When the user presses the shutter button while the mode dial of the image recording apparatus 100 selects the still image recording mode, the control program of the CPU 102 starts the still image recording process.

  FIG. 4 is a timing chart of a still image recording process in which no correction process is performed. When the correction process is not performed, the control methods of the three CCDs 141, 142, and 143 and the AFEs 144, 145, and 146 are the same, and FIG. 4 collectively describes signals related to these controls. The control program of the CPU 102 controls the AFEs 144 to 146 to send a SUB signal instructing resetting of the CCDs 141 to 143 and an SG signal instructing reading of charges accumulated in the CCDs 141 to 143 to the CCDs 141 to 143.

  When the CCDs 141 to 143 receive the SUB signal, the charges accumulated so far are cleared, and then the charges are accumulated in the period until the SG signal is received. Each of them is stored in a transmission path (not shown) inside 143. The electric charge stored in the transmission path is acquired as an image signal in synchronization with a horizontal synchronization (HD) signal and a vertical synchronization (VD) signal sent from the input image processing engine 111 via the AFEs 144 to 146, and in the AFEs 144 to 146. A / D converted and input to the input image processing engine 111.

Note that an image signal acquired before the user presses the shutter button is processed by the input image processing engine 111 as a preview image. Note that the processing content of the preview image is general and is different from the object of the present invention, so the description is omitted here. When the user presses the shutter button (t ₁₁ ), at the time (t ₁₃ ) when the next SG signal is sent, the charges accumulated in the CCDs 141 to 143 after the immediately preceding SUB signal is sent (t ₁₂ ) Stored in the transmission line. Accordingly, the timing of the SUB signal sent at t ₁₂ is such that the time (t _{12 to} t ₁₃ ) until the next SG signal is sent is a time corresponding to the above-described preset shutter speed. Be controlled. Of course, you may make it control the timing of SG signal instead of a SUB signal. Further, in synchronization with the timing of the SG signal (t ₁₃ ), the control program of the CPU 102 issues a command to close the mechanical shutter 151 to the lens control unit 140 to put the CCDs 141 to 143 in a light shielding state.

The charge stored in the transmission path as described above is input to the input image processing engine 111 as a main image signal through the AFEs 144 to 146 during a predetermined period (t _{13 to} t ₁₄ ), respectively.

  In still image recording without correction processing, the main image signal input to the input image processing engine 111 is temporarily stored in the RAMs 114 and 115. FIG. 3 shows a memory map of the RAMs 114 and 115, where the area 301 is allocated to the RAM 114 and the area 302 is allocated to the RAM 115. The memory map is composed of a plurality of frames, and the types of image signals stored differ depending on the frames. First, the main image signals of the R, G, and B channels input from the AFEs 144, 145, and 146 are stored in the RAW_R, RAW_G, and RAW_B frames of the area 302 as R, G, and B channel RAW data, respectively. At this time, writing of RAW data for three channels occurs in the RAM 115 during the acquisition period of the main image signal. The bus connecting the input image processing engine 111 and the RAM 115 needs to have a bandwidth that satisfies at least this data transfer rate.

  Subsequently, the RAW data of the R, G, and B channels stored in the area 302 of the RAM 115 is subjected to image processing such as color space conversion, γ processing, and resolution conversion by the input image processing engine 111, and the area 302 is converted into YCC data. Stored in the YCC frame. The YCC data is encoded by the JPEG codec 112 inside the input image engine 111 and stored as a JPEG data in a JPEG frame extending over the areas 301 and 302. The JPEG data is written to a memory card set in a memory card slot (not shown) via the card control unit 116. On the other hand, the YCC data is subjected to image processing such as level conversion and resolution conversion by the input image processing engine 111, and is stored in the VFR0 frame (or VFR1 frame) of the area 301 as output image data. The output image data is output to the output image processing engine 121 via the input image processing engine 111.

[With correction processing]
Next, the still image recording process for performing the correction process in the first embodiment will be described.

  FIG. 5 is a timing chart of still image recording processing for performing correction processing in the first embodiment. When correction processing is performed, the control methods of the three CCDs 141, 142, and 143 and the AFEs 144, 145, and 146 for the three CCDs 141, 142, and 143 are different.

Until the user presses the shutter button, a process for acquiring a preview image is performed by the same control method as that in the case where the correction process described with reference to FIG. 4 is not performed. When the user presses the shutter button (t ₂₁ ), the control program of the CPU 102 sends a SUB signal (t ₂₂ ) and clears the charges of the CCDs 141 to 143. Then, after the time corresponding to the preset shutter speed has elapsed, an SG signal is sent (t ₂₃ ). In this manner, the electric charge accumulated from the time when the SUB signal is sent until the next SG signal is sent (t _{22 to} t ₂₃ ) is stored in the transfer path. Further, in synchronization with the timing (t ₂₃ ) of the SG signal, the control program of the CPU 102 issues a command to close the mechanical shutter 151 to the lens control unit 140 to put the CCDs 141 to 143 in a light shielding state.

The charges stored in the transmission path as described above are input to the input image processing engine 111 as main image signals via the AFEs 144 to 146 for a predetermined period (t _{23 to} t ₂₅ ), respectively.

  As in the case of still image recording without correction processing, the main image signal input to the input image processing engine 111 is used as RAW data for each of the R, G, and B channels as RAW_R and RAW_G in the area 302 shown in FIG. , And stored in the RAW_B frame.

  Subsequently, an image signal (black image signal) is acquired in a state where the CCDs 141 to 143 are shielded from light by the mechanical shutter 151. Compared to the acquisition of the main image signal from the three AFEs 144, 145, and 146 at the same time, the acquisition of the black image signal has a time difference so that the output timings of the image signals from the three CCDs 141 to 143 do not overlap each other. Do it.

First, after storing this image signal to the transmission path at t _23, it sends a SUB signal to AFE144 R channel (t _24), sends the SG signal at a same accumulation time as this image signal (t ₂₈₎ The accumulated charge is stored in the transmission path of the CCD 141. The electric charge stored in the transmission path is input to the input image processing engine 111 as an R channel black image signal via the AFE 144 during a predetermined period (t _{28 to} t ₂₉ ).

On the other hand, after the charge accumulation of the R-channel CCD 141 is started (t ₂₄ ), a phase difference equal to the image signal acquisition period (t _{28 to} t ₂₉ ) is provided, and a SUB signal is sent to the G-channel AFE 145 (t ₂₆ ), Charge accumulation of the CCD 142 is started. Then, the SG signal is sent with the same accumulation time as that of the main image signal (t ₂₉ ), and the accumulated electric charge is stored in the transmission path of the CCD 142. In this way, by controlling by providing a phase difference, it is possible to acquire the G channel black image signal simultaneously with the end of the acquisition of the R channel black image signal. The electric charge stored in the transmission path is input to the input image processing engine 111 as a G-channel black image signal via the AFE 145 during a predetermined period (t _{29 to} t ₃₀ ).

Further, after the charge accumulation of the G-channel CCD 142 is started (t ₂₆ ), a phase difference equal to the image signal acquisition period (t _{29 to} t ₃₀ ) is provided, and a SUB signal is sent to the B-channel AFE 146 (t ₂₇ ), The charge accumulation of the CCD 143 is started. Then, the SG signal is sent at the same accumulation time as the main image signal (t ₃₀ ), and the accumulated electric charge is stored in the transmission path of the CCD 143. In this way, by controlling by providing a phase difference, it is possible to acquire the black image signal of the B channel simultaneously with the completion of the acquisition of the black image signal of the B channel. The charge stored in the transmission path is input to the input image processing engine 111 as a B channel black image signal via the AFE 146 during a predetermined period (t _{30 to} t ₃₁ ).

  FIG. 6 is a diagram showing an image of RAW data of each channel of R, G, and B of the main image signal stored in RAW_R, RAW_G, and RAW_B in the area 302 of FIG. The influence of the fixed pattern noise of the CCDs 141 to 143 appears in the form of white lines or white dots in the image. When correction processing is not performed, the YCC data obtained from these RAW data is as shown in FIG. 7, and the fixed pattern noise greatly affects the recorded image.

FIG. 8 is a diagram showing images of black image signals of R, G, and B channels acquired from the CCDs 141, 142, and 143, and only fixed pattern noises are acquired. In synchronization with the acquisition of the black image signal of the R channel in FIG. 5 (t ₂₈ ), the input image processing engine 111 reads the main image signal of the R channel stored in the RAW_R frame and subtracts the black image signal from the main image signal. I do. Then, the corrected image signal of the R channel obtained by subtraction is stored again in the RAW_R frame as new RAW data.

Similarly, in synchronization with the acquisition of the black image signals of the G and B channels (t ₂₉ , t ₃₀ ), the main image signals of the G and B channels are read and the black image signal is subtracted from the main image signals. Then, the corrected image signal obtained by the subtraction is stored again in the RAW_G and RAW_B frames as new RAW data.

  At this time, reading (before correction) and writing (after correction) of RAW data for one channel occur in the RAM 115 during the acquisition period of the black image signals of the R, G, and B channels. However, as described above, the bus connecting the input image processing engine 111 and the RAM 115 has a bandwidth that satisfies the writing of RAW data for R, G, and B3 channels as a minimum. Therefore, if the load on the read and write buses is almost the same, this condition is automatically satisfied.

  FIG. 9 is a diagram showing the corrected RAW data of the R, G, and B channels. Compared with the RAW data before correction (FIG. 6), the image is obtained by removing white lines and white spots due to the influence of fixed pattern noise.

  The subsequent processing is the same as still image recording without correction processing. That is, the corrected R, G, and B channel RAW data is subjected to image processing such as color space conversion, γ processing, and resolution conversion by the input image processing engine 111, and converted into YCC data in the region 302 as YCC data. Stored. FIG. 10 is a diagram showing an image of YCC data after correction, and is an image from which white lines and white dots due to the influence of fixed pattern noise are removed, compared to FIG.

  As described above, according to the first embodiment, it is possible to perform the correction process for each channel by performing reading of the black image signal by shifting between the channels. Thus, the correction process can be executed without increasing the capacity of the memory used for the correction process and within the bandwidth condition of the data bus to which the memory is connected.

  In the example shown in FIG. 5 described above, the case where the charge accumulation timing is changed for each channel when acquiring a black image has been described. However, the present invention is not limited to this. For example, charges may be accumulated simultaneously in the CCDs 141 to 143, the accumulated charges may be held in the vertical transfer unit, and the read timing from the vertical transfer unit may be shifted between channels.

<Second Embodiment>
Next, a second embodiment of the present invention will be described.

  Compared to the image recording apparatus of the first embodiment, the image recording apparatus of the second embodiment stores the main image signal and the corrected image signal in a plurality of memories according to the point that correction processing is performed simultaneously for three channels and the channel. The point to do is different.

[No correction]
This is the same as the still image recording process in which the correction process is not performed in the first embodiment. However, unlike the configuration shown in FIG. 3, the RAW_R, RAW_G, and RAW_B frames for storing the main image signal are allocated to the RAMs 114 and 115 as described later with reference to FIG.

[With correction processing]
FIG. 11 is a timing chart of still image recording for performing the correction processing in the second embodiment. Since the control methods of the three CCDs 141, 142, and 143 and the AFEs 144, 145, and 146 are the same, the signals for these are collectively shown in FIG.

Until the user presses the shutter button, a process for acquiring a preview image is performed by the same control method as that in the case where the correction process described with reference to FIG. 4 is not performed. When the user presses the shutter button (t ₄₁ ), the control program of the CPU 102 sends a SUB signal (t ₄₂ ) and clears the charges of the CCDs 141 to 143. Then, after the time corresponding to the preset shutter speed has elapsed, an SG signal is sent (t ₄₃ ). In this way, the charge accumulated from the time when the SUB signal is sent until the next SG signal is sent (t _{42 to} t ₄₃ ) is stored in the transfer path. Further, in synchronization with the timing of the SG signal (t ₄₃ ), the control program of the CPU 102 issues a command to close the mechanical shutter 151 to the lens control unit 140 to put the CCDs 141 to 143 in a light-shielded state.

The charge stored in the transmission path as described above is input to the input image processing engine 111 as a main image signal via the AFEs 144 to 146 during a predetermined period (t _{43 to} t ₄₅ ), respectively.

  The main image signal input to the input image processing engine 111 is temporarily stored in the RAMs 114 and 115. FIG. 12 shows a memory map of the RAMs 114 and 115 in the second embodiment. The area 401 is allocated to the RAM 114 and the area 402 is allocated to the RAM 115. The difference from the memory map shown in FIG. 3 of the first embodiment is that only the RAW_R frame of the three-channel RAW data storage frame is assigned to the area 401 of the RAM 114 different from the other frames.

  That is, the main image signals of the R, G, and B channels input from the AFEs 144, 145, and 146 are the RAW_R frame in the region 401 and the RAW_G and RAW_B frames in the region 402 as RAW data of the R, G, and B channels, respectively. Stored in At this time, the RAW data for one channel is written to the RAM 114 and the RAW data for two channels is written to the RAM 115 during the acquisition period of the main image signal. The bus connecting the input image processing engine 111 and the RAMs 114 and 115 needs to have a bandwidth that satisfies this data transfer rate at a minimum.

Subsequently, an image signal (black image signal) is acquired in a state where the CCDs 141 to 143 are shielded from light by the mechanical shutter 151. In the second embodiment, first, after storing this image signal to the transmission path at t _43, sends a SUB signal to AFE144~146 (t _44), at the same storage time and the image signal SG A signal is sent (t ₄₆ ), and the accumulated charges are stored in the transmission paths of the CCDs 141 to 143, respectively. The charges stored in the transmission path are input to the input image processing engine 111 as black image signals of R, G, and B channels via the AFEs 144 to 146 during a predetermined period (t _{46 to} t ₄₇ ).

Next, in synchronization with the above-described black image signal acquisition (t ₄₆ ), the input image processing engine 111 reads out the main image signals for three channels stored in the RAW_R, RAW_G, and RAW_B frames, and outputs the respective main image signals. The black image signal is subtracted from. Then, the corrected image signals for three channels obtained by the subtraction are stored again in the RAW_R, RAW_G, and RAW_B frames as new RAW data.

  At this time, during the black image signal acquisition period, RAW data for one channel is read (before correction) and written (after correction) to the RAM 114, and RAW data for two channels is read from the RAM 115 (after correction). Before correction) and writing (after correction) occur. The bus connecting the input image processing engine 111 and the RAM 115 needs to have a bandwidth that satisfies the data transfer speeds for reading and writing RAW data for at least two channels at the same time. When RAW frames for three channels are allocated to one RAM, it is necessary to satisfy the data transfer rates for reading and writing RAW data for three channels at the same time. Therefore, as shown in the second embodiment, it is more advantageous from the viewpoint of the bus bandwidth to distribute the RAW frame to two RAMs.

  In the first and second embodiments, as an example, the main image signal is first acquired and stored in the memory, and the black image signal is acquired later and the main image signal is read from the memory. The case where the correction process is performed has been described. However, the present invention is not limited to this. First, the black image signal is stored in the RAMs 114 and 115, and the black image signal is read from the RAMs 114 and 115 while the main image signal is acquired later, and correction processing is performed. You may make it perform.

  In the second embodiment, as an example, a digital camera that distributes and stores image signals in two memories has been described. However, it is of course possible to distribute to three or more memories. Further, when one memory includes a plurality of bus interfaces, it may be distributed for each interface.

  In the first and second embodiments, as an example, a digital camera having a 3CCD image sensor that divides a channel for each color to be photographed has been described. In addition to this configuration, the present invention can also be applied to a case where channels are divided according to the position of a pixel or line of an image sensor, a dynamic range, or the like.

It is a block diagram which shows the structure of the imaging device in embodiment of this invention. It is a block diagram which shows the structure of the optical system of the imaging device in embodiment of this invention. It is a figure which shows the memory map at the time of the still image recording in the 1st Embodiment of this invention. 6 is a timing chart of still image recording processing without performing correction processing in the embodiment of the present invention. 3 is a timing chart of still image recording processing for performing correction processing according to the first embodiment of the present invention. It is a figure which shows an example of the image of the main image signal (RAW data) of R, G, and B containing fixed pattern noise. It is a figure which shows an example of the recording image (YCC data) containing fixed pattern noise. It is a figure which shows an example of the black image signal of R, G, B. It is a figure which shows an example of the image of the correction | amendment image signal (RAW data) of R, G, B which performed the correction process. It is a figure which shows an example of the recorded image (YCC data) which performed the correction process. It is a timing chart of the still picture recording processing which performs amendment processing in the 2nd embodiment of the present invention. It is a figure which shows the memory map at the time of the still image recording in the 2nd Embodiment of this invention.

Explanation of symbols

100 Imaging device 101 Bus 102 CPU
103 RAM
104 ROM
105 Key operation processing unit 111 Input image processing engine 112 JPEG codec 114, 115 RAM
116 Memory card control unit 121 Output image processing engine 124 RAM
125 Tape control unit 126 LCD control unit 127 Speaker control unit 128 Video output control unit 129 1394 I / O control unit 140 Lens control units 141 to 143 CCD
144-146 AFE
150 Lens 151 Mechanical shutter 152 Prism

Claims (8)

Imaging means for photoelectrically converting an optical image of an incident subject to generate an image signal, and outputting the generated image signal via a plurality of channels;
Shutter means for switching the light receiving surface of the imaging means to an exposure state or a light shielding state;
A first image signal generated by the imaging unit in an exposure state by the shutter unit is output in parallel from the plurality of channels, and a second image signal generated by the imaging unit in a light-shielded state by the shutter unit. Control means for controlling to output from the imaging means in time division between the plurality of channels,
Storage means for storing the first image signal in parallel;
Computation means for obtaining a third image signal based on the first image signal stored in the storage means and the second image signal;
An image pickup apparatus, wherein the corresponding third image signal is stored in an area of the storage means in which the first image signal is stored. An imaging unit that photoelectrically converts an optical image of an incident subject to generate an image signal, and outputs the generated image signal in parallel via a plurality of channels;
Shutter means for switching the light receiving surface of the imaging means to an exposure state or a light shielding state;
A plurality of storage means for storing the first image signal obtained from the imaging means in either one of an exposure state and a light shielding state by the shutter means in parallel via a plurality of buses;
Based on the first image signal stored in the storage means and the second image signal obtained from the imaging means in the other state of exposure or light shielding by the shutter means, a third image signal is obtained. And an arithmetic means for acquiring,
An image pickup apparatus, wherein the corresponding third image signal is stored in an area of the storage means in which the first image signal is stored.   The imaging apparatus according to claim 2, wherein the plurality of buses have at least a band in which signals for the plurality of channels can be stored and read out in parallel.   4. The imaging according to claim 1, wherein the calculation unit calculates a difference between the first image signal and the second image signal to obtain a third image signal. 5. apparatus. An imaging unit that photoelectrically converts an optical image of an incident subject to generate an image signal, and outputs the generated image signal through a plurality of channels, and a shutter unit that switches a light receiving surface of the imaging unit to an exposure state or a light shielding state And an imaging device control method having storage means capable of storing image signals output in parallel from the plurality of channels in parallel,
A first output step for outputting in parallel from the plurality of channels a first image signal generated by the imaging means in an exposure state by the shutter means;
A first storage step for storing in parallel the first image signal output in the first output step;
A second output step of outputting a second image signal generated by the imaging unit in a light-shielded state by the shutter unit from the imaging unit in a time-sharing manner between the plurality of channels;
A calculation step of obtaining a third image signal based on the first image signal stored in the first storage step and the second image signal output in the second output step;
A control method comprising: a second storage step of storing the corresponding third image signal in an area of the storage means storing the first image signal. An imaging unit that photoelectrically converts an optical image of an incident subject to generate an image signal, and outputs the generated image signal in parallel through a plurality of channels; and a light receiving surface of the imaging unit in an exposure state or a light shielding state An image pickup apparatus control method comprising: a shutter unit for switching; and a plurality of storage units capable of storing image signals output in parallel from the plurality of channels in parallel via a plurality of buses,
A first output step for outputting, in parallel from the plurality of channels, a first image signal generated by the imaging unit in either one of an exposure state or a light shielding state by the shutter unit;
A first storage step for storing the first image signal output in the first output step in parallel in a plurality of storage means via a plurality of buses;
A second output step of outputting a second image signal generated by the imaging means in parallel from the plurality of channels in the other state of the exposure state or the light shielding state by the shutter means;
A calculation step of obtaining a third image signal based on the first image signal stored in the first storage step and the second image signal output in the second output step;
A control method comprising: a second storage step of storing the corresponding third image signal in an area of the storage means storing the first image signal.   The control method according to claim 6, wherein the plurality of buses have at least a band in which signals for the plurality of channels can be stored and read out in parallel.   8. The control according to claim 5, wherein, in the calculation step, a third image signal is obtained by calculating a difference between the first image signal and the second image signal. 9. Method.

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