JP2007036269A - Semiconductor process simulation device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor process simulation device which adopts an impurity diffusion model under the consideration of a dislocation loop for reducing a time and labor required for extracting the physical quantity of the dislocation loop from a transmission electron microscope picture. <P>SOLUTION: A semiconductor process simulation device is provided with an image data input part 2001 for capturing a transmission electron microscope picture image to be used for extracting the physical quantity of a dislocation loop introduced to a silicon substrate in the case of ion injection, and a process simulation device calculation part 2002 for carrying out impurity diffusion by using a diffusion model under the consideration of contribution from the dislocation loop introduced to the substrate in the ion injection process for the diffusion of impurity in a heat treatment process posterior to the ion injection process. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor process simulation apparatus for simulating a semiconductor manufacturing process, and in particular, a semiconductor process simulation apparatus that incorporates an impurity diffusion model that takes dislocation rings into account. The present invention relates to a semiconductor process simulation apparatus that reduces the time and labor to be extracted from the process.

  In today's semiconductor device development, a semiconductor process simulation apparatus occupies an important position, and a semiconductor process simulation apparatus developed as a product is widespread and used by semiconductor device developers.

  However, a model incorporated in a commercially available semiconductor process simulation apparatus is still physically insufficient, and there are many cases in which adjustment of simulation parameters is required for each process used in manufacturing a semiconductor device.

  In particular, the heat treatment temperature in the manufacturing process has been decreasing year by year, and in such a low-temperature heat treatment, crystal defects in a silicon wafer that have not been a problem in the conventional manufacturing process using a high-temperature heat treatment. However, it is said to affect the diffusion of impurities during the heat treatment.

  The crystal dislocation ring handled in the present invention is also said to affect the impurity diffusion in the low-temperature heat treatment process, but is not incorporated in a commercially available semiconductor process simulation apparatus, Also in known documents such as patent publications, a method for actually incorporating a crystal dislocation ring model into a two-dimensional semiconductor process simulation apparatus is not disclosed.

  In academic paper announcements, Mark. E. Law and his research group have published a series of papers on semiconductor process simulation equipment using an impurity diffusion model that takes into account the dislocation ring introduced into the crystal by ion implantation.

  Non-patent document 1 is an example of a recently published paper. However, although a series of papers describe the contribution of the dislocation ring in the impurity diffusion model, a method for defining the position of the dislocation ring, which is necessary when constructing the process simulation apparatus according to the present invention, and It does not describe the input method, and up to which step the dislocation ring after the ion implantation process is considered.

H. Park, K. S. Jones and M. E. Law, J. Electrochem. Soc., Vol. 141, 759, 1994

  The present invention has been made in view of the above, and in a semiconductor process simulation apparatus incorporating an impurity diffusion model taking into account the dislocation ring, the time for extracting the physical quantity of the dislocation ring from the transmission electron micrograph An object of the present invention is to provide a semiconductor process simulation apparatus with reduced labor.

  In order to solve the above-mentioned problems, a semiconductor process simulation apparatus according to the present invention is a semiconductor process simulation apparatus for simulating a semiconductor manufacturing process, wherein physical quantities of dislocation rings introduced into a silicon substrate at the time of ion implantation are calculated. Image data input means for inputting a transmission electron micrograph image used for extraction, and contribution from the transition ring introduced into the substrate by the ion implantation step to the diffusion of impurities in the heat treatment step after the ion implantation step And a process simulation means for performing impurity diffusion using a diffusion model that takes into account the above.

  In addition, the semiconductor process simulation apparatus according to the present invention uses the transmission electron micrograph image captured by the image data input means to extract physical quantities of dislocation rings introduced into a silicon substrate during ion implantation. It is provided with a physical quantity extraction means for dislocation rings.

  Further, in the semiconductor process simulation apparatus according to the present invention, the dislocation ring physical quantity extraction means includes a transmission electron microscopic image, a cross-sectional transmission electron microscope image, a cross-sectional transmission electron microscope image, and a transmission electron microscopic image captured by the image data input means. It is a distinction.

  In the semiconductor process simulation apparatus according to the present invention, the dislocation ring physical quantity extraction means extracts the size and density of the dislocation ring from the plane transmission electron microscope image.

  Also, the semiconductor process simulation apparatus according to the present invention classifies and stores the size and density of the dislocation ring extracted from the plane transmission electron microscope image by the dislocation ring physical quantity extraction means for each process condition. It has a database.

  In the semiconductor process simulation apparatus according to the present invention, the dislocation ring physical quantity extraction means extracts dislocation ring occurrence position data from the cross-sectional transmission electron microscope image.

  In the semiconductor process simulation apparatus according to the present invention, the generation position data of the dislocation ring is a generation depth of the dislocation ring.

  Further, in the semiconductor process simulation apparatus according to the present invention, the generation position data of the dislocation ring includes a generation depth of the dislocation ring, a lateral distance and a depth direction from the ion implantation mask of the generation position of the dislocation ring. , And the parameters of the elliptical arc representing the shape of the transition region in the horizontal direction.

  In the semiconductor process simulation apparatus according to the present invention, the generation position data of dislocation rings extracted from one cross-sectional transmission electron microscope image is one set or a plurality of sets.

  In addition, the semiconductor process simulation apparatus according to the present invention includes a database for storing the generation position data of the dislocation ring for each process condition.

  In addition, the semiconductor process simulation apparatus according to the present invention includes a dislocation ring physical quantity extraction unit that extracts the size and density of a dislocation ring extracted from the plane transmission electron micrograph image, and the cross-sectional transmission electron microscope. The configuration includes a database for classifying and storing the generation position data of dislocation rings extracted from photographic images for each process condition.

  In addition, the semiconductor process simulation apparatus according to the present invention enables the use of diffusion calculation based on a diffusion model that takes into account the contribution from the dislocation ring under arbitrary process conditions, so that the dislocation ring stored in the database can be used. A process condition dependency calculating means for calculating a process condition dependent coefficient based on the size and density and the generation position data of the dislocation ring is provided.

  In the semiconductor process simulation apparatus according to the present invention, the image data input means optically transmits a transmission electron micrograph image used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation. It is supposed to be a scanner that reads.

  In the semiconductor process simulation apparatus according to the present invention, the image data input means stores transmission electron micrograph image data used for extracting physical quantities of dislocation rings introduced into the silicon substrate during ion implantation. The transmission electron micrograph image data is read from the recorded storage medium.

  In the semiconductor process simulation apparatus according to the present invention, the image data input means inputs transmission electron micrograph image data used to extract physical quantities of dislocation rings introduced into the silicon substrate by an ion implantation process from the outside of the apparatus. It is supposed to have a function.

  As described above, according to the semiconductor process simulation apparatus of the present invention, in order to input a transmission electron micrograph image used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation. With this image data input means, there is provided a semiconductor process simulation apparatus capable of capturing a transmission electron micrograph image necessary for extracting a physical quantity of a dislocation ring into a semiconductor process simulation apparatus in a short time and with low labor. Can be provided.

  Further, according to the semiconductor process simulation apparatus according to the present invention, the dislocation ring of the dislocation ring that extracts the physical quantity of the dislocation ring introduced into the silicon substrate at the time of ion implantation using the captured transmission electron micrograph image. By providing the physical quantity extraction means, it is possible to provide a semiconductor process simulation apparatus capable of extracting the physical quantity of the dislocation ring from the captured transmission electron micrograph image.

  In addition, according to the semiconductor process simulation apparatus of the present invention, the captured transmission electron micrograph image is divided into a plane transmission electron microscope image and a cross-sectional transmission electron microscope image, so that a plane transmission electron microscope image and a cross-sectional transmission electron image are obtained. It is possible to provide a semiconductor process simulation apparatus capable of extracting and handling physical quantities different from those of a microscope image.

  Further, according to the semiconductor process simulation apparatus of the present invention, by extracting the size and density of the dislocation ring from the plane transmission electron micrograph image, the dislocation ring can be formed using the size and density of the dislocation ring. A semiconductor process simulation apparatus capable of using an impurity diffusion model taking into account can be provided.

  Further, according to the semiconductor process simulation apparatus according to the present invention, the size and density of the dislocation ring extracted from the plane transmission electron micrograph image are arranged and stored for each process condition, and are stored in a database. It is possible to provide a semiconductor process simulation apparatus capable of using an impurity diffusion model that takes a dislocation ring into consideration under conditions.

  Further, according to the semiconductor process simulation apparatus according to the present invention, the dislocation ring generation position data is extracted from the cross-sectional transmission electron micrograph image, and the dislocation ring generation position is used to consider the dislocation ring. It is possible to provide a semiconductor process simulation apparatus that can be used for an impurity diffusion model that has been added.

  Further, according to the semiconductor process simulation apparatus of the present invention, the generation position data of the dislocation ring is obtained by extracting the generation depth of the dislocation ring from the cross-sectional transmission electron micrograph image as the generation position data of the dislocation ring. Semiconductor process capable of using an impurity diffusion model that takes into account the dislocation ring using the dislocation ring generation depth obtained from cross-sectional transmission electron microscope images of samples created for extraction A simulation apparatus can be provided.

  Further, according to the semiconductor process simulation apparatus according to the present invention, the generation position data of the dislocation ring includes the generation depth of the dislocation ring, the lateral distance from the implantation mask of the generation position of the dislocation ring, and the depth direction. By using the parameters of the elliptical arc representing the shape of the transition region in the lateral direction, the generation depth of the dislocation ring, the lateral distance from the ion implantation mask of the dislocation ring generation position, the transition between the depth direction and the lateral direction It is possible to provide a semiconductor process simulation apparatus that can use an impurity diffusion model that takes a dislocation ring into account using measured values of an elliptic arc parameter that represents a shape of a region.

  Further, according to the semiconductor process simulation apparatus of the present invention, the generation position data may be one set or a plurality of sets with respect to the cross-sectional transmission electron micrograph image and the generation position data for one cross-section transmission electron microscope image. Therefore, it is possible to provide a semiconductor process simulation apparatus that can be used for an impurity diffusion model in which dislocation rings are taken into account corresponding to process conditions in which dislocation rings are formed at two or more locations. it can.

  Further, according to the semiconductor process simulation apparatus according to the present invention, the generation position data of the dislocation ring extracted from the captured cross-sectional transmission electron microscope image is organized into a database by arranging each process condition. It is possible to provide a semiconductor process simulation apparatus capable of using an impurity diffusion model in which dislocation rings are taken into consideration by using dislocation ring generation position data obtained from actual measurement under process conditions.

  Further, according to the semiconductor process simulation apparatus of the present invention, the size and density of the dislocation ring are extracted from the plane transmission electron microscope image, and the generation position of the dislocation ring is extracted from the cross-sectional transmission electron microscope image. This makes it possible to use an impurity diffusion model that takes into account the dislocation ring by using the size and density of the dislocation ring obtained from actual measurement and the location data, under any process conditions. An apparatus can be provided.

  Further, according to the semiconductor process simulation apparatus of the present invention, the process condition dependency coefficient for calculating the process condition dependency coefficient based on the size and density of the dislocation wheel and the generation position data of the dislocation wheel stored in the database. By providing the calculation means, it is possible to provide a semiconductor process simulation apparatus that can use a diffusion model that takes into account the contribution from the dislocation ring even under arbitrary process conditions without data accumulation.

  The semiconductor process simulation apparatus according to the present invention further includes a scanner that optically reads a transmission electron micrograph image used to extract a physical quantity of a dislocation ring introduced into a silicon substrate during ion implantation. Thus, it is possible to provide a semiconductor process simulation apparatus capable of optically reading a transmission electron micrograph image used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate during ion implantation. it can.

  Further, according to the semiconductor process simulation apparatus of the present invention, the transmission electron micrograph image data used for extracting the physical quantity of the dislocation ring introduced into the silicon substrate at the time of ion implantation is stored in the storage medium. By providing a storage medium reading means for reading transmission electron micrograph image data, transmission electron micrograph image data used for extracting physical quantities of dislocation rings introduced into the silicon substrate at the time of ion implantation is obtained. A semiconductor process simulation apparatus that can be read from a storage medium can be provided.

  Further, according to the semiconductor process simulation apparatus according to the present invention, the image data input means externally transmits transmission electron micrograph image data used for extracting physical quantities of dislocation rings introduced into the silicon substrate by the ion implantation process. Semiconductor process that can input image data of transmission electron micrographs used to extract physical quantities of dislocation rings introduced into a silicon substrate during ion implantation by providing an input function A simulation apparatus can be provided.

  Hereinafter, the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments. In addition, constituent elements in the following embodiments include those that can be easily assumed by those skilled in the art or those that are substantially the same.

(Outline of the present invention)
From a series of known documents dealing with a crystal dislocation ring model, the problem when actually incorporating into a two-dimensional semiconductor process simulation device is that
(1) Method of defining the position of the dislocation ring,
(2) To what process should the contribution of the dislocation ring contribute to impurity diffusion be considered?
That is two points.

The problem with the method of defining the position of the first dislocation wheel is further
(A) When calculating a function representing an average pressure field due to a dislocation ring distributed in a layer in which a dislocation ring is formed, from a function giving a contribution from the dislocation ring of a single crystal. Assumptions used in
(B) a method of actually inputting a position at which a crystal dislocation ring is formed into a two-dimensional semiconductor process simulation apparatus;
The problem can be subdivided.

  First, regarding the problem (a), in Non-Patent Document 1, an average pressure field that is the sum of contributions from dislocation rings in a layer is calculated from the pressure generated by each dislocation ring. The assumptions used at that time are as follows.

-It is assumed that the layer where the dislocation ring is formed is a plane (see FIG. 25).
・ The dislocation ring distributed in the layer is perpendicular to the plane representing the layer.
In addition, it is assumed that the dislocation wheels are perpendicular to each other (see FIG. 26).
・ When calculating the function that represents the sum,
Consider the six dislocation rings that are in close proximity (see FIG. 27).

  By using this assumption, the function representing the average pressure field from the dislocation ring can take the distance from the layer as an argument, but from the assumption used when calculating the average pressure field, The layer in which the ring is formed must be planar. However, in the actual MOS device manufacturing, in the ion implantation performed when forming the source and drain, since the gate region serves as a mask, a dislocation ring is formed as shown in the two-dimensional sectional view of FIG. The layer to be done is not only flat.

  Therefore, in order to incorporate a crystal dislocation ring model into a two-dimensional semiconductor process simulation apparatus, a dislocation ring is formed as shown in FIG. It is necessary to be able to define the pressure mean field due to the dislocation ring even when the layer to be formed is not only a plane, but there is no known literature describing the definition of such a pressure mean field.

  Regarding the problem (b), it is said that the layer in which the crystal dislocation ring is formed is formed at the boundary between the amorphous region and the crystal region formed in the silicon wafer in the ion implantation step. However, regarding the method of specifying the position of the crystal dislocation ring layer in the actual semiconductor process simulation apparatus, the shape of the layer in which the dislocation ring is actually formed can be expressed, and it is convenient for the user of the semiconductor process simulation apparatus. There is no known document describing a method for specifying the position of the layer of a dislocation ring in a crystal.

  In addition, the dislocation ring of crystals introduced into silicon in the ion implantation process grows or shrinks by heat treatment after the ion implantation process and eventually disappears. However, the model described in Non-Patent Document 1 expresses the process of growth or contraction of dislocation rings in a relatively early stage of the heat treatment after the ion implantation process, but it is due to the heat treatment for a longer time. The process of disappearance of the dislocation ring is not expressed.

  Therefore, when applying a semiconductor simulation apparatus incorporating a diffusion model that takes into account the contribution from the dislocation ring to the actual semiconductor device manufacturing process, if there are multiple heat treatments after the ion implantation process, which process Although it is preferable that the user of the semiconductor simulation apparatus can specify whether to use the diffusion model in consideration of the contribution from the dislocation ring, there is no known document describing such an idea.

  Moreover, there are few well-known literatures describing how to specifically obtain the physical quantity of the amount of dislocation.

(Embodiment 1)
[Example 1], [Example 2], [Example 3],... [Example 9] The outline of the semiconductor process simulation apparatus according to the first embodiment of the present invention and the examples will be described below. Details will be described with reference to the drawings in this order.

[Outline of Semiconductor Process Simulation Device According to Embodiment 1 of the Present Invention]
In the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 1, a model for generating a diffusion model that takes into account contributions from dislocation rings introduced into a silicon substrate during ion implantation in the ion implantation process simulation means 101 is generated. The heat treatment process simulation means 103 generated by the means 102 uses the diffusion model generated by the model generation means 102 for the diffusion of impurities in the heat treatment process after the ion implantation process. Here, the pressure field due to the dislocation ring to be defined in the silicon substrate region used in the diffusion model is a function of the distance from the position of the dislocation ring.

  Thus, by using the pressure field due to the dislocation wheel as a function of the distance from the position of the dislocation wheel, the conventional technique can handle only when the layer where the dislocation wheel is formed is a plane (FIG. 25). On the other hand, in the present invention, if the position coordinates of the layer in which the dislocation ring is formed are given, the pressure field due to the dislocation ring can be calculated.

  In the ion implantation process performed when forming the source / drain in actual semiconductor device manufacturing, as shown in the explanatory diagram of FIG. 2, the region of the gate 204 serves as a mask, so that it is introduced into the crystal by the ion implantation process. Usually, the dislocation ring is not a simple plane as indicated by 203 in FIG. In such a case, the semiconductor process simulation apparatus of the present invention can also use a diffusion model that takes into account the contribution from the dislocation ring.

  Here, in the present invention, the pressure field due to the dislocation wheel will be described as a function of the distance from the position of the dislocation wheel.

  In the prior art, when calculating the average pressure field of the dislocation wheel, it is assumed that the dislocation wheels are all in the same plane, and the dislocation wheels distributed in the plane are the plane. For example, as shown in the explanatory diagram of FIG. 27, the contributions of pressure from the six closest dislocation wheels 1604 a to 1604 f are taken into consideration. Therefore, although the average pressure field is a function of the distance from the layer in which the dislocation ring is formed, the layer in which the dislocation ring is formed is a flat surface as indicated by 1503 in FIG. Had to be.

  However, considering the relationship between the crystal planes when the dislocation ring is actually introduced into the crystal by the ion implantation process, the assumption used to determine the above average pressure field is the relationship between the crystal plane planes. It was found that this is not a well-considered assumption, but an assumption introduced for the convenience of averaging operations to approximate the average pressure from the dislocation wheel. Therefore, in the present invention, the function representing the average pressure field of the dislocation ring is the same as that of the prior art, but the layer in which the dislocation ring is formed does not have to be a plane.

  The assumptions used in determining the average pressure field and the relationship between the crystal planes will be described in a little more detail. In order to simplify the explanation, consider a case where ion implantation is performed from a surface 1502 to a silicon wafer 1501 having no pattern such as a gate as shown in FIG.

  In the manufacture of a normal MOS type semiconductor device, a silicon wafer having a (100) orientation is used. Therefore, assuming that the layer where dislocation rings are formed is parallel to the surface, dislocation rings are formed. The layer to be formed is formed on the (100) plane. However, it is said that the dislocation ring is formed on the (110) plane or the (111) plane due to the crystalline nature of silicon. This contradicts the assumption that “the dislocation ring distributed in the layer is perpendicular to the plane representing the layer” used in determining the mean field.

  Further, the (110) plane and the (111) plane exist on the (110) plane and the (111) plane because they are inclined when viewed from the surface when the (100) plane is the surface of the silicon wafer. It is very complicated and difficult to accurately determine the mean field of contribution from the dislocation ring.

  From these, it can be seen that the assumptions used in determining the average pressure field are assumptions introduced for convenience of averaging operations in order to approximate the average pressure from the dislocation wheel.

  For the reasons described above, in the present invention, the average pressure field of the dislocation ring is approximated using the same function as in the prior art, and the layer in which the dislocation ring is formed does not have to be a plane. Thus, if the position coordinates of the layer where the dislocation ring is formed are given, the average pressure field due to the dislocation ring can be calculated.

  In the semiconductor process simulation apparatus according to the present invention, the position of the dislocation ring in the diffusion model is defined by a curve that can be represented by a line segment and an elliptic arc. In other words, a curve that can be represented by a line segment and an elliptic arc is used to give the position coordinates of the layer where the dislocation ring is formed. Thereby, the position coordinate of the layer in which the dislocation ring is formed can be determined.

  Further, in the semiconductor process simulation apparatus according to the present invention, the position of the dislocation ring in the diffusion model is set to the position of the saddle point constituted by the maximum value of the implanted impurity atom concentration based on the result of the ion implantation process simulation means 101. Used and defined by an arbitrary distance from the saddle point. In other words, the position at an arbitrary distance from the saddle point constituted by the maximum value of the implanted impurity atom concentration as a result of the ion implantation process simulation means 101 gives the position coordinates of the layer where the dislocation ring is formed. Is used. Here, the arbitrary distance can be specified by the user of the semiconductor simulation apparatus using the input / output interface 104 or the like. Thereby, the position coordinate of the layer in which the dislocation ring is formed can be determined.

  Further, in the semiconductor process simulation apparatus according to the present invention, the position of the dislocation ring in the diffusion model is defined by the position where the concentration of the implanted impurity atoms is based on the result of the ion implantation process simulation means 101. Yes. That is, to give the position coordinates of the layer where the dislocation ring is formed, the position where the concentration distribution of the implanted impurity atoms resulting from the result of the ion implantation process simulation means 101 becomes an arbitrary concentration is used. Here, it is assumed that an arbitrary concentration can be specified by the user of the semiconductor simulation apparatus using the input / output interface 104 or the like. Thereby, the position coordinate of the layer in which the dislocation ring is formed can be determined.

  Further, in the semiconductor process simulation apparatus according to the present invention, in order to give the position coordinates of the layer where the dislocation ring is formed, the result of the ion implantation process simulation means 101 is displayed as an image via the input / output interface 104. The user of the semiconductor process simulation apparatus can input a position determined and determined while viewing the image display, and the input position is used. Thereby, the position coordinate of the layer in which the dislocation ring is formed can be determined.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 11, the first model generation means 1102a for defining the position of the dislocation ring in the diffusion model by a curve that can be represented by a line segment and an elliptical arc; The position of the dislocation ring in the model is defined by the position of the saddle point constituted by the maximum value of the implanted impurity atom concentration based on the result of the ion implantation process simulation means 101 and by an arbitrary distance from the saddle point. Second model generation means 1102b to be defined, and third model generation means for defining the position of the dislocation ring in the diffusion model based on the position where the concentration of the implanted impurity atoms is based on the result of the ion implantation process simulation means 101 1102c and the position of the dislocation ring in the diffusion model, the input / output interface 1 The fourth model generation means 1102d defined based on the input instruction given by the user while viewing the image display of the result by the ion implantation process simulation means 101 via 4, the at least two types of model generation means And the switching means 1103 switches to any one of the first model generation means 1102a, the second model generation means 1102b, the third model generation means 1102c, or the fourth model generation means 1102d to obtain a diffusion model. As a result, it becomes possible for the user of the semiconductor process simulation apparatus to select a method for inputting the position of the dislocation wheel most suitable for the semiconductor process to be simulated.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 12, the heat treatment process simulation means 1203 performs diffusion considering the contribution from the dislocation ring only in the first heat treatment process after ion implantation (step S1211). A model is used, and a normal diffusion model is used for the second and subsequent heat treatments (step S1212). Thus, for example, if the second and subsequent heat treatments contribute little to the dislocation ring or are outside the scope of the dislocation wheel model, the second and subsequent heat treatments use the normal diffusion model. The semiconductor process can be flexibly adapted to the semiconductor process.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 13, the heat treatment process simulation means 1303 performs the first heat treatment process after the ion implantation (step S1311) and the first heat treatment process after the ion implantation. In the heat treatment step (step S1312), a diffusion model that takes into account contributions from dislocation rings is used. Thereby, for the second and subsequent heat treatments after the ion implantation step, it is possible to use a diffusion model that takes into account the contribution from the dislocation ring even if the contribution from the dislocation ring is effective, It is possible to simulate a semiconductor process that can be flexibly adapted to the semiconductor process.

  Furthermore, in the semiconductor process simulation apparatus according to the present invention, for example, as shown in FIG. 14, the heat treatment step simulation means 1403 is a diffusion that takes into account the contribution from the dislocation ring in the heat treatment step after the first heat treatment step after ion implantation. It is possible to switch the diffusion model without considering the contribution from the model or dislocation ring. It is also possible to switch and select the diffusion model for the first heat treatment step after ion implantation. This enables the user of the semiconductor process simulation apparatus to select and instruct whether or not to consider the contribution from the dislocation ring according to the manufacturing process of the semiconductor device to be simulated. It is possible to simulate a semiconductor process that can be flexibly adapted.

[Example 1]
1 is a configuration diagram of a semiconductor process simulation apparatus according to a first embodiment of the present invention. In the figure, the semiconductor process simulation apparatus according to the present embodiment generates a model for generating a diffusion model in consideration of contributions from an ion implantation process simulation means 101 and a dislocation ring introduced into a silicon substrate at the time of ion implantation. A dislocation ring to be defined in the silicon substrate region used in the diffusion model, comprising means 102 and a heat treatment step simulation means 103 using a diffusion model for diffusion of impurities in the heat treatment step after the ion implantation step. Is a function of the distance from the position of the dislocation ring.

  First, calculation of an average pressure field by a dislocation ring will be described. The pressure generated by a single dislocation ring is disclosed in the literature “L. Borucki, in“ Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits: NUPAD IV ”, Seattle, WA, May 31, (1992)”. The following equation is used.

here,
ρ = r / R
ζ = z / R
α = (4ρ / ((ρ + 1) ² + ζ ² )) ^1/2
γ = 3 (1−ν) / (1 + ν)
It is. E (α) and K (α) are the first and second complete elliptic integrals, μ is the rigidity, and ν is the Poisson's ratio.

In this way, for the pressure generated by a single dislocation ring, an average pressure field is calculated using the following assumptions as shown in FIGS.
-It is assumed that the layer in which the dislocation ring is formed is a plane (see FIG. 25).
・ The dislocation ring distributed in the layer is perpendicular to the plane representing the layer.
In addition, it is assumed that the dislocation wheels are perpendicular to each other (see FIG. 26).
・ When calculating the function that represents the sum,
Consider the six dislocation rings that are in close proximity (see FIG. 27).

  The actual formula for calculating the average pressure field is as follows.

By the above average operation, the average pressure field <p> becomes a function of the radius R of the dislocation ring and the distance z from the surface on which the dislocation ring is formed, and the in-plane distribution is averaged. .
<P> = f (R, z) (3)

  In the prior art, this function is applied only when the surface on which the dislocation ring is formed is a flat surface. Therefore, calculation can be performed only when the mask such as the gate region does not exist in the ion implantation as shown in FIG. However, in the present invention, the surface on which the dislocation ring is formed can be applied to a curved surface other than a plane as indicated by 203 in FIG. If the radius R of the ring and the distance z from the surface on which the dislocation ring is formed are specified, the calculation can be performed.

[Example 2]
In the semiconductor process simulation apparatus according to the second embodiment of the present invention, the position of the dislocation ring in the diffusion model is defined by a curve that can be represented by a line segment and an elliptic arc.

  A method of designating the position of the layer where the dislocation ring is formed by a curve that can be represented by a line segment and an elliptic arc will be described with reference to FIG. That is, the position of the layer 203 in which the dislocation ring is formed by the line segment and the elliptical arc is designated as shown in FIG.

When the symbols in FIG. 3 are used, the region specified by the elliptical arc in FIG. 3 can be expressed by the following equation.
(X−x ₀ ) ² / a ² + (y−y ₀ ) ² / b ² = 1 (4)
Here, (x ₀ , y ₀ ) are the center coordinates of the ellipse, and a and b are the major axis and minor axis of the ellipse, respectively. An area specified by a line segment can be expressed by specifying a start point (x ₁ , y ₁ ) and an end point (x ₂ , y ₂ ) of the line segment.

  As described above, the ellipse can be expressed by specifying the center coordinates of the ellipse and the major axis and minor axis of the ellipse, and by specifying the start point and end point of the line segment. it can. Similarly, when there are a plurality of elliptical arcs and line segments, they may be specified for each elliptical arc and line segment.

Example 3
In the semiconductor process simulation apparatus according to the third embodiment of the present invention, the position of the dislocation ring in the diffusion model is the saddle point constituted by the maximum value of the implanted impurity atom concentration based on the result of the ion implantation process simulation means 101. The position is used, and it is defined by an arbitrary distance from the saddle point.

  That is, as shown in FIG. 4, a dislocation ring is formed using a position at an arbitrary distance from saddle point 404 constituted by the maximum value of the implanted impurity atom concentration based on the simulation result of the ion implantation process. The position of the layer 403 is specified. Here, the saddle point is a sequence of points connecting the maximum values of the concentration distribution of impurity atoms as shown in FIG.

Example 4
In the semiconductor process simulation apparatus according to the fourth embodiment of the present invention, the position of the dislocation ring in the diffusion model is defined by the position where the concentration of the implanted impurity atoms is arbitrary based on the result of the ion implantation process simulation means 101. I am going to do that. Here, the arbitrary density is specified by the user of the semiconductor simulation apparatus using the input / output interface 104 or the like.

  That is, the user designates an arbitrary impurity concentration in the impurity concentration distribution showing the result of the ion implantation process simulation means 101 as shown in FIG. The point having the designated density is a curve such as 703 shown in FIG. The position designated by this curve 703 is defined as the position of the layer where the dislocation ring is formed.

Example 5
The semiconductor process simulation apparatus according to the fifth embodiment of the present invention displays an image of the result of the ion implantation process simulation means 101 via the input / output interface 104 in order to give the position coordinates of the layer in which the dislocation ring is formed. The user can input a position determined and determined by the user of the semiconductor process simulation apparatus while viewing the image display, and the input position is used.

  As shown in FIG. 8, the image display function of the input / output interface 104 includes a function for displaying the impurity distribution resulting from the ion implantation process simulation means 101 in a two-dimensional contour line, and an arbitrary cross section designated by the user. And a function of displaying a density profile as shown in FIG.

  The user determines the specific example to be implemented by looking at the results of the ion implantation process simulation means 101. That is, for the semiconductor process simulation apparatus, as shown in FIG. 10, first, the user inputs the coordinates of the points # 1 to #N numerically from the keyboard. Alternatively, the coordinates of the point sequence are input by specifying a position using a pointing device such as a mouse. In the semiconductor process simulation apparatus, the position of the dislocation ring layer 1003 is defined on the basis of the coordinates of the inputted point sequence by interpreting each point as a line segment.

Example 6
FIG. 11 is a block diagram of a semiconductor process simulation apparatus according to Embodiment 6 of the present invention. In the figure, the semiconductor process simulation apparatus according to the present embodiment generates a model for generating a diffusion model in consideration of contributions from an ion implantation process simulation means 101 and a dislocation ring introduced into a silicon substrate at the time of ion implantation. And a heat treatment process simulation means 103 using a diffusion model for diffusion of impurities in the heat treatment process after the ion implantation process.

  Here, the model generation means includes first model generation means 1102a that defines the position of the dislocation ring in the diffusion model by a curve that can be represented by a line segment and an elliptic arc, and the position of the dislocation ring in the diffusion model as an ion. Second model generation means 1102b defined by an arbitrary distance from the saddle point using the position of the saddle point constituted by the maximum value of the implanted impurity atom concentration based on the result of the implantation process simulation means 101, and diffusion Third model generation means 1102c that defines the position of the dislocation ring in the model based on the result of the ion implantation process simulation means 101 based on the position at which the concentration of the implanted impurity atoms is arbitrary, and the dislocation ring in the diffusion model The position of the ion implantation process simulation means 10 is determined via the input / output interface 104. While watching the image display results with, and is configured by including a fourth model generation unit 1102d defined based on the input instruction by the user was, and a switching unit 1103.

  The switching unit 1103 switches to one of the first model generation unit 1102a, the second model generation unit 1102b, the third model generation unit 1102c, and the fourth model generation unit 1102d based on a user's selection instruction, for example. obtain. As a result, the user of the semiconductor process simulation apparatus can use the layer of the dislocation ring most suitable for the information owned by the user of the simulation apparatus, such as the result of the past manufacturing process or the measurement result related to the crystal dislocation ring. It is possible to select the method of defining the position of

Example 7
FIG. 12 is a block diagram of a semiconductor process simulation apparatus according to Embodiment 7 of the present invention.

  In the heat treatment process simulation means 1203 of the present embodiment, only the first heat treatment process after ion implantation (step S1211) is performed using the diffusion model considering the contribution from the dislocation ring, and the second and subsequent heat treatments (step S1212). Uses the normal diffusion model. For example, the input of the position of the dislocation ring is performed in the same manner as in the sixth embodiment.

  In this embodiment, when the second and subsequent heat treatments contribute little to the dislocation ring or are outside the scope of the dislocation wheel model, the normal diffusion model is used for the second and subsequent heat treatments. This is effective, for example, when the first heat treatment after the ion implantation step takes a long time and the dislocation ring model cannot be applied in the next heat treatment step.

Example 8
FIG. 13 is a configuration diagram of a semiconductor process simulation apparatus according to the eighth embodiment of the present invention.

  In the heat treatment process simulation means 1303 of the present embodiment, contribution from dislocation rings in the first heat treatment process after ion implantation (step S1311) and the heat treatment process after the first heat treatment process after ion implantation (step S1312). A diffusion model that takes into account is used. For example, the input of the position of the dislocation ring is performed in the same manner as in the sixth embodiment.

  In this example, the heat treatment after the ion implantation step is a temperature at which the dislocation ring model can be applied to both the first heat treatment and the second heat treatment, and the heat treatment time is This is effective when it is a relatively short time when a ring model can be applied.

Example 9
FIG. 14 is a configuration diagram of a semiconductor process simulation apparatus according to Embodiment 9 of the present invention.

  The heat treatment process simulation means 1403 of the present embodiment uses a diffusion model that considers the contribution from the dislocation ring to the first heat treatment process after ion implantation, and in the heat treatment processes after the first heat treatment process after ion implantation. It is possible to switch between a diffusion model considering the contribution from the dislocation ring or a diffusion model not considering the contribution from the dislocation ring. For example, the input of the position of the dislocation ring is performed in the same manner as in the sixth embodiment.

  In other words, in the second and subsequent heat treatment steps, the user of the semiconductor process simulation apparatus uses a diffusion model that considers the contribution from the dislocation ring in accordance with the process conditions of the manufacturing process to be simulated, or from the dislocation ring. It is possible to select whether to use a normal diffusion model that does not consider contribution, and it is possible to select an optimal model for various manufacturing processes.

(Embodiment 2)
Hereinafter, the outline of the semiconductor process simulation apparatus according to the second embodiment of the present invention and the examples will be described in the order of [Example 10], [Example 11], [Example 12], and [Example 13]. This will be described in detail with reference to the drawings.

[Outline of Semiconductor Process Simulation Apparatus According to Second Embodiment of the Present Invention]
FIG. 15 shows a schematic configuration of a semiconductor process simulation apparatus according to the second embodiment of the present invention. As shown in the figure, the semiconductor process simulation apparatus according to the second embodiment of the present invention uses a transmission electron micrograph image used to extract physical quantities of dislocation rings introduced into a silicon substrate during ion implantation. An image data input unit 2001 (image data input means) to be captured is provided. As described above, in this embodiment, by including the image data input unit 2001 for capturing the transmission electron micrograph image used for extracting the physical quantity of the dislocation ring introduced into the silicon substrate at the time of ion implantation. The image data of the transmission electron micrograph necessary for extracting the physical quantity of the dislocation ring can be handled inside the semiconductor process simulation apparatus.

  Here, the diffusion model taking the dislocation ring into consideration and the focus of the present embodiment will be described in detail.

  If the dose of implanted ions is large in the ion implantation step of the semiconductor manufacturing process, the crystallinity of the implanted crystal is disturbed, and the crystallinity is restored in the heat treatment step following the ion implantation step. In the process of crystal recovery, as shown in the explanatory diagram of FIG. 16, a dislocation ring 203 is generated in a region where ions are implanted 207 in the silicon substrate 201. Since these dislocation rings act as suction holes and discharge holes for point defects that govern the impurity diffusion phenomenon, the behavior of the dislocation rings affects the impurity diffusion. The diffusion model that takes the above-described dislocation ring into consideration has incorporated the above effects into the diffusion model. In addition, in the diffusion model considering the contribution from the dislocation ring, physical quantities relating to the dislocation ring are used.

  Mark E., described in the prior art. The physical quantities related to the dislocation ring used in the diffusion model that takes into account the dislocation ring of Law et al. Can be broadly divided into the density and size of the dislocation ring and the location of the dislocation ring. The physical quantity related to the dislocation ring can usually be obtained from a transmission electron micrograph. More specifically, the density and size of the dislocation ring can be obtained from a cross-sectional transmission electron microscope image as shown in FIG. 16, and the occurrence position of the dislocation ring is a plane transmission as shown in FIG. It can be obtained from an electron micrograph.

  The diffusion model considering the contribution from the dislocation ring aims to improve the accuracy of the results by describing the physical phenomena inside the sample during the diffusion process more accurately than the conventional phenomenological diffusion model. Since it is a diffusion model, it is generally desirable to use data obtained from actual measurements as described above as physical quantities of dislocation rings. However, there are cases where the number of accumulated data is small and the actual physical quantity related to the dislocation wheel under the process condition to be simulated is not obtained. In such a case, the physical quantity that has not been obtained can be executed by setting an appropriate value as a simple parameter in the simulation. Of course, in this case, it is necessary to adjust the parameters.

  As described above, in the diffusion model that considers the contribution from the dislocation ring, the generation position of the dislocation ring and the size and density of the dislocation ring are required. It may be considered as a simple parameter. The explanations of claims 10 to 24 described below are not based on the assumption that all physical quantities such as the generation position of the dislocation ring and the size and density of the dislocation ring were obtained from the actual measurement under all process conditions. The possessed transmission electron micrograph image data is used for extracting a physical quantity, and the data not owned is used as a parameter.

  In the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 15, a transmission electron micrograph image used for extracting physical quantities of dislocation rings introduced into a silicon substrate at the time of ion implantation is used as an image data input unit 2001. (Image data input means), and the process simulation device calculation unit 2002 (process simulation calculation means) is used for the diffusion of impurities in the heat treatment step after the ion implantation step, from the transition ring introduced into the substrate by the ion implantation step. A diffusion model that takes into account the contribution is used. Thus, by providing the image data input unit 2001 for capturing the transmission electron micrograph image used for extracting the physical quantity of the dislocation ring introduced into the silicon substrate at the time of ion implantation, the physical quantity of the dislocation ring is obtained. It is possible to handle the image data of a transmission electron micrograph necessary for extracting the signal inside the semiconductor process simulation apparatus.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 18, a transmission electron micrograph image captured by an image scanner 2003 (image data input means) is used to introduce into a silicon substrate at the time of ion implantation. The dislocation wheel physical quantity extraction unit 2004 (the dislocation ring physical quantity extraction unit) for extracting the physical quantity of the dislocation ring is provided. As a result, the physical quantity of the dislocation ring can be extracted from the captured transmission electron micrograph image.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 18, the physical quantity extraction unit 2004 of the transition ring is configured to transmit the transmission electron micrograph image captured by the image scanner 2003 as shown in FIG. A distinction is made between an electron microscope image and a cross-sectional transmission electron microscope image as shown in FIG. As a result, it is possible to extract and handle different physical quantities between the plane transmission electron microscope observation image and the cross-sectional transmission electron microscope observation image.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 22, the dislocation ring physical quantity extraction unit 2005 detects the size and density of the dislocation ring from the plane transmission electron microscope image as shown in FIG. Is going to be extracted. This makes it possible to use an impurity diffusion model that takes the dislocation rings into account using the size and density of the dislocation rings.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 22, the dislocation ring physical quantity output unit 2005 extracts the size of the dislocation ring extracted from the plane transmission electron microscope image as shown in FIG. The density is classified (organized) for each process condition and stored in the database 2006. This makes it possible to use an impurity diffusion model that takes the dislocation ring into account using the size and density of the dislocation ring obtained from actual measurement under an arbitrary process condition.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 18, the dislocation ring physical quantity extraction unit 2004 generates the dislocation ring generation position data from the cross-sectional transmission electron microscope image as shown in FIG. Extract. This makes it possible to use an impurity diffusion model that takes into account the dislocation ring using the dislocation ring occurrence position obtained from actual measurement.

  In the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 18, the dislocation wheel physical quantity extraction unit 2004 extracts dislocation wheel depth data as dislocation wheel generation position data. That is, the dislocation ring physical quantity extraction unit 2004 extracts data on the dislocation ring depth X as the generation position data of the dislocation ring from the cross-sectional transmission electron microscope image as shown in FIG. By using the generation depth of the dislocation ring obtained from the cross-sectional transmission electron microscope image of the sample created for extraction of the occurrence position of the dislocation ring, an impurity diffusion model that takes into account the dislocation ring Can be used.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 18, the dislocation ring physical quantity extraction unit 2004 uses the dislocation ring generation position data as the dislocation ring generation position data. The parameters of the elliptical arc representing the lateral distance and depth direction from the ion implantation mask and the shape of the transition region in the depth direction and lateral direction of the dislocation ring are extracted. That is, the dislocation ring physical quantity extraction unit 2004 extracts the dislocation ring generation depth X and the dislocation ring generation position from the ion implantation mask 204 from the cross-sectional transmission electron microscope image as shown in FIG. The parameters b and a of the elliptic arc representing the lateral distance Y, the depth direction of the dislocation ring and the shape of the transition region in the lateral direction are extracted. This uses measured values for the depth of the dislocation ring, the lateral distance of the dislocation ring from the ion implantation mask, and the elliptical arc parameters that represent the shape of the transition region in the depth and lateral directions. Thus, it becomes possible to use an impurity diffusion model that takes into account the dislocation ring.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 18, the dislocation ring physical quantity extraction unit 2004 includes one set of dislocation ring occurrence position data extracted from one cross-sectional transmission electron microscope image or Extract multiple sets. Thus, for example, even when dislocation rings as shown in FIG. 21 are formed at a plurality of positions, it is possible to use an impurity diffusion model that takes dislocation rings into consideration.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 22, the dislocation ring occurrence position data extracted by the dislocation ring physical quantity extraction unit 2005 is classified (organized) for each process condition and stored in the database 2006. Store. This makes it possible to use an impurity diffusion model that takes dislocation rings into consideration using the generation position data of dislocation rings obtained from actual measurement under arbitrary process conditions.

  Further, in the semiconductor process simulation apparatus according to the present invention, the size and density of the dislocation rings extracted from the plane transmission electron micrograph image by the dislocation ring physical quantity extraction unit 2005 shown in FIG. The generation position data of dislocation rings extracted from the image is classified for each process condition and stored in the database 2006. This makes it possible to use an impurity diffusion model that takes the dislocation ring into consideration using the size and density of the dislocation ring and the occurrence position data obtained from actual measurement under an arbitrary process condition.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 22, the process condition dependency calculation unit 2007 (process condition dependency calculation means) has the size and density of dislocation rings stored in the database 2006. The process condition dependent coefficient is calculated based on the generation position data of the dislocation ring. This makes it possible to use a diffusion model that takes into account the contribution from the dislocation ring even under any process conditions without data accumulation.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 18, a transmission electron micrograph used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation is optically read. A scanner 2003 is used. This makes it possible to optically read a transmission electron micrograph image used to extract the physical quantity of dislocation rings introduced into the silicon substrate during ion implantation.

  Further, in the semiconductor process simulation apparatus according to the present invention, as shown in FIG. 24, transmission electron micrograph image data used for extracting physical quantities of dislocation rings introduced into the silicon substrate at the time of ion implantation is stored. The transmission electron micrograph image data is read from the storage medium by the storage medium reading unit 2008. This makes it possible to read from the storage medium image data of a transmission electron micrograph used to extract the physical quantity of dislocation rings introduced into the silicon substrate during ion implantation.

  In the semiconductor process simulation apparatus according to the present invention, the image data input means inputs transmission electron micrograph image data used for extracting physical quantities of dislocation rings introduced into the silicon substrate by the ion implantation process from the outside of the apparatus. It has a function. This makes it possible to input image data of a transmission electron micrograph used to extract the physical quantity of dislocation rings introduced into the silicon substrate during ion implantation.

Example 10
FIG. 15 is a block diagram of a semiconductor process simulation apparatus according to Embodiment 10 of the present invention. In the figure, a semiconductor process simulation apparatus includes an image data input unit 2001 for capturing a transmission electron micrograph image used for extracting a physical quantity of a dislocation ring introduced into a silicon substrate during ion implantation, and an ion implantation process. And a process simulation device calculation unit 2002 that uses a diffusion model that takes into account the contribution from the transition ring introduced into the substrate by the ion implantation step in the diffusion of impurities in the subsequent heat treatment step.

Example 11
FIG. 18 is a configuration diagram of a semiconductor simulation apparatus according to Embodiment 11 of the present invention. In the figure, the semiconductor process simulation apparatus includes an image scanner 2003 for optically capturing a transmission electron micrograph image for extracting a physical quantity of a dislocation ring, and a physical quantity of the dislocation ring from the captured transmission electron micrograph image. A dislocation ring physical quantity extraction unit 2004 to be extracted, and a process simulation apparatus calculation unit 2002 that performs diffusion calculation using a diffusion model using the dislocation ring physical quantity extraction unit 2004 extracted by the dislocation ring physical quantity extraction unit 2004 It is provided and configured.

  The dislocation ring physical quantity extraction unit 2004 distinguishes the captured transmission electron micrograph image into a plane transmission electron microscope image as shown in FIG. 17 and a cross-sectional transmission electron microscope image as shown in FIG. When the obtained image is a cross-sectional transmission electron microscope image, the generation position data of the dislocation ring is extracted from the cross-sectional transmission electron microscope image as a physical quantity of the dislocation ring.

  There are various forms of dislocation wheel generation position data. Hereinafter, dislocation wheel generation position data will be described with reference to FIGS.

  FIG. 19 is a diagram (cross-sectional transmission electron micrograph) for explaining that the dislocation ring is in the depth direction. In this figure, 201 is silicon, 202 is a silicon surface, 203 is a surface on which a crystal dislocation ring is formed, 207 is an implanted ion, and X is a depth of a surface on which a crystal dislocation ring is formed. The figure shows that one set of dislocation rings is generated in the depth direction.

  FIG. 20 is a diagram for explaining that a dislocation ring has a two-dimensional shape (cross-sectional transmission electron micrograph). In this figure, 202 is the silicon surface, 203 is the surface on which the crystal dislocation ring is formed, 204 is the gate (ion implantation mask), 207 is the implanted ion, and X is the depth of the surface on which the dislocation ring is formed. Y is a lateral distance from the ion implantation mask at the position where the dislocation ring is generated, and a and b are elliptic arc parameters representing the shape of the transition region in the depth direction and the lateral direction, respectively. Since there is an ion implantation mask, the dislocation ring has a two-dimensional shape. It should be noted that the shape of the transition region in the depth direction and the lateral direction specified by the elliptic arc parameters a and b can be expressed by the above equation (4).

  FIG. 21 is a diagram for explaining the occurrence of two dislocation rings (cross-sectional transmission electron micrograph). In this figure, 202 is a silicon surface, 204 is a gate (ion implantation mask), 203A is a first surface on which a dislocation ring is formed, and 203A is a second surface on which a crystal dislocation ring is formed. The figure shows that dislocation rings are formed in two places (203A, 203B).

  When the dislocation ring physical quantity extraction unit 2004 extracts the dislocation ring occurrence position data from the cross-sectional transmission electron microscope image as described above, the dislocation ring occurrence position data has a depth as shown in FIG. 20 or position information including a two-dimensional shape as shown in FIG. 20, or whether there are multiple occurrence positions of dislocation rings as shown in FIG. The position information of the generation position of the ring is extracted.

Example 12
FIG. 22 is a configuration diagram of a semiconductor process simulation apparatus according to the twelfth embodiment of the present invention. In this figure, the semiconductor process simulation apparatus optically captures a transmission electron micrograph image for extracting the physical quantity of the dislocation ring, and calculates the physical quantity of the dislocation ring from the captured transmission electron micrograph image. The physical quantity extraction unit 2005 of the dislocation wheel to be extracted and the physical quantity of the dislocation ring extracted by the physical quantity extraction unit 2005 of the dislocation ring are classified (organized) for each process condition (for example, heat treatment time, heat treatment temperature, etc.). When the database 2006 to be stored and the physical quantity of the dislocation ring necessary for performing the diffusion calculation in the process simulation apparatus calculation unit 2002 are not stored in the database 2006, the physical quantity of the dislocation ring necessary for the diffusion calculation (process condition) Dependency coefficient), a process condition dependency calculation unit 2007, and a physical quantity of a dislocation ring Constituted by and a process simulation device calculating unit 2002 by using the diffusion model using the physical quantity of wheel dislocation extracted with out section 2005 performs spreading calculations.

  The dislocation ring physical quantity extraction unit 2005 distinguishes the captured transmission electron micrograph image into a plane transmission electron microscope image and a cross-sectional transmission electron microscope image. Then, when the captured image is a cross-sectional electron microscope image, the dislocation ring physical quantity extraction unit 2005 extracts the generation position data of the dislocation ring from the cross-sectional transmission electron microscope image, as in the case of the eleventh embodiment. In this case, whether the dislocation occurrence position data is information of only depth as shown in FIG. 19 or position information including a two-dimensional shape as shown in FIG. 20, or as shown in FIG. It is determined whether there are a plurality of positions of occurrence of dislocation rings, and position information of the occurrence positions of dislocation rings is extracted. Further, when the captured image is a plane transmission electron microscope image, the dislocation ring physical quantity extraction unit 2005 determines the size and density of the dislocation ring from the plane transmission electron micrograph image as shown in FIG. Extract.

  The database 2006 classifies (arranges) the size and density of dislocation rings extracted from the plane electron microscope image and the generation position data of dislocation rings extracted from the cross-sectional transmission electron microscope image for each process condition. Store.

  Next, an example of processing by the process condition dependency calculation unit 2007 will be described with reference to FIG. FIG. 23 is a diagram showing the time dependence of dislocation ring density with respect to heat treatment. Hereinafter, the density calculation of the dislocation ring performed by the process condition dependency calculation unit 2007 will be described. The physical quantity of the dislocation wheel calculated by the process condition dependent calculation unit 2007 is referred to as a process condition dependent coefficient.

  In the diffusion calculation of the process simulation device calculation unit 2002, the density of the dislocation ring is required for each time step of the diffusion calculation, so the density data of the dislocation ring extracted by the physical quantity extraction unit 2005 of the dislocation ring is insufficient. There is a case.

  The process condition dependency calculation unit 2007 uses the dislocation ring physical quantity extraction unit 2005 to extract the dislocation ring density data extracted from the cross-sectional transmission electron microscope image and stored in the database 2006 for each process condition (for example, heat treatment time). First, as shown in FIG. 23, the density 901 of the extracted dislocation rings is plotted against the heat treatment time, and a fitting curve 902 passing through each point of the 901 is calculated to calculate the time step of the diffusion calculation. Calculate the density (process condition dependent coefficient) of the dislocation ring for each dislocation. In the process simulation apparatus calculation unit 2002, the diffusion calculation is performed using the calculated density of dislocation rings for each time step of the diffusion calculation.

  In the example shown here, the method of calculating the density necessary for the diffusion calculation using the fitting curve has been described, but the calculation can also be performed by other calculation methods such as an extraction point interpolation method. Further, here, the heat treatment time dependence of the density of dislocation rings has been described, but the size of the dislocation ring, the generation position, and other process condition dependence can be calculated in the same manner.

Example 13
FIG. 24 is a configuration diagram of a semiconductor process simulation apparatus according to the thirteenth embodiment of the present invention. In the figure, the same parts as those of the semiconductor process simulation apparatus shown in FIG.

  The semiconductor process simulation apparatus shown in FIG. 24 has a storage medium reading unit (magneto-optical recording) that reads transmission electron microscope image data from a magneto-optical storage medium storing transmission electron microscope image data for extracting physical quantities of dislocation rings. Reading section 2008). In this magneto-optical storage medium, transmission electron microscope image data for extracting physical quantities of dislocation rings is digitized and recorded by an off-line recording device.

  Further, the dislocation wheel physical quantity extraction unit 2005, the database 2006, the process condition dependency calculation unit 2007, and the process simulation apparatus calculation unit 2002 have the same configuration as that of the twelfth embodiment (FIG. 22), and a storage medium. Since the transmission electron microscope image read by the reading unit 2008 is processed in the same manner as in the twelfth embodiment, detailed description thereof is omitted.

  In this embodiment, the magneto-optical storage medium 1001 is used as a storage medium for storing transmission electron microscope image data. However, the present invention is not limited to this, and other storage media such as magnetic A recording medium, an optical storage medium, or the like may be used. In this case, digitized transmission electron microscope image data is stored by magnetic recording on the magnetic recording medium, and digitized transmission electron microscope image data is stored by optical recording on the optical recording medium. The transmission electron microscope image data may be input by line input using a network.

  In the first to thirteenth embodiments (FIGS. 1, 11, 12, 13, 13, 14, 15, 18, 22, and 24), the configuration of the semiconductor process simulation apparatus is shown in a functional block diagram. However, the semiconductor process simulation apparatus described above can be realized by a program (software) for executing the functions of the respective units of the semiconductor process simulation apparatus and a microprocessor for executing the program. In this case, the program is stored in an optical storage medium such as a CD-ROM or a magnetic storage medium such as a flexible disk or a hard disk.

  The semiconductor process simulation apparatus according to the present invention is useful when simulating a semiconductor manufacturing process.

It is a block diagram of the semiconductor process simulation apparatus which concerns on Example 1 of this invention. It is explanatory drawing explaining the dislocation ring of the crystal | crystallization formed when ion implantation is performed in transistor shape. It is explanatory drawing explaining the definition method of the position of the ring | wheel of a dislocation by the line segment and elliptical arc in Example 2. FIG. FIG. 10 is an explanatory diagram for explaining a method of defining the position of a dislocation ring by an arbitrary distance from the saddle point of the impurity atom concentration in Example 3. It is explanatory drawing explaining the saddle point of impurity atom concentration. FIG. 10 is an explanatory diagram for explaining designation of an arbitrary concentration in an impurity concentration profile of Example 4. It is explanatory drawing explaining the position of the wheel of a dislocation determined by density | concentration designation | designated in Example 4. FIG. FIG. 10 is an explanatory diagram of a two-dimensional contour line display of an impurity concentration distribution in Example 5. It is explanatory drawing of the cross-sectional impurity concentration profile display in Example 5. FIG. FIG. 10 is an explanatory diagram for explaining a method for designating a layer of a dislocation ring by point sequence input in Example 5. It is a block diagram of the semiconductor process simulation apparatus which concerns on Example 6 of this invention. It is a block diagram of the semiconductor process simulation apparatus which concerns on Example 7 of this invention. It is a block diagram of the semiconductor process simulation apparatus which concerns on Example 8 of this invention. It is a block diagram of the semiconductor process simulation apparatus which concerns on Example 9 of this invention. It is a block diagram of the semiconductor process simulation apparatus which concerns on Example 10 of this invention. It is explanatory drawing explaining the ring | wheel of the crystal | crystallization dislocation | rearrangement formed when ion implantation is performed in transistor shape (cross-sectional transmission electron microscope image example). It is a figure which shows the example of a plane transmission electron microscope image. It is a block diagram of the semiconductor process simulation apparatus which concerns on Example 11 of this invention. It is a figure which shows the sample example (cross-sectional transmission electron microscope image example) for the generation | occurrence | production depth of the ring | wheel of a dislocation | rearrangement. It is a figure which shows the usage example (cross-sectional transmission electron microscope image example) for the generation | occurrence | production position of the ring | wheel of a dislocation | rearrangement. It is a figure (example of a cross-sectional transmission electron microscope image) which shows the example which has two generation | occurrence | production positions of the ring | wheel of a dislocation | rearrangement. It is a block diagram of the semiconductor process simulation apparatus which concerns on Example 12 of this invention. It is a figure for demonstrating the example of process condition dependence calculation. It is a block diagram of the semiconductor process simulation apparatus which concerns on Example 13 of this invention. It is explanatory drawing which showed that the ring | wheel of a crystal | crystallization dislocation was a plane. It is explanatory drawing which showed that the ring | wheel of the crystal | crystallization dislocation was mutually orthogonally crossed. It is explanatory drawing which showed calculating | requiring the sum total of the contribution from a dislocation | rearrangement ring | wheel using the 6 dislocation | rearrangement ring | wheels which adjoined most recently.

Explanation of symbols

101 Ion implantation process simulation means 102 Model generation means 103 Heat treatment process simulation means 104 Input / output interface 105 User 201 Silicon 202, 402, 702, 802, 1002 Silicon surface 203, 403, 703, 1003 A dislocation ring is formed. Plane 204, 401, 701, 801, 1001 Gate electrode 207 Implanted ion 301 Dislocation ring 404 Saddle point constituted by maximum value of impurity atom concentration 803A, 803B, 803C, 803D Plane on which dislocation ring is formed 1102a No. 1 model generating means 1102b second model generating means 1102c third model generating means 1102d fourth model generating means 1103, 1203, 1303, 1403 heat treatment process simulation means 110 Switching means 1501 Silicon 1502 Silicon surface 1503 Crystal dislocation rings 1604 Crystal dislocation rings 1604a to 1604f Crystal dislocation rings 2001 Image data input section 2002 Process simulation calculation section 2003 Image scanner 2004, 2005 Displacement wheel physical quantity extraction unit 2006 database 2007 process condition dependency calculation unit 2008 storage medium reading unit (magneto-optical recording reading unit)

Claims (15)

In a semiconductor process simulation apparatus that simulates a semiconductor manufacturing process,
Image data input means for inputting a transmission electron micrograph image used to extract a physical quantity of a dislocation ring introduced into a silicon substrate at the time of ion implantation;
A process simulation means for performing impurity diffusion using a diffusion model that takes into account the contribution from the transition ring introduced into the substrate by the ion implantation step to the diffusion of the impurity in the heat treatment step after the ion implantation step;
A semiconductor process simulation apparatus comprising:   Dislocation ring physical quantity extraction means for extracting physical quantities of dislocation rings introduced into the silicon substrate during ion implantation using the transmission electron micrograph image captured by the image data input means. The semiconductor process simulation apparatus according to claim 1.   3. The dislocation wheel physical quantity extracting means distinguishes the transmission electron micrograph image captured by the image data input means into a plane transmission electron microscope image and a cross-sectional transmission electron microscope image. Semiconductor process simulation equipment.   4. The semiconductor process simulation apparatus according to claim 3, wherein the dislocation ring physical quantity extracting means extracts the dislocation ring size and density from the plane transmission electron microscope image.   5. A database for classifying and storing the size and density of a dislocation ring extracted from the plane transmission electron microscope image by the dislocation ring physical quantity extraction means for each process condition. The semiconductor process simulation apparatus described.   4. The semiconductor process simulation apparatus according to claim 3, wherein said dislocation ring physical quantity extraction means extracts dislocation ring occurrence position data from said cross-sectional transmission electron microscope image.   7. The semiconductor process simulation apparatus according to claim 6, wherein the generation position data of the dislocation ring is a generation depth of the dislocation ring.   The dislocation ring generation position data includes the dislocation ring generation depth, the lateral distance and depth direction of the dislocation ring generation position from the ion implantation mask, and the dislocation ring depth direction and lateral direction. 8. The semiconductor process simulation device according to claim 7, wherein the semiconductor process simulation device is an elliptic arc parameter expressing a shape of a direction transition region.   9. The semiconductor process simulation apparatus according to claim 6, 7 or 8, wherein the generation position data of dislocation rings extracted from one cross-sectional transmission electron microscope image is one set or a plurality of sets.   10. The semiconductor process simulation apparatus according to claim 6, further comprising a database that stores the generation position data of the dislocation ring classified for each process condition. 10.   The size and density of the dislocation ring extracted from the plane transmission electron microscope image by the physical quantity extraction means of the dislocation ring, and the generation position data of the dislocation ring extracted from the cross-sectional transmission electron microscope image 10. A semiconductor process simulation apparatus according to claim 4, further comprising a database that is classified and stored for each process condition.   The size and density of the dislocation wheel stored in the database and the occurrence position data of the dislocation ring are stored in the database so that the diffusion calculation based on the diffusion model considering the contribution from the dislocation wheel can be used under any process conditions. 12. The semiconductor process simulation apparatus according to claim 11, further comprising process condition dependency calculating means for calculating a process condition dependency coefficient based on the above.   The image data input means is a scanner that optically reads a transmission electron micrograph image used to extract a physical quantity of a dislocation ring introduced into a silicon substrate during ion implantation. The semiconductor process simulation apparatus according to any one of 1 to 12.   The image data input means includes a transmission electron micrograph image image from a storage medium storing transmission electron micrograph image data used to extract a physical quantity of dislocation rings introduced into the silicon substrate during ion implantation. Data is read, The semiconductor process simulation apparatus as described in any one of Claims 1-12 characterized by the above-mentioned.   2. The image data input means has a function of inputting transmission electron micrograph image data used for extraction of physical quantities of dislocation rings introduced into a silicon substrate by an ion implantation process from the outside of the apparatus. The semiconductor process simulation apparatus according to any one of?

Images