JP2007035123A - Device and method for recording/reproducing - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To stably record/reproduce data by executing stable servo control even for a recording medium having a defect. <P>SOLUTION: Focus control and tracking control is performed in such a manner that an optical pickup device 4 applies a first optical spot for reproducing or recording data to the recording surface of an optical disk 2, a reproducing signal processing circuit 5 outputs the focus shifting detection signal of a first spot based on the reflected light of the first optical spot and the track shifting detection signal of the first optical spot based on the reflected light of the first optical spot, a flaw detection sensor 16 applies a second optical spot to a predetermined position before the first optical spot, a flaw detection circuit 17 outputs the defect detection signal of the recording surface based on the reflected light of the second optical spot, and a servo controller 6 outputs a signal correcting a timing difference caused by a position difference between the first and second optical spots with respect to the detection signal. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a recording / reproducing apparatus including an optical disc apparatus that records and reproduces data on a recording medium, and a recording / reproducing method that records and reproduces data on the recording medium.

Conventionally, a main beam is detected using a preceding beam before entering a defective portion (disc defective portion) generated on the recording surface of a dusty, dirty or scratched optical disc, and focusing and tracking servos are held in the defective disc portion. Thus, there has been a recording / reproducing method (see, for example, Patent Documents 1 and 2) that improves the stability of recording and reproduction.
Also, there is a recording / reproducing method (see, for example, Patent Document 3) in which a preceding beam is prepared as a separate optical system and focusing and tracking servo are held by detecting a defective portion of the disk at an early stage to improve recording and reproduction stability. there were.
JP-A-9-16981 Japanese Patent Laid-Open No. 2004-146013 JP-A-5-73935

However, in the above-described recording and reproducing methods of Patent Documents 1 and 2, a signal used for servo, such as a tracking error signal, is generated using the preceding beam, and the disk defect is detected by reducing the light amount of the preceding beam. Therefore, when the defective disk portion is detected, the preceding beam is affected by the defective disk portion, and the tracking error signal is also affected by the defective disk portion, which makes the servo slightly unstable. There was a problem.
On the other hand, in the recording / reproducing method of Patent Document 3 described above, the preceding beam only detects the defective portion of the disk, and the servo does not become unstable due to the above-described causes.

However, there are the following problems.
1. In the preceding beam, the defective disk portion is detected earlier than the main beam, but it passes through the defective disk portion early, but no countermeasure is taken.
2. Since the preceding beam and the main beam are separate optical systems, it is expected that it is difficult to match the time difference between the relative distances of the preceding beam and the main beam spot, but no countermeasure has been taken.
The present invention has been made in view of the above points, and it is possible to perform stable servo control even on a recording medium having a defective portion, and as a result, to perform stable data recording and reproduction. Objective.

In order to achieve the above object, the present invention provides the following recording / reproducing apparatus and recording / reproducing method.
(1) A first light spot irradiating means for irradiating a recording surface of a recording medium with a first light spot for reproducing or recording data, and a first light spot irradiated by the first light spot irradiating means. Defocus detection means for outputting a detection signal for detecting defocus of the first light spot on the recording surface based on the reflected light from the recording surface, and first light irradiated by the light spot irradiation means Track deviation detecting means for outputting a detection signal for detecting the track deviation of the first light spot on the recording surface based on the reflected light of the light spot, and the recording surface preceding the first light spot. The second light spot irradiating means for irradiating the second light spot at a predetermined position, and the recording surface by the second light spot irradiated by the second light spot irradiating means. Recording surface defect detection means for outputting a detection signal for detecting a defect on the recording surface based on the reflected light of the recording surface, and the first light spot and the first light for the detection signal output by the recording surface defect detection means. A timing correction unit that outputs a signal in which a timing difference caused by the difference between the two light spot positions is corrected, a detection signal output by the focus deviation detection unit, and a focus control according to the signal output by the timing correction unit. A recording / reproducing apparatus comprising: a focus control unit that performs tracking control unit that performs tracking control according to a detection signal output from the track deviation detection unit and a signal output from the timing correction unit.

(2) The recording / reproducing apparatus according to (1), wherein the correction by the timing correction unit is performed with reference to a fixed clock.
(3) The recording / reproducing apparatus according to (1), wherein the correction by the timing correction unit is performed based on a clock output from an oscillator having a variable frequency.
(4) The recording / reproducing apparatus according to (1), wherein the correction of the timing correction unit is performed based on a clock generated from a reproduction signal of the recording medium.
(5) The recording / reproducing apparatus according to (1), wherein the correction of the timing correction unit is performed based on a clock generated from a wobble signal of the recording medium.
(6) In the recording / reproducing apparatus of (1), the timing correction means includes a clock output from an oscillator having a variable frequency, a clock generated from a reproduction signal of the recording medium, and a wobble signal of the recording medium. A recording / reproducing apparatus having clock selection output means for selecting and outputting any of the clocks generated from the above-mentioned clock, and performing the correction based on the clock output by the clock selection output.

(7) In the recording / reproducing apparatus according to any one of (1) to (6), the timing correction unit delays the detection signals output by the recording surface defect detection unit at a plurality of timings and outputs the delayed signals. And a recording / reproducing apparatus provided with selection output means for inputting a plurality of signals output by the delay means and selecting and outputting one of the signals.
(8) In the recording / reproducing apparatus according to any one of (1) to (7), the recording surface defect detection unit is configured to detect a signal other than a defect portion on the recording surface from a signal proportional to the reflected light of the second light spot. A signal level holding / outputting means for outputting a signal holding the signal level of the part; a signal level attenuating means for attenuating and outputting the signal level of the signal output by the signal level holding / outputting means; and the signal level attenuating means. Comparing means for comparing the output signal and a signal proportional to the reflected light of the second light spot to output a signal level signal of the defective portion of the recording surface, and a signal output by the comparing means A recording / reproducing apparatus having a pulse width extending means for extending a pulse width and outputting it.

(9) The recording / reproducing apparatus according to (8), wherein the signal level attenuation amount of the signal level attenuating means is variable.
(10) The recording / reproducing apparatus according to (8), wherein the extension width of the pulse width of the signal of the pulse width extending means is variable.

(11) In the recording / reproducing apparatus according to any one of (1) to (7), the recording surface defect detection unit is configured to detect a signal other than a defect portion on the recording surface from a signal proportional to the reflected light of the second light spot. First signal level holding / outputting means for outputting a signal holding the signal level of the part, and first signal level attenuation for attenuating and outputting the signal level of the signal output by the first signal level holding / outputting means And a signal output by the first signal level attenuating means and a signal proportional to the reflected light of the second light spot, and a signal level signal at the defective portion of the recording surface is output. A first comparison means, a second signal level holding output means for outputting a signal holding the signal level of a portion other than the defective portion of the recording surface from the sum signal obtained from the first light spot, and the second The faith Second signal level attenuating means for attenuating and outputting the signal level of the signal output by the level holding output means, the signal output by the second signal level attenuating means and the reflected light of the first light spot The second comparison means for comparing the signal proportional to the signal to output a signal level signal of the defective portion of the recording surface, the signal output by the first comparison means and the second comparison means A recording / reproducing apparatus comprising delay amount detection means for detecting a delay amount with respect to the received signal and delay amount storage means for storing the delay amount detected by the delay amount detection means.

(12) By a first light spot irradiation step of irradiating a recording surface of a recording medium with a first light spot for reproducing or recording data, and the first light spot irradiated by the first light spot irradiation step. A focus shift detection step for outputting a detection signal for detecting a focus shift of the first light spot on the recording surface based on the reflected light from the recording surface, and a first irradiation performed by the light spot irradiation step. A track shift detection step of outputting a detection signal for detecting a track shift of the first light spot on the recording surface based on the reflected light of the light spot, and the recording surface preceding the first light spot. A second light spot irradiating step for irradiating a second light spot at a predetermined position, and the recording surface by the second light spot irradiated by the second light spot irradiating step A recording surface defect detection step for outputting a detection signal for detecting a defect on the recording surface based on the reflected light, and the first light spot and the detection signal output by the recording surface defect detection step. A timing correction step for outputting a signal in which a timing difference caused by the difference in the second light spot position is corrected, a focus control according to the detection signal output by the focus deviation detection step and the signal output by the timing correction step A recording / reproducing method comprising: a focus control step for performing tracking control; and a tracking control step for performing tracking control according to the detection signal output by the track deviation detection step and the signal output by the timing correction step.

(13) In the recording / reproducing method of (12), the recording surface defect detection step maintains a signal level of a portion other than the defective portion of the recording surface from a signal proportional to the reflected light of the second light spot. A signal level holding and outputting step for outputting a signal, a signal level attenuating step for attenuating and outputting the signal level of the signal output by the signal level holding and outputting step, the signal outputted by the signal level attenuating step, and the first A comparison step of comparing a signal proportional to the reflected light of the light spot of 2 and outputting a signal level signal of the defective portion of the recording surface, and outputting by extending the pulse width of the signal output by the comparison step A recording / reproducing method including a pulse width extending step.

(14) In the recording / reproducing method of (12), the recording surface defect detection step maintains a signal level of a portion other than the defective portion of the recording surface from a signal proportional to the reflected light of the second light spot. A first signal level holding and outputting step for outputting a signal; a first signal level attenuating step for attenuating and outputting the signal level of the signal output by the first signal level holding and outputting step; and the first A first comparison step of comparing the signal output by the signal level attenuation step with a signal proportional to the reflected light of the second light spot and outputting a signal level signal of the defective portion of the recording surface; A second signal level holding output step for outputting a signal holding a signal level of a portion other than the defective portion of the recording surface from the sum signal obtained from the first light spot; and the second signal level holding output. The second signal level attenuation step for attenuating and outputting the signal level of the signal output by the step, and the signal output by the second signal level attenuation step and the reflected light of the first light spot are proportional A second comparison step of comparing a signal and outputting a signal of a signal level of a defective portion of the recording surface, a signal output by the first comparison step, and a signal output by the second comparison step A delay amount detecting step for detecting the delay amount, and a delay amount storing step for storing the delay amount detected by the delay amount detecting step.

  The recording / reproducing apparatus and the recording / reproducing method according to the present invention can perform stable servo control even on a recording medium having a defective portion, and as a result, can stably record and reproduce data.

Hereinafter, the best mode for carrying out the present invention will be specifically described with reference to the drawings.
〔Example〕
FIG. 1 is a block diagram showing a schematic configuration of an optical disc apparatus 1 according to the present embodiment.
The optical disk apparatus 1 is an example of an apparatus for recording and reproducing information with respect to a CD-type and DVD-type optical disk 2.
As the DVD optical disk 2, for example, a disk including a DVD-ROM disk, a single layer DVD + R disk, and a dual layer DVD + R disk can be used.
As the CD optical disk 2, for example, a disk including a CD-ROM disk, a CD-R disk, a CD-RW disk, and a CD + RW disk can be used.

This optical disk apparatus 1 includes a spindle motor 3 for rotating and driving an optical disk 2 as a recording medium, an optical pickup apparatus 4, a reproduction signal processing circuit 5, a servo controller 6, a motor driver 7, a buffer RAM 8, a buffer manager 9, and an encoder 10. , A laser control circuit 11, an interface 12, a CPU 13, a flash memory 14, a RAM 15, a scratch detection sensor 16, and a scratch detection circuit 17.
Note that the connection lines shown in FIG. 1 represent typical signals and information flows, and do not represent all the connection relationships of the blocks.

The optical pickup device 4 is a device that irradiates the optical disc 2 with laser light L by a laser diode (LD), which is a known semiconductor laser light source (not shown), and receives reflected light that is a return light beam from the optical disc 2. A reproduction signal (current) corresponding to the amount of received reflected light is output to the reproduction signal processing circuit 5. That is, the laser beam L corresponds to a first light spot, and the optical pickup device 4 irradiates the first light spot for reproducing or recording data on the recording surface of the recording medium. Fulfills the function.
Also, a known seek motor (not shown) is provided, and the apparatus is movable in the radial direction of the optical disc 2 using the seek motor as a drive source.

The scratch detection sensor 16 is a sensor that includes a light source including an LED, irradiates the optical disk 2 with the light beam B, and receives reflected light that is a return light beam from the optical disk 2. A corresponding signal (current) is output to the scratch detection circuit 17.
The scratch detection sensor 16 is disposed so that the light beam B for irradiating and moving the optical disc 2 precedes the laser beam L for irradiating and moving the optical disc 2 from the LD of the optical pickup device 4. .

That is, the scratch detection sensor 16 functions as a second light spot irradiating unit that irradiates the second light spot onto a predetermined position preceding the first light spot on the recording surface of the recording medium.
Since the amount of reflected light received by the scratch detection sensor 16 is reduced in the defective portion of the disc including the scratched portion, the dust-attached portion, and the contaminated portion on the optical disc 2, the scratch detection sensor 16 Using the output signal, a defective disk portion (hereinafter referred to as “scratch”) on the optical disk 2 is detected.
Although the scratch detection sensor 16 is illustrated separately from the optical pickup device 4 in FIG. 1, it is better to install the scratch detection sensor 16 on the optical pickup device 4.

  The reproduction signal processing circuit 5 generates a servo signal including a focus error signal and a track error signal (hereinafter also referred to as “tracking error signal”) based on the reproduction signal input from the optical pickup device 4 and outputs the servo signal to the servo controller 6. . That is, the focus error signal corresponds to a detection signal for detecting a focus shift of the first light spot on the recording surface, and the track error signal is a track shift of the first light spot on the recording surface of the recording medium. The reproduction signal processing circuit 5 detects the signal on the recording surface based on the reflected light from the recording surface of the recording medium by the first light spot irradiated by the first light spot irradiating means. Defocus detection means for outputting a detection signal for detecting defocus of the first light spot, and first on the recording surface of the recording medium based on the reflected light of the first light spot irradiated by the light spot irradiation means. It functions as a track shift detection means for outputting a detection signal for detecting a track shift of the light spot.

The scratch detection circuit 17 detects a defective disk portion including a scratched portion, a dust-attached portion, and a contaminated portion on the optical disk 2 based on a signal input from the scratch detection sensor 16, and a detection signal thereof. Is output to the servo controller 6.
That is, the scratch detection circuit 17 outputs a detection signal for detecting a defect on the recording surface based on the reflected light from the recording surface of the recording medium by the second light spot irradiated by the second light spot irradiating means. It functions as a surface defect detection means.

The servo controller 6 generates a focus control signal for correcting the focus shift based on the focus error signal input from the reproduction signal processing circuit 5 and also a tracking control signal for correcting the track shift based on the track error signal. Is output to the motor driver 7. Further, the focus control signal and tracking control signal are held based on the detection signal input from the scratch detection circuit 17.
The focus control signal and tracking control signal are output from the servo controller 6 to the motor driver 7 when the servo is on, and are not output when the servo is off. The servo-on and servo-off are set for the servo controller 6 by the CPU 13.
That is, the servo controller 6 and the CPU 13 output timing correction signals for correcting the timing difference caused by the difference between the first light spot position and the second light spot position with respect to the detection signal output by the recording surface defect detection means. Serves as a means.

The motor driver 7 outputs various drive signals to the optical pickup device 4 based on the focus control signal and tracking control signal input from the servo controller 6.
That is, tracking control and focus control are performed by the reproduction signal processing circuit 5, the servo controller 6 and the motor driver 7, and each part thereof is converted into a detection signal output by the focus deviation detection means and a signal output by the timing correction means. In response to this, it functions as a focus control means for performing the focus control, and a tracking control means for performing the tracking control according to the detection signal output from the track deviation detection means and the signal output from the timing correction means.

Further, the motor driver 7 outputs drive signals for the spindle motor 3 and a seek motor (not shown) based on a control signal from the CPU 13.
That is, the motor driver 7 controls the rotation of the spindle motor 3 based on an instruction from the CPU 13 so that the linear velocity of the optical disk 2 is constant, and further drives a seek motor (not shown) to drive the optical pickup device. 4 is moved in the radial direction (a predetermined position in the radial direction of the optical disc 2) toward the target track of the optical disc 2.

The buffer RAM 8 temporarily stores data including data to be recorded on the optical disk 2 (recording data) and data reproduced from the optical disk 2 (reproduction data), and a variable area to store data including various program variables. And a readable / writable memory.
The buffer manager 9 manages input / output of data to / from the buffer RAM 8, and notifies the CPU 13 when the amount of data stored in the buffer area of the buffer RAM 8 reaches a predetermined amount.
Based on an instruction from the CPU 13, the encoder 10 takes out the recording data stored in the buffer RAM 8 via the buffer manager 9, performs various processes including data modulation and addition of an error correction code to the optical disc 2. The data write signal is generated, and the generated write signal is output to the laser control circuit 11.

The laser control circuit 11 generates a drive signal for the emission of the laser beam L of the semiconductor laser LD based on the write signal input from the encoder 10 and data including the emission characteristics of the laser beam L of the semiconductor laser LD (not shown). To the optical pickup device 4.
In other words, the laser control circuit 11 controls the light emission power of the laser light L applied to the optical disc 2 with respect to the optical pickup device 4.
The interface 12 is a bidirectional communication interface with a host computer (for example, a device including a personal computer) serving as an external device, and conforms to a standard interface including, for example, USB, IEEE, ATAPI, and SCSI.

The CPU 13 constitutes a microcomputer (computer) included in the optical disc apparatus 1 together with the flash memory 14 and the RAM 15.
The flash memory 14 includes a program area and a data area referred to by the CPU 13. In the program area, various programs including a control program written in a code readable by the CPU 13 are stored. The data area stores data (information) relating to the emission characteristics of the semiconductor laser LD, information relating to the seek operation of the seek motor of the optical pickup device 4 (hereinafter also referred to as “seek information”), and various information including recording conditions. Has been.
The CPU 13 controls the operation of each unit described above according to various programs stored in the program area of the flash memory 14 and stores data necessary for the control in the variable area of the buffer RAM 8 and the RAM 15.

When the optical disk apparatus 1 is powered on, the program stored in the flash memory 14 is loaded (installed) into a known main memory (not shown) of the CPU 13. A flash memory 14 or RAM 15 is used as a data storage device for temporarily storing various data, and a recording medium that can provide a pre-recorded program (software program) to a microcomputer is a main memory, HDD, CD-ROM. A recording medium including a disk can be used.
Other recording media that can provide a pre-recorded program (software program) to the CPU 13 are flexible disk (FD), MO, MD, CD ± R disk, CD ± RW disk, DVD ± RAM disk, DVD ± RW disk. In addition, various memory cards are used.

Next, the internal configuration of the servo controller 6 will be described.
FIG. 2 is a block diagram showing an internal configuration of the servo controller 6 shown in FIG.
The servo controller 6 is output from a focus control signal generation circuit 160 that generates a focus control signal for correcting a focus shift based on the focus error signal input from the reproduction signal processing circuit 5, and the focus control signal generation circuit 160. A low-frequency detection circuit 161 that detects and outputs a low-frequency component of the focus control signal, and a tracking control signal that generates a tracking control signal for correcting a track shift based on the track error signal input from the reproduction signal processing circuit 5 A generation circuit 163, a low-frequency detection circuit 164 that detects and outputs a low-frequency component of the tracking control signal output from the tracking control signal generation circuit 163, and a focus control signal output from the focus control signal generation circuit 160 and a low-frequency component. The area output from the area detection circuit 161 A selector 162 that selects one of the low-frequency component signals of the residue control signal and outputs it to the motor driver 7, the tracking control signal output from the tracking control signal generation circuit 163, and the low-frequency detection circuit 164 The selector 165 selects any one of the low-frequency component signals of the tracking control signal and outputs the selected signal to the motor driver 7.

  The servo controller 6 is further configured to input a detection signal (also referred to as “scratch detection signal”) output from the scratch detection circuit 17 as a selection signal of the selector 162 and the selector 165, so that the scratch detection circuit 17 When the output detection signal is input to the selector 162 and the selector 165 based on a portion of the optical disc 2 that is not a defective portion of the disc, the selector 162 selects the focus control signal input from the focus control signal generation circuit 160 and selects the motor driver. 7, the selector 165 selects the tracking control signal input from the tracking control signal generation circuit 163 and outputs it to the motor driver 7.

  On the other hand, when the detection signal output from the scratch detection circuit 17 is input to the selector 162 and the selector 165 based on the disk defect portion of the optical disk 2, the selector 162 detects the low frequency of the focus control signal input from the low frequency detection circuit 161. The component signal is selected and output to the motor driver 7 as a focus control signal, and the selector 165 selects the low frequency component signal of the tracking control signal input from the low frequency detection circuit 164 to the motor driver 7 as the tracking control signal. Output.

  In this way, servo control is performed by outputting the outputs of the focus control signal generation circuit 160 and the tracking control signal generation circuit 163 from the selector 162 and the selector 165, respectively, in the normal part of the optical disc 2, and the disc defective portion of the optical disc 2 Then, the outputs of the low-frequency detection circuit 161 and the low-frequency detection circuit 164 are output from the selector 162 and the selector 165, respectively, so that the hold processing of the focus control signal and the tracking control signal is performed.

Next, the optical pickup device 4 will be described in detail with reference to FIGS.
FIG. 3 is a longitudinal sectional view showing a schematic configuration of the optical pickup device 4, and FIG. 4 is a plan view showing a schematic configuration of the light receiver PD shown in FIG.
As shown in FIG. 3, the optical pickup device 4 includes a drive system unit including a light emitting / receiving module 30, a diffraction element 31, a collimating lens 32, an objective lens 33, and a known focusing actuator, a tracking actuator, and a seek motor (not shown). I have.
In the present embodiment, like the coordinate axis 20 shown in FIG. 3, the focus direction with respect to the optical disc 2 is the Z-axis direction, the tracking direction and the seek direction are the X-axis direction, and the direction corresponding to the tangential direction of the track is the Y-axis. The direction.

The light emitting / receiving module 30 includes, for example, a semiconductor laser light source LD as a light source that emits laser light L having a wavelength of 660 nm and a light receiver PD that receives reflected light that is a returning light beam from the optical disk 2.
Here, the maximum intensity emission direction of the light beam emitted from the light receiving and emitting module 30 is defined as the + Z axis.
The light receiver PD is disposed in the vicinity of the semiconductor laser light source LD and receives the return light beam diffracted by the diffraction element 31.
As shown in FIG. 4, the light receiver PD includes, for example, a four-divided light receiving element Pd1 including four partial light receiving elements Qa, Qb, Qc, and Qd, and a two-divided light receiving element including two partial light receiving elements Qe and Qf. It is configured to include Pd2 and a two-divided light receiving element Pd3 composed of two partial light receiving elements Qg and Qh.

The four-divided light receiving element Pd1 includes a dividing line DL1 in a direction corresponding to the tangential direction of the track (here, the Y-axis direction of the coordinate axis 21 shown in the figure) and a direction corresponding to the tracking direction (here, the coordinate axis 21 shown in the figure). And the dividing line DL2 in the X-axis direction).
The partial light receiving element Qa is located on the + X side of the dividing line DL1 and on the + Y side of the dividing line DL2, and the partial light receiving element Qb is on the −X side of the dividing line DL1 and on the + Y side of the dividing line DL2. positioned. The partial light receiving element Qc is located on the −X side of the dividing line DL1 and on the −Y side of the dividing line DL2, and the partial light receiving element Qd is on the + X side of the dividing line DL1 and on the dividing line DL2. Located on the -Y side.

The two-divided light receiving element Pd2 is divided into two by a dividing line DL3 in a direction corresponding to the tangential direction of the track. The partial light receiving element Qe is located on the −X side of the dividing line DL3, and the partial light receiving element Qd is located on the + X side of the dividing line DL3.
The two-divided light receiving element Pd3 is divided into two by a dividing line DL4 in a direction corresponding to the tangential direction of the track. The partial light receiving element Qg is located on the −X side of the dividing line DL4, and the partial light receiving element Qh is located on the + X side of the dividing line DL4.
Each of the partial light receiving elements Qa to Qh performs photoelectric conversion, generates a current signal corresponding to the amount of received light, and outputs the current signal to the reproduction signal processing circuit 5.

As shown in FIG. 3, the diffraction element 31 is disposed on the + Z side of the light emitting / receiving module 30 and includes a grating 31a and a hologram 31b.
In the present embodiment, for example, the diffraction element 31 and the light emitting / receiving module 30 are integrated.
Thereby, the number of parts at the time of an assembly | attachment reduces, workability | operativity can be improved, and also an adjustment process can be simplified.
The grating 31a has a zero-order light as a main beam and a first-order diffracted light (+ 1st-order diffracted light and −1st-order diffracted light) as a main beam and a light beam emitted from the light emitting / receiving module 30 (hereinafter also referred to as “emitted light beam”). ) And (divided into three beams).

FIG. 5 is a schematic diagram for explaining the positional relationship between the light spot by the main beam and the light spot by the sub beam.
As shown in FIG. 5, in the recording layers M0 and M1 of the optical disc, each next time is shifted from the center of the light spot SP0 by the zero-order light by a half (Pt / 2) of the track pitch Pt in the tracking direction. It is set so that light spots SP1 and SP2 by folding light are respectively formed.

As shown in FIG. 3, the hologram 31b is disposed on the + Z side of the grating 31a, and diffracts reflected light, which is a return light beam from the optical disc 2, in the direction of the light receiving surface of the light receiver PD.
FIG. 6 is a schematic diagram for explaining the positional relationship between the return light flux of each beam and each partial light receiving element constituting the light receiver PD, and the same reference numerals are given to portions common to FIG.
As shown in FIG. 6, the return light beam of the 0th order light (light spot SP0 in FIG. 5) is received by the four-divided light receiving element Pd1, and the return light beam of each primary diffraction light (light spots SP1 and SP2 in FIG. 5) is 2 The divided light receiving elements Pd2 and Pd3 are set to receive light respectively.
For example, the distance between the hologram 31b and the grating 31a is set to about 1.5 to 2.0 mm so that the diffracted light from the hologram 31b is not diffracted by the grating 31a.

The collimating lens 32 is disposed on the + Z side of the diffraction element 31 and makes each light beam converted into three beams by the diffraction element 31 into substantially parallel light.
The objective lens 33 is disposed on the + Z side of the collimating lens 32, collects each light beam transmitted through the collimating lens 32, and forms a light spot on the recording surface of the optical disc 2.

Next, the reproduction signal processing circuit 5 shown in FIG. 1 will be described in detail with reference to FIGS.
7 is a block diagram showing the internal configuration of the reproduction signal processing circuit 5 shown in FIG. 1, and FIG. 8 is a track error detection circuit corresponding to the DPP method (differential push-pull method) provided in the reproduction signal processing circuit 5 shown in FIG. FIG. 9 is a block diagram showing a configuration of a track error detection circuit corresponding to the DPD method (phase difference method) included in the reproduction signal processing circuit 5 shown in FIG. 1, and FIG. 10 is a reproduction diagram shown in FIG. FIG. 11 is a block diagram showing the internal configuration of the wobble signal detection circuit 5c shown in FIG. 7, and FIG. 12 is an internal view of the clock generation circuit 5f shown in FIG. FIG. 13 is a block diagram showing the internal configuration of the address detection circuit 5g shown in FIG.

As shown in FIG. 7, the reproduction signal processing circuit 5 includes an I / V amplifier 5a, a servo signal detection circuit 5b, a wobble signal detection circuit 5c, a reproduction (RF) signal detection circuit 5d, a decoder 5e, a clock generation circuit 5f, and an address. It comprises a detection circuit 5g.
The I / V amplifier 5a converts each current signal input from each of the partial light receiving elements Qa to Qh of the light receiver PD into a voltage signal.
The servo signal detection circuit 5b detects a servo signal including a focus error signal and a track error signal based on the output signal of the I / V amplifier 5a and outputs the servo signal to the servo controller 6.

For example, when the optical disc 2 can be recorded, the track error signal uses a difference between a push-pull signal obtained from the return light beam of the main beam and a push-pull signal obtained from the return light beam of the sub beam. To detect.
For example, when recording is impossible as in the case of the optical disk 2 with the disk closed, the track error signal is detected by using a so-called DPD method that uses the rotational change of the intensity pattern in the return beam of the main beam.
Therefore, the servo signal detection circuit 5b has, for example, a track error detection circuit (TE detection circuit) 40 for detecting a track error signal using the DPP method shown in FIG. 8 and a track using the DPD method shown in FIG. A track error detection circuit (TE detection circuit) 41 for detecting an error signal and a focus error detection circuit 42 shown in FIG. 10 are provided.

First, the TE detection circuit 40 for detecting a track error signal using the DPP method will be described.
As shown in FIG. 8, the TE detection circuit 40 includes four adders a1, a2, a3, a4, three subtractors a5, a6, a8, a gain amplifier a7, a track error signal (TE) polarity setting circuit a9, and A low-pass filter (LPF) a10 is provided.
The adder a1 adds the output signal Sa and the output signal Sd of the I / V amplifier 5a and outputs the result to the subtracter a5. The output signal Sa is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qa, and the output signal Sd is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qd. is there.

The adder a2 adds the output signal Sb of the I / V amplifier 5a and the output signal Sc and outputs the result to the subtractor a5. The output signal Sb is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qb, and the output signal Sc is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qc. is there.
The adder a3 adds the output signal Se and the output signal Sg of the I / V amplifier 5a and outputs the result to the subtractor a6. The output signal Se is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qe, and the output signal Sg is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qg. is there.
The adder a4 adds the output signal Sf of the I / V amplifier 5a and the output signal Sh and outputs the result to the subtractor a6. The output signal Sf is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qf, and the output signal Sh is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qh. is there.

The subtractor a5 subtracts the output signal of the adder a2 from the output signal of the adder a1 and outputs the result to the subtractor a8. That is, the output signal of the subtractor a5 is (Sa + Sd) − (Sb + Sc), which is a push-pull signal obtained from the return light beam of the main beam.
The subtractor a6 subtracts the output signal of the adder a4 from the output signal of the adder a3 and outputs the result to the gain amplifier a7. That is, the output signal of the subtractor a6 is (Se + Sg) − (Sf + Sh), which is a push-pull signal obtained from the return beam of the sub beam.
The gain amplifier a7 is arranged at the output stage of the subtractor a6, adjusts the output signal of the subtractor a6 so that the output signal of the subtractor a6 becomes substantially the same level as the output signal of the subtractor a5, and then goes to the subtractor a8. Output.
For example, if the gain at the gain amplifier a7 is K, the output signal of the gain amplifier a7 is K ((Se + Sg) − (Sf + Sh)).

The subtractor a8 subtracts the output signal of the gain amplifier a7 from the output signal of the subtractor a5 and outputs the result to the TE polarity setting circuit a9. The output signal of the subtractor a8 is ((Sa + Sd) − (Sb + Sc)) − K ((Se + Sg) − (Sf + Sh)).
That is, a difference signal between the push-pull signal obtained from the return beam of the main beam and the push-pull signal obtained from the return beam of the sub beam is output.
Thereby, the offset and noise (synchronous noise) due to the eccentricity of the optical disc 2 and the lens shift of the objective lens 33 are removed.
The TE polarity setting circuit a9 sets the polarity of the output signal of the subtractor a8 based on the TE polarity setting signal Skt output from the CPU 13, and outputs the polarity to the LPFa10.

For example, if the TE polarity setting signal Skt is 0 (low level), the TE polarity setting circuit a9 outputs the output signal of the subtractor a8 to the LPFa 10 with the same polarity, and the TE polarity setting signal Skt is 1 (high level). ), The polarity of the output signal of the subtractor a8 is inverted and output to the LPFa10.
The low pass filter a10 removes a high frequency component contained in the output signal of the TE polarity setting circuit a9. The output signal of the low-pass filter a10 is supplied to the servo controller 6 as the track error signal Ste.

Next, the TE detection circuit 41 for detecting a track error signal using the DPD method will be described.
As shown in FIG. 9, the TE detection circuit 41 includes two adders b1 and b2, two limiters b3 and b4, a phase comparator b5, and a low-pass filter (LPF) b6.
The adder b1 adds the output signal Sa and the output signal Sd of the I / V amplifier 5a and outputs the result to the limiter b3.
The adder b2 adds the output signal Sb and the output signal Sc of the I / V amplifier 5a and outputs the result to the limiter b4.
The limiter b3 outputs the output signal while keeping the signal level constant with respect to the level fluctuation of the output signal of the adder b1.

The limiter b4 outputs the output signal while keeping the signal level constant with respect to the level fluctuation of the output signal of the adder b2.
The phase comparator b5 compares the phases of the output signal of the limiter b3 and the output signal of the limiter b4, and outputs a signal of the comparison result.
The low pass filter b6 removes a high frequency component contained in the output signal of the phase comparator b5. The output signal of the low-pass filter b6 is supplied to the servo controller 6 as a track error signal Ste.
When detecting a track error signal, the CPU 13 selects and operates either the TE detection circuit 40 or the TE detection circuit 41.

Next, the focus error detection circuit (FE detection circuit) 42 will be described.
As shown in FIG. 10, the FE detection circuit 42 includes two adders g1, g2, one subtractor g3, and a low-pass filter (LPF) g4.
The adder g1 adds the output signal Sa of the I / V amplifier 5a and the output signal Sc and outputs the result. The output signal Sa is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qa, and the output signal Sc is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qc. is there.

The adder g2 adds the output signal Sb and the output signal Sd of the I / V amplifier 5a and outputs the result. The output signal Sb is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qb, and the output signal Sd is an output signal of the I / V amplifier 5a corresponding to the output signal of the partial light receiving element Qd. is there.
The subtractor g3 subtracts the output signal of the adder g2 from the output signal of the adder g1, and outputs the result. The output signal of the subtractor g3 is (Sa + Sc)-(Sb + Sd).
The low pass filter g4 removes a high frequency component included in the output signal of the subtractor g3. The output signal of the low-pass filter g4 is supplied to the servo controller 6 as the focus error signal Sfe.

Next, the wobble signal detection circuit 5c in FIG. 7 will be described in detail.
As shown in FIG. 11, the wobble signal detection circuit 5c includes, for example, two adders c1 and c2, two high-pass filters (HPF) c3 and c4, two AGC amplifiers c5 and c6, a subtractor c7, and a wobble signal ( WB) A polarity setting circuit c8 is provided to detect and output a wobble signal based on the output signal of the I / V amplifier 5a.
The adder c1 adds the output signal Sa of the I / V amplifier 5a and the output signal Sd and outputs the result. The adder c2 adds the output signal Sb of the I / V amplifier 5a and the output signal Sc and outputs the result.

The high pass filter (HPF) c3 removes the low frequency component contained in the output signal of the adder c1 and outputs it.
The high pass filter (HPF) c4 removes the low frequency component included in the output signal of the adder c2 and outputs the result.
The AGC amplifier c5 performs signal adjustment so that the output signal of the high-pass filter c3 maintains a predetermined signal level and outputs the signal.
The AGC amplifier c6 adjusts and outputs the signal so that the output signal of the high-pass filter c4 maintains a predetermined signal level.
Thereby, the output signal of the AGC amplifier c5 and the output signal of the AGC amplifier c6 have substantially the same signal level.

The subtractor c7 subtracts the output signal of the AGC amplifier c6 from the output signal of the AGC amplifier c5 and outputs the result.
Thereby, the offset and noise (synchronous noise) due to the eccentricity of the optical disc 2 and the lens shift of the objective lens 33 are removed.
The WB polarity setting circuit c8 sets the polarity of the output signal of the subtractor c7 based on the WB polarity setting signal Skw from the CPU 13.
For example, if the WB polarity setting signal Skw is 0 (low level), the WB polarity setting circuit c8 outputs the output signal of the subtractor c7 with the same polarity, and the WB polarity setting signal Skw is 1 (high level). If there is, the output signal of the subtractor c7 is inverted and output.
The output signal of the WB polarity setting circuit c8 is supplied as the wobble signal Swb to the clock generation circuit 5f and the address detection circuit 5g.

Next, the clock generation circuit 5f in FIG. 7 will be described in detail.
As shown in FIG. 12, the clock generation circuit 5f includes, for example, a bandpass filter (BPF) d1, a binarization circuit d2, and a phase locked loop (PLL) circuit d3, and includes a wobble signal Swb. Based on this, a reference clock signal Wck is generated and output.
The band pass filter d1 extracts and outputs a carrier wave component from the wobble signal Swb.
The binarization circuit d2 binarizes the output signal of the band pass filter d1 and outputs it.
The PLL circuit d3 generates a multiplied clock synchronized with the output signal of the binarization circuit d2, and supplies it as a reference clock Wck to each part including the encoder 10 and the address detection circuit 5g.

Next, the address detection circuit 5g in FIG. 7 will be described in detail.
As shown in FIG. 13, the address detection circuit 5g includes, for example, a high-pass filter (HPF) e1, a low-pass filter (LPF) e2, a phase demodulation circuit e3, and an ADIP decoding circuit e4, and is output from the wobble signal detection circuit 5c. The address information is acquired from the wobble signal Swb to be output.
The high-pass filter e1 removes the low-frequency component included in the wobble signal Swb and outputs it.
The low pass filter e2 removes the high frequency component contained in the output signal of the high pass filter e1 and outputs the result.
The phase demodulation circuit e3 demodulates and outputs the output signal of the low-pass filter e2 in synchronization with the reference clock signal Wck output from the clock generation circuit 5f.
The ADIP decoding circuit e4 extracts address information from the output signal of the phase demodulation circuit e3, and decodes the address information when the extracted address information reaches a predetermined amount (for example, 51 data bits). The decoded address data is output to the CPU 13 and the encoder 10 as an address signal Sad.

The RF signal detection circuit 5d in FIG. 7 detects a reproduction (RF) signal based on the output signal of the I / V amplifier 5a and outputs it to the decoder 5e.
The decoder 5e in FIG. 7 recovers the recovered clock from the RF signal detected by the RF signal detection circuit 5d by a recovery clock PLL circuit (not shown since it is well known), After performing various processing including error detection processing, it is stored in the buffer RAM 8 via the buffer manager 9 as reproduction data. When an error is detected in the error detection process, the decoder 5e performs a predetermined error correction process.

Next, the scratch detection circuit 17 in FIG. 1 will be described in detail.
FIG. 14 is a block diagram showing the internal configuration of the scratch detection circuit 17 shown in FIG. 1, and FIG. 15 is a timing chart showing the timing of the output signal of each part of FIG.
As shown in FIG. 14, the scratch detection circuit 17 converts the detection signal output from the scratch detection sensor 16 into a voltage and outputs it, and only the low frequency component of the signal output from the IV amplifier 110 is output. The low-frequency detection circuit 111, which is an LPF, for example, and the output signal of the gain amplifier 112 and the IV amplifier 110 that attenuate the output signal of the low-frequency detection circuit 111 and supply the slice level to the comparator 113 in the next stage Comparator 113 that compares the output signal of gain amplifier 112 and pulse width extension circuit 114 that extends the pulse width of the binarized pulse signal output from comparator 113, and the signal output from pulse width extension circuit 114 is delayed. Shift register 115 that outputs to servo controller 6 as a detection signal (scratch detection signal), Consisting of divider 116.

  That is, the low-frequency detection circuit 111 functions as a signal level holding / outputting unit that outputs a signal holding the signal level of a portion other than the defective portion of the recording surface from a signal proportional to the reflected light of the second light spot. The gain amplifier 112 functions as signal level attenuating means for attenuating and outputting the signal level of the signal output by the signal level holding output means, and the comparator 113 and the signal output by the signal level attenuating means A signal that is proportional to the reflected light of the light spot 2 and outputs a signal at the signal level of the defective portion of the recording surface is functioned, and the pulse width extension circuit 114 outputs the signal output by the comparator. It functions as a pulse width extending means for extending the pulse width of the output and outputting it.

Signals output from the above circuits are as shown in FIG.
When there is no defect in the optical disk, the output signal of the defect detection circuit 17 is at a substantially constant level. When there is a defect in the disk, the level of the output signal at that area is the absence of a defect in the disk. Smaller than level.
In the output of the IV amplifier 110 shown in FIG. 15 (a), where the signal level of low to high in the figure is low (low level), the scratched part, and other parts in the figure ~ Is the signal level (high level) of the part without scratches.
Since the low-frequency detection circuit 111 detects only the low-frequency component of the frequency of the output signal of the IV amplifier 110, even if it is a scratched portion of the optical disc, a signal holding the level of the scratch-free portion of the output signal of the IV amplifier 110 is obtained. Is output.

Since the signal is attenuated by the gain amplifier 112, the gain amplifier 112 outputs a signal having a level indicated by the “slice level of comparator” in FIG.
The slice level is changed depending on the attenuation rate of the gain amplifier 112, and the level of scratches to be detected is determined by the level.
It is desirable that the gain rate of the gain amplifier 112 be set by the CPU 13. In other words, the attenuation amount of the signal level of the gain amplifier 112 is preferably made variable by the CPU 13.
Since the comparator 113 receives the output of the IV amplifier 110 and the slice level output from the gain amplifier 112 as a reference level, the comparator 113 can output a detection signal indicating the presence or absence of a defective disk portion.

In the signal output from the comparator 113, the portion corresponding to the disk defect portion is a high-level portion shown in FIG. 15B, and the pulse width output from the IV amplifier 110 is the pulse width. It is narrower than (rochi).
This is considered to be because the defective disk portion starts when the output of the IV amplifier 110 starts to drop slightly, and the signal output from the comparator 113 is as shown in FIG. .
Further, the irradiation position of the light beam B applied to the optical disk for the scratch detection sensor 16 to detect the defective disk portion precedes the irradiation position of the spot of the laser beam L irradiated by the optical pickup device 4 with respect to the recording direction. Is the position.

FIG. 16 is a diagram showing the relationship between the spot position of the light beam B of the scratch detection sensor 16 and the spot position of the laser beam L of the optical pickup device 4.
In the coordinate axis 21 shown in FIG. 16, the Y-axis direction is the tangential direction of the track, and the irradiation position of the optical disk is the spot position of the laser beam L of the optical pickup device 4 next to the spot position of the light beam B of the scratch detection sensor 16. pass. In other words, the spot of the light beam B of the scratch detection sensor 16 comes first, and the spot of the laser beam L of the optical pickup device 4 is irradiated after that.
The pulse width extension circuit 114 is installed to correct the pulse width of the high level portion of the output signal of the comparator 113.
In the pulse width extension circuit 114, as shown in FIG. 15, the pulse width of the output signal of the comparator 113 is increased to the rear side in the high level portion (C). That is, the rear side of the high level portion of the output signal of the comparator 113 in the figure is extended, and a signal in which the high level in the figure is high is output. The pulse width is extended by an integral multiple of the clock signal obtained by dividing the reproduction clock signal generated by the reproduction signal processing circuit 5 by the frequency divider 116.

Next, the pulse width extension circuit 114 will be described in detail.
FIG. 17 is a block diagram showing an example of the internal configuration of the pulse width extension circuit 114 shown in FIG. 14, and FIG. 18 is a waveform diagram of a signal flowing through each part of the pulse width extension circuit 114 shown in FIG.
As shown in FIG. 17, the pulse width extension circuit 114 is a shift register (here, input from the comparator 113) that delays the signal A input from the comparator 113 based on the reproduction clock signal input from the reproduction signal processing circuit 5. OR of the two signals of the signal A input from the comparator 113 and the signal B input from the shift register 200. The circuit 201 is formed.

As shown in FIG. 18, the pulse width extension circuit 114 outputs a signal C obtained by extending the pulse width of the signal A to the rear side.
Here, the extension width of the pulse width is extended by a width for shifting by the shift register 200. Therefore, it is desirable that the set width can be freely set by the CPU 13. That is, the extension width of the pulse width of the signal of the pulse width extension circuit 114 is preferably made variable by the CPU 13.
The above-described configuration is an example, and another configuration may be used. For example, a configuration using a delay element including a delay line instead of the shift register 200 can be realized.

The shift register 115 in FIG. 14 is used to correct the distance between the spot of the light beam B of the scratch detection sensor 16 and the laser beam L of the optical pickup device 4.
Further, in the shift register 115, the entire detection signal is delayed, and the timing is adjusted so that the optical pickup device 4 passes through the defective disk portion.
The delay in the shift register 115 is performed by an integral multiple of a clock obtained by dividing the reproduction clock signal generated by the reproduction signal processing circuit 5 by the frequency divider 116. That is, the reproduction clock signal is a clock generated from the reproduction signal of the recording medium.
In this way, if the timing correction is performed based on the clock generated from the RF signal, recording and reproduction by CAV can be performed on a reproduction disk or a recording disk on which data is recorded.

In the present embodiment, the configuration example in the case of supplying the regenerative clock signal so as to cope with the CAV read is shown, but the configuration may be made based on the fixed clock signal.
In this way, if the timing correction is performed on the basis of the fixed clock, it can be realized with a simple circuit configuration, and the cost of manufacturing the apparatus can be reduced.
Further, a configuration in which the clock is output from an oscillator having a variable frequency may be used as a reference.
In this way, if the timing correction is performed with reference to an oscillator having a variable frequency, stable servo control can be performed even during the pull-in operation of the PLL.
Furthermore, the configuration may be such that the clock is generated based on the wobble signal of the recording medium.
As described above, if the timing correction is performed using the clock generated from the wobble signal as a reference, it can be recorded on a recordable optical disc by CAV.

In this way, it is possible to accurately detect the timing at which the optical pickup device 4 passes through the defective disk portion of the optical disk 2 by the scratch detection circuit 17 shown in FIG.
As described above, the detection signal output from the scratch detection circuit 17 is input to the servo controller 6, and the servo control is held at the DC level of the immediately preceding control signal at the defective disk portion, so that the servo control disturbance is minimized. And stable data reproduction can be performed.
In this embodiment, a case where a sensor for detecting a scratch is separately provided has been described. However, the laser beam L used in the optical pickup device 4 may be divided and used. In that case, the number of parts can be reduced. However, it is necessary to use a light beam dedicated to flaw detection rather than using a light beam used for data recording and reproduction and servo control.
Further, by holding the reproduction PLL, it is possible to prevent the PLL from being disturbed at the scratch portion. That is, the output of the phase comparator (not shown) is not reflected in the control of the PLL loop during the flaw detection signal period.

Next, another configuration example of the scratch detection circuit shown in FIG. 1 will be described.
FIG. 19 is a block diagram showing another configuration example of the flaw detection circuit shown in FIG. 1, and parts common to those in FIG.
As shown in FIG. 19, in addition to each part of the above-described circuit, the scratch detection circuit 170 is a PLL that generates a reproduction clock signal and a recording clock signal (wobble signal obtained from the optical disc 2) inputted from the reproduction signal processing circuit 5. A selector 120 is provided for selecting and outputting one of a reproduced clock signal) and a clock signal output from an oscillator having a variable frequency. The CPU 13 selects one of the three clock signals.

That is, the selector 120 selects and outputs a clock output from an oscillator having a variable frequency, a clock generated from a reproduction signal of the recording medium, or a clock generated from a wobble signal of the recording medium. It fulfills the function of a selection output means and performs the above correction based on the clock output by the clock selection output.
With this configuration, when the optical disk 2 is a reproduction-only disk including a DVD-ROM disk, a defective disk portion of the reproduction-only disk can be stably detected by selecting a reproduction clock signal.

Further, by selecting a recording clock signal, it is possible to detect a defective disk portion stably even if the optical disk 2 is a recording disk including a DVD + R disk.
Further, normally, the reproduction clock signal and the recording clock signal are generated by the reproduction PLL and the recording PLL, respectively. However, a pull-in time is required until the PLL is locked, and a defective disk portion is detected accurately during that time. May not be possible.
In such a period, it is possible to detect a defective disk portion stably by switching to a clock signal output from an oscillator whose frequency can be set.

For example, the frequency of the oscillator is set in advance as the frequency of the recording clock signal and the reproduction clock signal assumed at the position where the optical disc apparatus 1 performs recording and reproduction, and the clock signal output from the oscillator is selected as the setting of the selector 120. By doing so, it is possible to stably detect the disk defect portion of the optical disk 2 even if the frequency of the recording PLL and the reproduction PLL is pulled. Further, after the PLL is locked, the clock frequency gradually shifts at CAV, so that it is preferable to switch to a reproduction clock signal that follows CAV or a recording clock signal. Thus, it is possible to detect a defective disk portion stably even when the PLL is pulled.
In this way, it is possible to deal with a reproduction disk and a recording disk, and stable servo control can be performed even if the reproduction clock PLL or the recording clock PLL is pulled in.

Next, another configuration example of the scratch detection circuit shown in FIG. 1 will be described.
FIG. 20 is a block diagram showing still another configuration example of the scratch detection circuit shown in FIG. 1, and the same reference numerals are given to portions common to FIGS. 14 and 19, and the description thereof is omitted.
As shown in FIG. 19, the scratch detection circuit 171 is provided with a shift register 140 having a function different from that of the shift register in place of the shift register of the circuit described above, and receives one of a plurality of input signals. A selector 141 for selecting and outputting is newly provided, and the rest of the configuration is the same as that of the above-described circuit.

Based on the clock signal output from the frequency divider 116, the shift register 140 is a signal that is delayed by one clock, a signal that is delayed by two clocks,... The type of signal is output to the selector 141.
The selector 141 outputs one of the inputted five signals according to the setting by the CPU 13. The CPU 13 sets the delay amount for the selector 141.
That is, the shift register 140 functions as a delay unit that outputs the detection signal output by the recording surface defect detection unit with a plurality of timings, and the selector 141 inputs the plurality of signals output by the delay unit. Then, it fulfills the function of a selection output means for selecting and outputting one of the signals.

The delay amount needs to be changed according to the distance between the scratch detection position by the light beam of the preceding scratch detection sensor 16 and the spot position of the laser beam of the optical pickup device 4, but the scratch detection circuit is integrated as an LSI. 14, the configuration shown in FIG. 14 cannot cope with this, but with the configuration shown in FIG. 20, when the optical pickup device 4 and the flaw detection sensor 16 are changed or the relative distances change due to design changes. However, since the delay amount can be freely changed according to the setting from the CPU 13, it can be dealt with without changing the LSI.
Further, in this embodiment, it is possible to deal with a recording medium by adopting a configuration in which a recording clock signal can be selected as in the scratch detection circuit shown in FIG.

Further, the signals output by the shift register 140 after being delayed are 1 to 5, but these are only examples, and signals of 2 to 4 may be used, or 5 or more signals may be used. It may be.
Thus, when the timing correction is created as an LSI, even if the distance between the first spot and the second spot of the optical disc apparatus is changed, the timing correction amount is changed by the CPU, for example. It is possible.

Next, still another configuration example of the scratch detection circuit shown in FIG. 1 will be described.
FIG. 21 is a block diagram showing still another configuration example of the flaw detection circuit shown in FIG. 1, and the same reference numerals are given to the same parts as those in FIG. 14, FIG. 19, and FIG. .
FIG. 22 is a waveform diagram of an output signal of each part of the scratch detection circuit shown in FIG.
The scratch detection circuit 172 includes a low-frequency detection circuit 150 for detecting a low-frequency component of the sum signal from the optical pickup device 4 and a low-frequency detection circuit 150 as shown in FIG. The gain amplifier 151 that attenuates and outputs the output, the sum signal from the optical pickup device 4 as input, the comparator 152 that uses the output from the gain amplifier 151 as the slice level, the rising edge of the signal that is output from the comparator 113, and the comparator 152 A delay amount detection circuit 153 that detects the delay amount of the rising edge of the output signal and a register 154 that stores the delay amount detected by the delay amount detection circuit 153 are newly provided.

  That is, the first signal level holding output means for outputting a signal in which the low-frequency detection circuit 111 holds the signal level of the portion other than the defective portion of the recording surface of the recording medium from the signal proportional to the reflected light of the second light spot. The gain amplifier 112 functions as a first signal level attenuating means for attenuating and outputting the signal level of the signal output by the first signal level holding and outputting means, and the comparator 113 serves as the first signal. It functions as a first comparison unit that compares a signal output by the level attenuation unit with a signal proportional to the reflected light of the second light spot and outputs a signal at the signal level of the defective portion of the recording surface.

Also, a function of second signal level holding / outputting means for the low-frequency detection circuit 150 to output a signal holding the signal level of a portion other than the defective portion on the recording surface of the recording medium from the sum signal obtained from the first light spot. The gain amplifier 151 functions as a second signal level attenuating means for attenuating and outputting the signal level of the signal output by the second signal level holding output means, and the comparator 152 attenuates the second signal level. The signal output by the means is compared with the signal proportional to the reflected light of the first light spot, and the function of the second comparison means for outputting the signal of the signal level of the defective portion of the recording surface is achieved.
Further, the delay amount detection circuit 153 functions as a delay amount detection unit that detects a delay amount between the signal output by the first comparison unit and the signal output by the second comparison unit, and the register 154 has a delay amount. It functions as a delay amount storage means for storing the delay amount detected by the detection means.

Thus, the circuit composed of 150 to 152 has the same structure as the circuit composed of 111 to 113 described above, and detects a defective disk portion that can be detected by the sum signal of the optical pickup device 4. Can do.
FIG. 22 shows the timing of the output signal of each circuit of the scratch detection circuit 172.
The delay amount detection circuit 153 detects the difference between the rising positions of the two output signals of the comparator 113 and the comparator 152 by counting with the clock signal input from the frequency divider 116.
Here, a case where a clock signal input from the frequency divider 116 is a recovered clock signal and a delay of four clocks is detected is shown.
The delay amounts of the two output signals of the comparator 113 and the comparator 152 are stored in the register 154.

  For example, an optical disc (referred to as a “scratch disc”) having a defective disc on the recording surface is reproduced before shipment from the factory. At that time, the delay amount of the detected signal is detected based on the detection signal detected by the scratch detection sensor 16 and the sum signal output from the optical pickup device 4 and stored in the register 154. Thereafter, the CPU 13 reads the contents of the register 154 and stores it in the flash memory 14 described above. Since the flash memory 14 is a non-volatile memory, the stored contents are maintained even when the power is turned off. This completes the pre-shipment adjustment.

When the data is actually recorded and reproduced (in actual operation) instead of the adjustment process, the CPU 13 reads the contents of the adjustment before shipment from the flash memory 14 (the delay amount based on the detection signal from the scratch detection sensor and the optical pickup device). The delay amount based on the sum signal) is read, and only the delay amount corresponding to the delay amount is set in the selector 141.
In this way, an accurate delay amount can be set.
This can be handled when the optical pickup device or scratch detection sensor is changed, or when the relative distances are changed due to design changes, etc., as well as variations in component accuracy and component assembly. Can also respond.
Thus, it is possible to accurately grasp the relative distance between the first spot and the second spot by adjustment before shipment. Therefore, the adjustment set value of the timing adjustment means can be set accurately, so that stable servo control can be performed, and stable data recording and reproduction can be performed.

  The optical disc apparatus of this embodiment obtains a detection signal of a defective portion of the disc on the optical disc with the light spot of the irradiation light not related to the preceding data recording and reproduction, and then the irradiation light related to the data recording and reproduction. Because the servo control is performed according to the result, the servo control can be performed stably even for an optical disk with a defective disk part. As a result, stable data recording and reproduction can be performed. It can be carried out.

  A recording / reproducing apparatus according to the present invention includes a CD-ROM drive, a CD-R drive, a CD-RW drive, a DVD-R drive, a DVD-RW drive, a DVD + R drive, a DVD + RW drive, a DVD-RAM drive, and an MO drive. The present invention can be applied to all apparatuses for recording or reproducing data using light.

It is a block diagram which shows schematic structure of the optical disk apparatus of this Embodiment. It is a block diagram which shows the internal structure of the servo controller shown in FIG. It is a longitudinal cross-sectional view which shows schematic structure of the optical pick-up apparatus shown in FIG. It is a top view which shows schematic structure of the light receiver shown in FIG. It is a schematic diagram for demonstrating the positional relationship of the light spot by a main beam, and the light spot by a sub beam.

It is a schematic diagram for demonstrating the positional relationship of the return light beam of each beam shown in FIG. 5, and each partial light receiving element which comprises a light receiver. FIG. 2 is a block diagram showing an internal configuration of a reproduction signal processing circuit shown in FIG. FIG. 2 is a block diagram showing a configuration of a track error detection circuit corresponding to the DPP method provided in the reproduction signal processing circuit shown in FIG. 1. FIG. 2 is a block diagram showing a configuration of a track error detection circuit corresponding to a PDP method provided in the reproduction signal processing circuit shown in FIG. 1.

FIG. 2 is a block diagram showing a configuration of a focus error detection circuit included in the reproduction signal processing circuit shown in FIG. 1. It is a block diagram which shows the internal structure of the wobble signal detection circuit shown in FIG. FIG. 8 is a block diagram illustrating an internal configuration of the clock generation circuit illustrated in FIG. 7. FIG. 8 is a block diagram showing an internal configuration of the address detection circuit shown in FIG. 7. FIG. 2 is a block diagram showing an internal configuration of a flaw detection circuit shown in FIG. 1.

It is a timing chart figure which shows the timing of the output signal of each part shown in FIG. It is a figure which shows the relationship between the spot position of the light beam of the crack detection sensor shown in FIG. 1, and the spot position of the laser beam of an optical pick-up apparatus. FIG. 15 is a block diagram illustrating an internal configuration example of a pulse width extension circuit illustrated in FIG. 14. It is a wave form diagram of the signal which flows through each part of the pulse width extension circuit shown in FIG. FIG. 3 is a block diagram illustrating another configuration example of the scratch detection circuit illustrated in FIG. 1.

It is a block diagram which shows the other structural example of the crack detection circuit shown in FIG. FIG. 6 is a block diagram illustrating still another configuration example of the scratch detection circuit illustrated in FIG. 1. It is a wave form diagram of the output signal of each part of the crack detection circuit shown in FIG.

Explanation of symbols

1: optical disk device 2: optical disk 3: spindle motor 4: optical pickup device 5: reproduction signal processing circuit 5a: I / V amplifier 5b: servo signal detection circuit 5c: wobble signal detection circuit 5d: reproduction (RF) signal detection circuit 5e : Decoder 5f: Clock generation circuit 5g: Address detection circuit 6: Servo controller 7: Motor driver 8: Buffer RAM 9: Buffer manager 10: Encoder 11: Laser control circuit 12: Interface 13: CPU 14: Flash memory 15: RAM 16 : Scratch detection sensor 17, 170, 171, 172: Scratch detection circuit 20, 21: Coordinate axis 30: Light emitting / receiving module 31: Diffraction element 32: Collimator lens 33: Objective lens 31a: Grating 31b: Hologram 40, 41, 42: TE detection circuit 110: IV amplifier 111, 150: Low frequency detection circuit 112, 151: Gain amplifier 113, 152: Comparator 114: Pulse width extension circuit 115, 200, 140: Shift register 116: Frequency divider 160: Focus Control signal generation circuits 161, 164: Low frequency detection circuits 162, 165, 120, 141: Selector 163: Tracking control signal generation circuit 153: Delay amount detection circuit 154: Register 201: OR operation circuit LD: Semiconductor laser light source PD: Photoreceiver Qa, Qb, Qc, Qd, Qe, Qf, Qg, Qh: Partial light receiving element Pd1: 4-split light receiving element Pd2, Pd3: 2-split light receiving element DL1, DL2, DL3, DL4: Split lines SP0-SP2: Light Spot Pt: Track pitch a1 to a4, b1, b2, c , C2, g1, g2: Adders a5, a6, a8, c7, g3: Subtractors a7: Gain amplifier a9: Track error signal (TE) polarity setting circuit a10, b6, e2, g4: Low pass filter (LPF) b3 , B4: Limiter b5: Phase comparator c3, c4, e1: High pass filter (HPF) c5, c6: AGC amplifier c8: WB polarity setting circuit d1: Band pass filter (BPF) d2: Binary circuit d3: Phase lock Loop (Phase Locked Loop: PLL) circuit e3: Phase demodulation circuit e4: ADIP decoding circuit Sa to Sh: Output signal Sad: Address signal Sfe: Focus error signal Skt: TE polarity setting signal Skw: WB polarity setting signal Ste: Track error Signal Swb: Wobble signal Wck: Reference clock

Claims (14)

First light spot irradiating means for irradiating a first light spot for reproducing or recording data on the recording surface of the recording medium;
A detection signal for detecting a focus shift of the first light spot on the recording surface is output based on the reflected light from the recording surface by the first light spot irradiated by the first light spot irradiating means. Defocus detection means;
Track deviation detecting means for outputting a detection signal for detecting the track deviation of the first light spot on the recording surface based on the reflected light of the first light spot irradiated by the light spot irradiating means;
Second light spot irradiating means for irradiating the recording surface with a second light spot at a predetermined position preceding the first light spot;
Recording surface defect detection means for outputting a detection signal for detecting a defect on the recording surface based on reflected light from the recording surface by the second light spot irradiated by the second light spot irradiation device;
Timing correction means for outputting a signal obtained by correcting a timing difference caused by a difference between the first light spot position and the second light spot position with respect to the detection signal output by the recording surface defect detection means;
Focus control means for performing focus control according to the detection signal output by the focus deviation detection means and the signal output by the timing correction means;
A recording / reproducing apparatus comprising: a detection signal output by the track deviation detection means; and a tracking control means for performing tracking control in accordance with the signal output by the timing correction means.   The recording / reproducing apparatus according to claim 1, wherein the timing correction unit performs correction based on a fixed clock.   2. The recording / reproducing apparatus according to claim 1, wherein the timing correction means performs correction based on a clock output from an oscillator having a variable frequency.   2. The recording / reproducing apparatus according to claim 1, wherein the correction by the timing correction unit is performed based on a clock generated from a reproduction signal of the recording medium.   2. The recording / reproducing apparatus according to claim 1, wherein the timing correction means performs correction based on a clock generated from a wobble signal of the recording medium.   The timing correction means selects and outputs one of a clock output from an oscillator having a variable frequency, a clock generated from a reproduction signal of the recording medium, and a clock generated from a wobble signal of the recording medium. 2. The recording / reproducing apparatus according to claim 1, further comprising a clock selection output unit configured to perform the correction based on a clock output by the clock selection output.   The timing correction means receives a delay means for outputting the detection signal output by the recording surface defect detection means by delaying it at a plurality of timings, and a plurality of signals output by the delay means. 7. The recording / reproducing apparatus according to claim 1, further comprising selection output means for selecting and outputting one signal.   The recording surface defect detection means includes a signal level holding output means for outputting a signal holding a signal level of a portion other than the defective portion of the recording surface from a signal proportional to the reflected light of the second light spot, and the signal A signal level attenuating means for attenuating and outputting the signal level of the signal output by the level holding output means; a signal output by the signal level attenuating means and a signal proportional to the reflected light of the second light spot; Comparing means for outputting a signal at a signal level of the defective portion of the recording surface for comparison, and pulse width extending means for extending and outputting the pulse width of the signal output by the comparing means The recording / reproducing apparatus as described in any one of Claims 1 thru | or 7.   9. The recording / reproducing apparatus according to claim 8, wherein the signal level attenuation amount of the signal level attenuation means is variable.   9. The recording / reproducing apparatus according to claim 8, wherein an extension width of a pulse width of the signal of the pulse width extension means is variable.   The recording surface defect detection means includes first signal level holding output means for outputting a signal holding the signal level of a portion other than the defective portion of the recording surface from a signal proportional to the reflected light of the second light spot. The first signal level attenuation means for attenuating and outputting the signal level of the signal output by the first signal level holding output means, the signal output by the first signal level attenuation means, and the second First comparison means for comparing the signal proportional to the reflected light of the light spot and outputting a signal level signal of the defective portion of the recording surface, and the recording from the sum signal obtained from the first light spot. A second signal level holding / outputting means for outputting a signal holding the signal level of a portion other than the defective portion of the surface; and a signal level of the signal output by the second signal level holding / outputting means is attenuated The second signal level attenuating means for outputting the signal, the signal outputted by the second signal level attenuating means and the signal proportional to the reflected light of the first light spot, and comparing the defect portion of the recording surface. Second comparison means for outputting a signal of the signal level, delay amount detection means for detecting a delay amount between the signal output by the first comparison means and the signal output by the second comparison means, The recording / reproducing apparatus according to claim 1, further comprising a delay amount storage unit that stores a delay amount detected by the delay amount detection unit. A first light spot irradiating step of irradiating a recording surface of the recording medium with a first light spot for reproducing or recording data;
A detection signal for detecting a defocus of the first light spot on the recording surface is output based on the reflected light from the recording surface by the first light spot irradiated in the first light spot irradiation step. Defocus detection process;
A track shift detection step of outputting a detection signal for detecting a track shift of the first light spot on the recording surface based on the reflected light of the first light spot irradiated by the light spot irradiation step;
A second light spot irradiating step of irradiating the recording surface with a second light spot at a predetermined position preceding the first light spot;
A recording surface defect detection step for outputting a detection signal for detecting a defect on the recording surface based on the reflected light from the recording surface by the second light spot irradiated in the second light spot irradiation step;
A timing correction step of outputting a signal in which a timing difference caused by a difference between the first light spot and the second light spot position is corrected with respect to the detection signal output by the recording surface defect detection step;
A focus control step for performing focus control according to the detection signal output by the focus deviation detection step and the signal output by the timing correction step;
A recording / reproducing method comprising: a detection signal output by the track deviation detection step; and a tracking control step of performing tracking control according to the signal output by the timing correction step.   The recording surface defect detecting step outputs a signal holding a signal level of a portion other than the defective portion of the recording surface from a signal proportional to the reflected light of the second light spot, and the signal A signal level attenuating step for attenuating and outputting the signal level of the signal output by the level holding output step; a signal output by the signal level attenuating step; and a signal proportional to the reflected light of the second light spot. A comparison step of comparing and outputting a signal level signal of the defective portion of the recording surface; and a pulse width extension step of extending and outputting the pulse width of the signal output by the comparison step. The recording / reproducing method according to claim 12.   The recording surface defect detection step includes a first signal level holding output step of outputting a signal holding a signal level of a portion other than the defective portion of the recording surface from a signal proportional to the reflected light of the second light spot. The first signal level attenuation step for attenuating and outputting the signal level of the signal output by the first signal level holding and output step, the signal output by the first signal level attenuation step, and the second A first comparison step of comparing a signal proportional to the reflected light of the light spot to output a signal level signal of the defective portion of the recording surface, and the recording from the sum signal obtained from the first light spot. A second signal level holding / outputting step for outputting a signal holding the signal level of a portion other than the defective portion of the surface, and attenuating the signal level of the signal output by the second signal level holding / outputting step The second signal level attenuation step to be output, and the signal output by the second signal level attenuation step and the signal proportional to the reflected light of the first light spot are compared to determine a defective portion on the recording surface. A second comparison step for outputting a signal having a signal level of: a delay amount detection step for detecting a delay amount between the signal output by the first comparison step and the signal output by the second comparison step; 13. The recording / reproducing method according to claim 12, further comprising a delay amount storing step of storing the delay amount detected by the delay amount detecting step.

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