JP2007034650A - Software development system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a software development system for improving the development efficiency of software. <P>SOLUTION: This software development system 100 is provided with a compiler for compiling a primitive program 11, and for generating a target program 12 and an execution module 30 for executing the target program 12. The compiler 20 optimizes the target program 12 corresponding to a processor 1 which supports a memory access instruction with an address updating function. In the case of optimizing the target program 12, the compiler 20 gathers address update and memory access to be executed with condition branching interposed into an instruction in one step to be executed before the condition branching. Furthermore, the compiler 20 generates optimized position data 13 showing a position where the target program 12 is optimized. An execution module 30 is provided with a function for issuing warning when access to an uninitialized/undefined memory region is performed. The execution module 30 does not issue warning when executing the code of the position shown by the optimized position data 13. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a technique for developing software.

  Compilers play an important role in software development. The compiler compiles a source program (source code) and generates a target program (executable code). The compiler also optimizes the program configuration so that the size and efficiency of the target program are improved. The optimization method varies greatly depending on the function of the processor that executes the target program. In other words, there is a large difference in the performance of the target program depending on what optimization method is used for a certain processor. Thus, the optimization technique in the compiler plays a very important role in maximizing the performance of the system to which the target program is applied.

  A technique related to compilation is disclosed in Patent Document 1, for example. The compiling device described in Patent Document 1 includes branch history information collection code generation means, branch pattern analysis means, and loop optimization means. The branch history information collection code generation means generates a code for collecting the number of repetitions for each execution of each loop process included in the object program and the branch history information of the conditional branch instruction in the loop process. The branch pattern analysis means analyzes the branch pattern in the target loop process based on the information recorded in the branch history information file. The loop optimization means generates an optimum code for efficiently executing the target loop processing based on the analysis result by the branch pattern analysis means.

  As a function of a certain processor, a “memory access function with an address update function” is known. FIG. 1 is a conceptual diagram for explaining the function. FIG. 1 shows a processor 1 having a memory access function with an address update function and a main memory 2 accessed by the processor 1. The processor 1 includes a register dp0 and a register r0. It is assumed that a value “0x100” indicating the address (address) of the main memory 2 is stored in the register dp0. In such a processor 1, for example, consider the case where the following instruction is executed.

  r0 = * ++ dp0

  This instruction is an instruction that “increments the value of the register dp0 by 1, reads data from the address indicated by the register dp0, and sets the data in the register r0”. In this case, the value of the register dp0 is incremented to “0x101”. Also, the value “0xff” is read from the address 0x101 of the main memory 2. The value “0xff” is stored in the register r0.

  In the above example, the operation of incrementing the value of the register dp0 by 1 is “address update”, and the operation of reading data from the address indicated by the register dp0 is “memory access”. According to the above instruction, the address update and the memory access are executed in one step. Such an instruction is called a “memory access instruction with an address update function”. The processor 1 in FIG. 1 supports this memory access instruction with an address update function and has a memory access function with an address update function.

  As a compiler optimization method corresponding to the processor 1 having such a function, the method shown in FIG. 2 is known. FIG. 2 shows a part of a program flow. If optimization is not performed, address updating is performed first (step S1). Next, it is determined whether or not a certain condition is satisfied (step S2). When the condition is satisfied (step S2; Yes), the first process (step S3), the memory access (step S4), and the second process (step S5) are subsequently executed. When that condition is not satisfied (step S2; No), steps S3 to S5 are not executed.

  When the processor 1 has a memory access function with an address update function, the compiler can optimize the above process as follows. That is, first, a “memory access instruction with an address update function” is executed (step S11). Next, it is determined whether or not the above condition is satisfied (step S12). When the condition is satisfied (step S12; Yes), the first process (step S13) and the second process (step S14) are subsequently performed. When the condition is not satisfied (step S12; No), steps S13 to S14 are not executed.

  In this way, it is possible to combine two “address update” and “memory access” executed across a conditional branch into one “memory access with address update function” executed before the conditional branch. . This reduces the code size. Further, when the condition is satisfied in the conditional branch (steps S2, S12; Yes), the number of subsequent processing steps is decreased by one. As a result, the execution speed of the program is improved. That is, by performing the optimization shown in FIG. 2, the efficiency and performance of the target program can be improved. Similar optimization is possible even when the memory access is executed before the conditional branch and the address update is executed after the conditional branch.

  FIG. 3 is a diagram for explaining a general software development environment. The compiler 80 generates the target program 12 by compiling the source program 11. The target program 12 (software) to be developed is installed in a product 3 such as a microcomputer. The product 3 includes the processor 1 having a “memory access function with an address update function”, and the target program 12 is executed by the processor 1. Therefore, the compiler 80 optimizes the target program 12 based on the method shown in FIG.

  When the above-described optimization is performed, a side effect that a memory access unintended by the program developer occurs before the conditional branch occurs. That is, even if the source program 11 is created as intended, the target program 12 includes memory access not intended by the program developer as a result of compilation by the compiler 80. However, this side effect is usually ignored because it does not prevent normal execution of the program. Even if the target program 12 including an unintended memory access is installed in the product 3 as it is, no particular problem occurs.

JP-A-10-240573

  In software development, it is necessary to debug and verify the operation of the generated target program 12. For example, as shown in FIG. 3, a simulation module 90 is used. The simulation module 90 is hardware or software configured to simulate the product 3 in which the processor 1 and the target program 12 are installed. The simulation module 90 includes an execution unit 91 that executes the target program 12. The execution unit 91 has a “warning function” that issues a warning to the developer when an uninitialized / undefined memory area is accessed during the execution of the target program 12. This warning function helps the developer to find a defect in the target program 12.

  As described above, the target program 12 optimized by the compiler 80 includes memory access not intended by the program developer. Such memory access does not interfere with the normal operation of the program, but the simulation module 90 may issue a warning for such memory access. However, developers cannot distinguish between such memory access warnings and real fault warnings. Therefore, when a warning is issued, the developer may wastefully analyze problems and programs. This is a waste of time and causes a reduction in development efficiency.

  [Means for Solving the Problems] will be described below using the numbers and symbols used in [Best Mode for Carrying Out the Invention]. These numbers and symbols are added in parentheses in order to clarify the correspondence between the description of [Claims] and [Best Mode for Carrying Out the Invention]. However, these numbers and symbols should not be used for the interpretation of the technical scope of the invention described in [Claims].

  A software development system (100) according to the present invention includes a compiler that compiles a source program (11) and generates a target program (12), and an execution module (30) that executes the target program (12). The execution module (30) is, for example, a simulation module (30) for simulating a product (3) on which the target program (12) is mounted.

  The compiler (20) executes the update of the target program (12) so as to correspond to the processor (1) that supports the "first instruction (memory access instruction with an address update function)" that executes address update and memory access in one step. Perform optimization. In the optimization, the compiler (20) combines the address update and the memory access that are executed with the conditional branch between them into one step of the first instruction that is executed before the conditional branch. Further, the compiler (20) generates optimized position data (13) indicating the position where the optimization is performed in the target program (12).

  The execution module (30) has a function of issuing a warning when an uninitialized / undefined memory area is accessed. The execution module (30) executes the object program (12) while referring to the position indicated in the optimized position data (13). Specifically, the execution module (30) does not issue a warning when executing the code at the position in the target program (12). That is, the execution module (30) does not issue a warning for access to an uninitialized / undefined memory area that can be ignored, and only issues a warning due to a real failure.

  Therefore, the developer does not need to perform useless program analysis, and waste of development time is suppressed. In addition, the developer can effectively use the original warning function. As a result, software development efficiency is improved.

  The software development system according to the present invention improves the development efficiency.

  A software development system according to the present invention will be described with reference to the accompanying drawings.

  FIG. 4 is a diagram for explaining a software development environment according to the embodiment of the present invention. The compiler 20 generates the target program 12 by compiling the source program 11. The target program 12 (software) is installed in a product such as a microcomputer. The product includes a processor 1 having a “memory access function with an address update function”, and the target program 12 is executed by the processor 1. Therefore, the compiler 20 optimizes the target program 12 so as to correspond to the processor 1 based on the method shown in FIG. That is, the compiler 20 combines “address update” and “memory access” executed across the conditional branch into one step “memory access instruction with address update function” executed before the conditional branch.

  In addition, the compiler 20 according to the present embodiment generates optimized position data 13 indicating the position in the target program 12 where the optimization has been performed. That is, the optimized position data 13 indicates the position of the “memory access instruction with an address update function” in which “address update” and “memory access” before and after the conditional branch are collected. In other words, the optimized position data 13 indicates the position of step S11 shown in FIG. The position in the target program 12 means an address (offset position) in the target program 12 in step S11. For example, the optimization position data 13 stores a value indicating an address such as “0x010”.

  The target program 12 generated by the compiler 20 is executed by the execution module. In FIG. 4, a simulation module 30 for performing debugging and operation verification of the generated target program 12 is shown as an example of the execution module. The simulation module 30 is configured to simulate a product on which the processor 1 and the target program 12 are installed. As will be described later, the simulation module 30 may be configured by hardware or software.

  In order to debug and verify the operation of the target program 12, a function for detecting an abnormal operation of the program and notifying the developer is necessary. Therefore, the simulation module 30 according to the present embodiment has a function of issuing a warning to the developer when an uninitialized / undefined memory area is accessed during the execution of the target program 12. Yes. This function is hereinafter referred to as “warning function”. The warning function of the simulation module 30 helps the developer to find a defect in the target program 12.

  As illustrated in FIG. 4, the simulation module 30 includes an execution unit 31 and a determination unit 32. The execution unit 31 executes the target program 12. In order to detect a malfunction of the target program 12 being executed, the execution unit 31 has the warning function described above. The determination unit 32 reads the optimized position data 13. Then, the determination unit 32 determines whether or not the position of the target program 12 currently being executed matches the position indicated in the optimized position data 13. If they match, the determination unit 32 outputs a mask signal to the execution unit 31. When the execution unit 31 receives a mask signal, it does not issue a warning even if an uninitialized / undefined memory area is accessed.

  FIG. 5 is a flowchart showing processing by the simulation module 30. The simulation module 30 starts execution of the target program 12 (step S100). The main memory is accessed at a certain position in the target program 12 (step S110). If the memory access is not an access to an uninitialized / undefined memory area (step S111; No), the processing is continued (step S120).

  When an uninitialized / undefined memory area is accessed (step S111; Yes), a warning may be issued or a warning may not be issued. When the memory access in step S111 is a memory access at the position indicated in the optimized position data 13 (step S112; Yes), the determination unit 32 outputs a mask signal to the execution unit 31. Therefore, the simulation module 30 continues the process without issuing a warning (step S120). That is, the simulation module 30 behaves as if an uninitialized / undefined memory area is not accessed.

  On the other hand, when the memory access in step S111 is not the memory access at the position indicated in the optimized position data 13 (step S112; No), the simulation module 30 gives a warning to the developer (step S200). The warning in this case is likely due to a real fault that cannot be ignored. The cause of access to the uninitialized / undefined memory area is likely to exist in the source program 11. Therefore, the developer analyzes the program and examines the problem (step S210).

  When the objective program 12 is executed to the end (step S130; Yes), the processing of the simulation module 30 is finished.

  As described above, the simulation module 30 according to the present embodiment executes the object program 12 while referring to the position information indicated in the optimized position data 13, and does not issue a warning when unnecessary. Specifically, when executing the “memory access instruction with an address update function” at the position indicated in the optimized position data 13, the simulation module 30 does not issue a warning. That is, the simulation module 30 does not issue a warning for access to an ignorable uninitialized / undefined memory area, and issues only a warning due to a real defect. Therefore, the developer does not need to perform useless program analysis, and waste of development time is suppressed. In addition, the developer can effectively use the original warning function. As a result, software development efficiency is improved.

  A specific system configuration for realizing the software development described above is exemplified below.

  FIG. 6 shows an example of the software development system 100. The software development system 100 includes a target program development device 200 and a target program execution device 300. The target program development device 200 is a device for developing the target program 12, and is realized by, for example, a personal computer. The target program execution device 300 is a device for executing the target program 12, and corresponds to the simulation module (execution module) 30.

  The target program development device 200 includes an arithmetic processing device 210, a main memory 220, a storage device 230, an input device 240, a display device 250, and an interface 260, which are connected to each other via a bus so as to communicate with each other. . An example of the storage device 230 is a hard disk drive. The storage device 230 stores a source program 11, a target program 12, optimized position data 13, a compiler 20, and a debugger 40. Examples of the input device 240 include a mouse and a keyboard. An example of the display device 250 is a liquid crystal display.

  The target program execution device 300 is hardware, and is configured to execute the target program 12 in the same manner as a product. Specifically, the target program execution device 300 includes a processor 310, a main memory 320, a storage unit 330, and an interface 360, which are connected to each other via a bus so as to communicate with each other. The storage unit 330 is a storage area for storing the optimized position data 13, and a non-volatile memory is exemplified as the storage unit 330.

The processor 310 corresponds to the execution unit 31 described above. In order to execute the target program 12, the processor 310 has a “memory access function with an address update function”. That is, the processor 310 supports a memory access instruction with an address update function. The processor 310 also has a “warning function” that issues a warning when an uninitialized / undefined memory area is accessed during execution of the target program 12. Furthermore, the processor 310 also includes the above-described determination unit 32 that refers to the optimized position data 13.

  The target program development device 200 and the target program execution device 300 are connected to each other via interfaces 260 and 360 so as to communicate with each other. As a result, data can be exchanged between the target program development device 200 and the target program execution device 300.

  Using such a software development system 100, software is developed as follows. The developer refers to the information displayed on the display device 250 and edits the source program 11 by using the input device 240. Next, the developer activates the compiler 20. The compiler 20 is loaded into the main memory 220 and executed by the arithmetic processing unit 210. In accordance with the instruction from the compiler 20, the arithmetic processing unit 210 performs the following processing. That is, the arithmetic processing unit 210 reads the source program 11 from the storage device 230 and compiles the source program 11. Here, the optimization shown in FIG. 2 is performed. As a result of this compilation, an optimized target program 12 and optimized position data 13 indicating the optimized position are generated. The arithmetic processing unit 210 stores the objective program 12 and the optimized position data 13 in the storage device 230.

  Next, the developer activates the debugger 40. The debugger 40 is loaded into the main memory 220 and executed by the arithmetic processing unit 210. In accordance with the instruction of the debugger 40, the arithmetic processing unit 210 transmits the target program 12 and the optimized position data 13 from the storage device 230 to the target program execution device 300. The target program 12 is stored in the main memory 320 and executed by the processor 310. The optimized position data 13 is stored in the storage unit 330. In response to the instruction from the developer, the debugger 40 causes the target program execution device 300 to start executing the target program 12.

  In the target program execution device 300, the processor 310 executes the processing shown in FIG. That is, the processor 310 executes the target program 12 while referring to the optimized position data 13. When executing the code at the position indicated in the optimized position data 13, the processor 310 does not output a warning. On the other hand, if an uninitialized / undefined memory area is accessed and the position of the code does not match the position indicated in the optimized position data 13, the processor 310 outputs a warning. A signal indicating the warning is sent to the target program development device 200, and a warning message is displayed on the display device 250. The developer who has been notified of the problem analyzes the source program 11 and the target program 12.

  The simulation module 30 may be configured as software. FIG. 7 shows a software development system 100 ′ when the simulation module 30 is configured by software. In FIG. 7, the same components as those in FIG.

  In FIG. 7, the storage device 230 stores a simulator 300 ′ as software. This simulator 300 ′ corresponds to the simulation module (execution module) 30. The simulator 300 'is software executed by the arithmetic processing unit 210, and realizes the function of the target program execution device 300 shown in FIG. 6 in software. That is, the processor 310 and the main memory 320 described above are virtually constructed on a computer.

  After the target program 12 and the optimized position data 13 are generated, the developer activates the simulator 300 '. The simulator 300 ′ is loaded into the main memory 220 and executed by the arithmetic processing unit 210. In accordance with the instruction of the simulator 300 ′, the arithmetic processing unit 210 reads the target program 12 and the optimized position data 13 stored in the storage device 230. The target program 12 is executed on the simulator 300 ′, that is, executed by the virtual processor 310. The processing content of the simulator 300 ′ is the same as the processing content of the target program execution device 300.

  According to the software development systems 100 and 100 ′ according to the present invention, the developer need not perform useless program analysis. Therefore, waste of development time is suppressed. Further, the developer can effectively use the original warning function of the simulation module. As a result, software development efficiency is improved.

FIG. 1 is a conceptual diagram for explaining a memory access function with an address update function. FIG. 2 is a diagram illustrating an example of optimization by the compiler. FIG. 3 is a block diagram showing a conventional software development environment. FIG. 4 is a block diagram showing a software development environment according to the present invention. FIG. 5 is a flowchart showing the execution processing of the object program by the simulation module according to the present invention. FIG. 6 is a block diagram showing an example of the configuration of the software development system according to the present invention. FIG. 7 is a block diagram showing another example of the configuration of the software development system according to the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Processor 11 Primitive program 12 Target program 13 Optimization position data 20 Compiler 30 Simulation module 31 Execution part 32 Judgment part 40 Debugger 100 Software development system 200 Objective program development apparatus 210 Arithmetic processing apparatus 220 Main memory 230 Storage apparatus 240 Input apparatus 250 Display Device 260 Interface 300 Objective program execution device 300 'Simulator 310 Processor 320 Main memory 330 Storage unit 360 Interface

Claims (10)

A compiler that compiles the source program and generates the target program;
An execution module for executing the target program,
The compiler optimizes the target program so as to correspond to a processor that supports a first instruction that executes address update and memory access in one step, and the optimization is performed in the target program. Generate optimized location data to indicate location,
The execution module executes the object program while referring to the position indicated in the optimized position data. A software development system according to claim 1,
The execution module has a function of issuing a warning when an uninitialized / undefined memory area is accessed, and does not issue the warning when executing the code at the location in the target program. Software development system. The software development system according to claim 1 or 2,
In the optimization, the compiler integrates the address update and memory access executed across the conditional branch into one step of the first instruction executed before the conditional branch. A software development system according to claim 3,
The software development system, wherein the optimized position data indicates a position of the collected first instruction in the target program. A software development system according to any one of claims 1 to 4,
An arithmetic processing unit for executing the compiler;
A storage device for storing the primitive program;
A software development system that reads the source program from the storage device, compiles the source program according to instructions of the compiler, and stores the generated target program and the optimized position data in the storage device . The software development system according to claim 5,
The execution module is software executed by the arithmetic processing device,
The arithmetic processing unit reads the target program and the optimized position data stored in the storage device according to the instruction of the execution module,
A software development system in which the target program is executed on the software. The software development system according to claim 5,
The execution module is hardware capable of communicating with the storage device, and includes a first processor that supports the first instruction,
The first processor is a software development system for executing the object program transmitted from the storage device. A program development device for developing a target program;
A program execution device communicably connected to the program development device,
The program execution device includes a processor that supports a first instruction that executes address update and access to a main memory in one step,
The processor has a function of issuing a warning when an uninitialized / undefined memory area is accessed,
The program development apparatus includes a compiler that generates the target program by compiling a source program,
The compiler optimizes the target program so as to correspond to the processor, and generates optimized position data indicating a position where the optimization is performed in the target program,
The program execution device receives the target program and the optimized position data from the program development device,
The software development system, wherein the processor executes the target program while referring to the optimized position data, and does not issue the warning when executing the code at the position in the target program. The software development system according to claim 8,
In the optimization, the compiler integrates the address update and memory access executed across the conditional branch into one step of the first instruction executed before the conditional branch. The software development system according to claim 9,
The software development system, wherein the optimized position data indicates a position of the collected first instruction in the target program.

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