JP2007027942A - Phase control method and phase control oscillator, array antenna for transmission - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To control the phase of an output signal from a VCO in microwave band without using a phase shifter for microwave band. <P>SOLUTION: In the phase control method, output signal F<SB>OUT</SB>from a VCO 10 is down converted using a first reference signal F<SB>Ref1</SB>in order to control the phase thereof and a regulation object signal S<SB>CO</SB>is generated. On the other hand, a second reference signal F<SB>Ref2</SB>having a frequency identical to that of the regulation object signal S<SB>CO</SB>is subjected to phase shift according to a phase shift signal S<SB>PS</SB>indicative of a desired amount of phase shift thus generating a third reference signal F<SB>Ref3</SB>. A PLL for controlling the VCO 10 is formed such that the phase of the regulation object signal S<SB>CO</SB>is matched to the phase of the third reference signal F<SB>Ref3</SB>. Consequently, phase control of the output signal F<SB>OUT</SB>can be carried out through phase control of a signal having a frequency lower than that of the output signal F<SB>OUT</SB>. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a PLL (Phase-Locked Loop) -VCO (Voltage-Controlled Oscillator) device that can be phase-controlled using a phase shifter, that is, a phase-controlled oscillator, and a transmission array antenna.

  For example, in order to make the directivity pattern of the transmitting array antenna used for radio communication in the microwave band appropriate, the phases of the signal sources of all the antennas constituting the array antenna are individually and accurately controlled. There is a need.

  Conventionally, for the above control, as a direct signal source, a reference signal having the same frequency as the output signal is desired for each antenna with respect to a PLL circuit including a VCO that generates an output signal in the microwave band. The signal obtained by shifting the phase amount is input as a reference signal for each antenna, and the phase of the output signal is controlled so that the phases of the reference signal for each antenna and the output signal are matched.

  That is, the phase shifter used to generate the antenna-specific reference signal from the reference signal is for the microwave band, and the PLL circuit is also based on the microwave band.

  However, the microwave phase shifter has various problems in use such as inconvenient handling. Microwave band phase shifters include a waveguide type and an electronic circuit type. Among these, the waveguide type phase shifter has a problem that the weight and size increase, and is inferior to the electronic circuit type phase shifter in terms of control speed, phase variable range, and the like. On the other hand, in the case of an electronic circuit type phase shifter, since the target frequency is too high, it is difficult to operate under stable temperature characteristics that are easily affected by temperature changes, and the control voltage and phase change amount. There is a problem that handling is inconvenient because the relationship with is not linear.

  An object of the present invention is to provide a phase control method capable of performing phase control of a high-frequency signal such as a microwave without causing the above-described problems, and a phase-controlled oscillation device that can be used therefor. And

  The present invention provides a phase control method for controlling the phase of the output signal in a voltage controlled oscillator that generates an output signal of a predetermined frequency. The method includes a first reference signal having a first frequency different from the predetermined frequency and having the first frequency selected such that a difference between the predetermined frequency and the first frequency is smaller than the predetermined frequency. The output signal is down-converted using a signal to generate an adjustment target signal having a second frequency smaller than the predetermined frequency and the first frequency, and a second reference signal having the same frequency as the second frequency is desired. Generating a third reference signal by shifting the phase according to the phase shift amount, and forming a PLL for controlling the voltage controlled oscillator so as to match the phases of the adjustment target signal and the third reference signal, The phase control of the output signal is performed with the phase control of the second frequency relatively lower than the predetermined frequency.

  The present invention also includes a voltage-controlled oscillator that generates an output signal having a predetermined frequency, a first reference signal having a first frequency different from the output signal and the predetermined frequency, and the predetermined frequency and the first frequency. The adjustment target signal generating means for generating the adjustment target signal of the second frequency which is a frequency of 1 / integer (including 1/1) of the difference of the difference, and the phase shift signal indicating the amount of phase shift in DC voltage. The phase shifter that generates the third reference signal by shifting the phase of the second reference signal having the same frequency as the two frequencies, and the error corresponding to the comparison result by comparing the signal to be adjusted and the third reference signal There is provided a phase control oscillation device including error adjustment means for controlling an output signal by generating an adjustment signal and inputting the error adjustment signal to the voltage controlled oscillator.

  According to the phase control method of the present invention, for example, a signal having a frequency much lower than that of a microwave (second reference signal) is directly subject to phase shift, and the result is used for phase control of an output signal in the microwave band. It can be reflected. Therefore, the temperature dependency which has been a problem when a signal in the microwave band is directly subject to phase shift does not become a problem.

  Also, if the difference between the frequency of the direct phase shift target and the frequency of the output signal is large to some extent, the portion with good linearity of the low frequency signal (for example, the portion near 0 ± π of the sine wave) is included in the output signal. It can correspond to one period or more. In this case, the phase shift signal of the low frequency signal and the phase of the output signal controlled in accordance with the phase shift result correspond linearly. Therefore, phase control becomes easy and an accurate beam pattern can be formed.

  According to the phase control oscillation device of the present invention, the effects of the above-described phase control method of the present invention can be obtained by appropriately setting the first frequency and the second frequency.

Embodiments of the present invention will be described below with reference to the drawings.
The present embodiment relates to a transmitting array antenna including a plurality of antennas, a plurality of phase control oscillation devices as signal sources of the respective antennas, and a control unit that controls the operation of each phase control oscillation device. . Details of the phase-controlled oscillator will be described below with reference to the drawings. These phase-controlled oscillators have the same configuration, and roughly control the phase of the output signal according to the first reference signal, the second reference signal, and the phase-shifted signal distributed from the control unit (not shown). It is possible. Among these, the first reference signal is a signal having a first frequency that is close to the frequency of the output signal of the phase-controlled oscillator (referred to as “predetermined frequency”) (however, different from the predetermined frequency). The signal is a signal having a second frequency which is a predetermined frequency or a frequency far lower than the first frequency.

  That is, the first frequency and the second frequency are selected so that the difference between the predetermined frequency and the first frequency is much smaller than the difference between the predetermined frequency and the second frequency. Specifically, the second frequency in the present embodiment is a frequency obtained by dividing the difference between the predetermined frequency and the first frequency by 1 / N (N is an integer of 2 or more). However, the present invention is not limited to this, and the second frequency may be, for example, a difference frequency between the predetermined frequency and the first frequency. The phase shift signal is a signal indicating the amount of phase shift when the second reference signal is phase shifted with a DC voltage.

  As shown in FIG. 1, the phase controlled oscillator according to the present embodiment includes a voltage controlled oscillator (VCO) 10, a directional coupler 20, an adjustment target signal generator 30, a phase shifter 40, and an error adjuster 50. It has.

The voltage controlled oscillator (VCO) 10 generates an output signal F _OUT having a predetermined frequency. The voltage controlled oscillator (VCO) 10 may be configured to include a power amplifier. The directional coupler 20 sends the output signal F _OUT to the antenna and sends it to the adjustment target signal generator 30. Adjusted signal generating section 30 receives the output signal _{F OUT} and the first reference signal _{F Ref1,} and generates an adjusted signal _{S CO} having a second frequency. The phase shifter 40 shifts the phase of the second reference signal F _{Ref2 in} accordance with the phase shift signal S _PS and generates the third reference signal F _Ref3 . Error adjustment unit 50 compares the adjusted signal _{S CO} and the third reference signal _{F Ref3,} generates an error adjustment signal _{S CTL} according to the comparison result, error adjustment signal _{S CTL} to the voltage controlled oscillator (VCO) 10 is used to control the output signal F _OUT .

In the phase controlled oscillation device having such a configuration, the second frequency is a frequency obtained by dividing the difference between the predetermined frequency and the first frequency by 1 / N (N is an integer of 2 or more). Thus, when the phase shift amount added to the third reference signal F _Ref3 is φ, the phase change of the output signal F _OUT to be controlled is φ * N. That is, in order to change the phase of F _OUT by 2π, the phase shift amount of the third reference signal F _Ref3 may be set to 2π / N.

As shown in FIG. 2, the adjustment target signal generation unit 30 includes a frequency converter 31 and an N frequency divider (1 / N) 33. The frequency converter 31 is composed of, for example, a mixer, receives the output signal F _OUT and the first reference signal F _Ref1 , and has an intermediate frequency signal ± (F _OUT −F _Ref1 ) having a frequency difference between the predetermined frequency and the first frequency. Is generated. The N divider (1 / N) _divides the intermediate frequency signal ± (F _OUT −F _Ref1 ) into 1 / N (N is an integer of 2 or more) to generate the adjustment target signal _SCO. .

As shown in FIG. 3, the error adjusting unit 50 includes a phase-frequency comparator 51 and an integrating amplifier 53. Phase - frequency comparator (Phase-Frequency Comparator) 51 is for generating a phase difference signal _{S PD} performs phase comparison between the adjusted signal _{S CO} and the third reference signal _{F Ref3.} The phase-frequency comparator 51 operates as a frequency comparator when not only the phase but also the frequency is different, but a normal phase comparator can be used depending on conditions. Integrating amplifier 53 is used to generate an error adjustment signal _{S CTL} by integrating the phase difference signal _{S PD,} and outputs an error adjustment signal _{S CTL} to the voltage controlled oscillator (VCO) 10.

As shown in FIG. 4, the phase shifter 40 includes a phase shifter voltage controlled oscillator (phase shifter VCO) 41, a phase shifter phase comparator 43, and a phase shifter adjuster 45. The phase shifter voltage controlled oscillator (phase shifter VCO) 41 generates the third reference signal F _Ref3 . The phase shifter for phase shifter 43 compares the phase of the third reference signal F _{Ref3 with} the phase of the second reference signal F _Ref2 , and the phase difference signal S _PSPD in the phase shifter having a DC voltage corresponding to the phase difference. Is generated. The phase shifter adjuster 45 compares the in-phase shifter phase difference signal S _PSPD and the phase shift signal S _PS , generates an adjustment signal S _PSCO according to the difference, and _uses the adjustment signal S _PSCO for the phase shifter. By inputting the voltage control oscillator (phase shifter VCO) 41, the third reference signal F _Ref3 is controlled. Specifically, the phase shifter adjuster 45 in the present embodiment has an integration in which the phase shift signal S _PS is input to the positive phase input and the phase difference signal S _PSPD in the phase shifter is input to the negative phase input. An amplifier is provided, and integrates the voltage of the difference between the phase shifter phase difference signal S _PSPD and the phase shift signal S _PS and outputs the integration result as the adjustment signal S _PSCO .

Specifically, as shown in FIG. 5, the phase shifter phase comparator 43 includes a first binarizer 411, a second binarizer 412, an edge phase comparator 413, and an in-phase shifter phase difference signal generation. A container 414 is provided. The first binarizer 411 generates a first binarized signal S _B1 from the second reference signal F _Ref2 . In the first binary signal _{S B1} is a second reference signal _{F Ref2} compared with the average value of the second reference signal _{F Ref2,} binary signal corresponding to the magnitude of the second reference signal _{F Ref2} for the average value is there. The second binarizer 412 generates a second binarized signal S _B2 from the third reference signal F _Ref3 . In the second binarized signal _{S B2} has a third reference signal _{F Ref3} compared with the average value of the third reference signal _{F Ref3,} binary signal corresponding to the magnitude of the third reference signal _{F Ref3} for the average value is there. The edge phase comparator 413 receives the first binarized signal S _B1 and the second binarized signal S _B2 and generates an edge phase comparison result signal S _PSR . The edge phase comparison result signal S _PSR is a signal that rises according to the rising edge of the second binarized signal S _B2 and falls according to the rising edge of the first binarized signal S _B1 . The phase shifter phase difference signal generator 414 receives the edge phase comparison result signal S _PSR and has a DC voltage proportional to the time indicating the high level of the edge phase comparison result signal S _PSR. A phase difference signal S _PSPD is generated.

Referring to FIG. 5, the edge phase comparator 413 in the present embodiment includes first to fourth 2-input NAND circuits 413a to 413d. One input terminal of the first NAND circuit 413a is connected to the first binarizer 411 and receives the first binarized signal S _B1 . One input terminal of the second NAND circuit 413b is connected to the second binarizer 412 and receives the second binarized signal _SB2 . The output terminal of the first NAND circuit 413a is connected to one input terminal of the third NAND circuit 413c, and the output terminal of the second NAND circuit 413b is one input terminal of the fourth NAND circuit 413d. It is connected to the. The output terminal of the third NAND circuit 413c is commonly connected to the second input terminal 413b of the second and the other input terminal of the fourth NAND circuit 413d, and the output terminal of the fourth NAND circuit 413d is The other input terminal of the first NAND circuit 413a and the other input terminal of the third NAND circuit 413c are connected in common. In the edge phase comparator 413 configured in this way, the output of the fourth NAND circuit 413d becomes the output of the edge phase comparator 413, that is, the edge phase comparison result signal S _PSR .

  Since the configuration of the edge phase comparator 413 is as described above, the period during which the phase comparison cannot be performed is only the signal transmission time of the gate IC, and there is no practical problem. For example, when a flip-flop is configured using only two NAND circuits (413c and 413d in FIG. 5) and a phase comparison is performed with it, an accurate phase comparison can be performed. Compared with the case where the edge extraction means using the CR time constant is provided at the input stage, the time during which accurate phase comparison cannot be performed can be reduced as much as possible.

  As shown in FIG. 6, the phase difference signal generator 414 in the present embodiment includes a first pulse signal generator 414a, a second pulse signal generator 414b, an inverting amplifier 414c, an integration circuit 414d, and a sample. A hold circuit (S / H) 414e is provided.

First pulse signal generator 414a rises in response to the falling edge of the edge phase comparison result signal S _PSR, after a predetermined period of time, to generate a first pulse signal S _P1 to drop automatically start.

The second pulse signal generator 414b rises in response to the falling edge of the first pulse signal S _P1, and generates a second pulse signal S _P2 which falls in response to the rising edge of the edge phase comparison result signal S _PSR.

The inverting amplifier 414c further includes a Zener diode ZD inserted in parallel with the resistor R2 in addition to the resistors R1 and R2 and the operational amplifier so that the output voltage does not become a predetermined negative voltage or less. It is configured. The inverting amplifier 414c receives the edge phase comparison result signal S _PSR and generates an inverted amplified signal S _A1 .

The integration circuit 414d further includes a switch SW inserted in parallel with the capacitor C in addition to the resistor R3, the capacitor C, and the operational amplifier. Switch SW is for turning on and off in response to the second pulse signal S _P2 output from the second pulse signal generator 414b. The integrating circuit 414d receives the inverted amplified signal S _A1, while the second pulse signal S _P2 indicates a low level to integrate the inverted amplified signal S _A1 at capacitor C by turning off the switch SW On the other hand, the integration result signal S _A2 is generated by turning on the switch SW and resetting the integration process while the second pulse signal _SP2 is at the high level. For example, when the LPF is adopted, the response to the change in the pulse width is inevitably deteriorated. However, by adopting the configuration as described above, in this embodiment, as shown in FIG. result signal SA V1 and V2 is a value of _2, respectively, immediately before the edge phase comparison result signal S _PSR is proportional to the period T1 and T2 is at a high level, which is faster the response.

Sample-and-hold circuit (S / H) 414e receives the integration result signal _{S A2,} while the first pulse signal _{S P1} to sample the integration result signal _{S A2} when depicts a high level, the first pulse signal S _{When P1} indicates a low level, the sample result is held to generate the phase difference signal S _PSPD in the phase shifter.

As described above, in the phase-controlled oscillation device according to the present embodiment, the adjustment target signal S having the second frequency by down-converting the output signal F _OUT using the first reference signal F _Ref1 having the first frequency. While generating _CO , the second reference signal F _Ref2 having the same frequency as the second frequency is phase- _shifted according to the phase shift signal S _PS to generate the third reference signal F _Ref3 , and the adjustment target signal S _CO and the third reference signal The phase control of the second reference signal F _Ref2 having a second frequency relatively lower than the predetermined frequency is formed by forming a PLL that controls the voltage controlled oscillator (VCO) 10 so that the phase of the signal F _Ref3 matches. Can control the phase of the output signal F _OUT . At this time, if the second frequency is appropriately selected, it is possible to control the phase of the output signal F _OUT using only the portion with good linearity of the second reference signal F _Ref2 . That is, the phase shift amount by the phase shift signal S _PS and the output signal F _OUT of the phase linearly can be associated, it is possible to perform phase control easily.

In addition, the control unit in the transmitting array antenna according to the present embodiment outputs a common first reference signal F _Ref1 and second reference signal F _Ref2 to the phase control oscillation device, while each phase control oscillation device and it outputs a phase shift signal S _PS indicating a specific phase shift amount for. Thereby, phase control of each phase control oscillator can be performed individually.

In the embodiment described above has been described a phase shift signal S _PS as an analog signal, for example, whereas to output a digital signal indicating the phase shift to be desired from the control unit, of the phase controlled oscillator A D / A converter is further provided inside or in the vicinity of the phase shifter 40 of each phase control oscillator, and the D / A converter converts the digital signal output from the control unit into an analog signal, signal may be a phase-shift signal S _PS a. With such a configuration, it is possible to prevent an error from being mixed due to a voltage difference between the oscillators.

  The transmitting array antenna according to the present invention can be applied to, for example, a wireless power transmission technology, particularly a microwave power transmission technology, for wirelessly transmitting power generated at a certain point to another point.

The block diagram which shows the structure of the phase control oscillation apparatus by embodiment of this invention. The block diagram which shows the structure of the adjustment object signal production | generation part shown by FIG. The block diagram which shows the structure of the error adjustment part shown by FIG. The block diagram which shows the structure of the phase shifter shown by FIG. The block diagram which shows the structure of the phase comparator for phase shifters shown by FIG. The block diagram which shows the structure of the phase difference signal generator in a phase shifter shown by FIG. 7 is a timing chart showing an operation of the phase shifter phase difference signal generator shown in FIG.

Explanation of symbols

10 Voltage controlled oscillator (VCO)
20 Directional coupler 30 Adjustment target signal generation unit 31 Frequency converter 33 N frequency divider 40 Phase shifter 41 Voltage control oscillator for phase shifter (VCO for phase shifter)
411 First binarizer 412 Second binarizer 413 Edge phase comparator 413a to 413d NAND circuit 414 Phase shifter phase difference signal generator 414a First pulse signal generator 414b Second pulse signal generator 414c Inversion Amplifier 414d Integration circuit 414e Sample hold circuit (S / H)
43 Phase comparator for phase shifter 45 Phase adjuster for phase shifter 50 Error adjustment unit 51 Phase-frequency comparator 53 Integrating amplifier

Claims (13)

A phase control method for controlling the phase of the output signal in a voltage controlled oscillator that generates an output signal of a predetermined frequency,
Using a first reference signal having a first frequency different from the predetermined frequency and having the first frequency selected such that a difference between the predetermined frequency and the first frequency is smaller than the predetermined frequency. The output signal is down-converted to generate a signal to be adjusted having a second frequency smaller than the predetermined frequency and the first frequency, and a second reference signal having the same frequency as the second frequency is desired. To generate a third reference signal and to form a PLL for controlling the voltage controlled oscillator so that the phase of the signal to be adjusted and the third reference signal coincide with each other. Performing phase control of the output signal with phase control of a relatively low second frequency,
Phase control method. A voltage controlled oscillator that generates an output signal of a predetermined frequency;
A first reference signal having a first frequency different from the output signal and the predetermined frequency is received, and the first reference signal having a frequency that is 1 / integer (including 1/1) of the difference between the predetermined frequency and the first frequency. Adjustment target signal generating means for generating a two frequency adjustment target signal;
A phase shifter for generating a third reference signal by shifting the phase of the second reference signal having the same frequency as the second frequency according to a phase shift signal indicating a phase shift amount by a DC voltage;
The adjustment target signal and the third reference signal are compared to generate an error adjustment signal according to the comparison result, and the error adjustment signal is input to the voltage controlled oscillator to control the output signal. And a phase control oscillator. The adjustment target signal generation means includes:
A frequency converter that receives the output signal and the first reference signal and generates an intermediate frequency signal having a frequency difference between the predetermined frequency and the first frequency;
An N frequency divider that divides the intermediate frequency signal into 1 / N (N is an integer equal to or greater than 2) to generate the adjustment target signal.
The phase control oscillator according to claim 2. The phase shifter is
A voltage-controlled oscillator for phase shifter for generating the third reference signal;
A phase comparator for phase shifter that compares the phase of the third reference signal with the phase of the second reference signal and generates an in-phase shifter phase difference signal having a DC voltage corresponding to the phase difference;
By comparing the phase difference signal in the phase shifter and the phase shift signal, an adjustment signal corresponding to the difference is generated, and the adjustment signal is input to the voltage controlled oscillator for phase shifter, thereby Comprising a phase shifter adjusting means for controlling the reference signal,
The phase-controlled oscillation device according to claim 2 or 3. The phase comparator for phase shifter is
A first binary value that compares the second reference signal with an average value of the second reference signal and generates a first binarized signal that is a binary signal according to the magnitude of the second reference signal with respect to the average value. And
A second binary value that compares the third reference signal with an average value of the third reference signal and generates a second binarized signal that is a binary signal according to the magnitude of the third reference signal with respect to the average value. And
The first binarized signal and the second binarized signal are received, rises in response to the rising edge of the second binarized signal, and falls in response to the rising edge of the first binarized signal. An edge phase comparator for generating an edge phase comparison result signal;
A phase difference signal generator within a phase shifter that receives the edge phase comparison result signal and generates the phase difference signal within the phase shifter having a DC voltage proportional to the time indicating the high level of the edge phase comparison result signal. Characterized by comprising
The phase-controlled oscillation device according to claim 4. The edge phase comparator includes first to fourth 2-input NAND circuits,
The first binarized signal is input to one input terminal of the first NAND circuit,
The second binarized signal is input to one input terminal of the second NAND circuit,
The output terminal of the first NAND circuit is connected to one input terminal of the third NAND circuit,
The output terminal of the second NAND circuit is connected to one input terminal of the fourth NAND circuit,
The output terminal of the third NAND circuit is commonly connected to the other input terminal of the second NAND circuit and the other input terminal of the fourth NAND circuit,
The output terminal of the fourth NAND circuit is commonly connected to the other input terminal of the first NAND circuit and the other input terminal of the third NAND circuit,
6. The phase-controlled oscillation device according to claim 5, wherein the edge phase comparison result signal is output from an output terminal of the fourth NAND circuit. The phase shifter phase difference signal generator is
A first pulse signal generator that generates a first pulse signal that rises in response to a falling edge of the edge phase comparison result signal and automatically falls after a lapse of a predetermined period;
A second pulse signal generator that generates a second pulse signal that rises according to a falling edge of the first pulse signal and falls according to a rising edge of the edge phase comparison result signal;
An inverting amplifier configured such that a Zener diode is inserted in parallel with the resistance of the feedback path so that the output voltage does not become a predetermined negative voltage or less. The inverting amplifier receives the edge phase comparison result signal and An inverting amplifier to generate;
An integration circuit configured by inserting a switch that is turned on / off in accordance with the second pulse signal in parallel with a capacitance of a feedback path, and receiving the inverted amplification signal, and the second pulse signal is low. While the level is indicated, the inverted amplified signal is integrated by the capacitor, and while the second pulse signal indicates the high level, the integration processing is reset to generate an integration result signal. Circuit,
Receiving the integration result signal, the integration result signal is sampled when the first pulse signal indicates a high level, while the sample result is held when the first pulse signal indicates a low level. And a sample and hold circuit that generates the phase difference signal in the phase shifter.
The phase-controlled oscillation device according to claim 5 or 6. The phase shifter adjusting means includes an integrating amplifier that integrates the difference between the phase shift signal in the phase shifter and the phase shift signal.
The phase-controlled oscillation device according to claim 4. The error adjusting means includes
A phase comparator that performs phase comparison between the signal to be adjusted and the third reference signal to generate a phase difference signal;
An integration amplifier that integrates the phase difference signal to generate the error adjustment signal and outputs the error adjustment signal to the voltage controlled oscillator,
The phase-controlled oscillation device according to claim 2. The phase comparator is a phase-frequency comparator that operates as a frequency comparator when not only the phase but also the frequency is different,
The phase-controlled oscillation device according to claim 9. A plurality of phase-controlled oscillators according to any one of claims 2 to 10,
A plurality of antennas connected to each of the plurality of phase controlled oscillators;
A transmission array antenna comprising: a control unit that outputs the first reference signal, the second reference signal, and the phase-shifted signal to the phase-controlled oscillator, and controls a phase of the output signal. The control unit outputs the first reference signal and the second reference signal that are common to all the phase controlled oscillators, and sets the phase shift amount specific to each of the phase controlled oscillators. The phase shift signal shown is output,
The transmitting array antenna according to claim 11. A D / A converter is further provided in or near each of the phase control oscillators,
The control unit outputs a digital signal corresponding to the phase shift amount instead of directly outputting the phase shift signal indicating the phase shift amount to each of the phase control oscillators.
Each of the D / A converters receives the digital signal, performs D / A conversion, and outputs an analog signal as the phase shift signal to the phase shifter of the corresponding phase control oscillation device It is characterized by
The transmitting array antenna according to claim 11 or 12.

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