JP2007011947A - Power source regulator circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power source regulator circuit wherein fluctuation of an output voltage is small even without adding a capacitor to an output terminal. <P>SOLUTION: This power source regulator circuit has: a P-type MOSFET 1 connected to between an input power source terminal 10 and the output terminal 20; resistors R1, R2 connected to between the output terminal 20 and a ground terminal 30; a comparator 3 comparing a feedback voltage Vfb obtained by dividing the output voltage Vout of the output terminal 20 by the resistors R1, R2 and a reference voltage Vref generated by a reference voltage generation circuit 2, and changing a voltage inputted to a gate terminal of the P-type MOSFET 1 such that the feedback voltage Vfb accords with the reference voltage Vref; an N-type MOSFET 4 connected to the P-type MOSFET 1 in parallel, turning off when the output voltage Vout is a prescribed voltage, and turning on when the output voltage Vout falls; and a constant voltage generation circuit 5A generating a gate voltage of the N-type MOSFET 4. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a power supply regulator circuit, and more particularly to a power supply regulator circuit that generates a predetermined output voltage by stepping down an input power supply voltage.

  With the increase in the number of elements of a CMOS LSI, heat generation of the CMOS LSI has become a big problem. As one of the countermeasures, it is effective to lower the operating voltage inside the CMOS LSI. On the other hand, the input / output unit of the CMOS LSI may need to use a conventional operating voltage due to the specifications of the interface with the outside. Therefore, a conventional power supply voltage supplied at a high voltage is directly applied to the input / output section of the CMOS LSI, and a low voltage is applied to the CMOS LSI internal circuit by stepping down the power supply voltage. Therefore, a power supply regulator circuit that steps down the input power supply voltage and generates a predetermined output voltage may be incorporated in the CMOS LSI.

  As a power supply regulator circuit incorporated in a CMOS type LSI, a circuit is used in which a source terminal of a P-type MOSFET is connected to an input power supply terminal, a resistance load is connected to the drain terminal, and the voltage at the drain terminal is used as the output voltage Vout. .

  In this power supply regulator circuit, the load resistor described above is two resistors R1 and R2 connected in series between the drain terminal and the ground terminal of the P-type MOSFET, and a voltage obtained by dividing the output voltage Vout by the resistors R1 and R2. Is provided as a feedback voltage Vfb, and a comparator for comparing with the reference voltage Vref is provided, and the output of this comparator is input to the gate terminal of the P-type MOSFET.

  In the power supply regulator circuit having such a configuration, the output voltage Vout is controlled by changing the gate voltage of the P-type MOSFET so that the comparator satisfies Vfb = Vref. By performing such feedback control, a constant output voltage Vout = Vref × (1 + R1 / R2) is obtained from the drain terminal of the P-type MOSFET.

  However, such feedback control has the following problems. That is, since the resistors R1 and R2 exist in the feedback path, the resistance value is one factor that determines the feedback speed.

  For example, since low power consumption is required in an LSI for mobile use, the resistance values of the resistors R1 and R2 may be set to 1 MΩ or more in order to reduce the current flowing through the resistors. In such a case, when the load current of the power supply regulator circuit increases rapidly and the output voltage Vout decreases rapidly, the comparator of the power supply regulator circuit tries to restore the output voltage Vout, but the resistors R1 and R2 Due to the parasitic capacitance, the change in the feedback voltage Vfb is slow, and it may take a long time for the comparator to output a desired voltage, and it takes a long time to recover the output voltage Vout.

Therefore, a capacitor is added to the output terminal of the power supply regulator circuit, that is, the drain terminal of the P-type MOSFET so that the output voltage Vout does not change suddenly even if the load current of the power supply regulator circuit changes suddenly ( For example, see Patent Document 1.)
By adding this capacitor, the fluctuation of the output voltage Vout can be reduced. However, when the resistance values of the resistors R1 and R2 are 1 MΩ or more, or when the load current of Vout is several tens of μA, it is sufficient. In order to obtain the output voltage fluctuation suppressing effect, the capacitance of the capacitor must be as large as about 1 μF.

However, in order to form such a large-capacity capacitor inside the LSI, an enormous area is required, and considering the chip size of the LSI, it is practically impossible to form this capacitor inside the LSI. There was a problem. Further, if this capacitor is connected as an external component to the external terminal of the LSI, there is a problem that the number of parts of the board on which the LSI is mounted is increased and the board production process is increased.
JP 2004-341877 A (9th page, FIG. 4)

  Accordingly, an object of the present invention is to provide a power supply regulator circuit in which fluctuation of the output voltage is small without adding a capacitor to the output terminal.

  According to one aspect of the present invention, a P-type MOSFET having a source terminal connected to the input power supply terminal and a drain terminal connected to the output terminal, and the first and second terminals connected between the output terminal and the ground terminal. 2 and a feedback voltage obtained by dividing the output voltage of the output terminal by the first and second resistors, and a reference voltage, and the P-type MOSFET of the P-type MOSFET is matched so that the feedback voltage matches the reference voltage. A comparator for changing a voltage input to the gate terminal, connected in parallel to the P-type MOSFET, and turned off when the output voltage is a predetermined voltage and turned on when the output voltage is lowered. A power supply regulator circuit comprising an N-type MOSFET is provided.

  According to the present invention, when the load current suddenly increases and the output voltage decreases, the N-type MOSFET quickly conducts and supplies the load current, so that fluctuations in the output voltage can be reduced.

  Embodiments of the present invention will be described below with reference to the drawings.

  1 is a circuit diagram showing an example of the configuration of a power regulator circuit according to a first embodiment of the present invention.

  The power supply regulator circuit of this embodiment is connected to a P-type MOSFET 1 having a source terminal connected to the input power supply terminal 10 and a drain terminal connected to the output terminal 20, and to a reference voltage connected to the input power supply terminal 10 and the ground terminal 30. A reference voltage generation circuit 2 that generates Vref, a resistor R1 and a resistor R2 that are connected in series between the output terminal 20 and the ground terminal 30, generate a feedback voltage Vfb obtained by dividing the output voltage Vout, and an inverting input ( The value of the reference voltage Vref input to the −) terminal is compared with the value of the feedback voltage Vfb input to the non-inverting input (+) terminal, and a voltage corresponding to the difference is input to the gate terminal of the P-type MOSFET 1. Is connected in parallel to the P-type MOSFET 1 and has a drain terminal connected to the input power supply terminal 10 and an output terminal. An N-type MOSFET 4 whose source terminal is connected to 0 is provided, and a constant voltage generation circuit 5A that is connected to the input power supply terminal 10 and the ground terminal 30 and generates a constant voltage to be applied to the gate terminal of the N-type MOSFET 4 is provided. It has a configuration.

  The constant voltage generation circuit 5A is configured such that the gate-source voltage Vgs of the N-type MOSFET 4 when the output voltage Vout is a predetermined voltage is smaller than the threshold voltage Vth of the N-type MOSFET 4 (Vgs <Vth). Generate voltage. Therefore, the N-type MOSFET 4 is off during normal operation when the output voltage Vout is a predetermined voltage.

  As described above, since the N-type MOSFET 4 is normally off, the power supply regulator circuit of this embodiment also outputs the output voltage Vout determined by Vout = Vref × (1 + R1 / R2), similarly to the conventional power supply regulator circuit. To do.

  When the load current flowing through the load connected to the output terminal 20 suddenly increases, the output voltage Vout decreases, and the feedback voltage Vfb obtained by dividing the output voltage Vout by the resistors R1 and R2 also decreases. Therefore, the comparator 3 tries to lower the gate voltage of the P-type MOSFET 1 so that the current flowing through the P-type MOSFET 1 increases. However, since the feedback time by the resistors R1 and R2 is long, the rate of increase in the current flowing through the P-type MOSFET 1 is small.

  On the other hand, when the output voltage Vout decreases and the gate-source voltage Vgs of the N-type MOSFET 4 becomes equal to or higher than the threshold voltage Vth of the N-type MOSFET 4 (Vgs ≧ Vth), the N-type MOSFET 4 is turned on and the load current is reduced. Come to supply. At this time, since a constant gate voltage is always applied to the N-type MOSFET 4, the N-type MOSFET 4 conducts rapidly and supplies a load current rapidly.

  Such a high-speed current reinforcement by the N-type MOSFET 4 can suppress a significant voltage drop of the output voltage Vout.

  FIG. 2 shows waveforms obtained by simulating the output voltage Vout of this embodiment when the load current increases rapidly and the output voltage Vout of a conventional power supply regulator circuit that does not have the N-type MOSFET 4 as a comparative example.

  As shown in FIG. 2, in the case of a conventional power supply regulator circuit that does not have the N-type MOSFET 4, when the load current increases rapidly, the output voltage Vout greatly decreases and the time until the original voltage is restored long. On the other hand, in the power supply regulator circuit of this embodiment, when the load current increases rapidly, the output voltage Vout decreases until the N-type MOSFET 4 is turned on, but when the N-type MOSFET 4 is turned on, the output voltage Vout Recovers rapidly.

  Therefore, the fluctuation of the output voltage Vout of the power supply regulator circuit of the present embodiment can be suppressed as compared with the conventional power supply regulator circuit.

  According to this embodiment, when the load current of the power supply regulator circuit increases rapidly and the output voltage of the power supply regulator circuit decreases, the N-type MOSFET connected in parallel to the P-type MOSFET quickly conducts. Since the load current is supplied, fluctuations in the output voltage of the power regulator circuit can be reduced.

  FIG. 3 is a circuit diagram showing an example of the configuration of the power regulator circuit according to the second embodiment of the present invention.

  The power regulator circuit of this embodiment is different from the power regulator circuit of the first embodiment in that the constant voltage generation circuit 5B is connected to the reference voltage generation circuit 2.

  Other circuit configurations are the same as those in the first embodiment, and their operations are also the same as those in the first embodiment. Therefore, in FIG. 3, the same circuit elements as those shown in FIG. 1 are denoted by the same reference numerals as those in FIG. 1, and detailed description thereof is omitted here.

  The constant voltage generation circuit 5B of this embodiment is connected to the reference voltage generation circuit 2 and generates a constant voltage input to the gate terminal of the N-type MOSFET 4 from the reference voltage Vref that is the output of the reference voltage generation circuit 2. The reference voltage Vref is controlled by the reference voltage generation circuit 2 so as to output a constant voltage even when the input power supply input to the input power supply terminal 10 has a voltage fluctuation. Therefore, the reference voltage Vref input to the constant voltage generation circuit 5B is stable.

  On the other hand, the constant voltage generation circuit 5A according to the first embodiment is connected to the input power supply terminal 10 and generates a constant voltage input from the input power supply voltage to the gate terminal of the N-type MOSFET 4. Therefore, the input power supply voltage input to the constant voltage generation circuit 5B varies. Therefore, like the reference voltage generation circuit 2, the constant voltage generation circuit 5A according to the first embodiment needs to be controlled to suppress voltage fluctuations of the input power supply.

  On the other hand, the constant voltage generation circuit 5B according to the present embodiment generates a constant voltage that is input to the gate terminal of the N-type MOSFET 4 from the reference voltage Vref having a stable voltage level. Unlike the circuit 5A, the control for suppressing the voltage fluctuation of the input power supply becomes unnecessary. Therefore, the constant voltage generation circuit 5B according to the present embodiment can be simplified in comparison with the constant voltage generation circuit 5A according to the first embodiment.

  According to the present embodiment, the voltage input to the gate terminal of the N-type MOSFET is generated from the reference voltage Vref whose voltage level is stable, so that the voltage input to the gate terminal of the N-type MOSFET is a constant voltage. The circuit to be controlled can be configured easily.

  FIG. 4 is a circuit diagram showing an example of the configuration of the power supply regulator circuit according to the third embodiment of the present invention.

  The power regulator circuit of this embodiment is different from the power regulator circuit of the first embodiment in that the voltage input to the gate terminal of the N-type MOSFET 4 is not input from the constant voltage generation circuit 5A but input from the gate voltage input terminal 40. It is a point to do.

  Other circuit configurations are the same as those in the first embodiment, and their operations are also the same as those in the first embodiment. Therefore, in FIG. 4, the same circuit elements as those shown in FIG. 1 are denoted by the same reference numerals as those in FIG. 1, and detailed description thereof is omitted here.

  The gate voltage input terminal 40 of this embodiment is such that the gate-source voltage Vgs of the N-type MOSFET 4 when the output voltage Vout is a predetermined voltage from the outside of the power supply regulator circuit to the gate terminal of the N-type MOSFET 4 is N-type. This is a terminal for inputting a voltage lower than the threshold voltage Vth of the MOSFET 4 (Vgs <Vth).

  Since the constant voltage generation circuit 5A of the first embodiment or the constant voltage generation circuit 5B of the second embodiment is made in advance in the power supply regulator circuit, its output voltage is fixed. Therefore, the amount of current flowing through the N-type MOSFET 4 is also fixed.

  On the other hand, in this embodiment, the voltage input to the gate terminal of the N-type MOSFET 4 can be changed by the gate voltage input terminal 40. Thereby, according to the magnitude | size of the electric current which flows into the load connected to the output terminal 40, the electric current amount which flows into N type MOSFET4 can be controlled freely.

  According to this embodiment, since the voltage input to the gate terminal of the N-type MOSFET can be controlled from the outside of the power supply regulator, the degree of freedom in controlling the amount of current flowing through the N-type MOSFET can be expanded. .

1 is a circuit diagram showing an example of a configuration of a power supply regulator circuit according to Embodiment 1 of the present invention. FIG. 4 is a simulation waveform diagram showing an example of the operation of the power regulator circuit according to the first embodiment of the present invention. The circuit diagram which shows the example of a structure of the power supply regulator circuit which concerns on Example 2 of this invention. FIG. 6 is a circuit diagram illustrating an example of a configuration of a power regulator circuit according to a third embodiment of the present invention.

Explanation of symbols

1 P-type MOSFET
2 Reference voltage generation circuit 3 Comparator 4 N-type MOSFET
5A, 5B Constant voltage generation circuit 10 Input power supply terminal 20 Output terminal 30 Ground terminal 40 Gate voltage input terminals R1, R2 Resistance

Claims (5)

A P-type MOSFET having a source terminal connected to the input power supply terminal and a drain terminal connected to the output terminal;
First and second resistors connected between the output terminal and a ground terminal;
A feedback voltage obtained by dividing the output voltage of the output terminal by the first and second resistors is compared with a reference voltage, and input to the gate terminal of the P-type MOSFET so that the feedback voltage matches the reference voltage. A comparator for changing the voltage,
A power supply regulator circuit comprising an N-type MOSFET connected in parallel to the P-type MOSFET and turned off when the output voltage is a predetermined voltage and turned on when the output voltage drops.   2. The power supply regulator circuit according to claim 1, further comprising a constant voltage generation circuit that generates a constant voltage lower than a threshold voltage of the N-type MOSFET and inputs the constant voltage to a gate terminal of the N-type MOSFET.   The power supply regulator circuit according to claim 2, wherein the constant voltage generation circuit is connected to the input voltage terminal.   The power supply regulator circuit according to claim 2, wherein the reference voltage is input to the constant voltage generation circuit.   2. The power supply regulator circuit according to claim 1, further comprising a terminal for inputting a constant voltage lower than a threshold voltage of the N-type MOSFET to the gate terminal of the N-type MOSFET.

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