JP2007005354A - Laminated solid electrolytic capacitor, and formation method of negative electrode extraction layer in same - Google Patents

Laminated solid electrolytic capacitor, and formation method of negative electrode extraction layer in same Download PDF

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JP2007005354A
JP2007005354A JP2005180426A JP2005180426A JP2007005354A JP 2007005354 A JP2007005354 A JP 2007005354A JP 2005180426 A JP2005180426 A JP 2005180426A JP 2005180426 A JP2005180426 A JP 2005180426A JP 2007005354 A JP2007005354 A JP 2007005354A
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solid electrolytic
electrolytic capacitor
capacitor
laminated
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JP3826153B1 (en
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Keiichi Ogata
慶一 尾形
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Nichicon Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a laminated solid electrolytic capacitor having low ESR and high yields by reducing the resistance between laminated capacitor elements. <P>SOLUTION: After a plurality of capacitor elements comprising valve action metal foil 1, a dielectric oxide layer 2 formed on the surface of the valve action metal foil, a solid electrolyte layer 3 successively formed on the surface of the dielectric oxide layer, a carbon layer 4, and a silver layer 5 are laminated via a conductive adhesive layer 6, the surface of the obtained laminated element is covered to form a silver layer 7 integrally. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、積層型固体電解コンデンサ、及び当該積層型固体電解コンデンサにおける陰極引き出し層の形成方法に関するものである。   The present invention relates to a multilayer solid electrolytic capacitor and a method for forming a cathode lead layer in the multilayer solid electrolytic capacitor.

近年、インテル社のPentium(登録商標)に代表されるCPUは、処理速度が高速化し、動作クロックは3GHz以上に達しており、そのCPU周辺に使用されるコンデンサに対しても、高速化への対応、すなわち低ESR(等価直列抵抗)、低ESL(等価直列インダクタンス)化が強く要求されるようになった。また、機器の小型薄型化に伴い、コンデンサに対する低背化も要求されている。   In recent years, CPUs represented by Intel's Pentium (registered trademark) have increased in processing speed, and the operating clock has reached 3 GHz or more. Correspondence, that is, low ESR (equivalent series resistance) and low ESL (equivalent series inductance) have been strongly demanded. In addition, with the reduction in size and thickness of devices, there is a demand for lowering the height of capacitors.

一方、低ESRを要求されるコンデンサにおいては、固体電解質に固有抵抗の低い導電性高分子を採用した固体電解コンデンサが開発され、広く使用されている。この導電性高分子を固体電解質に用いた固体電解コンデンサには、現在、アルミニウム箔を陽極とした巻回型、及び積層型、さらにタンタル焼結体を陽極としたものに大別され、各々の特徴を有している。   On the other hand, as a capacitor requiring low ESR, a solid electrolytic capacitor employing a conductive polymer having a low specific resistance as a solid electrolyte has been developed and widely used. The solid electrolytic capacitors using the conductive polymer as a solid electrolyte are roughly classified into a winding type using an aluminum foil as an anode, a laminated type, and a tantalum sintered body as an anode. It has characteristics.

一般に、積層型固体電解コンデンサは低背化、低ESR化に対応しやすく、弁作用金属箔表面をエッチングし、多孔質体を形成後、その表面に誘電体酸化皮膜を形成した陽極素子と、誘電体酸化皮膜上に形成された固体電解質層、カーボン層、銀層からなる陰極引き出し層とで形成されたコンデンサ素子を、導電性接着剤層を介して複数枚積層後、外部電極を接続し、構成される。   In general, a multilayer solid electrolytic capacitor is easy to cope with low height and low ESR, and after etching the valve action metal foil surface to form a porous body, an anode element having a dielectric oxide film formed on the surface, After laminating a plurality of capacitor elements formed of a solid electrolyte layer, a carbon layer, and a cathode lead layer made of a silver layer formed on a dielectric oxide film via a conductive adhesive layer, an external electrode is connected. Configured.

しかし、上記の積層方法の場合、コンデンサ素子間の界面抵抗が非常に大きくなるため、固体電解質層を形成したコンデンサ素子を積層後、該積層素子を覆うようにカーボン層、銀層を順次形成し、積層素子を構成するものもあった(例えば特許文献1参照)。
特開2004−281515号公報
However, in the case of the above lamination method, the interfacial resistance between the capacitor elements becomes very large. Therefore, after laminating capacitor elements on which a solid electrolyte layer is formed, a carbon layer and a silver layer are sequentially formed so as to cover the laminated elements. Some of them constitute a laminated element (for example, see Patent Document 1).
JP 2004-281515 A

しかしながら、特許文献1記載の方法では、固体電解質形成後に積層し、陰極引き出し層を形成するため、特に固体電解質が機械的強度の低い導電性高分子である場合、コンデンサ素子の漏れ電流が増大するため、歩留を低くする問題がある。   However, in the method described in Patent Document 1, since the cathode extraction layer is formed by laminating after forming the solid electrolyte, particularly when the solid electrolyte is a conductive polymer having low mechanical strength, the leakage current of the capacitor element increases. Therefore, there is a problem of lowering the yield.

上記のような課題があるため、低ESR、高歩留が可能な構造を有した積層型固体電解コンデンサが求められていた。
また、本発明の課題は、積層型固体電解コンデンサの低ESR化を図るのに有用な陰極引き出し層を形成するための方法を提供することにもある。
Because of the problems as described above, a multilayer solid electrolytic capacitor having a structure capable of low ESR and high yield has been demanded.
Another object of the present invention is to provide a method for forming a cathode lead layer useful for reducing the ESR of a multilayer solid electrolytic capacitor.

本発明の積層型固体電解コンデンサは、弁作用金属箔と、前記弁作用金属箔の表面に形成された誘電体酸化皮膜と、前記誘電体酸化皮膜の表面に順次形成された固体電解質層、カーボン層、銀層とからなるコンデンサ素子が複数枚、導電性接着剤層を介して積層されて積層素子を形成しており、当該積層素子の表面が銀ペーストによって被覆され、一体化されていることを特徴とし、このような積層型固体電解コンデンサは、弁作用金属箔表面に形成された誘電体酸化皮膜に、固体電解質層、カーボン層、銀層が順次形成されたコンデンサ素子複数枚を導電性接着剤層を介して積層した後、得られた積層素子の表面を覆い、一体化するように導電性の銀層を形成することによって製造される。
又、本発明は、上記の特徴を有した積層型固体電解コンデンサにおいて、前記弁作用金属箔が、タンタル箔、ニオブ箔およびアルミニウム箔からなる群より選ばれたものであることを特徴とするものでもある。
The multilayer solid electrolytic capacitor of the present invention includes a valve action metal foil, a dielectric oxide film formed on the surface of the valve action metal foil, a solid electrolyte layer sequentially formed on the surface of the dielectric oxide film, carbon A plurality of capacitor elements composed of a layer and a silver layer are laminated via a conductive adhesive layer to form a laminated element, and the surface of the laminated element is covered with silver paste and integrated. Such a multilayer solid electrolytic capacitor is made of a dielectric oxide film formed on the surface of a valve-acting metal foil, and a plurality of capacitor elements in which a solid electrolyte layer, a carbon layer, and a silver layer are sequentially formed are conductive. It is manufactured by forming a conductive silver layer so as to cover and integrate the surface of the obtained laminated element after lamination through an adhesive layer.
In the multilayer solid electrolytic capacitor having the above-mentioned characteristics, the valve-acting metal foil is selected from the group consisting of tantalum foil, niobium foil, and aluminum foil. But there is.

さらに、本発明は、積層型固体電解コンデンサの低等価直列抵抗化(低ESR化)を図ることが可能な陰極引き出し層を形成するための方法であって、この方法は、弁作用金属箔の表面に誘電体酸化皮膜を形成させ、さらに前記誘電体酸化皮膜の表面に、固体電解質層、カーボン層、銀層を順次形成させたコンデンサ素子を複数枚製造する工程と、前記の複数枚のコンデンサ素子を導電性接着剤層を介して積層し、積層素子を製造する工程と、前記積層素子の表面を銀ペーストにて被覆し、一体化することにより、積層した全てのコンデンサ素子から陰極を引き出すことが可能な陰極引き出し層を形成する工程とを含むことを特徴とする。
上記の本発明の陰極引き出し層形成方法により、コンデンサ素子を接合する導電性接着剤ではカバーできないコンデンサ素子のエッジ部分の接続抵抗を最大限に低下させることができ、且つコンデンサ素子間の界面抵抗を低くすることができるので、積層型コンデンサの低ESR化を図ることが可能である。
Furthermore, the present invention is a method for forming a cathode lead layer capable of achieving a low equivalent series resistance (low ESR) of a multilayer solid electrolytic capacitor, and this method comprises a valve action metal foil. A step of manufacturing a plurality of capacitor elements in which a dielectric oxide film is formed on the surface, and a solid electrolyte layer, a carbon layer, and a silver layer are sequentially formed on the surface of the dielectric oxide film; and the plurality of capacitors The element is laminated through a conductive adhesive layer, and the laminated element is manufactured, and the surface of the laminated element is covered with silver paste and integrated to draw out the cathode from all the laminated capacitor elements. Forming a cathode lead layer that can be formed.
By the above cathode lead layer forming method of the present invention, the connection resistance of the edge portion of the capacitor element that cannot be covered with the conductive adhesive for joining the capacitor element can be reduced to the maximum, and the interface resistance between the capacitor elements can be reduced. Since it can be lowered, it is possible to reduce the ESR of the multilayer capacitor.

また、本発明の陰極引き出し層形成方法の場合、コンデンサ素子の積層工程を、銀層形成後に行うため、機械的ストレスによる誘電体酸化皮膜の損傷を防ぐことができ、製品の歩留を高くすることができる。   Further, in the cathode lead layer forming method of the present invention, the capacitor element is laminated after the silver layer is formed, so that damage to the dielectric oxide film due to mechanical stress can be prevented, and the yield of the product is increased. be able to.

なお、積層素子に塗布する導電性の銀ペーストについては、エポキシ系樹脂、アクリル系樹脂、ゴム系樹脂等をバインダとする一般的なもので良いが、積層前のコンデンサ素子に塗布しているものと同じ材料であるのが望ましい。
また、積層素子に形成する導電性の銀層は、銀ペースト中にコンデンサ素子を漬けるディッピング後、乾燥する等の公知の方法で行えば良い。
The conductive silver paste applied to the laminated element may be a general one using a binder of epoxy resin, acrylic resin, rubber resin, etc., but applied to the capacitor element before lamination. It is desirable to use the same material.
Further, the conductive silver layer formed on the laminated element may be formed by a known method such as drying after dipping the capacitor element in a silver paste.

本発明の積層型固体電解コンデンサの場合、積層後の全てのコンデンサ素子全体を覆うようにして導電性銀層が形成されているので、低抵抗で効率よく全ての積層素子から陰極を引き出すことができ、且つ導電性接着剤のみではカバーできないコンデンサ素子のエッジ部分の接続抵抗を低くすることができるため、積層型固体電解コンデンサの低ESR化が達成できる。また、本発明の積層型固体電解コンデンサは、銀層形成後のコンデンサ素子が積層された構造を有しているので、機械的ストレスによる誘電体酸化皮膜の損傷が抑制され、漏れ電流不良率を低減することもできる。
又、本発明の積層型固体電解コンデンサの製造における陰極引き出し層の形成方法は、積層後の全てのコンデンサ素子を覆うように導電性の銀層を形成することで、低抵抗で効率よく全ての素子から陰極を引き出すことができ、且つ導電性接着剤のみではカバーできないコンデンサ素子のエッジ部分の接続抵抗を低くすることができるので、よりESRの低い積層型固体電解コンデンサを製造するのに有用である。しかも、銀層形成後のコンデンサ素子を積層するため、機械的ストレスによる誘電体酸化皮膜の損傷が抑制され、漏れ電流不良率を低減することもできる。
In the case of the multilayer solid electrolytic capacitor of the present invention, since the conductive silver layer is formed so as to cover all the capacitor elements after lamination, the cathode can be efficiently drawn out from all the multilayer elements with low resistance. In addition, since the connection resistance of the edge portion of the capacitor element that cannot be covered only with the conductive adhesive can be lowered, the ESR of the multilayer solid electrolytic capacitor can be reduced. In addition, since the multilayer solid electrolytic capacitor of the present invention has a structure in which capacitor elements after silver layer formation are laminated, damage to the dielectric oxide film due to mechanical stress is suppressed, and the leakage current failure rate is reduced. It can also be reduced.
In addition, the method for forming the cathode lead layer in the production of the multilayer solid electrolytic capacitor of the present invention is to efficiently form all of the conductive silver layers so as to cover all the capacitor elements after the lamination, and efficiently with a low resistance. Since the cathode can be drawn out from the device and the connection resistance of the edge portion of the capacitor device that cannot be covered only with the conductive adhesive can be lowered, it is useful for manufacturing a multilayer solid electrolytic capacitor having a lower ESR. is there. In addition, since the capacitor elements after the formation of the silver layer are stacked, damage to the dielectric oxide film due to mechanical stress is suppressed, and the leakage current defect rate can be reduced.

(実施例1)
以下、本発明の積層型固体電解コンデンサの好ましい実施例を図面に示して説明する。図1は、本発明の積層型固体電解コンデンサにおける積層素子断面構造の好ましい一例を示す図であり、図5は、積層素子の概観図である。
Example 1
Hereinafter, preferred embodiments of the multilayer solid electrolytic capacitor of the present invention will be described with reference to the drawings. FIG. 1 is a view showing a preferred example of the cross-sectional structure of the multilayer element in the multilayer solid electrolytic capacitor of the present invention, and FIG. 5 is an overview of the multilayer element.

図1および図5に例示した本発明の積層型固体電解コンデンサにおける弁作用金属箔1としては、エッチング処理を施したアルミニウム箔を使用した。このアルミニウム箔表面の陰極層形成部分に、誘電体酸化皮膜2を形成し、陽極素子とした。そして、陽極と陰極の短絡を防止するため、絶縁層8を形成後、固体電解質層3を形成した。ここでは固体電解質はポリチオフェンからなる導電性高分子を用いた。その後、カーボン層4、銀層5を順次形成し、コンデンサ素子を構成した後、図1に示すように、導電性接着剤層6を介して2枚のコンデンサ素子を積層し、該積層素子を導電性銀ペースト中にディッピング後、乾燥して、積層素子の周囲を囲むように銀層(陰極引き出し層7)を形成した。ここでは、積層前、積層後、いずれもエポキシ系樹脂を含む銀ペーストを用いた。   As the valve action metal foil 1 in the multilayer solid electrolytic capacitor of the present invention illustrated in FIGS. 1 and 5, an aluminum foil subjected to etching treatment was used. A dielectric oxide film 2 was formed on the cathode layer forming portion on the surface of the aluminum foil to form an anode element. And in order to prevent the short circuit of an anode and a cathode, after forming the insulating layer 8, the solid electrolyte layer 3 was formed. Here, a conductive polymer made of polythiophene was used as the solid electrolyte. After that, after sequentially forming the carbon layer 4 and the silver layer 5 to constitute the capacitor element, as shown in FIG. 1, two capacitor elements are laminated via the conductive adhesive layer 6, and the laminated element is After dipping in the conductive silver paste, it was dried to form a silver layer (cathode lead layer 7) so as to surround the periphery of the laminated element. Here, a silver paste containing an epoxy resin was used before and after lamination.

上記で得られた積層素子の陽極側の箔を外部電極と抵抗溶接で接合し、銀層が形成された陰極側と外部電極を導電性接着剤で接合した後、エポキシ樹脂でパッケージした後、エージングを実施し、定格電圧が6.3V、定格容量が100uFの本発明の積層型固体電解コンデンサを得た。   After joining the foil on the anode side of the laminated element obtained above by resistance welding with the external electrode, after joining the cathode side and external electrode on which the silver layer was formed with a conductive adhesive, after packaging with an epoxy resin, Aging was performed to obtain a multilayer solid electrolytic capacitor of the present invention having a rated voltage of 6.3 V and a rated capacity of 100 uF.

(比較例1)
実施例1と同様の方法でカーボン層4、銀層5まで形成し作製したコンデンサ素子を、導電性接着剤層6を介して2枚積層し、その後、実施例1と同様に外部電極端子を構成、パッケージ、エージングを実施し、積層型固体電解コンデンサを得た。図2に、この比較例1で製造した積層型固体電解コンデンサの断面構造を示す。
(Comparative Example 1)
Two capacitor elements formed by forming the carbon layer 4 and the silver layer 5 by the same method as in Example 1 were laminated through the conductive adhesive layer 6, and then external electrode terminals were formed in the same manner as in Example 1. The structure, package, and aging were performed to obtain a multilayer solid electrolytic capacitor. FIG. 2 shows a cross-sectional structure of the multilayer solid electrolytic capacitor manufactured in Comparative Example 1.

(比較例2)
実施例1と同様の方法で固体電解質層3まで形成したコンデンサ素子を2枚積層し、該積層素子を覆うようにして、カーボン層4および銀層7を形成した。その後、実施例1と同様の工程を経て、積層型固体電解コンデンサを得た。図3に、この比較例2で製造した積層型固体電解コンデンサの断面構造を示す。
(Comparative Example 2)
Two capacitor elements formed up to the solid electrolyte layer 3 by the same method as in Example 1 were laminated, and the carbon layer 4 and the silver layer 7 were formed so as to cover the laminated element. Thereafter, through the same process as in Example 1, a multilayer solid electrolytic capacitor was obtained. FIG. 3 shows a cross-sectional structure of the multilayer solid electrolytic capacitor manufactured in Comparative Example 2.

(比較例3)
実施例1と同様の方法でカーボン層4まで形成したコンデンサ素子を2枚積層し、該積層素子を覆うように、銀層7を形成した。その後、実施例1と同様の工程を経て、積層型固体電解コンデンサを得た。図4に、この比較例3で製造した積層型固体電解コンデンサの断面構造を示す。
(Comparative Example 3)
Two capacitor elements formed up to the carbon layer 4 by the same method as in Example 1 were laminated, and a silver layer 7 was formed so as to cover the laminated element. Thereafter, through the same process as in Example 1, a multilayer solid electrolytic capacitor was obtained. FIG. 4 shows a cross-sectional structure of the multilayer solid electrolytic capacitor manufactured in Comparative Example 3.

上記実施例および比較例1〜3で作製した積層型固体電解コンデンサのESR値、及び漏れ電流不良率を以下の表1に示す。   Table 1 below shows the ESR value and the leakage current defect rate of the multilayer solid electrolytic capacitors produced in the above Examples and Comparative Examples 1 to 3.

表1の実験結果から、実施例で得られた積層型固体電解コンデンサは、比較例1〜3の積層型固体電解コンデンサよりもESRが低く、かつ、漏れ電流不良率も低いこと(高歩留)が分かる。 From the experimental results of Table 1, the multilayer solid electrolytic capacitors obtained in the examples have lower ESR and lower leakage current failure rate than the multilayer solid electrolytic capacitors of Comparative Examples 1 to 3 (high yield) )

このようにしてESRを低減することができたのは、図1に示すように、積層後の素子を覆うように銀層7を形成することで、コンデンサ素子間の界面抵抗が低減し、且つ電流の流れをロスしやすいコンデンサ素子のエッジ部分も銀層7でカバーされ、抵抗が低減した効果によるものである。   As shown in FIG. 1, the ESR can be reduced in this way by forming the silver layer 7 so as to cover the stacked elements, thereby reducing the interfacial resistance between the capacitor elements, and The edge portion of the capacitor element that easily loses the flow of current is also covered with the silver layer 7, which is due to the effect of reducing the resistance.

また、漏れ電流不良率が低減したのは、樹脂を含む銀層5を形成した後に積層するため、機械的ストレスによる誘電体酸化膜2の損傷を防ぐことができた効果によるものである。   The reason why the leakage current defect rate is reduced is due to the effect that the dielectric oxide film 2 can be prevented from being damaged by mechanical stress because the silver layer 5 containing resin is laminated after being formed.

なお、上記実施例においては、弁作用金属箔にアルミニウム箔を用いたが、タンタル箔やニオブ箔、さらには弁金属粉体を焼結してシート状に形成した素子を用いても同様の効果が得られた。   In the above embodiment, aluminum foil was used for the valve action metal foil. However, the same effect can be obtained by using a tantalum foil, niobium foil, or an element formed by sintering valve metal powder into a sheet shape. was gotten.

また、上記実施例においては、積層後の素子にディッピングにより銀層を形成したが、スプレーによる噴射など、他の公知の形成方法を用いても同様の効果が得られる。   In the above embodiment, the silver layer is formed by dipping on the laminated element, but the same effect can be obtained by using other known forming methods such as spraying.

さらに、実施例においては、エポキシ系樹脂を含む銀ペーストを用いたが、アクリル系樹脂、ゴム系樹脂等、他の一般に使用されている導電性銀ペーストを用いても同様の効果が得られる。   Further, although silver paste containing an epoxy resin is used in the examples, the same effect can be obtained by using other commonly used conductive silver pastes such as acrylic resin and rubber resin.

また、上記実施例においては、固体電解質にポリチオフェンからなる導電性高分子を用いたが、ポリピロール、ポリアニリン等のその他公知の導電性高分子を用いても同様の効果が得られ、ESRの絶対値は高くなるが、二酸化マンガン層を固体電解質に用いても、同様の効果が得られることが確認された。   In the above examples, a conductive polymer made of polythiophene was used as the solid electrolyte, but the same effect can be obtained by using other known conductive polymers such as polypyrrole and polyaniline, and the absolute value of ESR. However, it was confirmed that the same effect was obtained even when the manganese dioxide layer was used as the solid electrolyte.

さらに、上記実施例においては、コンデンサ素子の積層枚数を2枚としたが、2枚以上積層した場合であっても同様の効果が得られる。   Furthermore, in the above embodiment, the number of stacked capacitor elements is two, but the same effect can be obtained even when two or more capacitor elements are stacked.

本発明の実施例1における積層型固体電解コンデンサの断面図である。It is sectional drawing of the multilayer type solid electrolytic capacitor in Example 1 of this invention. 比較例1における積層型固体電解コンデンサの断面図である。6 is a cross-sectional view of a multilayer solid electrolytic capacitor in Comparative Example 1. FIG. 比較例2における積層型固体電解コンデンサの断面図である。6 is a cross-sectional view of a multilayer solid electrolytic capacitor in Comparative Example 2. FIG. 比較例3における積層型固体電解コンデンサの断面図である。6 is a cross-sectional view of a multilayer solid electrolytic capacitor in Comparative Example 3. FIG. 積層素子の概観図である。It is a general-view figure of a lamination element.

符号の説明Explanation of symbols

1 弁作用金属箔(アルミニウム箔)
2 誘電体酸化皮膜
3 固体電解質層
4 カーボン層
5 銀層
6 導電性接着剤層
7 陰極引き出し層(積層後に塗布した銀層)
8 絶縁層
1 Valve metal foil (aluminum foil)
2 Dielectric oxide film 3 Solid electrolyte layer 4 Carbon layer 5 Silver layer 6 Conductive adhesive layer 7 Cathode extraction layer (silver layer applied after lamination)
8 Insulation layer

Claims (3)

弁作用金属箔と、前記弁作用金属箔の表面に形成された誘電体酸化皮膜と、前記誘電体酸化皮膜の表面に順次形成された固体電解質層、カーボン層、銀層とからなるコンデンサ素子が複数枚、導電性接着剤層を介して積層されて積層素子を形成しており、当該積層素子の表面が銀ペーストによって被覆され、一体化されていることを特徴とする積層型固体電解コンデンサ。 A capacitor element comprising a valve metal foil, a dielectric oxide film formed on the surface of the valve metal foil, and a solid electrolyte layer, a carbon layer, and a silver layer sequentially formed on the surface of the dielectric oxide film. A multilayer solid electrolytic capacitor characterized in that a plurality of sheets are laminated via a conductive adhesive layer to form a laminated element, and the surface of the laminated element is covered and integrated with a silver paste. 前記弁作用金属箔が、タンタル箔、ニオブ箔およびアルミニウム箔からなる群より選ばれたものであることを特徴とする請求項1記載の積層型固体電解コンデンサ。 2. The multilayer solid electrolytic capacitor according to claim 1, wherein the valve metal foil is selected from the group consisting of a tantalum foil, a niobium foil, and an aluminum foil. 積層型固体電解コンデンサの陰極引き出し層を形成するための方法であって、
当該方法が、弁作用金属箔の表面に誘電体酸化皮膜を形成させ、さらに前記誘電体酸化皮膜の表面に、固体電解質層、カーボン層、銀層を順次形成させてコンデンサ素子を複数枚製造する工程と、前記の複数枚のコンデンサ素子を導電性接着剤層を介して積層し積層素子を製造する工程と、前記積層素子の表面を銀ペーストにて被覆し、一体化することにより、全てのコンデンサ素子から陰極を引き出すことが可能な陰極引き出し層を形成する工程とを含むことを特徴とする、積層型固体電解コンデンサにおける陰極引き出し層の形成方法。
A method for forming a cathode lead layer of a multilayer solid electrolytic capacitor,
In this method, a dielectric oxide film is formed on the surface of the valve action metal foil, and a solid electrolyte layer, a carbon layer, and a silver layer are sequentially formed on the surface of the dielectric oxide film to produce a plurality of capacitor elements. A step of laminating a plurality of capacitor elements through a conductive adhesive layer to produce a laminated element, and covering and integrating the surface of the laminated element with a silver paste, Forming a cathode lead layer capable of pulling out the cathode from the capacitor element, and forming a cathode lead layer in a multilayer solid electrolytic capacitor.
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