JP2007003954A - Display control circuit, display device, and semiconductor integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display control circuit capable of performing a luminance control highly precisely while securing a stable output waveform from right after a light emission period starts. <P>SOLUTION: When a scanning line driving circuit 20 holds a scanning line Sj at 0V, an organic EL element 10ij emits light by itself with a pulse width corresponding to a gray scale with a precharge voltage that a constant voltage circuit 36 supplies and a PWM data signal Ipwmi supplied from a constant current circuit 34 successively thereto. An adjusting circuit 46 acquires a monitor voltage Vm in a supply peroid of the PWM data signal Ipwmi to monitor the driving voltage Vf of the organic EL element 10ij and feeds it back to the constant voltage circuit 36 to adjust the precharge voltage. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a matrix display device, and more particularly to a control technique for a passive matrix display device.

  Many of the displays used in recent liquid crystal televisions, mobile phones, PDAs (Personal Digital Assistance) and the like employ a matrix type display device in which light emitting elements are arranged in a matrix type. Such a matrix display device has scanning lines corresponding to the rows of the matrix and data lines corresponding to the columns. A light emitting element is disposed at a location where the two signal lines intersect so as to be sandwiched between the two signal lines. Light emission is controlled by applying a data signal and a scanning signal for controlling light emission of each light emitting element to the data line and the scanning line.

  When a device whose luminance is controlled by current, such as an LED (Light Emitting Diode) or EL (Electro Luminescence), is used as a light emitting element, a current source or a voltage source is connected to the data line, and each light emitting element has a light emission gradation. The luminance is controlled by supplying a current based on the above.

  Here, there is a parasitic capacitance formed by two types of signal lines at the intersection of the data line and the scanning line where each light emitting element is arranged. Therefore, for example, when a constant current source is connected to the data line and a light emission control signal having a constant current modulated with a pulse width is supplied to the light emitting element to emit light, a potential difference between the data line and the scanning line is During a period lower than the light emission threshold voltage, the constant current light emission control signal is consumed to charge the parasitic capacitance. The period required for this charging is a non-light emitting period. As described above, when the luminance is controlled by the pulse width modulated data signal, there is a problem that it is difficult to emit light at a desired gradation due to the presence of the parasitic capacitance.

  In order to solve such a problem, a precharge method as described in Patent Document 1 has been proposed. In the precharge method, immediately after selection of a row by a scanning signal, a light source is charged by connecting a constant voltage source to a data line prior to supply of a data signal, that is, a precharge, and then a desired light emission control signal is used. The light emitting element is caused to emit light at the gradation.

Japanese Patent Application Laid-Open No. 11-31970 Japanese Patent Laid-Open No. 11-8064

  The voltage applied for precharging can be set in view of the driving voltage of the light emitting element so that the subsequent driving of the light emitting element by the data signal is performed smoothly. However, when the light emission efficiency of the element in the display device changes due to heat generated by continuously driving the light emitting element, characteristic variation in the manufacturing process, or the like, the driving voltage of the light emitting element changes. At this time, if precharge is performed with the initially set voltage value, a potential difference is generated between the precharge voltage and the subsequent drive voltage, the output waveform of the light emitting element is not stable, and as a result, the emission luminance is increased. There was a problem that changed.

  In addition, there is a problem that the life of the display device may be unnecessarily deteriorated by performing precharging at a voltage larger than necessary.

  The present invention has been made in view of these problems, and an object of the present invention is to provide a display control circuit and a display device capable of ensuring a stable output waveform immediately after the start of the light emission period and performing high-precision luminance control. And providing a semiconductor integrated circuit.

  Still another object of the present invention is to provide a display control circuit, a display device, and a semiconductor integrated circuit that eliminate as much as possible the factors that cause the deterioration of the lifetime of the display device, and possibly improve the lifetime.

  One embodiment of the present invention relates to a display control circuit. This circuit includes a constant voltage circuit that supplies a precharge voltage for charging the light emitting element to a predetermined voltage, a constant current circuit that drives the light emitting element in a form that takes over the precharge voltage supplied by the constant voltage circuit, and a constant voltage circuit. And an adjustment circuit that adjusts a precharge voltage supplied from the constant voltage circuit based on a predetermined monitor voltage corresponding to a voltage generated at both ends of the light emitting element as a result of driving by the current circuit.

  According to this aspect, the precharge voltage can be adjusted in response to a change in the driving voltage of the light emitting element, and the output waveform of the light emitting element can be stabilized.

  Another embodiment of the present invention relates to a display device. This device is arranged in a matrix with scanning lines as rows and data lines as columns, each of which has a plurality of light emitting elements corresponding to pixels and a precharge voltage for charging the plurality of light emitting elements to a predetermined voltage. At least one constant voltage circuit to be supplied; at least one constant voltage circuit provided in each column; and a constant current circuit for driving the light emitting element in a form of taking over a precharge voltage supplied by the constant voltage circuit; and a result of driving by the constant current circuit, And at least one adjustment circuit for adjusting a precharge voltage supplied from the constant voltage circuit based on a predetermined monitor voltage corresponding to a voltage generated at both ends of the light emitting element.

  According to this aspect, the precharge voltage applied to the plurality of light emitting elements arranged in a matrix can be adjusted in accordance with the change in the driving voltage of the light emitting elements, and the overall stable waveform. Can be realized.

  It should be noted that any combination of the above-described constituent elements and a representation of the present invention converted between methods, systems, etc. are also effective as an aspect of the present invention.

  According to the present invention, the light emitting element can stably emit light at an early timing. In some cases, the lifetime of the display device can be improved.

Embodiment 1
FIG. 1 shows a configuration of a matrix display device 100 according to the first embodiment. The matrix display device 100 includes an organic EL element 10ij, a scanning line driving circuit 20, a data line driving circuit 30, a driving control circuit 40, scanning lines S1 to Sn, and data lines D1 to Dm. Here, the subscripts m and n are natural numbers representing the number of rows and columns of the light emitting elements, respectively, and i and j are natural numbers satisfying 1 ≦ i ≦ m and 1 ≦ j ≦ n. In the subsequent drawings, the same components are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

  N scanning lines S1 to Sn (hereinafter collectively referred to as scanning lines S) and m data lines D1 to Dm (hereinafter collectively referred to as data lines D) are arranged in a grid pattern. Yes. At each intersection of the data line Di and the scanning line Sj, an organic EL element 10ji is formed as a light emitting element sandwiched between both signal lines, and the light emitting elements are arranged in a matrix of m rows × n rows.

  In the organic EL element 10ji which is the light emitting element in the j-th row and the i-th column, when the potential of the data line Di is set to the high level and the potential of the scanning line Sj is set to the low level, current flows and light is emitted, and this current flows. The light emission gradation is controlled corresponding to the period. In this embodiment, the low-level potential of the scanning line Sj is set to 0 V of the ground potential.

  A scanning line driving circuit 20 is connected to the scanning lines S1 to Sn. A scanning control signal Scnt from the drive control circuit 40 is input to the scanning line driving circuit 20. The scanning line driving circuit 20 selects a row to emit light by setting the potential of the scanning line corresponding to the row to emit light to a low level 0 V for a predetermined scanning selection period Tsl among the first to nth scanning lines S. To do. During this period, the potentials of the scanning lines in the rows that do not emit light are all set to the high level Vcom. The scanning line driving circuit 20 repeatedly sets the potential of the scanning line S from the first row to the n-th row to the low level 0 V in order, and causes the organic EL elements 10 arranged in each row to emit light.

  A data line driving circuit 30 is connected to the data lines D1 to Dm. Based on the data control signal Dcnt from the drive control circuit 40, the data line drive circuit 30 generates a pulse width modulated data signal to be supplied to the data lines D1 to Dm. Each of the data lines D1 to Dm is supplied with a pulse width modulated data signal Ipwm (hereinafter referred to as a PWM data signal) whose high level period changes corresponding to each light emission gradation, and this PWM data signal Ipwm The light emission gradation of the organic EL element 10 is controlled. Prior to this, a precharge voltage is applied from the data line driving circuit 30 to each of the data lines D1 to Dm. For example, when the potential of the j-th scanning line S becomes a low level, a precharge voltage is first applied to the organic EL element 10ji in the j-th row and i-th column for a predetermined period, and then the PWM data signal Ipwmi is supplied. The The organic EL element 10ji emits light with a gradation corresponding to the high level period.

  In this manner, the light-emitting elements from the first row to the n-th row are selected in order by the scanning signal, and the data signal is supplied to each column, whereby the display of the entire matrix display device 100 is controlled.

  The drive control circuit 40 outputs a scan control signal Scnt to the scan line drive circuit 20 and a data control signal Dcnt to the data line drive circuit 30. In the matrix display device 100, the light emitting rows are sequentially switched in synchronization with the scanning control signal Scnt. Further, the data control signal Dcnt is synchronized with the scanning control signal Scnt, and is a signal including light emission gradation data of the organic EL elements 10 in all of the first to m columns.

  FIG. 2 shows in more detail the configurations of the scanning line driving circuit 20 and the data line driving circuit 30 related to one organic EL element 10ij in the j-th row and the i-th column in the matrix type display device 100 of FIG. In the organic EL element 10ij, when the potential of the scanning line Sj becomes low level 0V, the precharge voltage is supplied from the constant voltage circuit 36, and the PWM data signal Ipwmi is subsequently supplied from the constant current circuit 34 side to the data line Di. It emits light for a period according to the key. In the present embodiment, the adjustment circuit 46 adjusts the precharge voltage at the next light emission timing based on the value of the monitor voltage Vm corresponding to the drive voltage Vf of the organic EL element 10ij, thereby responding to the change in the drive voltage Vf. The precharge voltage is controlled.

  In FIG. 2, the organic EL element 10ij includes a light emitting device EL and a parasitic capacitance C, and a state in which the parasitic capacitance C generated between the data line Di and the scanning line Sj exists in parallel with the light emitting device EL is shown. Yes.

  The scanning line driving circuit 20 includes a scanning line driving timing control circuit 44. Based on the scanning control signal Scnt output from the driving control circuit 40, the scanning line drive timing control circuit 44 selects the scanning line Sj with the potential of the scanning line Sj as low level 0V or not as the high level Vcom. Switch.

  The data line drive circuit 30 includes a pulse control circuit 32, a constant current circuit 34, a PWM (Pulse Width Modulation) circuit 38, a drive current timing control circuit 41, a constant voltage circuit 36, a precharge voltage timing control circuit 42, and a switch SW. . The data line drive circuit 30 further includes an adjustment circuit 46.

  The pulse control circuit 32 generates a pulse width-modulated PWM control signal Spwm for controlling the PWM circuit 38 based on the data control signal Dcnt output from the drive control circuit 40. Further, the pulse control circuit 32 generates a switching signal Ssw for controlling the switch SW, a switching signal Scur for controlling the drive current timing control circuit 41, and a switching signal Spc for controlling the precharge voltage timing control circuit 42. To do. Since the pulse control for all the data lines D1 to Dm can be performed by one pulse control circuit 32, it is sufficient that at least one pulse control circuit 32 is provided in the data line driving circuit 30.

  The PWM circuit 38 generates a PWM data signal Ipwmi by performing pulse width modulation on the constant current signal from the constant current circuit 34 based on the PWM control signal Spwm. The drive current timing control circuit 41 supplies the PWM data signal Ipwmi to the data line Di based on the switching signal Scur, or resets the previous light emission data by grounding the data line Di and setting the potential to 0V, Switch. Since the constant current circuit 34, the PWM circuit 38, and the drive current timing control circuit 41 are related to luminance control for each organic EL element 10, they are provided for all the data lines D, respectively.

  The constant voltage circuit 36 is a voltage source for supplying a precharge voltage Vpc for charging the parasitic capacitance C of the organic EL element 10ij to the data line Di as a constant voltage signal. When the precharge voltage Vpc is applied to the parasitic capacitance C, the potential rises according to the CR time constant τ = CR determined by the wiring resistance R of the data line and the scanning line. Based on the switching signal Spc, the precharge voltage timing control circuit 42 supplies the signal of the precharge voltage Vpc to the data line Di according to the operation of the constant voltage circuit 36, or grounds the data line Di and sets the potential to 0V. To switch whether to discharge the charge previously charged. At least one constant voltage circuit 36 is provided in the data line driving circuit 30. When there is one constant voltage circuit 36, the precharge voltage Vpc of all the data lines D is set to the same value. On the other hand, when there are a plurality of constant voltage circuits 36, the precharge voltage Vpc of the data line D that each handles can be set individually. Since the precharge voltage timing control circuit 42 is related to luminance control for each organic EL element 10, it is provided for each of all data lines D.

  The switch SW is a switch for switching whether the signal supplied to the data line Di is the PWM data signal Ipwmi on the constant current circuit 34 side or the precharge signal from the constant voltage circuit 36. Hereinafter, the state in which the switch SW is connected to the constant current circuit 34 side is referred to as a first state, and the state in which the switch SW is connected to the constant voltage circuit 36 side is referred to as a second state. The state of the switch SW is controlled by a switching signal Ssw synchronized with the scanning signal, and the first state and the second state are switched at a predetermined timing.

  In the matrix display device 100, the parasitic capacitance C is precharged during the period in which the switch SW is in the second state. Therefore, the value of the precharge voltage Vpc is determined so as to increase the voltage across the organic EL element 10 to a desired value, for example, the drive voltage Vf during the precharge period Tpc in which the switch SW is set to the second state. The initial value of the precharge voltage Vpc may be determined by calculating the time constant τ = CR of the CR circuit formed by the parasitic capacitance C and the wiring resistance R. When the precharge period Tpc is sufficient, the value of the drive voltage Vf at the time of setting may be used as the initial value of the precharge voltage Vpc. Alternatively, it may be determined experimentally.

  The adjustment circuit 46 includes an A / D converter 48, a sampling control circuit 50, a sample and hold circuit 52, a D / A converter 54, and a precharge voltage control circuit 56. One or more adjustment circuits 46 are provided in the data line driving circuit 30. For example, when a plurality of constant voltage circuits 36 are provided, an adjustment circuit 46 may be provided for each constant voltage circuit 36.

  The A / D converter 48 detects the potential difference between the node “a” on the PWM circuit 38 side and the node “b” which is the ground potential at a predetermined timing within the current driving period in which the switch SW is set to the first state. The signal is converted into a signal and given to the sample and hold circuit 52 of the sampling control circuit 50.

  Here, the potential difference between the node a and the node b can be regarded as approximately equal to the drive voltage Vf of the organic EL element 10ij when the switch SW is in the first state. Therefore, when the drive characteristic of the organic EL element 10ij changes due to heat generation or the like, the change in the drive voltage Vf can be detected by monitoring this potential difference. Hereinafter, the potential difference between the node a and the node b is referred to as a monitor voltage Vm. The sampling control circuit 50 controls the timing for taking in the monitor voltage Vm by the sample and hold circuit 52.

  The digital signal of the monitor voltage Vm at a certain timing held by the sample and hold circuit 52 is output from the sampling control circuit 50 at a predetermined timing. At this time, when a plurality of monitor voltages Vm are taken over a certain period, for example, an average value thereof is set as an output value. The output value is converted to an analog value by the D / A converter 54 and output to the precharge voltage control circuit 56. The precharge voltage control circuit 56 sets the acquired analog value in the constant voltage circuit 36 as a feedback value of the precharge voltage Vpc.

  The feedback value of the precharge voltage Vpc may not be equal to the monitor voltage Vm. At this time, the sampling control circuit 50 performs a predetermined calculation such as recalculating the optimum value of the precharge voltage Vpc necessary for the voltage across the organic EL element 10 to reach the drive voltage Vf during the precharge period Tpc. A circuit may be further provided (not shown). For example, the optimum value of the precharge voltage Vpc may be calculated based on the time constant τ = CR of the CR circuit formed by the parasitic capacitance C and the wiring resistance R. In this case, the precharge voltage control circuit 56 sets the optimum value in the constant voltage circuit 36 as a feedback value of the precharge voltage Vpc.

  The output timing of the feedback value from the sampling control circuit 50 is preset according to the adjustment mode to be executed. For example, when the precharge voltage Vpc is adjusted for each scanning line S, the output of the feedback value based on the value of the monitor voltage Vm captured when a certain scanning line Sj is selected is selected next by the scanning line Sj. When it is done. Thereby, the feedback value of the precharge voltage Vpc is set for each scanning line S. In this example, the signal for generating the output timing is synchronized with the scanning signal, and the n monitor voltages Vm from the scanning lines S1 to Sn are held in the sample and hold circuit 52.

  The operation of the matrix display device 100 configured as described above will be described. 3 and 4 show time charts of respective waveforms when the temperature of the organic EL element 10ij is shifted to the high temperature side as an example of the respective signal waveforms of the matrix display device 100. FIG. Note that the time axis and the voltage axis are both enlarged and reduced as appropriate for ease of viewing.

  FIG. 3 shows a stage before the adjustment of the precharge voltage Vpc by the adjustment circuit 46. The waveform in FIG. 3 shows from the top the potential Vsj of the scanning line Sj, the precharge voltage Vpc supplied to the organic EL element 10ij, the drive voltage Vf generated in the organic EL element 10ij by the PWM data signal Ipwmi, and the resulting organic EL This is an output voltage waveform Vout of the element 10ij.

  First, when the selection period Tsl of the scanning line Sj starts at time T0, the scanning line drive timing control circuit 44 sets the potential Vsj of the scanning line Sj from the high level Vcom to the low level, that is, the ground potential 0V. Each organic EL element 10 connected to the scanning line Sj is controlled to emit light by a data signal during the scanning selection period Tsl in which the potential Vsj is 0V.

  At time T0, the switch SW connected to the organic EL element 10ij is set to the state connected to the constant voltage circuit 36 side for precharging, that is, the second state. At this time, the precharge voltage timing control circuit 42 sets the potential of the data line Di to the ground potential 0 V, so that the charge held at the previous light emission timing is discharged.

  Next, at time T1, the precharge voltage timing control circuit 42 switches the connection line to the switch SW to the constant voltage circuit 36 side, so that the precharge voltage Vpc is applied to the data line Di. Thereby, charging of the parasitic capacitance C of the organic EL element 10ij is started. Then, the output voltage waveform Vout of the organic EL element 10ij rises. The precharge voltage Vpc at this time is set to Vpc1.

  Next, at time T2 after a predetermined precharge period Tpc from time T1, the switch SW is connected to the first state, that is, the constant current circuit 34 side. Then, a PWM data signal Ipwmi having a pulse width Te corresponding to the light emission gradation is supplied to the data line Di, and current driving of the organic EL element 10ij is started. At this time, a drive voltage Vf depending on the constant current value of the PWM data signal Ipwmi and the light emission efficiency is generated at both ends of the organic EL element 10ij. When the temperature of the organic EL element 10ij becomes high, the drive voltage Vf shifts to the low voltage side. In FIG. 3, the drive voltage Vf at a standard temperature, for example, 25 ° C. is indicated by a broken line Vf_nrm, and the drive voltage Vf at a high temperature, for example, 60 ° C. is indicated by a solid line Vf_hi.

  The precharge voltage Vpc1 applied prior to the supply of the PWM data signal Ipwmi is set based on the time constant τ, experiment, or the like with reference to the drive voltage Vf_nrm at the standard temperature. Therefore, in the output voltage waveform Vout_nrm at the standard temperature indicated by the broken line, the rising of the waveform due to the precharge voltage Vpc and the steady state of the waveform due to the drive voltage Vf are smoothly connected. However, in driving at high temperatures, the steady state of the waveform due to the driving voltage Vf is shifted to a lower voltage side than at normal temperature, so that the output voltage waveform is indicated by a solid line Vout_hi when the precharge voltage Vpc remains at Vpc1. In this way, overshoot appears on the rise.

  Therefore, the monitor voltage Vm corresponding to the drive voltage Vf is taken from the predetermined timing T3 at the predetermined time Tsm, and is fed back to the precharge voltage Vpc in the next selection period Tsl by the adjustment circuit 46. FIG. 4 shows waveforms at a stage after the adjustment of the precharge voltage Vpc by the adjustment circuit 46. Since the waveforms shown in FIG. 4 and the switching of the circuits that cause the respective waveforms are the same as those described in FIG. 3, the description thereof is omitted. However, the precharge voltage Vpc in FIG. 4 is a feedback value set by the adjustment circuit 46.

  Since the drive voltage Vf shown in FIG. 3 is lower than the drive voltage Vf at the standard temperature, the feedback value of the precharge voltage Vpc is a value smaller than the precharge voltage Vpc1 before adjustment shown in FIG. By setting the precharge voltage Vpc to Vpc2, as shown in FIG. 4, the rising of the output voltage waveform Vout by the precharge voltage Vpc and the steady state of the output voltage waveform Vout by the drive voltage Vf are smoothly connected. The output voltage waveform Vout_hi ′ thus obtained can be obtained.

  3 and 4 show the case where the organic EL element 10ij is shifted to the high temperature side, but the reverse phenomenon occurs when the organic EL element 10ij is shifted to the low temperature side due to driving in a cold region. That is, since the drive voltage Vf of the organic EL element 10ij is increased, the setting of the precharge voltage Vpc at the standard temperature is not sufficient, and an undershoot appears at the rise of the output voltage waveform Vout. Also in this case, the output voltage waveform Vout is stabilized by monitoring the drive voltage Vf that has been raised by the adjustment circuit 46 and resetting the drive voltage Vpc in the direction in which the precharge voltage Vpc is increased.

  If overshoot appears in the output voltage waveform Vout during driving at a high temperature, the luminance of the organic EL element 10 becomes higher than the set value. For example, in an experiment, when the operating temperature was 60 ° C., a 12% increase in luminance was observed compared to the emission luminance at 25 ° C. When driving at high luminance is continued, luminance deterioration is accelerated, and shortening of the life of the display device due to high temperature driving is further accelerated. In this embodiment, by optimizing the precharge voltage Vpc, acceleration of luminance deterioration can be suppressed, and shortening of the lifetime of the display device can be reduced.

  3 and 4, the precharge voltage Vpc is adjusted by taking in the monitor voltage Vm once, and the overshoot of the output voltage waveform Vout is suppressed. In practice, this operation may be repeated to gradually converge the precharge voltage Vpc to the optimum value and finally eliminate the overshoot. Therefore, the timing T3 at which the monitor voltage Vm is started to be taken does not have to wait until the timing at which the output voltage waveform Vout becomes exactly the value of the drive voltage Vf, and may be after the supply start time T2 of the PWM data signal Ipwmi.

  Alternatively, some or all of the circuits included in the data line driving circuit 30 may be integrated on a single semiconductor substrate and incorporated in the matrix display device 100 as a semiconductor integrated circuit.

  As described above, according to the present embodiment, a change in drive voltage caused by a change in drive characteristics of an organic EL element caused by a change in element temperature or a manufacturing process is monitored, and a precharge is performed according to the change. By adjusting the voltage, it is possible to obtain a stable output voltage waveform in which a steady state can be obtained immediately. Thereby, the brightness | luminance of an organic EL element is stabilized. Furthermore, since the increase in luminance due to the overshooting of the output voltage waveform can be suppressed during high temperature driving that adversely affects the lifetime of the display device, further deterioration of the lifetime can be prevented. Further, in this embodiment, it is not necessary to add external components. Therefore, compared with the case where the precharge voltage is controlled by providing an external supply voltage or when the temperature compensation circuit is added to feed back the precharge voltage, it is relatively easy without increasing the manufacturing cost. The remarkable effects as described above can be obtained.

Embodiment 2
In the first embodiment, the monitor voltage Vm may be captured by the adjustment circuit 46 after the supply start time T2 of the PWM data signal Ipwmi. However, when the organic EL element 10ij does not emit light during the selection period Tsl or when the pulse width Te is not sufficient due to low luminance data, the captured monitor voltage Vm includes a value that does not reflect the drive voltage Vf. It can be considered. Therefore, in this embodiment, the sampling control circuit 50 is provided with a determination circuit that compares the supply period Te of the PWM data signal Ipwmi and the capture period Tsm of the monitor voltage Vm, and captures the appropriate monitor voltage Vm more reliably. Except for the process related to the monitor voltage Vm in the adjustment circuit 46, the configuration and operation are the same as those described in the first embodiment. Here, a description will be given focusing on differences from the first embodiment.

  FIG. 5 is a diagram corresponding to FIG. 2 of the first embodiment, and shows the configuration of the scanning line driving circuit 20 and the data line driving circuit 30 for a certain organic EL element 10ij. The sampling control circuit 50 of the adjustment circuit 46 in FIG. 5 differs from that in FIG. The determination circuit 58 includes a comparator (not shown) that compares the supply end time of the PWM data signal Ipwmi, that is, (T2 + Te) in FIG. 3 with the capture end time of the monitor voltage Vm, that is, (T3 + Tsm) in FIG. The output of the feedback value from the sampling control circuit 50 to the precharge voltage control circuit 56 is permitted only when the supply end time of the PWM data signal Ipwmi is later than the capture end time of the monitor voltage Vm. At this time, the PWM control signal Spwm is supplied from the pulse control circuit 32 to the sampling control circuit 50. The sampling control circuit 50 calculates the supply end time of the PWM data signal Ipwmi for each light emission period based on the PWM control signal Spwm and supplies it to the determination circuit 58.

  Thus, even when the monitor voltage Vm during the period when the organic EL element 10ij is not driven is taken in by the adjustment circuit 46, the monitor voltage Vm is not used for adjusting the precharge voltage Vpc. It is possible to prevent the setting of an inappropriate precharge voltage Vpc that is not related. Therefore, the precharge voltage can be more reliably converged to an appropriate value, and the same effect as in the first embodiment can be obtained efficiently.

Embodiment 3
In the second embodiment, the scanning voltage Sm to which the organic EL element 10ij is connected is selected, and the monitor voltage Vm is captured at a predetermined timing during the period in which the organic EL element 10ij is driven by the PWM data signal Ipwmi. In the present embodiment, the timing at which the monitor voltage Vm is acquired from application software executed by a processor (not shown) connected to the matrix display device 100 or an operating system (OS) that controls the matrix display device 100 is used. Instruct. Except for the process related to the monitor voltage Vm in the adjustment circuit 46, the configuration and operation are the same as those described in the first embodiment. Here, a description will be given focusing on differences from the first embodiment.

  FIG. 6 is a diagram corresponding to FIG. 2 of the first embodiment, and shows the configuration of the scanning line driving circuit 20 and the data line driving circuit 30 for a certain organic EL element 10ij. The sample and hold circuit 52 of the adjustment circuit 46 in FIG. 6 differs from that in FIG. The register 60 holds timing information for taking in the monitor voltage Vm by setting from a processor such as application software. For example, the sample-and-hold circuit 52 is further provided with a timer (not shown), and the monitor voltage Vm is taken in when the predetermined time set in the register 60 is detected by the timer.

  At this time, the precharge voltage adjustment image may be displayed on the matrix display device 100 by software or the like. The precharge voltage adjustment image is, for example, an image in which the organic EL element 10ij has a maximum light emission gradation. As a result, the pulse width Te of the PWM data signal Ipwmi becomes the maximum value, and it becomes easy to capture the monitor voltage Vm at the timing when the drive voltage Vf converges to the true value. Accordingly, a highly accurate precharge voltage feedback value can be obtained by obtaining the monitor voltage Vm once, and the output voltage waveform can be stabilized with a small number of adjustments.

  In this embodiment, the timing for capturing the monitor voltage Vm is performed by an instruction from software or the like. Therefore, it is possible to select the timing at which image data convenient for capturing the monitor voltage Vm is output, and the proper monitor voltage Vm is ensured. Can be obtained. Therefore, the precharge voltage can be more reliably converged to an appropriate value, and the same effect as in the first embodiment can be obtained efficiently.

  The present invention has been described based on the embodiments. Those skilled in the art will understand that the above-described embodiment is an exemplification, and that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are also within the scope of the present invention. is there.

  In this embodiment mode, an organic EL element is described as an example of a light-emitting element. However, the present invention is not limited to this, and precharge is necessary due to parasitic capacitance between data lines and scanning lines such as other EL elements and LEDs. The present invention can be applied to all light emitting elements.

  The determination circuit 58 in the second embodiment may be configured as a processor connected to the matrix display device 100. In this case, under the control of application software executed by the processor, the supply end time of the PWM data signal Ipwmi is calculated from the luminance information of the pixel at the timing before light emission, and is compared with the capture end time of the monitor voltage Vm. be able to. The determination circuit 58 may be configured to permit the adjustment circuit 46 to capture the monitor voltage Vm only when the supply end time of the PWM data signal Ipwmi is later than the capture end time of the monitor voltage Vm. Also in this case, similarly to the second embodiment, it is possible to prevent an inappropriate precharge voltage Vpc unrelated to the drive voltage Vf from being set, and to efficiently obtain the same effect as the first embodiment. Can do.

It is a figure which shows the structure of the matrix type display apparatus which concerns on 1st Embodiment. 1 is a diagram illustrating a configuration of a scanning line driving circuit and a data line driving circuit in a first embodiment. FIG. It is a figure which shows the time chart of each signal waveform before adjusting a precharge voltage in 1st Embodiment. It is a figure which shows the time chart of each signal waveform after adjusting the precharge voltage in 1st Embodiment. It is a figure which shows in more detail the structure of the scanning line drive circuit and data line drive circuit in 2nd Embodiment. It is a figure which shows in more detail the structure of the scanning line drive circuit and data line drive circuit in 3rd Embodiment.

Explanation of symbols

  10 organic EL elements, 20 scanning line drive circuit, 30 data line drive circuit, 32 pulse control circuit, 34 constant current circuit, 36 constant voltage circuit, 38 PWM circuit, 40 drive control circuit, 46 adjustment circuit, 48 A / D conversion 50 sampling control circuit, 52 sample and hold circuit, 54 D / A converter, 56 precharge voltage control circuit, 58 determination circuit, 60 registers, 100 matrix type display device.

Claims (10)

A constant voltage circuit for supplying a precharge voltage for charging the light emitting element to a predetermined voltage;
A constant current circuit for driving the light emitting element in a form of taking over a precharge voltage supplied by the constant voltage circuit;
An adjustment circuit for adjusting a precharge voltage supplied by the constant voltage circuit based on a predetermined monitor voltage corresponding to a voltage generated at both ends of the light emitting element as a result of driving by the constant current circuit;
A display control circuit comprising: The adjustment circuit includes:
An A / D converter for A / D converting the monitor voltage;
A sample and hold circuit for holding the output value of the A / D converter;
A D / A converter for D / A converting the hold value of the sample and hold circuit;
A precharge voltage control circuit for setting an output signal value of the D / A converter as the precharge voltage;
The display control circuit according to claim 1, comprising:   The display control circuit according to claim 1, further comprising a pulse width modulation circuit that controls a driving period of the constant current circuit according to desired luminance. A plurality of light emitting elements, each of which is arranged in a matrix having scanning lines as rows and data lines as columns, each corresponding to a pixel;
At least one constant voltage circuit for supplying a precharge voltage for charging the light emitting element to a predetermined voltage;
A constant current circuit that is provided in each column and drives the light emitting element in a form that takes over the precharge voltage supplied by the constant voltage circuit;
At least one adjustment circuit for adjusting a precharge voltage supplied by the constant voltage circuit based on a predetermined monitor voltage corresponding to a voltage generated at both ends of the light emitting element as a result of driving by the constant current circuit;
A display device comprising: The adjustment circuit includes:
An A / D converter for A / D converting the monitor voltage;
A sample and hold circuit for holding the output value of the A / D converter;
A D / A converter for D / A converting the hold value of the sample and hold circuit;
A precharge voltage control circuit for setting an output signal value of the D / A converter as the precharge voltage;
The display device according to claim 4, further comprising:   6. The display device according to claim 4, further comprising a pulse width modulation circuit that is provided in each column and controls a driving period of the constant current circuit according to desired luminance. The adjustment circuit further includes a determination circuit that determines whether a driving period of the light emitting element provided with the adjustment circuit includes a sampling timing by the sample and hold circuit,
6. The display device according to claim 5, wherein the precharge voltage control circuit sets the precharge voltage only when the determination circuit determines that the drive period of the light emitting element includes a sampling timing. . The adjustment circuit further includes a register for instructing whether the operation of the precharge voltage control circuit is permitted or not from software,
The display device according to claim 5, wherein the precharge voltage control circuit sets a precharge voltage only when an operation permission instruction is detected in the register.   4. A semiconductor integrated circuit, wherein the display control circuit according to claim 1 is integrated on a single semiconductor substrate.   9. The display device according to claim 4, wherein at least the constant voltage circuit, the constant current circuit, and the adjustment circuit include a semiconductor integrated circuit integrated on a single semiconductor substrate. Characteristic display device.

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