JP2007003300A - Apparatus and method for detecting change in capacitance value - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an apparatus and method for detecting change in a capacitance value capable of detecting variations of the capacitance value between a sensor capacitive element and a reference capacitive element with high precision by excluding the effect of a parasitic capacitive element of a capacitive sensor to regulate fluctuations in the capacitance value. <P>SOLUTION: For the capacitive sensor having the sensor capacitive element and the reference capacitive element and keeping one terminal connected to fixed electric potential as a common terminal, a reading voltage is applied to the other terminal of each capacitive element to accumulate electric charges, and the electric charges are extracted from the other terminal. The extracted electric charges are converted into a voltage signal by a voltage conversion section, and its difference signal is amplified by the difference signal amplifier section. The reading voltage is regulated by a voltage regulating section according to need. In the reading voltage, a voltage level is commonly regulated to regulate a dynamic range, while the voltage level is individually regulated to regulate a capacitive offset. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to detection of a differential capacitance value in a capacitive sensor including a pair of capacitive elements.

  FIG. 10 shows a circuit block in the background art. The capacitance sensor 100 has one terminal as a common terminal and is connected to one terminal of the sensor capacitor CS and the reference capacitor CR. The common terminal of the capacitive sensor 200 is connected to the inverting input terminal of the operational amplifier 200, and the reference voltage VREF is applied to the non-inverting input terminal of the operational amplifier 200. The output terminal of the operational amplifier 200 is connected to the inverting input terminal via the feedback capacitor CF.

  In the circuit of FIG. 10, by applying voltage pulses having opposite phases to the other terminal of the sensor capacitor CS and the reference capacitor CR, which are the other terminals of the capacitor sensor 100, the difference capacitance between the sensor capacitor CS and the reference capacitor CR. Read the sensor signal based on the value. That is, a positive voltage pulse with a voltage level Vp is applied to the other terminal of the sensor capacitor CS, and at the same time, a negative voltage pulse with a voltage level Vp is applied to the other terminal of the reference capacitor CR. As a result, the charge amount based on the differential capacitance value between the sensor capacitor CS and the reference procedure CR is transferred to the feedback capacitor CF.

Specifically, the amount of charge discharged from the sensor capacitance by a positive voltage pulse is
ΔQS = CS × VREF−CS × (VREF−Vp) = CS × Vp
It becomes. Similarly, the amount of charge charged to the reference capacitor by a negative voltage pulse is
ΔQR = CR × (VREF + Vp) −CS × VREF = CS × Vp
It becomes. Here, in the capacity sensor 100, the capacitance values of the sensor capacity CS and the reference capacity CR are adjusted to be equal in the initialized state. Assuming that the capacitance value of the sensor capacitor CS is changed from the capacitance value of the reference capacitor CR by the sensing operation, there is a difference in the charge amount charged / discharged from the sensor capacitor CS and the reference procedure CR with the application of the voltage pulse. Arise. This differential charge is transferred to the feedback capacitor CF. The amount of charge on shipment is
ΔQF = ΔQS−ΔQR = (CS−CR) × Vp
It becomes. The change voltage ΔVOUT of the output voltage VOUT is
ΔVOUT = −ΔQF / CF = (CS−CR) / CF × Vp
It becomes. The capacitance change (CS-CR) is converted into a voltage value and output (ΔVOUT).

  Patent Document 1 is disclosed as a related technique for converting the change in the capacitance value described above into a voltage value.

JP-A-8-145717

  However, in the above background art, the common terminal of the capacitive sensor 100 is connected to the inverting input terminal of the operational amplifier 200. The common terminal of the capacitance sensor 100 is a terminal to which one terminal of each of the sensor capacitance CS and the reference capacitance CR is connected in common. Due to the structure of the capacitance sensor, the common terminal may include a substrate portion when configuring the sensor capacitance CS and the reference capacitance CR, and the capacitance component connected to the common terminal is in addition to the sensor capacitance CS and the reference capacitance CR. There is a risk that parasitic capacitance components due to the substrate portion or the like are connected.

  This parasitic capacitance component is a component that does not contribute to the detection of the capacitance change described above. In order to detect a change in the capacitance of the sensor capacitor CS with high accuracy, it is important that all of the charge amount based on the difference capacitance value between the sensor capacitor CS and the reference capacitor CR is transferred to the feedback capacitor CF. When the parasitic capacitance connected to the common terminal has a large capacitance value, or when the capacitance value of the parasitic capacitance varies, there is a possibility that the charge amount based on the differential capacitance value may not be accurately added to the feedback capacitance CF. It is.

  The present invention has been made in view of the problems of the background art described above, and in detecting a capacitance change of a sensor capacitive element in a capacitive sensor configured by a sensor capacitive element and a reference capacitive element and having one terminal connected as a common terminal. In addition to eliminating the influence of the parasitic capacitance element associated with the common terminal, and adjusting the variation of the capacitance value of the sensor capacitance element and / or the reference capacitance element, the differential capacitance value between the sensor capacitance element and the reference capacitance element is accurately It is an object of the present invention to provide a capacitance value change detection device and a capacitance value change detection method that can be detected well.

  In order to achieve the above object, a capacitance value change detection device according to the present invention includes a capacitance sensor composed of a sensor capacitance element and a reference capacitance element, one terminal of which is connected to a fixed potential as a common terminal, and a sensor A voltage conversion unit that extracts charges accumulated by applying a read voltage to the other terminal of the capacitive element and the reference capacitive element from the other terminal and converts them into a voltage signal, and a sensor capacitive element and a reference that are output from the voltage conversion unit A differential signal amplifying unit that amplifies a differential signal of a voltage signal by a capacitive element and a voltage adjusting unit that adjusts a read voltage are provided.

  In the capacitance value change detection device of the present invention, with respect to a capacitance sensor having a sensor capacitance element and a reference capacitance element and one terminal connected to a fixed potential as a common terminal, a read voltage is applied to the other terminal of each capacitance element. Is applied to accumulate the charge, and then the accumulated charge is taken out from the other terminal. The extracted charge is converted into a voltage signal by the voltage converter, and the differential signal is amplified by the differential signal amplifier. The read voltage is adjusted by the voltage adjustment unit as necessary.

  The capacitance value change detection method according to the present invention is a capacitance value change detection method for a capacitance sensor composed of a sensor capacitance element and a reference capacitance element, wherein one terminal is connected to a fixed potential as a common terminal. Applying a read voltage to the other terminal of the sensor capacitive element and the reference capacitive element to accumulate the charge; extracting the accumulated charge from each other terminal and converting it to a voltage signal; and the sensor capacitive element and the reference The method includes a step of amplifying a differential signal of a voltage signal by the capacitor and a step of adjusting a read voltage.

  In the capacitance value change detection method of the present invention, a sensor capacitance element and a reference capacitance are detected with respect to a capacitance value change of a capacitance sensor that includes a sensor capacitance element and a reference capacitance element, and one terminal is connected to a fixed potential as a common terminal. After a read voltage is applied to the other terminal of the element to accumulate charges, the accumulated charge is taken out from each other terminal and converted into a voltage signal. A difference signal of the converted voltage signal is amplified to detect a change in the capacitance value of the capacitance sensor. At this time, the read voltage is adjusted as necessary.

  Here, the capacitance sensor can have any of the three types of configurations described below. One of them is an element in which the reference capacitance element has a reference capacitance value, and the capacitance value does not change during the sensing operation. For the sensing operation, the capacitance value of the sensor capacitance element changes. is there. When the capacitance value of the reference capacitive element is known, the capacitance value of the sensor capacitive element can be detected. The second is a case where the sensing operation causes a change in capacitance value in both the sensor capacitive element and the reference capacitive element. In this case, if the capacitance change direction between the sensor capacitive element and the reference capacitive element is set opposite to the sense operation, the sensitivity of the sense operation detected as the difference can be improved. Third, as in the first case, the reference capacitive element has a fixed capacitance value and the capacitance value of the sensor capacitive element changes with respect to the sensing operation. The reference capacitive element is separated from the sensor capacitive element. It is a case where it is comprised. A reference capacitance element can also be configured by being incorporated in the capacitance value change detection device.

  According to the present invention, since the common terminal of the capacitive sensor is connected to a fixed potential, the parasitic capacitance component including the substrate portion on the structure of the capacitive sensor associated with the common terminal contributes to the detection of the capacitance change in the capacitive sensor. There is nothing. Capacitance change can be detected with high accuracy. In addition, since the read voltage can be adjusted by the voltage adjustment unit, it is possible to adjust the capacitance offset in the capacitance sensor, the variation of the dynamic range, and the like.

  DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a capacitance value change detection apparatus and a capacitance value change detection method according to the present invention will be described below in detail with reference to the drawings based on FIGS.

  FIG. 1 is a circuit diagram of the capacitance value change detection device of the first embodiment. The capacitive sensor SN1 includes a sensor capacitive element CS and a reference capacitive element CR, and one terminal is commonly connected as a common terminal NC and is connected to a reference potential. The other terminals N1 and N2 are connected to the inverting input terminal and the non-inverting input terminal of the switched capacitor amplifier 3 via the switching elements S21 and S22 in the second switch section S2.

  The switched capacitor amplifier 3 has a differential output configuration. The non-inverting output terminal and the inverting output terminal are nodes VFS and VFR, and are connected to the inverting input terminal and the non-inverting input terminal via feedback capacitance elements CFS and CFR. It has been returned. The differential signal amplification unit 5 is connected to amplify the differential signal of the voltages output to the nodes VFS and VFR and output the amplified signal to the output terminal VOUT. Between the terminals of the feedback capacitive elements CFS and CFR, switch elements S31 and S32, which are the third switch unit S3, are provided.

  The first voltage adjusting unit VC11 and the second voltage adjusting unit VC12 are connected to the other terminals N1, N2 of the sensor capacitive element CS and the reference capacitive element CR via the switch elements S11, S12 of the first switch unit S1. Yes. The first voltage adjustment unit VC11 applies the adjustment voltage VAD in common to the other terminals N1 and N2. The second voltage adjustment unit VC12 applies adjustment voltages VAS and VAR to the other terminals N1 and N2. Each adjustment voltage VAD, VAS, VAR is provided so as to be adjustable. The adjustment voltage VAD + VAS is a read voltage for the sensor capacitive element CS, and the adjustment voltage VAD + VAR is a read voltage for the reference capacitive element CR.

  A control signal φ1 that controls the switch elements S11 and S12 of the first switch unit S1 and the switch elements S31 and S32 of the third switch unit S3 and the switch elements S21 and S22 of the second switch unit S2 are controlled. As shown in FIG. 2, the control signal φ2 is complementary signals having opposite phases to each other. In the description of FIG. 2, it is assumed that each of the switch elements S11, S12, S21, S22, S31, and S32 is controlled to pass by a high level control signal.

  During the period when the control signal φ1 is at the high level, the switch elements S11, S12, S31, and S32 are in the conductive state. Through the passage of the switch elements S11 and S12, the read voltages of the adjustment voltage VAD + VAS and the adjustment voltage VAD + VAR are applied to the sensor capacitor element CS and the reference capacitor element CR, and charge accumulation is performed. At the same time, the charges accumulated in the feedback capacitive elements CFS and CFR are discharged by the conduction of the switch elements S31 and S32. The output voltages VFS and VFR of the switched capacitor amplifier 3 are both at the same potential and are in an initialized state. The output voltage VOUT of the differential signal amplifier 5 is also initialized.

  Next, when the control signal φ1 becomes low level and the control signal φ2 becomes high level, the other terminals N1 and N2 are disconnected from the first and second voltage adjusting units VC11 and VC12 and connected to the input terminal of the switched capacitor amplifier 3 Is done. At the same time, the discharge operation of the feedback capacitive elements CFS and CFR is completed, and the short circuit state between the terminals is eliminated. As a result, the charges accumulated in the sensor capacitive element CS and the reference capacitive element CR move to the feedback capacitive elements CFS and CFR.

  In this case, since both input terminals of the switched capacitor amplifier 3 are electrically maintained at a common potential VCOM (not shown), the output terminal VFS of the switched capacitor amplifier 3 depends on the magnitude relationship between the common potential VCOM and the read voltage. , VFR, voltages VFS and VFR are output. FIG. 2 shows a case where the read voltage is lower than the common voltage VCOM. The charge moves to the sensor capacitive element CS and the reference capacitive element CR via the feedback capacitive elements CFS and CFR in accordance with the passage of the switch elements S21 and S22. Therefore, positive voltages VFS and VFR are output to the output terminals VFS and VFR of the switched capacitor amplifier 3.

At this time, if the capacitance value of the sensor capacitive element CS is changed by the sensing operation by the capacitive sensor SN1, it is detected as a change in the voltage level of the voltage VFS with respect to the voltage VFR. The differential voltage is amplified by the differential signal amplification unit 5 to obtain the output voltage VOUT. If the amplification factor of the differential signal amplifier 5 is AV1, the output voltage VOUT is
VOUT = AV1 × (VFS−VFR)
It becomes.

  Here, the switched capacitor amplifier 3 and the feedback capacitance elements CFS and CFR are included to constitute a voltage conversion unit.

  In addition, the first and second voltage adjustment units VC11 and VC12 adjust read voltages to the sensor capacitive element CS and the reference capacitive element CR. The dynamic range of the voltages VFS and VFR obtained by transferring the charges accumulated in the sensor capacitive element CS and the reference capacitive element CR to the feedback capacitive elements CFS and CFR is set when the capacitance value of each capacitive element is fixed. In an initialization state in which the control signal φ1 is at a high level, it is determined according to the amount of charge accumulated in the sensor capacitor element CS and the reference capacitor element CR. Therefore, by adjusting the voltage level of the adjustment voltage VAD of the first voltage adjustment unit VC11, in which the voltage level is commonly set, among the read voltages applied to the sensor capacitive element CS and the reference capacitive element CR, Adjustments can be made.

  Further, when there is a variation in capacitance value between the sensor capacitive element CS and / or the reference capacitive element CR, a capacitive offset is generated. In this case, among the read voltages applied to the sensor capacitor element CS and / or the reference capacitor element CR, the voltage levels in the adjustment voltages VAS and VAR of the second voltage adjustment unit VC12 in which the voltage level is individually set are adjusted. Thus, the capacitance offset can be adjusted.

  A specific example of the first and second voltage adjustment units VC11 and VC12 is shown in FIG. The first voltage adjustment unit VC11 includes a D / A converter that applies the adjustment voltage VAD to the reference voltage, and the second voltage adjustment unit VC12 applies adjustment voltages VAS and VAR to the adjustment voltage VAD, respectively. Two D / A converters are provided. The memory 10 stores digital adjustment values corresponding to each adjustment voltage. It is an example of an adjustment value storage part. The digital adjustment value stored in the memory 10 is an adjustment value determined according to the capacitance sensor SN1, and a suitable value among the digital adjustment values stored in the memory 10 according to the connected capacitance sensor SN1. Is selected and supplied to each A / D converter.

  Alternatively, prior to the sensing operation, it is possible to provide an adjustment period for performing the operation shown in FIG. 2 in the absence of a sense signal input. If the voltage level of the voltage VFS or / and VFR is detected during the high level period of the control signal φ2 following the initialization state by the high level control signal φ1, the dynamic range can be estimated. Further, if the voltage level of the output voltage VOUT is detected during this period, the capacitance offset can be estimated. By selecting a digital adjustment value according to these detection values, the dynamic range or / and the capacity offset can be adjusted.

  Here, the memory can be a non-volatile memory, and can be read by a trigger signal (not shown) instructing condition setting, and / or read at the time of start-up such as power-on or reset.

  Although 1st Embodiment demonstrated the case where 1st and 2nd voltage adjustment part VC11, VC12 was provided, providing either one is also considered. At this time, even when only the second voltage adjustment unit V12 is provided without the first voltage adjustment unit V11, the role of the adjustment voltage VAD for adjusting the dynamic range is given at the same time depending on the voltage levels of the adjustment voltages VAS and VAR. Is also possible.

  FIG. 4 is a modification of the first embodiment. This is a case where two switched capacitor amplifiers 3A and 3B are provided instead of the switched capacitor amplifier 3 having the differential output configuration in the first embodiment shown in FIG. The other terminals N1 and N2 of the sensor capacitor element CS and the reference capacitor element CR are connected to the inverting input terminals of the respective switched capacitor amplifiers 3A and 3B via the switch elements S21 and S22. Positive output terminals of the respective switched capacitor amplifiers 3A and 3B are connected to the nodes VFS and VFR, and feedback capacitance elements CFS and CFR are connected to the inverting input terminals.

  In the modified example of FIG. 4, the same operation and effect as when the switched capacitor amplifier 3 having the differential output configuration is used (FIG. 1) are provided, and the description thereof is omitted here.

  FIG. 5 is a circuit diagram of the second embodiment. Instead of the first and second voltage adjustment units VC11 and VC12 of the first embodiment (FIG. 1), first and second voltage adjustment units VC21 and VC22 are provided. In the first embodiment, the adjustment voltages VAD, VAS, and VAR are set according to the adjustment values preset in the memory 10 and the like, whereas in the second embodiment, the voltages VFS, VFR, and VFS of the nodes VFS and VFR are set. The adjustment voltages VAD, VAS, and VAR are set by providing a feedback path from the output voltage VOUT.

  The first voltage adjustment unit VC21 includes an OR circuit 7, a peak hold circuit 9, and a first buffer circuit 11. The nodes VFS and VFR are connected to the OR circuit 7, and the OR circuit 7 outputs a signal having a higher voltage level among the voltages VFS and VFR. The voltage value of this signal is held in the peak hold circuit 9. The held voltage is input to the non-inverting input terminal of the first buffer circuit 11, amplified with respect to the common potential VCOM, and output as the adjustment voltage VAD. The adjustment voltage VAD adjusts a common potential VCOM of the second buffer circuit 15 described later.

  Here, when the difference signal between the voltages VFS and VFR, which is a signal sensed by the capacitive sensor SN1, is a slight voltage, the voltage levels of the voltages VFS and VFR are substantially the same. In this case, without providing the OR circuit 7, either the voltage VFS or VFR can be held in the peak hold circuit 9.

  The second voltage adjustment unit VC22 includes a sample hold circuit 13 and a second buffer circuit 25. The output voltage VOUT is connected to the voltage value determination unit 17 and the sample hold circuit 13. When the determination unit 17 determines the output voltage VOUT and determines that the potential is to adjust the capacitance offset, the sampling signal TS is output. The sample hold circuit 13 holds the output voltage VOUT according to the sampling signal TS. The output of the sample hold circuit 13 is input to the non-inverting input terminal of the second buffer circuit 15, amplified with respect to the common potential VCOM, and outputs adjustment voltages VAS and VAR as differential output signals. At this time, if the common potential VCOM is adjusted by the adjustment voltage VAD described above, the adjustment voltage VAD is added in common and the adjustment voltages VAS and VAR are output.

  The adjustment voltages VAS and VAR to which the adjustment voltage VAD is added are supplied as read voltages to the other terminals N1 and N2 via the switch elements S11 and S12.

  In the first voltage adjustment unit VC21, when the voltage level held in the peak hold circuit 9 is lower than the common potential VCOM, the voltage level of the adjustment voltage VAD decreases. In accordance with the lowered adjustment voltage VAD, both the adjustment voltages VAS and VAR output from the second buffer circuit 15 are lowered. The read voltage applied to the other terminals N1 and N2 of the sensor capacitive element CS and the reference capacitive element CR decreases, and after the charge accumulation in the sensor capacitive element CS and the reference capacitive element CR, the switching element is switched and the switching element S21. , S22 passes, the amount of charge that moves to the sensor capacitive element CS and the reference capacitive element CR via the feedback capacitive elements CFS, CFR increases. As a result, the voltages VFS and VFR rise. Conversely, when the voltage level held in the peak hold circuit 9 is higher than the common potential VCOM, the voltage level of the adjustment voltage VAD increases. In accordance with the increased adjustment voltage VAD, the adjustment voltages VAS and VAR output from the second buffer circuit 15 both increase. The read voltage applied to the other terminals N1 and N2 of the sensor capacitive element CS and the reference capacitive element CR is increased, and after the charge accumulation in the sensor capacitive element CS and the reference capacitive element CR, the switch elements S21 and S22 are turned on. In this case, the amount of charge that moves to the sensor capacitive element CS and the reference capacitive element CR via the feedback capacitive elements CFS and CFR decreases. As a result, the voltages VFS and VFR decrease.

  The above operation is repeated by the first voltage adjustment unit VC21, and the voltages VFS and VFR are amplified by the first and second buffer circuits 11 and 15 with respect to the connected capacitance sensor SN1 and feedback capacitance elements CFS and CFR. Is automatically adjusted to the voltage level determined by, and the dynamic range is adjusted.

  In the second voltage adjustment unit VC22, when the voltage level held in the sample hold circuit 13 is lower than the common potential VCOM adjusted by the adjustment voltage VAD, the adjustment voltage VAS decreases and the adjustment voltage VAR is reduced. Will rise. The read voltage applied to the other terminal N1 of the sensor capacitive element CS decreases, and the read voltage applied to the other terminal N2 of the reference capacitive element CR increases. After the charge accumulation in the sensor capacitive element CS and the reference capacitive element CR, when the switch element is switched and the switch elements S21 and S22 pass, the amount of charge that moves to the sensor capacitive element CS via the feedback capacitive element CFS increases. As a result, the amount of charge that moves to the reference capacitive element CR via the feedback capacitive element CFR decreases. As a result, the voltage VFS increases, the voltage VFR decreases, and the output voltage VOUT increases. Conversely, when the voltage level held in the sample hold circuit 13 is higher than the common potential VCOM adjusted by the adjustment voltage VAD, the adjustment voltage VAS increases and the adjustment voltage VAR decreases. The read voltage applied to the other terminal N1 of the sensor capacitive element CS increases, and the read voltage applied to the other terminal N2 of the reference capacitive element CR decreases. After the charge accumulation in the sensor capacitive element CS and the reference capacitive element CR, when the switch elements S21 and S22 pass, the amount of charge that moves to the sensor capacitive element CS via the feedback capacitive element CFS decreases, and the feedback capacitive The amount of charge that moves to the reference capacitor CR through the element CFR increases. As a result, the voltage VFS decreases, the voltage VFR increases, and the output voltage VOUT decreases.

  The above operation is repeated by the second voltage adjustment unit VC22, and the output voltage VOUT is automatically adjusted to 0 value in the initialization operation prior to the sensing operation by the capacitive sensor SN1, whereby the sensor capacitive element CS, the reference capacitive element CR, The volume offset between is adjusted. In FIG. 5, the determination unit 17 is provided to detect the output voltage VOUT, and the sampling signal TS is output to the sample hold circuit 13 in accordance with the detected voltage level. The level is held in the sample hold circuit 13. As a result, it is possible to hold the value when the adjustment of the capacity offset is completed.

  In this case, if a memory circuit (not shown) is provided, the voltage level of the output voltage VOUT held in the sample hold circuit 13, the amplification degree of the first and second buffer circuits 11, 15, etc., frequency characteristics, offset adjustment Various circuit parameters such as can be stored as digital values. If a plurality of sets of various parameters are stored, a suitable parameter can be selected according to the characteristics of the connected capacitive sensor SN1. The memory here is the same as the memory 10 described in FIG.

  As is apparent from the description of the first embodiment (FIG. 1) and the second embodiment (FIG. 5), the sensor capacitor element and the reference capacitor element are provided, and one terminal is connected to a fixed potential that is a ground potential as a common terminal. In detecting the change in the capacitance value of the capacitive sensor, the readout voltage is applied to the other terminals N1 and N2 of the sensor capacitive element CS and the reference capacitive element CR, and the electric charge is accumulated in each capacitive element. Electric charges are taken out from the other terminals N1 and N2 and converted into voltage signals VFS and VFR. A difference signal between the converted voltage signals VFS and VFR is amplified to detect a change in the capacitance value of the capacitance sensor. At this time, the read voltage is adjusted as necessary.

  In the circuit example shown in FIG. 6, when the capacitance change in the sensing operation of the sensor capacitive element CS has a temperature characteristic proportional to the temperature change ΔT (ΔCS (ΔT) = ΔCS0 × ΔT), the temperature characteristic is applied to the adjustment voltage VAD. This is a circuit that cancels the influence of the capacitance change ΔCS (ΔT) caused by the temperature change ΔT.

  The adjustment voltage VAD is a voltage that constitutes at least a part of the read voltage. Therefore, if the adjustment voltage VAD has a negative slope with respect to the temperature, the capacitance sensor is based on the amount of charge determined by the product of the capacitance value and the read voltage. In the detection device that detects the capacitance change at, the temperature characteristics can be canceled.

  A pair of PMOS transistors P1 and P2 in a current mirror configuration and a pair of NMOS transistors N1 and N2 are connected in series, and the source terminals of the NMOS transistors N1 and N2 are connected to a diode element D1, a resistance element R1, and a diode element D2, respectively. The current mirror circuit CM grounded via is a well-known circuit. Here, the size of the diode element D2 is N times that of the diode element D1. The current extracted by connecting the PMOS transistor P3 to the PMOS transistors P1 and P2 having the current mirror configuration in the current mirror circuit CM is folded back by the current mirror circuit including the NMOS transistors N3 and N4, and is passed through the resistance element R2. The adjustment voltage VAD is applied toward the ground potential. A voltage obtained by stepping down the adjustment voltage VAD by the resistance element R2 is output as the adjustment voltage VAD2 through the buffer circuit A1.

The current IPTAT extracted from the current mirror circuit CM is expressed as IPTAT = VT × In (N) / R1. Here, VT is a thermal voltage and is a value proportional to the absolute temperature. That is, the current IPTAT has a current characteristic proportional to the absolute temperature. The adjustment voltage VAD2 output from the buffer circuit A1 is
VAD2 = VAD−R2 / R1 × VT × In (N)
Thus, an adjustment voltage having a negative slope with respect to the absolute temperature can be obtained.

  The circuit shown in FIG. 6 is applied to the adjustment voltage VAD output from the first voltage adjustment unit VC11 (FIG. 1) and VC21 (FIG. 5), and the adjustment voltage VAD is converted to the first voltage adjustment unit VC11 (FIG. 1) and VC21 (FIG. 5). ) And the adjustment voltage VAD2 is supplied to the subsequent stage circuit, the temperature characteristics in the capacitance change of the sensor capacitive element CS can be offset.

  Here, in the above description, the temperature characteristic is given to the adjustment voltage VAD. However, instead of the adjustment voltage VAD or together with the adjustment voltage VAD, the adjustment voltages VAS and VAR also have temperature characteristics. Needless to say, similar actions and effects can be obtained. Further, when the common potential VCOM has the same temperature characteristic, the same action and effect can be obtained.

  Although not shown, the divided voltage obtained by dividing the power supply voltage by resistance division or the like may be used as the adjustment voltage VAD or / and the adjustment voltages VAS and VAR via the buffer circuit or the like. For example, the adjustment voltage VAD or / and the adjustment voltages VAS and VAR have a dependency proportional to the power supply voltage. When applied to a case where a so-called ratiometric operation is required in which the output voltage VOUT is proportional to the power supply voltage, the output voltage VOUT can be easily proportional to the power supply voltage.

  FIG. 7 shows a configuration in which a dynamic range and a capacitance offset can be adjusted for each capacitance sensor when a plurality of capacitance sensors SN1 to SN3 are provided.

  When any one of the plurality of capacitance sensors SN1 to SN3 is selected and a change in the capacitance value is detected by the switched capacitor amplifier 3 and the differential signal amplification unit 5, any one of the switch units SI1 to SI3 is selected and switched capacity is selected. It will be connected to the amplifier 3. In this case, the capacitance values of the sensor capacitive elements CS1 to CS3 and the reference capacitive elements CR1 to CR3 are generally different for each of the capacitive sensors SN1 to SN3, and the capacitive offset in each pair of elements is generally different.

  Therefore, in FIG. 7, in order to adjust the dynamic range, a plurality of feedback capacitance elements CFS1 to CFS3 and CFR1 to CFR3 are provided, and each element forms a feedback path via the switch elements SFS1 to SFS3 and SFR1 to SFR3. Making it possible. The voltage level of the differential output voltage output from the switched capacitor amplifier 3 by selecting the switch elements SFS1 to SFS3 and SFR1 to SFR3 according to the capacitance values of the sensor capacitor elements CS1 to CS3 and the reference capacitor elements CR1 to CR3. Can be adjusted.

  In order to adjust the capacitance offset, a plurality of adjustment capacitance elements CDS1 to CDS3 and CDR1 to CDR3 are provided, and each element can be connected via the switch elements SDS1 to SDS3 and SDR1 to SDR3. The capacitance offset can be adjusted by selecting the switch elements SDS1 to SDS3 and SDR1 to SDR3 according to the capacitance offset caused by variations between the sensor capacitance elements CS1 to CS3 and the reference capacitance elements CR1 to CR3.

  Here, the adjustment capacitance elements CDS1 to CDS3 and CDR1 to CDR3 are examples of first adjustment capacitance elements, and the switch elements SDS1 to SDS3 and SDR1 to SDR3 are examples of first adjustment switch units. The feedback capacitive elements CFS1 to CFS3 and CFR1 to CFR3 are examples of second adjustment capacitive elements, and the switch elements SFS1 to SFS3 and SFR1 to SFR3 are examples of second adjustment switch units.

  The switch elements SFS1 to SFS3, SFR1 to SFR3, and the switch elements SDS1 to SDS3, SDR1 to SDR3 are selected in addition to the case of connecting one selected capacitive element through one switch element. In some cases, it is possible to select a plurality of switch elements and set a feedback capacitor element and an adjustment capacitor element by a plurality of capacitor elements.

  Selection of switch elements SFS1 to SFS3, SFR1 to SFR3, switch elements SDS1 to SDS3, and SDR1 to SDR3 is performed in accordance with selection of switch elements SI1 to SI3 for selecting capacitance sensors SN1 to SN3. These pieces of information can be stored in advance as in the memory 10 shown in FIG.

  The adjustment of the dynamic range and the capacitance offset described in FIG. 7 is performed instead of or by the adjustment using the adjustment voltages VAD, VAS, and VAR described in the first embodiment (FIG. 1) and the second embodiment (FIG. 5). This can be performed together with adjustment by the voltages VAD, VAS, and VAR. When the adjustment is performed together with the adjustment voltages VAD, VAS, and VAR, the adjustment in FIG. 7 may be a coarse adjustment, and the adjustment according to the first and second embodiments may be a fine adjustment.

  FIG. 8 is an example of a circuit that cancels DC drift in the detection voltage when performing a sensing operation in a long time range. In FIG. 8, a case where a plurality of capacitance sensors SN1 to SN3 are provided and appropriately selected according to the switch elements SI1 to SI3 will be described as an example. However, the same configuration is used when there is only one capacitance sensor. It goes without saying that it can be done.

  In FIG. 8, a circuit block denoted by reference numeral 21 is a part that converts a change in capacitance, which changes with a sensing operation in the capacitance sensor, into a voltage value with the switched capacitor amplifier 3 and the differential signal amplification unit 5 as the center. .

  The output voltage VOUT output from the circuit block 21 is input to the sample hold circuits 23 to 28 via the switch elements. The output signals of the sample and hold circuits 23 and 24 are input to the differential amplifier 29, and an output signal VX1 is obtained. Similarly, the output signals VX2 of the output signals from the sample and hold circuits 25 and 26 are output via the differential amplifier 30, and the output signals of the sample and hold circuits 27 and 28 are input to the differential amplifier 31 and output to the output signal VX3. Is done.

  The switch elements that input the output voltage VOUT to the sample and hold circuits 23 and 24 are routed according to the control signals φI1 and φI2. Similarly, the switch elements that input the output voltage VOUT to the sample hold circuits 25 and 26 are routed according to the control signals φII1 and φII2, and the switch elements that input the output voltage VOUT to the sample hold circuits 27 and 28 are controlled. Passed in response to signals φIII1 and φIII2.

  Here, the control signals φI1 and φI2 are signals activated in response to the control signal φI for selecting the capacitance sensor SN1, and the control signal φI1 is activated during the initialization operation in the sensing operation by the capacitance sensor SN1. During the sensing operation, the control signal φI2 is activated. Similarly, when the capacitance sensor SN2 is selected, the control signal φII1 is activated during the initialization operation and the control signal φII2 is activated during the sensing operation in accordance with the control signal φII. When the capacitance sensor SN3 is selected, the control signal φIII1 is activated during the initialization operation and the control signal φIII2 is activated during the sensing operation according to the control signal φIII.

  Therefore, the output voltage VOUT at the time of initialization is held in any one of the sample hold circuits 23, 25, or 27 according to the capacity sensor selected from the capacity sensors SN1 to SN3, and the output voltage at the time of the sensing operation. VOUT is held in one of the sample and hold circuits 24, 26, or 28. Then, in the differential amplifier 29, 30, or 31, a differential signal between the output voltage VOUT during the sensing operation and the output voltage VOUT during initialization is amplified.

  As shown in FIG. 9, when performing a sensing operation over a long time range, there may be a DC drift in the detection voltage. According to FIG. 8, even in such a case, since the output voltage VOUT at the time of initialization and the output voltage VOUT at the time of the sensing operation are held for each sensing operation, the sensing operation is performed with high accuracy regardless of the DC drift. be able to.

  As described above in detail, according to the capacitance value change detection device and the capacitance value change detection method according to the present embodiment, the common terminal NC of the capacitance sensor SN1 is connected to the ground potential which is a fixed potential. The parasitic capacitance component including the substrate portion on the structure of the capacitance sensor SN1 associated with the NC does not contribute to the detection of the capacitance change in the capacitance sensor SN1. Capacitance change can be detected with high accuracy, and the read voltage can be adjusted by the first and second voltage adjusting units VC11 / VC21, VC21 / VC22. Can be adjusted.

  The dynamic ranges of the voltages VFS and VFR obtained by transferring the charges accumulated in the sensor capacitive element CS and the reference capacitive element CR to the feedback capacitive elements CFS and CFR are the same as the sensor capacitive element CS and the reference capacitive element in the initialized state. It is determined according to the amount of charge accumulated in CR. Therefore, by adjusting the voltage level of the adjustment voltage VAD of the first voltage adjustment unit VC11, in which the voltage level is commonly set, among the read voltages applied to the sensor capacitive element CS and the reference capacitive element CR, Adjustments can be made.

  Regarding the capacitance offset when the capacitance value of the sensor capacitive element CS and / or the reference capacitive element CR varies, the voltage level of the read voltage applied to the sensor capacitive element CS and / or the reference capacitive element CR is individually set. The capacitance offset can be adjusted by adjusting the voltage levels in the adjustment voltages VAS and VAR of the second voltage adjustment unit VC12 to be set.

  In the second embodiment, the adjustment of the adjustment voltage VAD by the first voltage adjustment unit VC21 is repeated, and the voltages VFS and VFR are applied to the first and second capacitance sensors SN1 and feedback capacitance elements CFS and CFR. The dynamic range is adjusted by automatically adjusting to a voltage level determined by the amplification degree of the second buffer circuits 11 and 15. The adjustment of the adjustment voltages VFS and VFR by the second voltage adjustment unit VC22 is repeated, and the output voltage VOUT is automatically adjusted to 0 value in the initialization operation prior to the sensing operation by the capacitance sensor SN1, thereby referring to the sensor capacitance element CS. The capacitance offset with respect to the capacitive element CR is adjusted.

  If a plurality of feedback capacitance elements CFS1 to CFS3 and CFR1 to CFR3 are provided and each element constitutes a feedback path via the switch elements SFS1 to SFS3 and SFR1 to SFR3, a plurality of sensor capacitance elements CS1 to CS3 are provided. According to the selection of the reference capacitor elements CR1 to CR3, the switch elements SFS1 to SFS3, SFR1 to SFR3 can be selected to adjust the voltage level of the differential output voltage output from the switched capacitor amplifier 3, The range can be adjusted.

  Further, if a plurality of adjustment capacitor elements CDS1 to CDS3, CDR1 to CDR3 are provided and each element is connected via the switch elements SDS1 to SDS3, SDR1 to SDR3, a plurality of sensor capacitor elements CS1 to CS3 and The switching elements SDS1 to SDS3 and SDR1 to SDR3 can be selected and adjusted according to the capacitance offset caused by the variation of the capacitance value of the reference capacitance elements CR1 to CR3, and the capacitance offset can be adjusted. Can do.

The present invention is not limited to the above-described embodiment, and it goes without saying that various improvements and modifications can be made without departing from the spirit of the present invention.
For example, FIG. 7 illustrates an example in which a feedback capacitive element is selected to adjust the dynamic range and / or an adjustment capacitive element is adjusted to adjust a capacitance offset according to the selected capacitance sensor. However, the present invention is not limited to this. In the case of the second embodiment (FIG. 5), when a plurality of capacitance sensors are selected, various types of amplification factors, frequency characteristics, offset adjustments, etc. of the first and / or second buffer circuits 11, 15 It is also possible to adopt a configuration in which the characteristics are switched for each selected capacitance sensor. In this case, the characteristic information may be stored in advance in a memory or the like and read as necessary.
Further, the capacitance change in the capacitance sensor is based on the value obtained by multiplying the capacitance change amount between the sensor capacitance element and the reference capacitance element by the read voltage, and the voltage VFS and the voltage VFR which are differential output signals of the switched capacitor amplifier. Are determined and detected. In addition, the read voltage is set based on the adjustment voltage VAD, and the adjustment voltage VAD may be generated in proportion to a predetermined reference voltage (not shown). In this case, when the differential signal of the voltages VFS and VFR is amplified by the differential signal amplifying unit, or further amplified by the amplifying unit provided in the subsequent stage, the amplification degree in the differential signal amplifying part and / or the subsequent amplifying part is set as a reference. If the relationship is inversely proportional to the voltage, this influence can be eliminated even when the reference voltage has a DC drift.

Here, the means for solving the problems in the background art according to the technical idea of the present invention are listed below.
(Supplementary note 1) A capacitive sensor composed of a sensor capacitive element and a reference capacitive element, wherein one terminal is connected to a fixed potential as a common terminal;
A voltage conversion unit that extracts charges accumulated by application of a read voltage to the other terminal of the sensor capacitive element and the reference capacitive element from the other terminal and converts the charge into a voltage signal;
A differential signal amplifying unit that amplifies a differential signal of a voltage signal output from the voltage conversion unit by the sensor capacitive element and the reference capacitive element;
A capacitance value change detection apparatus comprising: a voltage adjustment unit that adjusts the read voltage.
(Supplementary Note 2) The voltage converter includes a switched capacitor amplifier having a differential output configuration or a pair of switched capacitor amplifiers.
The switched capacitor amplifier is:
The capacitance value change detecting device according to claim 1, further comprising a pair of feedback capacitive elements that feed back from each output terminal to an input terminal having a phase opposite to that of the output terminal.
(Additional remark 3) The 1st switch part which controls connection of the other terminal and the voltage adjustment part of the sensor capacitive element and the reference capacitive element,
A second switch unit for controlling connection between the other terminal of the sensor capacitor element and the reference capacitor element and each input terminal of the switched capacitor amplifier;
A third switch unit that performs bypass control of each of the feedback capacitive elements,
The capacitance value change detection device according to appendix 2, wherein the first and third switch units and the second switch unit are conductively controlled in a complementary manner.
(Additional remark 4) The adjustment value storage part which stores the adjustment value of the said voltage adjustment part for every said capacitance sensor previously is provided,
The capacitance value change detection device according to appendix 1, wherein a corresponding adjustment value is selected from the adjustment value storage unit according to the connected capacitance sensor.
(Supplementary Note 5) The voltage adjustment unit
A first voltage adjusting unit that is commonly applied to each of the sensor capacitive element and the reference capacitive element and adjusts a dynamic range;
The capacitance value according to appendix 1, including at least one of a second voltage adjustment unit that is individually applied to each of the sensor capacitance element and the reference capacitance element and adjusts a capacitance offset. Change detection device.
(Supplementary Note 6) The first voltage adjustment unit includes:
A peak hold unit connected to the output terminal of the voltage conversion unit and holding a peak value of the voltage signal;
The capacitance value change detection device according to appendix 5, further comprising: a first buffer unit that feeds back the read voltage according to the peak value.
(Supplementary Note 7) The second voltage adjustment unit includes:
A sample-and-hold unit connected to an output terminal of the differential signal amplification unit and holding the amplified differential signal;
The capacitance value change detection device according to appendix 5, further comprising: a second buffer unit that feeds back the read voltage according to the amplified differential signal.
(Additional remark 8) The said 2nd buffer part is provided with a differential output structure, The capacitance value change detection apparatus of Additional remark 7 characterized by the above-mentioned.
(Supplementary note 9) a first adjustment capacitive element for adjusting a capacitance offset in the capacitance sensor;
The capacitance value change detection device according to claim 1, further comprising at least one set of a first adjustment switch unit that connects the first adjustment capacitor element in parallel to the sensor capacitor element and / or the reference capacitor element.
(Supplementary note 10) a plurality of capacitive sensors;
A selection switch unit that connects each of the plurality of capacitance sensors to the voltage conversion unit;
The capacitance value change detection device according to appendix 9, wherein the first adjustment switch unit is switched according to selection by the selection switch unit.
(Additional remark 11) The 2nd adjustment capacitive element which adjusts the dynamic range in the said capacitive sensor,
The capacitance value change detecting device according to claim 2, further comprising at least one set of a second adjustment switch unit that connects the second adjustment capacitor element in parallel with the feedback capacitor element.
(Supplementary note 12) A plurality of capacitive sensors,
A selection switch unit that connects each of the plurality of capacitance sensors to the voltage conversion unit;
The capacitance value change detection device according to appendix 11, wherein the second adjustment switch unit is switched according to selection by the selection switch unit.
(Supplementary note 13) a plurality of capacitive sensors;
A sense signal holding unit that is provided for each of the capacitance sensors and holds the differential signal amplified by the differential signal amplification unit during a sensing operation by the capacitive sensor;
An initialization signal holding unit that is provided for each of the capacitance sensors and holds the differential signal amplified by the differential signal amplification unit prior to a sensing operation by the capacitive sensor;
The capacitance value change according to claim 1, further comprising an amplifying unit that amplifies a difference between the difference signal held in the sense signal holding unit and the difference signal held in the initialization signal holding unit. Detection device.
(Supplementary Note 14) A capacitance value change detection method for a capacitive sensor including a sensor capacitive element and a reference capacitive element, wherein one terminal is connected to a fixed potential as a common terminal,
Applying a read voltage to the other terminal of the sensor capacitive element and the reference capacitive element to accumulate charges;
Removing the accumulated charge from each of the other terminals and converting it to a voltage signal;
Amplifying a differential signal of a voltage signal by the sensor capacitive element and the reference capacitive element;
And a step of adjusting the read voltage.
(Supplementary Note 15) The step of adjusting the read voltage includes:
Holding a peak value of the voltage signal converted by the step of converting to the voltage signal;
The capacitance value change detecting method according to claim 14, further comprising a step of feeding back the read voltage in accordance with the peak value.
(Supplementary Note 16) The step of adjusting the read voltage includes:
Holding the differential signal amplified by amplifying the differential signal;
The capacitance value change detecting method according to claim 14, further comprising a step of feeding back the read voltage in accordance with the difference signal.
(Supplementary Note 17) Provided with a plurality of capacitance sensors,
Holding the differential signal amplified by the step of amplifying the differential signal during a sensing operation by the capacitive sensor for each capacitive sensor;
Holding the differential signal amplified by the step of amplifying the differential signal prior to the sensing operation by the capacitive sensor for each capacitive sensor;
And amplifying the difference of the difference signal held by the step of holding in the sense operation with respect to the difference signal held by the step of holding prior to the sense operation. 14. The capacitance value change detection method according to 14.

It is a circuit diagram of a 1st embodiment. It is a wave form diagram which shows circuit operation | movement. It is a figure which shows the specific example of the voltage adjustment part in 1st Embodiment. It is a circuit diagram which shows the modification of 1st Embodiment. It is a circuit diagram of a 2nd embodiment. It is an example of a circuit that outputs a read voltage having temperature dependency. It is an example of a circuit which adjusts a capacitance value for each of a plurality of capacitance sensors. It is an example of a circuit which performs time division processing with respect to a plurality of capacitive sensors. It is a figure which shows that DC drift is canceled by the circuit of FIG. It is a circuit diagram of background art.

Explanation of symbols

3, 3A, 3B Switched capacitor amplifier 5 Differential signal amplifier 7 OR circuit 9 Peak hold circuit 10 Memory 11 First buffer circuit 15 Second buffer circuit 13, 23-28 Sample hold circuit 17 Determination unit 25 Second buffer circuit 29- 31 Differential amplifiers CDS1 to CDS3, CDR1 to CDR3 Adjustment capacitive elements CFS, CFS1 to CFS3, CFR, CFR1 to CFR3 Feedback capacitive element CR, CR1 to CR3 Reference capacitive element CS, CS1 to CS3 Sensor capacitive element N1, N2 Other terminal NC Common terminals SN1 to SN3 Capacitance sensors VC11, VC21 First voltage adjustment unit VC12, VC22 Second voltage adjustment unit VAD, VAS, VAR Adjustment voltage

Claims (9)

A capacitive sensor composed of a sensor capacitive element and a reference capacitive element, wherein one terminal is connected to a fixed potential as a common terminal;
A voltage conversion unit that extracts charges accumulated by application of a read voltage to the other terminal of the sensor capacitive element and the reference capacitive element from the other terminal and converts the charge into a voltage signal;
A differential signal amplifying unit that amplifies a differential signal of a voltage signal output from the voltage conversion unit by the sensor capacitive element and the reference capacitive element;
A capacitance value change detection apparatus comprising: a voltage adjustment unit that adjusts the read voltage. The voltage conversion unit includes a switched capacitor amplifier having a differential output configuration, or a pair of switched capacitor amplifiers,
The switched capacitor amplifier is:
The capacitance value change detection device according to claim 1, further comprising a pair of feedback capacitance elements that feed back from each output terminal to an input terminal having a phase opposite to that of the output terminal. The voltage regulator is
A first voltage adjusting unit that is commonly applied to each of the sensor capacitive element and the reference capacitive element and adjusts a dynamic range;
2. The capacitor according to claim 1, comprising at least one of a second voltage adjustment unit that is individually applied to each of the sensor capacitor element and the reference capacitor element and adjusts a capacitor offset. Value change detection device. The first voltage adjustment unit includes:
A peak hold unit connected to the output terminal of the voltage conversion unit and holding a peak value of the voltage signal;
The capacitance value change detection device according to claim 3, further comprising: a first buffer unit that performs feedback according to the peak value with respect to the read voltage. The second voltage adjustment unit includes:
A sample-and-hold unit connected to an output terminal of the differential signal amplification unit and holding the amplified differential signal;
The capacitance value change detection device according to claim 3, further comprising a second buffer unit that feeds back the read voltage according to the amplified differential signal. A first adjustment capacitive element for adjusting a capacitance offset in the capacitance sensor;
2. The capacitance value change detection device according to claim 1, further comprising at least one set of a first adjustment switch unit that connects the first adjustment capacitor element in parallel to the sensor capacitor element and / or the reference capacitor element. . A second adjustment capacitive element for adjusting a dynamic range in the capacitive sensor;
The capacitance value change detection device according to claim 2, further comprising at least one set of a second adjustment switch unit that connects the second adjustment capacitor element in parallel with the feedback capacitor element. A plurality of capacitive sensors;
A sense signal holding unit that is provided for each of the capacitance sensors and holds the differential signal amplified by the differential signal amplification unit during a sensing operation by the capacitive sensor;
An initialization signal holding unit that is provided for each of the capacitance sensors and holds the differential signal amplified by the differential signal amplification unit prior to a sensing operation by the capacitive sensor;
The capacitance value according to claim 1, further comprising: an amplifying unit that amplifies a difference between the difference signal held in the sense signal holding unit and the difference signal held in the initialization signal holding unit. Change detection device. A capacitance value change detection method for a capacitive sensor composed of a sensor capacitive element and a reference capacitive element, wherein one terminal is connected to a fixed potential as a common terminal,
Applying a read voltage to the other terminal of the sensor capacitive element and the reference capacitive element to accumulate charges;
Removing the accumulated charge from each of the other terminals and converting it to a voltage signal;
Amplifying a differential signal of a voltage signal by the sensor capacitive element and the reference capacitive element;
And a step of adjusting the read voltage.

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