JP2006511867A5 - - Google Patents
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- Publication number
- JP2006511867A5 JP2006511867A5 JP2004563645A JP2004563645A JP2006511867A5 JP 2006511867 A5 JP2006511867 A5 JP 2006511867A5 JP 2004563645 A JP2004563645 A JP 2004563645A JP 2004563645 A JP2004563645 A JP 2004563645A JP 2006511867 A5 JP2006511867 A5 JP 2006511867A5
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- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/327,556 US20040123081A1 (en) | 2002-12-20 | 2002-12-20 | Mechanism to increase performance of control speculation |
| PCT/US2003/040141 WO2004059470A1 (en) | 2002-12-20 | 2003-12-04 | Mechanism to increase performance of control speculation |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006511867A JP2006511867A (ja) | 2006-04-06 |
| JP2006511867A5 true JP2006511867A5 (ja) | 2006-10-19 |
| JP4220473B2 JP4220473B2 (ja) | 2009-02-04 |
Family
ID=32594285
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004563645A Expired - Fee Related JP4220473B2 (ja) | 2002-12-20 | 2003-12-04 | 制御スペキュレーションの性能を向上するメカニズム |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20040123081A1 (ja) |
| JP (1) | JP4220473B2 (ja) |
| CN (1) | CN100480995C (ja) |
| AU (1) | AU2003300979A1 (ja) |
| WO (1) | WO2004059470A1 (ja) |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040154010A1 (en) * | 2003-01-31 | 2004-08-05 | Pedro Marcuello | Control-quasi-independent-points guided speculative multithreading |
| US7168070B2 (en) * | 2004-05-25 | 2007-01-23 | International Business Machines Corporation | Aggregate bandwidth through management using insertion of reset instructions for cache-to-cache data transfer |
| US8443171B2 (en) * | 2004-07-30 | 2013-05-14 | Hewlett-Packard Development Company, L.P. | Run-time updating of prediction hint instructions |
| WO2007138124A1 (es) * | 2006-05-30 | 2007-12-06 | Intel Corporation | Método aparato y sistema aplicado en un protocolo de coherencia de una memoria cache |
| US7590826B2 (en) * | 2006-11-06 | 2009-09-15 | Arm Limited | Speculative data value usage |
| US8065505B2 (en) * | 2007-08-16 | 2011-11-22 | Texas Instruments Incorporated | Stall-free pipelined cache for statically scheduled and dispatched execution |
| US20100077145A1 (en) * | 2008-09-25 | 2010-03-25 | Winkel Sebastian C | Method and system for parallel execution of memory instructions in an in-order processor |
| US8683129B2 (en) * | 2010-10-21 | 2014-03-25 | Oracle International Corporation | Using speculative cache requests to reduce cache miss delays |
| WO2013095392A1 (en) * | 2011-12-20 | 2013-06-27 | Intel Corporation | Systems and method for unblocking a pipeline with spontaneous load deferral and conversion to prefetch |
| US8832505B2 (en) | 2012-06-29 | 2014-09-09 | Intel Corporation | Methods and apparatus to provide failure detection |
| GB2501582B (en) * | 2013-02-11 | 2014-12-24 | Imagination Tech Ltd | Speculative load issue |
| GB2519108A (en) * | 2013-10-09 | 2015-04-15 | Advanced Risc Mach Ltd | A data processing apparatus and method for controlling performance of speculative vector operations |
| US20160011874A1 (en) * | 2014-07-09 | 2016-01-14 | Doron Orenstein | Silent memory instructions and miss-rate tracking to optimize switching policy on threads in a processing device |
| US20200372129A1 (en) * | 2018-01-12 | 2020-11-26 | Virsec Systems, Inc. | Defending Against Speculative Execution Exploits |
| JP7041353B2 (ja) * | 2018-06-06 | 2022-03-24 | 富士通株式会社 | 演算処理装置及び演算処理装置の制御方法 |
| US10860301B2 (en) | 2019-06-28 | 2020-12-08 | Intel Corporation | Control speculation in dataflow graphs |
| US11176055B1 (en) | 2019-08-06 | 2021-11-16 | Marvell Asia Pte, Ltd. | Managing potential faults for speculative page table access |
| US11403394B2 (en) * | 2019-09-17 | 2022-08-02 | International Business Machines Corporation | Preventing selective events of a computing environment |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6314513B1 (en) * | 1997-09-30 | 2001-11-06 | Intel Corporation | Method and apparatus for transferring data between a register stack and a memory resource |
| US5915117A (en) * | 1997-10-13 | 1999-06-22 | Institute For The Development Of Emerging Architectures, L.L.C. | Computer architecture for the deferral of exceptions on speculative instructions |
| US6016542A (en) * | 1997-12-31 | 2000-01-18 | Intel Corporation | Detecting long latency pipeline stalls for thread switching |
| US6988183B1 (en) * | 1998-06-26 | 2006-01-17 | Derek Chi-Lan Wong | Methods for increasing instruction-level parallelism in microprocessors and digital system |
| US6253306B1 (en) * | 1998-07-29 | 2001-06-26 | Advanced Micro Devices, Inc. | Prefetch instruction mechanism for processor |
| US6463579B1 (en) * | 1999-02-17 | 2002-10-08 | Intel Corporation | System and method for generating recovery code |
| US6871273B1 (en) * | 2000-06-22 | 2005-03-22 | International Business Machines Corporation | Processor and method of executing a load instruction that dynamically bifurcate a load instruction into separately executable prefetch and register operations |
| US6829700B2 (en) * | 2000-12-29 | 2004-12-07 | Stmicroelectronics, Inc. | Circuit and method for supporting misaligned accesses in the presence of speculative load instructions |
| JP3969009B2 (ja) * | 2001-03-29 | 2007-08-29 | 株式会社日立製作所 | ハードウェアプリフェッチシステム |
| US7028166B2 (en) * | 2002-04-30 | 2006-04-11 | Advanced Micro Devices, Inc. | System and method for linking speculative results of load operations to register values |
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2002
- 2002-12-20 US US10/327,556 patent/US20040123081A1/en not_active Abandoned
-
2003
- 2003-12-04 CN CNB2003801065592A patent/CN100480995C/zh not_active Expired - Fee Related
- 2003-12-04 WO PCT/US2003/040141 patent/WO2004059470A1/en active Application Filing
- 2003-12-04 AU AU2003300979A patent/AU2003300979A1/en not_active Abandoned
- 2003-12-04 JP JP2004563645A patent/JP4220473B2/ja not_active Expired - Fee Related