JP2006503499A - Chip level phase adjustment - Google Patents

Abstract

A system capable of rotating or adjusting the phase of a signal is provided.
In one system, a filtered representation of one second component of the signal based on a filtered representation of one first component of the signal and an unfiltered representation of the signal. Communicatively coupled to one phase compensator configured to adjust the phase of the signal based on the unfiltered representation and the one or more outputs of the phase compensator, And a detector configured to combine one code sequence with the first and second components to determine one magnitude of energy of one channel.

Description

  This application claims the benefit of the earlier filing date of the previously filed US Patent Application No. 60 / 418,188 provisional application (filed Oct. 15, 2002). In addition, this application is a U.S. Patent Application No. ## / ####, which is a continuation application of the same applicant filed at the same time as the present application. No. 60 / 418,187). Each of the above disclosures is incorporated herein by reference.

1. The present invention relates generally to multiple communication schemes. More specifically, the invention relates to adjusting the phase of one spread spectrum signal, such as one code division multiple access (“CDMA”) signal or one wideband CDMA signal (“WCDMA”). CDMA and WCDMA signaling are well known to those skilled in the art.

2. 2. Description of Related Art A plurality of communication systems such as a plurality of spread spectrum CDMA systems used in the mobile phone industry use various modulation systems. Examples of such multiple modulation schemes include four-phase phase shift keying (“QPSK”) and two-phase phase shift keying (“BPSK”). A person skilled in the art can easily understand the QPSK modulation scheme and the BPSK modulation scheme. The multiple signals transmitted by these multiple spread spectrum schemes carry digital data spread over one partial spectrum of radio frequency ("RF"). For example, multiple CDMA signals transmitted may contain pseudorandom (“PN”) data interspersed, or “spread” digital data, at a single data rate that is generally much faster than the original data rate. Carry. Thus, the original data is spread over one spectrum that is larger than the original spectrum. A plurality of PN codes used to spread one communication signal are well known to those skilled in the art.

  One base station as used in the mobile phone industry transmits one CDMA signal to one subscriber unit such as one mobile phone. The signal itself may be a QPSK signal that includes one in-phase component and one quadrature component, which are also known as I and Q components, respectively. Digital data may be transmitted by one or both of these I and Q components. The receiving side subscriber unit despreads this data by combining the PN code used to spread the data with I and Q. This causes the subscriber unit to extract this data and convert it into one desired format, such as voice. In the cellular phone example, the data may be combined into one orthogonal code sequence, such as one Walsh code sequence, during data extraction.

  For example, the original data may include multiple channels. Here, one channel refers to one encoded bit spread by one orthogonal code such as a Walsh code.

  The same orthogonal code as the orthogonal code used for encoding data on the transmitting side is used on the receiving side to extract the data.

  A transmitter, such as in one base station, may send a reference signal, known as a pilot signal, with the data. This pilot signal is generally used as one phase reference for received data. For example, the original data can be correctly recovered by adjusting, ie rotating, the phase of the QPSK signal to one predetermined phase quadrant using the pilot signal. Since the pilot signal generally does not carry any data and is encoded by a sequence of zeros, it exists in a given single phase quadrant. Therefore, when a pilot signal is detected in one incorrect phase quadrant, it can be returned to the correct phase quadrant by rotating the phase of the pilot signal and thus the original data.

  This multiple phase rotation approach, also known as carrier phase recovery, works in the industry but works at a single symbol level to recover single channel data within the original data. It is used to For example, one prior art scheme combines one Walsh code sequence for each of the I and Q components of a signal immediately after despreading of the I and Q components. This scheme is efficient for determining the size of one channel selected for data recovery. However, multiple Walsh codes are required to determine the size of multiple channels. The addition of multiple Walsh codes complicates the system as more components (eg, multiple filters, multiple accumulators, and multiple multipliers) are required. Further, since it is necessary to multiply the Walsh code by the I component and the Q component for each channel, more processing capacity is consumed when extracting a plurality of channels. Examples of one method used to extract single channel data by phase rotation include Patent Document 1 and Patent Document 2. Although the prior art schemes are particularly useful for extracting data from a single channel, the multiple interference suppression capabilities provide almost nothing. In a plurality of spread spectrum systems such as a plurality of CDMA systems of the mobile phone, interference suppression can be useful for reducing interference from other interference sources. Examples of such multiple interference sources include energy leakage from other channels that degrade the quality of the selected channel.

Leakage may be due to multiple calculation errors during down conversion and / or demodulation of one received signal. Thus, the use of multiple interference suppression receivers facilitates the isolation and extraction of individual channels within multiple spread spectrum signals. Patent Documents 3 and 4 are cited as a plurality of prior examples of a plurality of interference suppression receivers, and both examples can provide useful background information.
US Patent No. 5,506,865 ("865 Patent" issued on April 9, 1996) US Patent No. 6,396,804 ("804 Patent" issued on May 28, 2002) US Pat. No. 5,930,229 (issued July 27, 1999) US Pat. No. 5,872,776 (issued February 16, 1999)

  Phase rotation in accordance with some prior art schemes is particularly inefficient in suppressing multiple interferences because it requires multiple code sequences to extract data from each channel within a given signal Is. For example, when isolating one target channel, each of the plurality of non-target channels is regarded as one candidate interference source for the target channel. Thus, to accommodate any potential interference and to correctly extract data from the target channel, it is necessary to identify multiple non-target channels. Since extracting the data from each channel requires a unique code sequence for each channel, the addition of the various components required to extract the data essentially complicates one receiver.

  The present invention provides a system that can rotate or adjust the phase of a signal.

  In one embodiment, one system includes one phase compensator, which is based on a filtered and unfiltered representation of one first component of the signal and one of the signals. The phase of the signal is adjusted based on the filtered and unfiltered representations of the two second components. For example, the phase compensator performs a plurality of vector multiplications of the filtered I and Q components and the unfiltered I and Q components to obtain a phase adjusted I component of one QPSK signal Q component may be prepared. The system further includes a detector that is communicatively coupled to one or more outputs of the phase compensator and combines one code sequence for the first component and the second component to provide one detector. It is configured to determine the magnitude of one energy of the channel.

One system in one aspect of the present invention is based on a filtered and unfiltered representation of one first component of a signal and a filtered second component of the signal. Communicatively coupled to one phase compensator configured to adjust the phase of the signal based on the representation and the unfiltered representation, and one or more outputs of the phase compensator. A detector configured to determine one energy magnitude of one channel by combining one code sequence with the first and second components. In another aspect of the invention, the first component is a single in-phase component that approximately conforms to the following formula: I = (I _Unfiltered · K · cos φ) + (Q _Unfiltered · K · sin φ) where I _Unfiltered is one unfiltered representation of the in-phase component and K · cos φ is the filtered in-phase component Q _Unfiltered is an _unfiltered representation of the quadrature component, and K · sinφ is a filtered representation of the quadrature component.

In another aspect of the invention, the second component is a single orthogonal component approximately according to the following equation: Q = (Q _Unfiltered · K · cos φ) − (I _Unfiltered · K · sin φ) where I _Unfiltered is an _unfiltered representation of the in-phase component, and K · cos φ is a filtered representation of the in-phase component. _Yes , Q _Unfiltered is one unfiltered representation of the quadrature component, and K · sinφ is a filtered representation of the quadrature component.

  In another aspect of the invention, the code sequence is a Walsh code sequence.

  In another aspect of the invention, the detector comprises one or more code sequence generators, each code sequence generator being configured to generate one unique code sequence.

  In another aspect of the invention, the detector is communicatively coupled to a plurality of code sequence generators and combines the first component with one or more code sequences to produce a combined first component. Communicatively coupled to a first multiplier and a plurality of code sequence generators configured to combine one or more code sequences with a second component to form a combined second component And a second multiplier configured to generate.

  In another aspect of the invention, the detector further comprises an accumulator, which is communicatively coupled to the first and second multipliers and sums the combined first components over one symbol time. To generate one first symbol level data, and to generate one second symbol level data by summing the combined second components over one symbol time.

  In another aspect of the invention, the detector comprises one fast Walsh transform element, which fast Walsh transform element combines one or more unique sequences by combining multiple Walsh code sequences in the first and second components. It is configured to obtain a plurality of magnitudes of channel energy.

  In one aspect of the invention, a method for adjusting the phase of a signal includes multiplying a first unfiltered signal component by a filtered first signal component. A step of preparing a product of 1, a step of preparing one second product by multiplying one second component that is not filtered of a signal by one second component that is filtered of a signal, and a multiplication Responsively combining the first product and the second product to generate a phase-adjusted first component; and generating a phase-adjusted first component of the signal comprising: Multiplying the unfiltered second component by the filtered first component to prepare one third product, and multiplying the unfiltered first component by the filtered second component to form one fourth Prepare the product of Generating a phase-adjusted second component by combining the third product and the fourth product in response to multiplication, and generating a second phase-adjusted signal component And adjusting the phase of the signal by generating a phase-adjusted first component and generating a phase-adjusted second component.

  In another aspect of the invention, combining the first and second products includes adding the first product to the second product.

In another aspect of the invention, the step of adding includes providing a phase adjusted second component having substantially the following form.
I = (I _Unfiltered · K · cos φ) + (Q _Unfiltered · K · sin φ)

Where I _Unfiltered is an _unfiltered representation of the in-phase component, K · cos φ is a filtered representation of the in-phase component, and Q _Unfiltered is an _unfiltered representation of the quadrature component. Yes, K · sinφ is a filtered representation of the orthogonal component.

    In another aspect of the invention, combining the third and fourth products includes subtracting the fourth product from the third product.

In another aspect of the invention, the subtracting step includes providing a phase adjusted second component having substantially the following form.
Q = (Q _Unfiltered · K · cos φ) − (I _Unfiltered · K · sin φ)

Where I _Unfiltered is an _unfiltered representation of the in-phase component, K · cos φ is a filtered representation of the in-phase component, and Q _Unfiltered is an _unfiltered representation of the quadrature component, K · sinφ is a filtered representation of the orthogonal component.

  In another aspect of the invention, generating the phase adjusted first component includes latching the first product and the second product into one summation element substantially simultaneously.

  In another aspect of the invention, generating the phase-adjusted second component includes latching the third product and the fourth product into one subtraction element substantially simultaneously.

  In one aspect of the present invention, a system for adjusting the phase of a signal is obtained by multiplying a first unfiltered signal component by a filtered first signal component. Means for preparing one product, means for preparing one second product by multiplying one second component that has not been subjected to signal filtering by one second component that has undergone signal filtering, and for multiplication Means for responsively combining the first and second products to generate a first phase-adjusted component, means for generating a phase-adjusted first component of the signal, and unfiltered Means for multiplying the second component by the filtered first component to prepare one third product, and multiplying the unfiltered first component by the filtered second component to obtain one fourth Means to prepare the product and multiplication Means for generating a phase-adjusted second component by combining the third and fourth products, and means for generating one phase-adjusted second component of the signal comprising: The phase of the signal is adjusted by the step of generating the phase-adjusted first component and the step of generating the phase-adjusted second component.

  In another aspect of the invention, the means for combining the first and second products includes means for adding the first product to the second product.

In another aspect of the invention, the means for adding includes means for providing a phase adjusted second component having substantially the following form.
I = (I _Unfiltered · K · cos φ) + (Q _Unfiltered · K · sin φ)

Where I _Unfiltered is an _unfiltered representation of the in-phase component, K · cos φ is a filtered representation of the in-phase component, and Q _Unfiltered is an _unfiltered representation of the quadrature component. Yes, K · sinφ is a filtered representation of the orthogonal component.

  In another aspect of the invention, the means for combining the third and fourth products includes means for subtracting the fourth product from the third product.

In another aspect of the invention, the means for subtracting includes means for providing a phase adjusted second component having substantially the following form.
Q = (Q _Unfiltered · K · cos φ) − (I _Unfiltered · K · sin φ)

Where I _Unfiltered is an _unfiltered representation of the in-phase component, K · cos φ is a filtered representation of the in-phase component, and Q _Unfiltered is an _unfiltered representation of the quadrature component, K · sinφ is a filtered representation of the orthogonal component.

  In another aspect of the invention, the means for generating the phase adjusted first component includes means for latching the first product and the second product into one summation element substantially simultaneously.

  In another aspect of the invention, the means for generating the phase adjusted first component includes means for latching the third product and the fourth product into one subtraction element substantially simultaneously.

  In one aspect of the invention, one method of processing one signal is to generate one phase-adjusted first component by adjusting the phase of one first component of the signal by multiple multiplications. A filtered representation of the first component and an unfiltered representation as multiple operands of the multiple multiplications, and a filtered representation of one second component of the signal. And generating a second component that is phase-adjusted by adjusting the phase of the second component by a plurality of multiplications, the first component as a plurality of operands of the plurality of multiplications. 1 component filtered and unfiltered representations are included, and 2 component filtered and unfiltered representations are included. Comprising the steps that includes the representation, determining a first component and a phase-adjusted one size of energy of a single channel by combining one code sequence and a second component that is phase-adjusted, the.

In another aspect of the present invention, the step of adjusting the phase of the first component generates a phase adjusted first component having substantially the following form by adding a plurality of products generated by a plurality of multiplications. Including the steps of:
I = (I _Unfiltered · K · cos φ) + (Q _Unfiltered · K · sin φ)

Where I _Unfiltered is an _unfiltered representation of the in-phase component, K · cos φ is a filtered representation of the in-phase component, and Q _Unfiltered is an _unfiltered representation of the quadrature component. Yes, K · sinφ is a filtered representation of the orthogonal component.

In another aspect of the present invention, the step of adjusting the phase of the second component generates a phase-adjusted second component having substantially the following form by adding a plurality of products generated by a plurality of multiplications Including the steps of:
Q = (Q _Unfiltered · K · cos φ) − (I _Unfiltered · K · sin φ)

Where I _Unfiltered is an _unfiltered representation of the in-phase component, K · cos φ is a filtered representation of the in-phase component, and Q _Unfiltered is an _unfiltered representation of the quadrature component, K · sinφ is a filtered representation of the orthogonal component.

  In one aspect of the invention, a system is communicatively coupled to a despreader and a despreader configured to despread first and second components of a signal, A filter configured to generate a filtered representation of the first component and a filtered representation of the second component by filtering the first and second components of Coupled to the bank, the despreader and the filter bank, based on the filtered representations of the first component and the second component and the unfiltered representations of the first component and the second component, respectively. A phase compensator configured to adjust the phase of the signal.

A transmitter, such as in one base station, may send a reference signal, known as a pilot signal, with the data. This pilot signal is generally used as one phase reference for received data. For example, the original data can be correctly recovered by adjusting, ie rotating, the phase of the QPSK signal to one predetermined phase quadrant using the pilot signal. Since the pilot signal generally does not carry any data and is encoded by a sequence of zeros, it exists in a given single phase quadrant. Therefore, when a pilot signal is detected in one incorrect phase quadrant, it can be returned to the correct phase quadrant by rotating the phase of the pilot signal and thus the original data.

  While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will be described in detail herein. It should be understood, however, that the invention is not limited to the specific forms disclosed, and that the invention encompasses multiple modifications, multiple modifications falling within the spirit and scope of the invention as defined by the claims. And all of the alternatives.

  FIG. 1 shows one block diagram of a prior art system 100. System 100 is a spread spectrum receiver that extracts data from the received I and Q data streams of one QPSK signal. System 100 includes one QPSK despreader 102 that despreads the I and Q data streams using multiple PN codes. The despread I data stream and Q data stream are supplied to filter 104-I and filter 104-Q, respectively. Filters 104-I and 104-Q filter the I data stream and the Q data stream, respectively. Each output filtered by filter 104-I and filter 104-Q is then used as a plurality of references for the carrier phase of the signal.

  The despread I data stream and Q data stream are also supplied to the logical multiplier 109-I and the logical multiplier 109-Q, respectively. The multiplier 109 -I and the multiplier 109 -Q perform one modulo-2 addition using one Walsh code 110 for each of the despread I data stream and Q data stream. Therefore, the Walsh sequence generator 103 supplies this Walsh code 110 to both the multiplier 109-I and the multiplier 109-Q. The multiplier 109-I and the multiplier 109-Q supply the modulo-2 added I data stream and Q data stream to the accumulator 105-I and accumulator 105-Q, respectively. Such logical operations are well known to those skilled in the art. Thereafter, the accumulator 105-I and the accumulator 105-Q store one predetermined number of encoded bits respectively supplied from the multiplier 109-I and the multiplier 109-Q. Multiple accumulators are also known to those skilled in the art. The unfiltered I and Q data streams output from accumulator 105-I and accumulator 105-Q represent channel data.

Filters 104 -I and 104 -Q, accumulator 105 -I and accumulator 105 -Q forward their respective data streams to dot product module 106. As described in the “865 patent”, the dot product module 106 generates a rotated data sample that is subsequently used by the processor 108. For example, the dot product module 106 generates a dot product between one data signal vector and one pilot signal vector in the IQ coordinate space. The dot product follows the following equation:
(Equation 1) P · D = (P ((D (cos θ

However, P is a vector of pilot signals, D is a vector of data signals, and θ is an angle between the two vectors. This equation can be expressed in the form of one vector component as follows:
(Equation 2) P · D = P _I D _I + P _Q D _Q

  However, the subscripts I and Q represent the I component and Q component of the corresponding vector, respectively. These equations relate to phase rotation in units of one symbol level of the QPSK signal. For example, phase rotation is performed on one symbol of the signal. Here, each symbol represents a plurality of bits. For example, one symbol of one QPSK signal is represented by two bits.

  As described in the “865 patent”, the system 100 is convenient for extracting single channel data, but is complicated when extracting multiple channels. Although the “865 patent” does not specifically use the system 100 for interference suppression, the system 100 is inefficient for such a plurality of uses, and the main reason is that there are a plurality of detection target channels. Because. For example, Walsh code 110 is specifically selected for one particular channel. To detect more channels, more Walsh codes need to be implemented. The reason why the addition of a plurality of Walsh codes increases the number of filters, accumulators, and multipliers in the system is that a plurality of Walsh codes are applied before the phase rotation.

  FIG. 2 shows one block diagram of a system 200 according to one embodiment of the invention. System 200 is based on a filtered and unfiltered representation of one I component of a QPSK signal, and a filtered and unfiltered representation of the Q component of the signal, And includes a single phase compensator 201 that is configured to adjust the phase of the signal. For example, phase compensator 201 receives both a filtered and unfiltered representation of the I component. Phase compensator 201 also receives both a filtered representation of the Q component and an unfiltered representation. These I and Q components may be multiple data streams that are the result of QPSK despreading. The phase compensator 201 can adjust the phase of the I component and the Q component by multiplying various combinations of these multiple inputs. When adjusting the phase, the phase compensator 201 may obtain one angle offset amount in the phase based on a plurality of products of the plurality of multiplications. Therefore, the phase compensator 201 can compensate the signal such that a plurality of unintentional phase rotations are eliminated. One such compensation may correspond to returning the phase to the desired one quadrant by one symbol rotation. Since phase adjustment can be performed after despreading (for example, without combining a plurality of Walsh codes as shown in FIG. 1), phase adjustment is performed in units of one chip level. A chip is a basic unit of information and is well known to those skilled in the art.

  The system 200 also includes a detector 202 that is communicatively coupled to the phase compensator 201 via a link 203. For example, link 203 may represent one or more outputs of phase compensator 201 that forward the I and Q outputs phase adjusted by phase compensator 201 to detector 202. The detector 202 is configured to determine one magnitude of the energy of one or more channels by combining the I and Q components into one or more code sequences. For example, detector 202 may combine one Walsh code sequence with the phase adjusted I and Q components from phase compensator 201. In this way, the I and Q components that are phase adjusted (eg, rotated) and encoded by a single code sequence can be provided by the detector 202, so that additional processing allows other multiple components in the signal. A plurality of energy magnitudes of the channels can be obtained.

  System 200 is not only useful for data extraction, but is also particularly useful in multiple interference suppression systems. For example, by adding a plurality of code sequences, the magnitude of the channel energy of each of the plurality of channels can be obtained.

  Unlike the prior art system 100 of FIG. 1, multiple code sequences may be added to the system 200 without making the system too complex. In this embodiment, after the phase adjustment, a plurality of code sequences are combined with the phase-adjusted I component and Q component. As a result, the number of multiplications performed by the phase compensator 201 is reduced as the I data stream and the Q data stream.

  FIG. 3 shows one block diagram of one system 300 in another embodiment of the invention. The system 300 in this embodiment advantageously uses one spread spectrum receiver that uses one chip-by-chip multiplication to decompose the I and Q components of the original data.

  System 300 includes a QPSK despreader 301. The despreader 301 receives the I component and Q component data streams, and despreads these I and Q streams. After despreading, despreader 301 forwards these data streams to phase compensator 303 directly and through a plurality of filters 302-I and 302-Q. For example, despreader 301 is communicatively coupled to a plurality of filters 302-I and 302-Q. A plurality of filters 302-I and 302-Q filter the despread I component 310 and Q component 311, respectively, and filter the despread I (312) component and Q (313) component, respectively. It is configured to prepare the expression. These filtered expressions approximately follow the following equations:

(Equation 3) I _Filtered = K · cos φ, where K · cos φ is a mathematical representation of the filtered I component.

(Equation 4) Q _Filtered = K · sinφ, where K · sinφ is a mathematical expression of the filtered Q component. In general, the coefficient K indicates one scale factor that represents the power of the reference signal (ie, the pilot signal). In one embodiment that uses one phase-locked loop (“PLL”) or one unit-scale phase reference, K may be considered unity, ie one. The angle φ can be considered as one residual carrier phase that represents one deviation angle (eg, unintentional phase rotation) from the transmitted values. For example, computational errors, such as errors that occur during down-conversion and / or demodulation, can cause multiple energy levels to “leak” from other channels of the signal, causing angular shifts. Thus, this angular deviation can represent one change from multiple expected energy levels of multiple channels. Those skilled in the art should readily understand multiple developments of these multiple mathematical expressions. The filters 302-I and 302-Q may be digital filters that digitally filter a plurality of samples of the I data stream and the Q data stream, respectively, in units of samples.

  The phase compensator 303 generates an I data stream 314 and a Q data stream 315 that are respectively phase adjusted. Phase compensator 303 then forwards the phase adjusted I data stream 314 and Q data stream 315 to multiplier 309-I and multiplier 309-Q, respectively. Multiplier 309 -I and multiplier 309 -Q then combine the one or more Walsh codes generated by Walsh sequence generator 304 into I data stream 314 and Q data stream 315. For example, multiple Walsh codes may be communicatively coupled to multiplier 309-I and multiplier 309-Q such that multiple channels are isolated and / or extracted.

  The combined I component 316 and Q component 317 are then transferred from the multiplier 309-I and multiplier 309-Q to the accumulator 305, respectively. In response, accumulator 305 generates symbol level data by accumulating or summing the combined component 316 and component 317 over one symbol time. This symbol level data is ultimately processed by the processor 306, which determines the magnitude of each energy level of the various channels in the signal and / or multiple phase offsets in the signal. Also good.

  Although described with respect to one specific level of detail of the system 300, embodiments of the system 300 are not limited to this description and are limited only by the scope of the appended claims.

  For example, in one embodiment used for single channel data recovery, a single Walsh generator may be used.

  FIG. 4 shows a block diagram of one phase compensator 400 in one embodiment of the present invention. The phase compensator 400 can be used in a manner similar to the phase compensator 303 of FIG. 3 to adjust the phase of one signal. In this exemplary embodiment, multiple latches 402-408 are used to latch the filtered and unfiltered representations of the I and Q data streams, respectively, and each latch 402-408. Latches almost simultaneously with the reception of the same latch enable signal LATCH ENABLE.

The I data stream and the Q data stream are latched by a plurality of multipliers 410 to 416 to generate various products of a plurality of input signals. For example, the multiplier 410 generates one product (I _Unfiltered · K · sin φ), the multiplier 412 generates one product (I _Unfiltered · K · cos φ), and the multiplier 414 generates one product (Q _Unfiltered · Q K · cos φ) and the multiplier 416 generates one product (Q _Unfiltered · K · sin φ). These four products are then latched into subtractor 426 and adder 428 via a plurality of latches 418-424. Subtractor 426 and adder 428 combine these multiple products to generate phase adjusted I and Q components according to the following equations:
(Equation 5) I = (I _Unfiltered · K · cos φ) + (Q _Unfiltered · K · sin φ)
(Equation 6) Q = (Q _Unfiltered · K · cos φ) − (I _Unfiltered · K · sin φ)

  These phase adjusted I and Q components represent the I component 314 and the Q component 315 generated by the phase adjuster 303 of FIG. Thus, these phase adjusted I and Q components do not have multiple PN codes or residual carrier phases. These I component and Q component are generally used to determine the size of each of a plurality of channels. Such multiple determinations may be made by a single processor, such as processor 306 of FIG.

  Although represented as multiple multipliers, multiple latches, multiple subtractors, and multiple adders, those skilled in the art can use other multiple combinations of multiple elements within the scope of the present invention. Should be easily recognized. For example, a single multiplier may be used instead of four multipliers. In this case, a plurality of inputs to such a multiplier may be multiplexed.

  FIG. 5 shows one block diagram of one system 500 in another embodiment of the invention. In this embodiment, system 500 uses one fast Walsh transform 501 in place of multiplier 309-I, multiplier 309-Q, and Walsh sequence generator 304 of FIG.

  The phase adjustment is performed by the phase compensator 303 as in FIG. However, in this embodiment, since the high-speed Walsh transform 501 can take in a plurality of Walsh codes, the multiplication processing performed by the multipliers 309-I and 309-Q can be accelerated by one matrix calculation. .

  The use of one such Walsh transform 501 is disclosed in US 60 / 418,187 provisional application (filed Oct. 15, 2002).

  FIG. 6 shows a flowchart of an example of a method embodiment 600 of the present invention. In this embodiment, the phase of one signal is adjusted using various products of the first and second components of the signal, such as the I and Q components of one QPSK signal.

  The phase adjustment of each component is performed in the element 601 and the element 611. A plurality of features for preparing such phase adjusted components are added to the element 601 and the element 611, respectively. In the step of generating a phase adjusted first component (ie, element 601), at element 602, one unfiltered first component of the signal is multiplied by one filtered first component of the signal. It is done. Also, at element 603, one unfiltered signal second component is multiplied by the filtered signal second component. Next, at element 604, the respective products of element 602 and element 603 are combined to produce one first component that is phase adjusted. One step of performing such a combination may include adding a plurality of products to generate a single component as shown in Equation 5 of FIG.

  Similarly, element 611 multiplies the unfiltered second component of the signal by element 612 by the filtered first component, and element 613 filters the signal by an unfiltered first component. Multiply the second component.

  Next, at element 614, these two products are combined to produce a single phase-adjusted second component. From the two phase adjusted components prepared in element 604 and element 614, one phase adjusted signal is generated. For example, if the first component represents one I component of the QPSK signal and the second component represents one I component of the QPSK signal, one signal whose phase can be determined by the phase-adjusted I and Q components Is prepared, whereby one original pilot signal is phased to one desired quadrant.

  In one embodiment, the method includes one element that combines one or more code sequences with the phase adjusted I and Q components. Such a plurality of code sequences may include a plurality of Walsh codes used to detect one or more channels in the signal.

  Such channel detection is conveniently used in one CDMA mobile phone system, particularly in one subscriber unit such as a mobile phone.

  In a preferred embodiment, multiple elements that perform multiplication are executed synchronously. However, the present invention is not limited to the execution order of this multiplication. For example, the multiplication may be performed by one time multiplexing method. In this case, a plurality of products are stored until the multiplication is completed. Furthermore, in this preferred embodiment, multiplication is performed for each sample. However, in other embodiments, registration of one predetermined length of data may be included so that phase adjustments of different sections of the first component and the second component are performed simultaneously.

  These embodiments are not limited to the CDMA2000 scheme or other CDMA schemes, and can be used in any system that uses PSK. For example, the above embodiments are suitable for multiple applications of PSK, such as channel estimation for interference suppression, data testing to determine the presence of multiple Walsh codes, and / or simultaneous demodulation of multiple channels of data. Can be used.

  Needless to say, the above embodiments of the present invention can be realized in various ways. For example, the above embodiments may be realized by software, firmware, hardware, or any combination thereof. Those skilled in the art are familiar with software, firmware, hardware, and various combinations thereof. Thus, those skilled in the art should readily recognize that such multiple implementations are a matter of design choice and should not be limited to any particular implementation.

  Although the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered exemplary and not restrictive. Accordingly, it is understood that only the preferred embodiment and some variations thereof are shown and described, and that all changes and modifications that come within the spirit of the invention are to be protected. It should be.

1 shows a block diagram of one prior art system. 1 shows one block diagram of one system in one embodiment of the present invention. FIG. FIG. 4 shows a block diagram of a system in another embodiment of the invention. 1 shows a block diagram of one phase compensator in an embodiment of the invention. FIG. FIG. 4 shows a block diagram of a system in another embodiment of the invention. Fig. 4 shows a flow chart of an example of an embodiment of a method of the present invention.

Explanation of symbols

100 prior art system 102 QPSK despreader 104-I filter 104-Q filter 200 system 201 phase compensator 202 detector according to one embodiment of the invention

Claims (26)

In one system,
Based on the filtered and unfiltered representations of one first component of a signal, and on the filtered and unfiltered representations of one second component of the signal Based on one phase compensator configured to adjust the phase of the signal,
Communicatively coupled to one or more outputs of the phase compensator and configured to combine one code sequence with the first and second components to determine one magnitude of energy of one channel. And a detector. The system of claim 1, wherein the first component is a single in-phase component approximately according to the following equation:
I = (I _Unfiltered · K · cos φ) + (Q _Unfiltered · K · sin φ)
Where I _Unfiltered is one unfiltered representation of the in-phase component, K · cos φ is the filtered representation of the in-phase component, and Q _Unfiltered is _unfiltered of the quadrature component. K · sinφ is one filtered representation of the quadrature component. The system of claim 1, wherein the second component is a single quadrature component that approximately conforms to:
Q = (Q _Unfiltered · K · cos φ) − (I _Unfiltered · K · sin φ)
Where I _Unfiltered is the _unfiltered representation of the in-phase component, K · cos φ is the filtered representation of the in-phase component, and Q _Unfiltered is the _{unfiltered 1} of the quadrature component. K · sin φ is the filtered representation of the orthogonal component. The system of claim 1, wherein the code sequence is one Walsh code sequence. The system of claim 1, wherein the detector includes one or more code sequence generators each configured to generate a unique code sequence. 6. The system of claim 5, wherein the detector is
Communicatively coupled to the plurality of code sequence generators and configured to combine one or more of the plurality of code sequences with the first component to generate a combined first component 1 Two first multipliers;
1 communicatively coupled to the plurality of code sequence generators and configured to combine one or more of the plurality of code sequences with the second component to generate one combined second component. And a second multiplier. 7. The system of claim 6, wherein the detector is further configured to sum the combined first components over a symbol time to produce a first symbol level data. A system further comprising an accumulator communicatively coupled to the first and second multipliers for summing the second component over one symbol time to generate one second symbol level data. The system of claim 1, wherein the detector combines a plurality of Walsh code sequences with the first and second components to determine a plurality of magnitudes of energy of one or more unique channels. A system comprising one fast Walsh transform element configured in In one method of adjusting the phase of a signal, generating a first component that is phase adjusted of the signal, comprising:
Multiplying one unfiltered first component of the signal by one filtered first component of the signal to provide a first product;
In response to a step of preparing a second product by multiplying one second component of the signal that has not been filtered by one second component of the signal that has been filtered, the first component Generating a phase-adjusted first component by combining a second product and a second product; and generating a phase-adjusted first component comprising: Generating two components comprising:
Multiplying the unfiltered second component by the filtered first component to produce a third product;
Multiplying the unfiltered first component by the filtered second component to produce a fourth product;
In response to a multiplying step, combining the third and fourth products to generate the phase adjusted one second component, and generating the phase adjusted second component, And adjusting the phase of the signal by generating the phase adjusted first component and generating the phase adjusted second component. 10. The method of claim 9, wherein combining the first and second products includes adding the first product to the second product. 11. The method of claim 10, wherein the step of adding includes providing the phase adjusted second component having substantially the following form.
I = (I _Unfiltered · K · cos φ) + (Q _Unfiltered · K · sin φ)
Where I _Unfiltered is one unfiltered representation of the in-phase component, K · cos φ is the filtered representation of the in-phase component, and Q _Unfiltered is _unfiltered of the quadrature component. K · sinφ is one filtered representation of the quadrature component. 10. The method of claim 9, wherein combining the third and fourth products includes subtracting the fourth product from the third product. 13. A method according to claim 12, wherein the subtracting step comprises providing the phase adjusted second component having substantially the following form.
Q = (Q _Unfiltered · K · cos φ) − (I _Unfiltered · K · sin φ)
Where I _Unfiltered is the _unfiltered representation of the in-phase component, K · cos φ is the filtered representation of the in-phase component, and Q _Unfiltered is the _{unfiltered 1} of the quadrature component. K · sin φ is the filtered representation of the orthogonal component. The method of claim 9, wherein generating the phase adjusted first component comprises:
Latching the first and second products into one summation element substantially simultaneously. 10. The method of claim 9, wherein generating the phase adjusted second component comprises
Latching the third and fourth products one subtractive element substantially simultaneously. A system for adjusting the phase of the signal of
Means for generating one first component phase-adjusted of the signal,
Means for preparing one first product by multiplying one unfiltered first component of the signal by one filtered first component of the signal;
Means for preparing one second product by multiplying one second component unfiltered of the signal by one second component filtered of the signal;
Means for generating said phase adjusted first component in response to a multiplying step, comprising: combining said first and second products to generate said phase adjusted one first component;
A means for generating one second component of which the phase of the signal is adjusted, and preparing a third product by multiplying the unfiltered second component by the filtered first component. Means,
Means for multiplying the unfiltered first component by the filtered second component to provide one fourth product;
Means for generating said phase adjusted second component in response to multiplication, comprising: combining said third and fourth products to generate said phase adjusted one second component; A system for adjusting the phase of the signal by means for generating the phase adjusted first component and means for generating the phase adjusted second component. 17. The system of claim 16, wherein the means for combining the first and second products includes means for adding the first product to the second product. 18. The system according to claim 17, wherein the adding means includes means for preparing the phase adjusted second component having substantially the following form.
I = (I _Unfiltered · K · cos φ) + (Q _Unfiltered · K · sin φ)
Where I _Unfiltered is one unfiltered representation of the in-phase component, K · cos φ is the filtered representation of the in-phase component, and Q _Unfiltered is _unfiltered of the quadrature component. K · sinφ is one filtered representation of the quadrature component. 17. The system of claim 16, wherein the means for combining the third and fourth products includes means for subtracting the fourth product from the third product. 20. The system of claim 19, wherein the subtracting means includes means for preparing the phase adjusted second component having substantially the following form.
Q = (Q _Unfiltered · K · cos φ) − (I _Unfiltered · K · sin φ)
Where I _Unfiltered is the _unfiltered representation of the in-phase component, K · cos φ is the filtered representation of the in-phase component, and Q _Unfiltered is one _unfiltered representation of the quadrature component. K · sin φ is the filtered representation of the orthogonal component. 17. The system of claim 16, wherein the means for generating the phase adjusted first component includes means for latching the first and second products into one summation element substantially simultaneously. 17. The system of claim 16, wherein the means for generating the phase adjusted first component includes means for latching the third and fourth products into one subtraction element substantially simultaneously. In one method of processing one signal,
Generating one phase-adjusted first component by adjusting the phase of one first component of the signal by a plurality of multiplications, wherein the first component filter is used as a plurality of operands of the plurality of multiplications; Including a processed representation and an unfiltered representation, and including a filtered representation and an unfiltered representation of one second component of the signal;
Generating a second component that is phase adjusted by adjusting the phase of the second component by a plurality of multiplications, the filtered component of the first component as a plurality of operands of the plurality of multiplications Including a representation and the unfiltered representation, and including the filtered representation and the unfiltered representation of the second component;
Combining the phase-adjusted first component and the phase-adjusted second component with one code sequence to determine one magnitude of energy of one channel. 24. The method of claim 23, wherein the step of adjusting the phase of the first component has substantially the following form by adding a plurality of products generated by the plurality of multiplications. To generate the first component.
I = (I _Unfiltered · K · cos φ) − (Q _Unfiltered · K · sin φ)
Where I _Unfiltered is an _unfiltered representation of the in-phase component, K · cos φ is the filtered representation of the in-phase component, and Q _Unfiltered is an _{unfiltered 1} of the quadrature component. K · sin φ is the filtered representation of the orthogonal component. 24. The method of claim 23, wherein the step of adjusting the phase of the second component has substantially the following form by adding a plurality of products generated by the plurality of multiplications. Of generating the second component.
Q = (Q _Unfiltered · K · cos φ) − (I _Unfiltered · K · sin φ)
Where I _Unfiltered is the _unfiltered representation of the in-phase component, K · cos φ is the filtered representation of the in-phase component, and Q _Unfiltered is one _unfiltered representation of the quadrature component. K · sin φ is the filtered representation of the orthogonal component. In one system,
One despreader configured to despread the first and second components of one signal;
A filtered representation of the first component and a filtered one of the second component by communicatively coupled to the despreader and filtering the first and second components of the signal. One filter bank configured to generate two representations;
Coupled to the despreader and the filter bank, based on the filtered representation of each of the first and second components, and on the unfiltered representation of each of the first and second components. And a phase compensator configured to adjust the phase of the signal.

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