JP2006342364A - Method for surface-treating carrier member for machining semiconductor, and surface-treated article - Google Patents

Method for surface-treating carrier member for machining semiconductor, and surface-treated article Download PDF

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JP2006342364A
JP2006342364A JP2005166315A JP2005166315A JP2006342364A JP 2006342364 A JP2006342364 A JP 2006342364A JP 2005166315 A JP2005166315 A JP 2005166315A JP 2005166315 A JP2005166315 A JP 2005166315A JP 2006342364 A JP2006342364 A JP 2006342364A
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carbon
carrier member
semiconductor
semiconductor processing
ion implantation
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JP4920202B2 (en
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Yutaka Hibino
豊 日比野
Ryuichiro Kuboshima
隆一郎 窪島
Mikio Kanesada
幹雄 兼定
Akira Yoshida
明 吉田
Masahito Hayamizu
将人 速水
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SpeedFam Co Ltd
Plasma Ion Assist Co Ltd
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SpeedFam Co Ltd
Plasma Ion Assist Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an article which is a machining carrier to be used for extremely thinning and extremely smoothing a semiconductor made from a material such as silicon, gallium nitride and gallium phosphorus, and has a high-quality DLC film having a gradient structure caused by carbon ion implantation coated thereon so as to enhance its quality. <P>SOLUTION: A carrier member for machining a semiconductor has a DLC film formed thereon after the base material has been implanted with carbon ions through a plasma-based ion implantation/film-forming process comprising the steps of: introducing a gas of a hydrocarbon compound having at least one carbon atom into the vacuum atmosphere in the apparatus; generating plasma by supplying a high-frequency power to the apparatus; and applying a high-frequency pulse voltage onto the article to be treated. The surface treatment method includes the above process. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、シリコンウエハー、ガリウムリン、ガリウム砒素、窒化ガリウム等の化合物半導体等の表面を超平滑化するための研磨用半導体加工キャリア部材の耐摩耗性、耐食性、耐汚染性を改善した表面処理方法及びその物品に関するものである。   The present invention provides a surface treatment with improved wear resistance, corrosion resistance, and contamination resistance of a polishing semiconductor processing carrier member for ultra-smoothing the surface of a compound semiconductor such as a silicon wafer, gallium phosphide, gallium arsenide, and gallium nitride. It relates to a method and its articles.

パソコン、携帯電話、液晶デジタルテレビ、デジタルカメラ、カーナビゲーション機器、ブロードバンド情報端末に代表される高速大容量のデジタル情報処理に、シリコンウエハー等の高精度デバイスが利用されている。その材料ウエハーは益々薄くなってゆく傾向にあり、従来以上の高精度超平坦面が要求されてきている。   High-precision devices such as silicon wafers are used for high-speed and large-capacity digital information processing represented by personal computers, mobile phones, liquid crystal digital televisions, digital cameras, car navigation devices, and broadband information terminals. The material wafer tends to become thinner and thinner, and there is a demand for an ultra-flat surface with higher precision than before.

極薄ウエハーの研磨加工方法は、多くはラッピング加工やポリシング加工方法が採られる。これらはラフに切断された加工物を、所定の円形の穴部を設けた加工キャリアにセットした後、スラリーと呼ばれる研磨液を定量供給しながら回転させて研磨するラッピング加工、ダイヤモンド微粒子を鋳物、銅、錫等の比較的柔らかい金属に埋め込んだ定盤状に押し、回転研磨するハードポリシング加工、更に、布やウレタンスポンジなどの柔らかい材料に微粉砥粒を含んだ研磨液(化学作用のある液も含む)を定量供給しながら回転させ、鏡面研磨するソフトポリシング加工方法がある。 As a method for polishing an ultra-thin wafer, a lapping process or a polishing process is often employed. These are a lapping process in which a rough cut workpiece is set on a processing carrier provided with a predetermined circular hole, and then rotated and polished while quantitatively supplying a polishing liquid called slurry, and diamond fine particles are cast, Hard polishing process that pushes and rotates and polishes into a platen embedded in a relatively soft metal such as copper or tin, and also a polishing liquid (chemically active liquid) containing fine abrasive grains in a soft material such as cloth or urethane sponge There is a soft polishing processing method in which a mirror polishing is performed while rotating while supplying a fixed amount.

これら半導体ウエハーの研磨加工には、装置振動を極力抑制することや駆動伝達部よる振動減衰性に優れた鋳造筐体など、各種研磨装置の加工精度を極限まで向上させることが必要であるが、それ以上にウエハーを固定して回転研磨するためのキャリア治具(以下半導体加工キャリア部材と言う)の加工精度や耐摩耗性、耐食性、耐汚染性がますます必要とされるようになっている。 In polishing these semiconductor wafers, it is necessary to improve the processing accuracy of various polishing devices to the utmost, such as a cast housing that suppresses vibrations of the device as much as possible and has excellent vibration damping by the drive transmission unit. In addition, the processing accuracy, wear resistance, corrosion resistance, and contamination resistance of the carrier jig (hereinafter referred to as semiconductor processing carrier material) for fixing and rotating the wafer is increasingly required. .

現在の半導体加工キャリア部材はステンレス鋼、チタン合金、ガラスエポキシ樹脂板など、さまざまな基材が使用されているが、シリコン単結晶板を研磨中において、基材からの金属の溶出、基材自身の摩擦・摩耗による損傷、回転歯車の摩耗損傷、金属の腐食など、キャリア部材の損傷は極薄ウエハーの研磨加工工程に重大なる影響を及ぼす。このため半導体加工キャリア部材を数百時間毎に交換して高品質化に対応して使用しているのが現状である。 Various semiconductor substrates such as stainless steel, titanium alloys, and glass epoxy resin plates are used for current semiconductor processing carrier materials. During the polishing of silicon single crystal plates, metal elution from the substrate, the substrate itself Damage to the carrier member, such as damage due to friction and wear, wear of the rotating gear, and corrosion of the metal, has a significant effect on the polishing process of the ultra-thin wafer. For this reason, the present situation is that the semiconductor processing carrier member is replaced every several hundred hours and used for high quality.

従来から金属材料表面やセラミックス材料表面に滑り性を付与するため、ダイヤモンドライクカーボン膜(以下DLC膜と言う)を成膜する方法が提案されている。機械部品や接触部材と摺動する部材表面に、メタンガス、アセチレンガス等の原料を用いてプラズマCVD法で炭素膜を形成する方法は既に実用化されており、ビデオテープキャプスタンローラー、小型軸受け、湯水切替え弁など優れた性能を発揮している。 Conventionally, a method of forming a diamond-like carbon film (hereinafter referred to as a DLC film) has been proposed in order to impart slipperiness to the metal material surface or the ceramic material surface. A method of forming a carbon film by a plasma CVD method using raw materials such as methane gas and acetylene gas on the surface of a member that slides with a machine part or a contact member has already been put into practical use, such as a video tape capstan roller, a small bearing, Excellent performance such as hot / cold switching valve.

下記公報に記載されている特許文献を参照する。
特開2000−96233号公報にプラズマCVD法において、プラズマ生成方法や印加電圧、ガス組成などを工夫して、出来るだけ低温加工が可能なプラズマCVD装置を開発して、セラミックスやプラスチック成形品表面にもDLC膜を成膜する方法が提案され、さらにカメラ用オーリングや自動車用ワイパーゴムなどに利用することが提案されている。しかしながらこれらのプラズマCVD法は、導入したガスを高周波でプラズマ化させて、活性化したカーボン元素を部品表面で化学的に反応し堆積させる手法であるため、部材表面とDLC膜層との化学的結合力が弱く密着性に乏しいことがある。
Reference is made to patent documents described in the following publications.
In the plasma CVD method disclosed in JP-A-2000-96233, the plasma generation method, applied voltage, gas composition, etc. have been devised to develop a plasma CVD apparatus capable of processing at as low a temperature as possible. In addition, a method for forming a DLC film has been proposed, and further, it has been proposed to use it for camera O-rings, automobile wiper rubber, and the like. However, these plasma CVD methods are methods in which the introduced gas is turned into plasma at a high frequency, and the activated carbon element is chemically reacted and deposited on the surface of the component. Therefore, the chemical reaction between the member surface and the DLC film layer is performed. Bonding strength is weak and adhesion may be poor.

特にプラスチック材料やゴム等の熱に弱い材料へ加工するためには、プラズマ密度を低く(弱く)するため、高周波を変調してソフトなプラズマを生成して成膜する必要がある。またプラズマ中のカーボンイオンを引きつけるためには、数十V〜数百Vのバイアス電圧を印加するのが一般的であるが、この程度の電圧ではカーボン元素は基材表層部分に付着する程度であるため、基材内部(数十nm以上)までイオン注入することは出来ない。このことからプラズマCVD法では必ず基材との密着性を上げるために下地処理層としてシリコン単体、シリコン酸化物、シリコン窒化物、シリコン炭化物、四塩化チタン、ペンタエトキシチタニウム、テトライソプロキシチタニウム等を導入して、ケイ素あるいはチタンとカーボンとの化合物の中間層を形成して基材との密着性を向上させることが必要である。 In particular, in order to process a heat-sensitive material such as a plastic material or rubber, it is necessary to generate a soft plasma by modulating a high frequency in order to reduce (weaken) the plasma density. In order to attract carbon ions in the plasma, it is common to apply a bias voltage of several tens of volts to several hundreds of volts. However, with such a voltage, the carbon element is attached to the surface layer portion of the substrate. Therefore, it is not possible to implant ions into the base material (several tens of nm or more). Therefore, in the plasma CVD method, in order to improve the adhesion to the base material, silicon as a base treatment layer, silicon oxide, silicon nitride, silicon carbide, titanium tetrachloride, pentaethoxytitanium, tetraisoproxytitanium, etc. are used. It is necessary to improve the adhesion to the substrate by introducing an intermediate layer of a compound of silicon or titanium and carbon.

またカーボン固体ターゲットをスパッタリングして成膜するPVD法(物理的蒸着法)などにおいても、密着性を向上させるため金属やセラミックスの基材温度を300〜500℃加熱してDLC膜を形成したり、下地処理としてカーボンとなじみがよいケイ素やクロム材料を蒸着して成膜したりする必要があった。またプラズマ中のカーボンイオンを引きつけるために数十V〜数百Vの直流あるいは交流のバイアス電圧を印加するのが一般的であるが、この電圧は成膜エネルギーとしての利用であり、基材との密着性を大幅に向上させることは出来ない。 Also, in the PVD method (physical vapor deposition method) that forms a film by sputtering a carbon solid target, a DLC film is formed by heating the substrate temperature of metal or ceramic at 300 to 500 ° C. in order to improve adhesion. In addition, it was necessary to form a film by depositing silicon or chromium material, which is compatible with carbon, as a base treatment. Further, in order to attract carbon ions in plasma, it is common to apply a DC or AC bias voltage of several tens of volts to several hundreds of volts. This voltage is used as film forming energy, It is not possible to greatly improve the adhesion.

さらに下地を均一に付けるためには特別な反応機構の装置を設ける必要があり、膜厚の均一性を確保するためには回転機構は不可欠であり、大きな複雑な物品では対応できず、小型、一定形状の製品にしか対応できなかった。特に本提案で加工する半導体加工キャリア部材は直径500〜800mmに及ぶ大面積で0.5〜0.8mm厚の高精度円盤からなり、この表面に0.1μm制度でDLC膜を制御良く均一に成膜する必要がある。 Furthermore, it is necessary to provide a device with a special reaction mechanism in order to uniformly apply the base, and a rotation mechanism is indispensable in order to ensure the uniformity of the film thickness. It could only deal with products with a certain shape. In particular, the semiconductor processing carrier member to be processed in this proposal consists of a high-precision disk having a large area ranging from 500 to 800 mm in diameter and 0.5 to 0.8 mm in thickness, and the DLC film is uniformly controlled with a 0.1 μm system on this surface. It is necessary to form a film.

上記のプラズマCVD法では、大面積であると板材が歪み、加工精度が得られず、またPVD法では、回転機構を設けてDLC成膜を行っても、膜厚の均一化はできず1μm以上の厚さばらつきが生じた。さらに両者共に成膜加工プロセスが複雑となり、加工コストが上昇した。   In the above plasma CVD method, if the area is large, the plate material is distorted and processing accuracy cannot be obtained. In the PVD method, even if a DLC film is formed by providing a rotation mechanism, the film thickness cannot be made uniform and 1 μm. The above thickness variation occurred. Furthermore, the film forming process has become complicated in both cases, and the processing cost has increased.

上述した技術では、半導体加工キャリア部材へのDLC均一成膜は困難であり、複雑な回転機構など付けることなく高精度で安価で均一なDLC形成が可能なプロセスが望まれていた。 With the above-described technology, it is difficult to uniformly form a DLC film on a semiconductor processing carrier member, and a process capable of forming a DLC with high accuracy, low cost, and uniformity without requiring a complicated rotation mechanism has been desired.

本発明は直径500〜800mmに及ぶ大面積で0.5〜0.8mm厚の高精度円盤からなる半導体加工キャリア部材表面層を、プラズマベースのイオン注入技術を用いて表面改質して、従来にない機能性DLC膜を表層部に形成し、物理的成膜プロセス(PVD)や化学的成膜プロセス(CVD)では出来ない、新規なDLC成膜プロセスと高品質なDLCコーティングした半導体加工キャリア部材を提供するものである。 In the present invention, a surface layer of a semiconductor processing carrier member composed of a high-precision disk having a large area ranging from 500 to 800 mm in diameter and 0.5 to 0.8 mm in thickness is surface-modified using a plasma-based ion implantation technique. A new DLC film formation process and high-quality DLC-coated semiconductor processing carrier that cannot be formed by physical film formation process (PVD) or chemical film formation process (CVD). A member is provided.

従来のダイヤモンド状炭素膜すなわちDLC膜は、高硬度で耐摩耗性、電気絶縁性、親水性等に優れ、成膜方法や使用する原料により、内蔵する水素含有量が異なり様々な硬さの炭素膜が得られた。特にプラズマCVD法、スパッタリング法、イオンプレーティング法などは、高硬度で耐摩耗性に優れていたが、基材との密着性に乏しく適さないことから、本発明はプラズマベースイオン注入・成膜法を各種金属材料、セラミックス材料、プラスチック成形材料等の複合物である半導体加工キャリア部材表面に適用して、耐摩耗性、耐食性、耐汚染性を改善した表面改質技術として提供するものである。   A conventional diamond-like carbon film, or DLC film, has high hardness, excellent wear resistance, electrical insulation, hydrophilicity, etc., and the carbon content varies depending on the film formation method and raw materials used, and has various hardness. A membrane was obtained. In particular, the plasma CVD method, the sputtering method, the ion plating method, etc. have high hardness and excellent wear resistance, but they are not suitable because they have poor adhesion to the base material. The method is applied to the surface of semiconductor processing carrier members that are composites of various metal materials, ceramic materials, plastic molding materials, etc., and is provided as a surface modification technology with improved wear resistance, corrosion resistance, and contamination resistance. .

本発明は、プラズマベースイオン注入・成膜法を用いて、半導体加工キャリア部材(基材)の周辺に外部アンテナによるRFプラズマあるいは自己バイアス電圧によるプラズマ生成を行い、これに対して数百V〜数十kVの負パルス電圧を印加して、カーボンを含有するイオンを成形品表面に注入することによりカーボンの傾斜層を形成させ、さらに電圧制御しながらカーボンと水素を含有したDLC膜を形成させることによって、上記の課題の解決を実現し目的を達成するものである。   The present invention uses plasma-based ion implantation / film formation to generate RF plasma by an external antenna or a self-bias voltage around a semiconductor processing carrier member (base material), and several hundred volts to this. By applying a negative pulse voltage of several tens of kV and injecting ions containing carbon into the surface of the molded product, a carbon gradient layer is formed, and further, a DLC film containing carbon and hydrogen is formed while controlling the voltage. In this way, the above-mentioned problems can be solved and the object can be achieved.

半導体加工キャリア部材は単体材料でなく、多くはステンレス鋼、チタン合金等の金属円盤部分とポリイミド樹脂、ポリアミドイミド樹脂、ポリエーテルエーテルケトン樹脂、ナイロン樹脂等の樹脂歯車部分から構成された部材であったり、ガラス繊維強化エポキシ樹脂、カーボン繊維強化エポキシ樹脂等の円盤部材などが組み合わされた複合部材からなる。このことから金属でもプラスチックスでも成膜出来る条件でDLC成膜する必要がある。 Semiconductor processing carrier members are not a single material, but are mostly members composed of a metal disc part such as stainless steel or titanium alloy and a resin gear part such as polyimide resin, polyamideimide resin, polyetheretherketone resin or nylon resin. Or a composite member in which disk members such as glass fiber reinforced epoxy resin and carbon fiber reinforced epoxy resin are combined. For this reason, it is necessary to form a DLC film under conditions that allow a metal or plastic film to be formed.

具体的には真空チャンバー、真空排気系、ガス供給・処理系、高周波プラズマ源、負の高電圧パルス電源・高圧導入系と冷却系に構成された装置を用いて半導体加工キャリア部材の表面改質をする。金属には電極リード線を接続するのみで給電可能であるが、セラミックス、ゴム、プラスチック等の絶縁物には電圧を印加するための電極を背面あるいは中心部に配置して、高周波プラズマ源に電力を供給することによりガスプラズマを発生させ、被注入物(金属、プラスチックス)周辺に負の高圧パルス電圧を加えると、プラズマ中の電子は排斥され、被注入物の輪郭に沿って周りにイオンシースが形成される。このイオンシースは被注入物の輪郭に沿って覆われ、その後負の電圧をこのイオンシースに印加されるため、イオンのみがあらゆる方向から被注入物に引きつけ加速され、被注入物に狙いとする元素をイオン注入されるものである。 Specifically, surface modification of semiconductor processing carrier members using equipment configured in a vacuum chamber, vacuum exhaust system, gas supply / treatment system, high-frequency plasma source, negative high-voltage pulse power supply / high-pressure introduction system and cooling system do. Power can be supplied by simply connecting an electrode lead wire to a metal, but an insulator for ceramics, rubber, plastic, etc. is provided with an electrode for applying a voltage on the back or in the center to supply power to a high-frequency plasma source. When a negative high voltage pulse voltage is applied around the injection target (metal, plastics) by supplying a gas plasma, electrons in the plasma are expelled, and ions are scattered around the outline of the injection target. A sheath is formed. The ion sheath is covered along the contour of the implant, and then a negative voltage is applied to the ion sheath, so that only ions are attracted and accelerated from all directions to the implant and aim at the implant. Elements are ion-implanted.

本発明では金属およびプラスチックス等の絶縁物に対してもカーボンイオン注入が可能である。従来直流のバイアス電圧を印加して、プラスのイオンが注入されるため、絶縁物では帯電してチャージアップ電荷による絶縁破壊する現象が現れることがあった。本発明の高周波・高電圧の負パルス電圧を印加する方法では、パルスなのでパルス電圧がない時にはプラズマは基材に接近し、基材に帯電した電荷はプラズマ中に放出され、チャージアップは解消される。またパルスの周波数および印加時間等を形状毎に最適化して行うことで絶縁破壊を防止すると共に、チャージアップによる膜の不均一性、成膜速度の低下を防ぐことが可能である。   In the present invention, carbon ions can be implanted into insulators such as metals and plastics. Conventionally, since positive ions are implanted by applying a DC bias voltage, there is a case in which an insulator is charged and causes a breakdown due to a charge-up charge. In the method of applying a high-frequency, high-voltage negative pulse voltage according to the present invention, since the pulse is a pulse, the plasma approaches the base material when there is no pulse voltage, the charge charged on the base material is released into the plasma, and the charge-up is eliminated. The Further, by optimizing the pulse frequency and application time for each shape, it is possible to prevent dielectric breakdown and to prevent film non-uniformity and film formation rate decrease due to charge-up.

下記のとおりである。   It is as follows.

プラズマベースイオン注入・成膜法における特性に及ぼすパラメーターとしては、高周波プラズマ源の周波数、プラズマ増幅電圧、繰返し周波数、パルス数などがあり、さらに高圧誘引パルス電源側のパラメーターとしては印加電圧、カレント電流、繰返しパルス数、パルス幅、ディレータイムなどがあり、またプラズマ生成原料のガス流量、ガス圧力等は影響を及ぼす。これらをコントロールして被注入物の輪郭に沿ってイオンシースを形成し、イオンのみを被注入物である各種金属、セラミックス、プラスチック成形品に対してイオンを注入することにより、耐摩耗性、耐食性、耐汚染性を改善したDLC膜を半導体加工キャリア部材表面に被覆する方法とその被覆物品を提供するものである。 Parameters affecting the characteristics of plasma-based ion implantation and deposition include the frequency of the high-frequency plasma source, plasma amplification voltage, repetition frequency, number of pulses, etc., and parameters on the high-voltage induced pulse power supply side include applied voltage and current current. The number of repetitive pulses, the pulse width, the delay time, etc., and the gas flow rate, gas pressure, etc. of the plasma generation raw material have an effect. By controlling these, an ion sheath is formed along the contour of the injection target, and only ions are injected into various metals, ceramics, and plastic moldings that are the injection target, thereby providing wear resistance and corrosion resistance. The present invention provides a method for coating a surface of a semiconductor processing carrier member with a DLC film having improved contamination resistance and a coated article thereof.

ここで言う炭化水素系ガスは、メタン、アセチレン、ベンゼン、トルエン及びシクロヘキサノン、クロロベンゼン等からなる炭化水素化合物から選択される少なくとも1種類を主成分としたのガスを使用し、真空チャンバー内にガス導入し行い、高周波電圧を印加してガスをプラズマ化することによって、カーボン原子もしくは分子イオンを生成させ、これを加速してイオン注入するのが好ましい。   The hydrocarbon gas used here is a gas mainly composed of at least one selected from hydrocarbon compounds consisting of methane, acetylene, benzene, toluene, cyclohexanone, chlorobenzene, etc., and introduced into the vacuum chamber. Then, it is preferable to generate a carbon atom or a molecular ion by applying a high frequency voltage to turn the gas into a plasma, and accelerating the ion to perform ion implantation.

炭化水素系ガスの選定方法としては、カーボン原子と水素原子の割合によりプラズマ状態が異なり、さらにDLC膜中に水素原子を何パーセント含有させるかによって、ガス種とその混合割合を決定するのが好ましい。メタン、アセチレン、ベンゼン、トルエンガスにおいて、脂肪族系と芳香族系によってカーボンのイオン注入度合いやDLC膜の成膜状態が大きく変化することが知られており、さらに必要に応じて二フッ化炭素、四フッ化炭素、六フッ化炭素、六フッ化硫黄および十フッ化四カーボン等を添加することにより、潤滑性や撥水性などの機能を付加したDLC成膜を行うなど最適なガス系を選定するのが望ましい。   As a method for selecting a hydrocarbon-based gas, the plasma state varies depending on the ratio of carbon atoms and hydrogen atoms, and it is preferable to determine the gas species and the mixing ratio thereof depending on what percentage of hydrogen atoms are contained in the DLC film. . In methane, acetylene, benzene, and toluene gases, it is known that the degree of carbon ion implantation and the state of film formation of the DLC film vary greatly depending on whether aliphatic or aromatic, and carbon difluoride as required. , Carbon tetrafluoride, carbon hexafluoride, sulfur hexafluoride, tetradecafluorocarbon, etc. to add DLC film with functions such as lubricity and water repellency. It is desirable to select.

ガスプラズマを発生させる高周波電力として、周波数が0.2MHzから2.45GHzまでの範囲で、出力が10Wから20kWまでの範囲で、パルス幅1.0μsec以上であることが望ましい。その理由は周波数が0.2MHzより低い周波数では前記ガスのプラズマ分解が充分でなく成膜速度が上がらないからであり、また2.45GHzより大きいとプラズマ生成の安定性や装置コストの上昇を招くためである。高周波出力が10W以下ではプラズマ密度が低くイオン注入は出来ても成膜が出来ないからであり、また20kW以上では電源容量が大きく装置コストの増加を招くためである。さらにパルス幅1.0μsec以下であると実質的なイオン注入時間が短くなり、また絶縁物の場合チャージアップしやすくなるためである。   The high frequency power for generating the gas plasma is desirably a pulse width of 1.0 μsec or more in a frequency range of 0.2 MHz to 2.45 GHz and an output range of 10 W to 20 kW. The reason is that if the frequency is lower than 0.2 MHz, the plasma decomposition of the gas is not sufficient, and the deposition rate does not increase. If the frequency is higher than 2.45 GHz, the stability of plasma generation and the cost of the apparatus increase. Because. This is because if the high-frequency output is 10 W or less, the plasma density is low and film formation cannot be performed even if ion implantation is possible, and if it is 20 kW or more, the power supply capacity is large and the apparatus cost is increased. Further, when the pulse width is 1.0 μsec or less, the substantial ion implantation time is shortened, and in the case of an insulator, it is easy to charge up.

さらに上記のプラズマ生成のみならず高周波パルス印加電源は非常に重要である。従来の質量分離型のイオン注入では、メタン、アセチレン等の市販ガスを使用して、電界により励起させた後カーボンイオンのみを注入することが可能であった。しかしプラズマ方式では、各種基材に負の高電圧をパルス状に印加して、カーボンと結合した分子イオンも不純物として同時に注入される。本願発明者等は、これらの余分なイオンの存在下でもカーボンイオンを十分に注入できる良好なプラズマ条件を種々検討した結果、次の高周波パルス印加条件が好適であることを見出した。 Furthermore, not only the above plasma generation but also a high frequency pulse application power source is very important. In the conventional mass separation type ion implantation, it is possible to inject only carbon ions after being excited by an electric field using a commercially available gas such as methane or acetylene. However, in the plasma method, a negative high voltage is applied to various substrates in a pulsed manner, and molecular ions bonded to carbon are also simultaneously implanted as impurities. The inventors of the present application have found that the following high-frequency pulse application conditions are suitable as a result of various investigations of favorable plasma conditions that can sufficiently inject carbon ions even in the presence of these extra ions.

高周波パルス印加電圧としては、その周波数、パルス幅、印加電圧の最適化が必要である。その理由は周波数が100Hz以下であると一定時間内のイオン注入回数が減少することになりイオン注入効率が低下する。一方5000Hz以上であると高周波パルス電源の高性能化が必要となり装置コストの上昇を招く。パルス幅はイオン注入時のシース幅と大きく関係し、幅が狭いと複雑な形状に沿ってシースが形成され、均一にイオン注入されるが、幅が広いと狭い隙間にはシースが出来なくなりイオン注入量が減少する。このことからパルス幅が1.0μsec以下であると1回のパルスのイオン注入時間が短いことによりイオン注入効率が低下すると共にナノsecオーダーのパルス幅を形成するには高価な高周波電源が必要となり、装置コストがアップする。一方パルス幅が広く1000μsec以上であると成形品周辺に供給されるプラズマ密度が低下して、イオン注入効率が低下するばかりでなくパルス電源の高性能化が必要となり装置コストの上昇を招くことになる。 As the high-frequency pulse applied voltage, it is necessary to optimize the frequency, pulse width, and applied voltage. The reason is that if the frequency is 100 Hz or less, the number of ion implantations within a certain period of time decreases, and the ion implantation efficiency decreases. On the other hand, when the frequency is 5000 Hz or higher, it is necessary to improve the performance of the high-frequency pulse power source, which causes an increase in the device cost. The pulse width is greatly related to the sheath width at the time of ion implantation. If the width is narrow, the sheath is formed along a complicated shape and is uniformly implanted, but if the width is wide, the sheath cannot be formed in the narrow gap. The injection volume is reduced. For this reason, if the pulse width is 1.0 μsec or less, the ion implantation efficiency of one pulse is shortened, so that the ion implantation efficiency is lowered, and an expensive high-frequency power source is required to form a nanosecond order pulse width. The equipment cost increases. On the other hand, when the pulse width is wide and 1000 μsec or more, the plasma density supplied to the periphery of the molded product is lowered, and not only the ion implantation efficiency is lowered, but also high performance of the pulse power source is required, resulting in an increase in apparatus cost. Become.

特に好ましい負パルス電圧は、基材の密着性、耐摩耗性、耐食性付与の観点からは−1.0〜30kVが好ましい。−1.0kV以下であると基材へのイオン注入深さが浅く、基材と炭素膜間の傾斜構造化が得られず密着力の向上に寄与せず、また−30kV以上の高電圧になると基材とDLC膜間の傾斜構造化は進むが、高周波パルス電源が大型化して装置コストの大幅な上昇を招きさらに絶縁体の場合には基材表面におけるチャージアップによる放電、発熱によるプラスチック成形品のひずみ発生が顕著になり30kV以上は好ましくない。 A particularly preferable negative pulse voltage is preferably -1.0 to 30 kV from the viewpoint of adhesion of the substrate, wear resistance, and corrosion resistance. The ion implantation depth to the substrate is shallow when it is −1.0 kV or less, the inclined structure between the substrate and the carbon film is not obtained, and it does not contribute to the improvement of the adhesion, and the high voltage is −30 kV or more. In this case, the inclined structure between the base material and the DLC film will progress, but the high-frequency pulse power supply will increase in size, leading to a significant increase in equipment cost. Generation of distortion of the product becomes remarkable, and 30 kV or more is not preferable.

各種基材表面へのイオン注入時間は制約されるものではないが30〜120分であることが好ましい。より好ましくは生産性の観点から短時間処理であるが、半導体加工キャリア部材のプラスチック成形部分ではカーボン元素の注入により表面層が脆くなり、密着性を低下させることもあり、材料成分によってイオン注入条件を選定する必要がある。   Although the ion implantation time to the surface of various base materials is not limited, it is preferably 30 to 120 minutes. More preferably, it is a short time treatment from the viewpoint of productivity, but in the plastic molding part of the semiconductor processing carrier member, the surface layer becomes brittle due to the carbon element injection, and the adhesion may be lowered. Must be selected.

従来の質量分離によるイオン注入では、注入電流がmA以下で、高エネルギーの場合では数Aのオーダーである。そのため、1E17ions/cm2のイオン注入をするには数時間もかかってしまう。これに対してプラズマベースのイオン注入では、成形品に対して周囲から一度に電流が流入するため、数A〜数十Aの電流が流れ、それにより短時間でのカーボンイオン注入処理が行える。且つ直流によるイオン注入でなくパルスによるイオン注入であるため、絶縁物に対してもチャージアップによる損傷は非常に少ない。   In conventional ion implantation by mass separation, the implantation current is less than mA, and in the case of high energy, it is on the order of several A. Therefore, it takes several hours to perform ion implantation of 1E17 ions / cm 2. On the other hand, in plasma-based ion implantation, a current flows into the molded product from the periphery at a time, and therefore, a current of several A to several tens of A flows, thereby enabling carbon ion implantation processing in a short time. In addition, since the ion implantation is performed not by direct current but by pulse, damage to the insulator due to charge-up is very small.

本発明のカーボンイオン注入法では表層の酸化層を充分突き破るだけのエネルギーでイオン注入されるため、カーボンの傾斜構造を容易に形成することが可能であり、特に化学量論的にカーボンを固溶しにくい非鉄金属にたいして高エネルギーでカーボンイオン注入することにより表面硬度を上げながらDLC膜を形成することが可能であり、またDLC成膜エネルギーを変化させてDLC膜の弾性率を押さえながら成膜することが可能である。このことによりDLC膜中の残留応力が低く密着性が得られやすい。このため耐摩耗性が必要とされる半導体加工キャリア部材では2.0〜10μmの範囲のDLC膜を容易に得ることが可能である。 In the carbon ion implantation method of the present invention, ions are implanted with an energy sufficient to sufficiently penetrate the surface oxide layer, so that it is possible to easily form a carbon gradient structure. It is possible to form a DLC film while increasing the surface hardness by implanting carbon ions at a high energy for non-ferrous metals that are difficult to perform, and also by changing the DLC film formation energy and suppressing the elastic modulus of the DLC film. It is possible. As a result, the residual stress in the DLC film is low and adhesion is easily obtained. For this reason, it is possible to easily obtain a DLC film in the range of 2.0 to 10 μm in a semiconductor processed carrier member that requires wear resistance.

また腐食性が強いシリコン研磨溶液を使用してウエハーを研磨する場合には、耐食性を重視したDLC成膜を行う必要がある。従来のグラファイトターゲットを原料として成膜するスパッタリング成膜方法では、ドロプレットと呼ばれるカーボン粒子がDLC膜中に存在したり、微小なピンホールが多数生成して耐食性を大きく損なった。本発明のカーボンイオン注入+DLC成膜法では任意な量だけカーボン注入して、カーボンの傾斜構造を容易に形成することが可能であり、その上層部のカーボン層は炭化水素をプラズマ分解してイオン化したカーボンのみを再結合した非晶質カーボン堆積物であることから、ドロップレットもピンホールもない非常に緻密なDLC成膜が可能である。 In addition, when a wafer is polished using a highly corrosive silicon polishing solution, it is necessary to perform DLC film formation that emphasizes corrosion resistance. In a sputtering film forming method in which a conventional graphite target is used as a raw material, carbon particles called droplets are present in the DLC film or a large number of minute pinholes are generated, resulting in a significant loss of corrosion resistance. In the carbon ion implantation + DLC film forming method of the present invention, an arbitrary amount of carbon can be implanted to easily form a carbon gradient structure, and the upper carbon layer is ionized by plasma decomposition of hydrocarbons. Since it is an amorphous carbon deposit obtained by recombining only the carbon that has been formed, a very dense DLC film without droplets or pinholes can be formed.

本プロセスではDLC成膜時のエネルギーを変化させることによりDLC膜の弾性率を押さえながら成膜することが可能であるため、炭素膜中の残留応力が低く密着性が得られやすい。このため2.0〜10μmの炭素膜を容易に得ることが可能であり、直径500〜800mmに及ぶ大面積で0.5〜0.8mm厚の高精度円盤からなる半導体加工キャリア部材に対して、在留ひずみが影響することなく、0.5μm以下の精度で均一にDLCを成膜することが可能となり、本プロセスが最適であることが判った。 In this process, since it is possible to form the film while suppressing the elastic modulus of the DLC film by changing the energy at the time of forming the DLC film, the residual stress in the carbon film is low and the adhesion can be easily obtained. For this reason, it is possible to easily obtain a carbon film having a thickness of 2.0 to 10 μm, and for a semiconductor processing carrier member comprising a high-precision disk having a large area ranging from 500 to 800 mm in diameter and a thickness of 0.5 to 0.8 mm. It was found that the DLC film can be uniformly formed with an accuracy of 0.5 μm or less without being affected by the residence strain, and this process was found to be optimal.

本発明のDLC成膜半導体加工キャリア部材では、その非処理物表面よりカーボンが10nm以上イオン注入され、その表層部に硬質なDLC層を少なくとも1.0〜10μm成膜されていることが大きな特徴としている。従来のプラズマCVD法やPVD法などは、プラズマ中のカーボンイオンを引きつけるために数十V〜数百Vの直流あるいは交流のバイアス電圧を印加するのが一般的であるが、この電圧では被処理物表面よりカーボン原子が10nm以上イオン注入されることは無く、基材との密着性向上に寄与することはなかった。 In the DLC film-formed semiconductor processing carrier member of the present invention, carbon is ion-implanted by 10 nm or more from the surface of the non-processed object, and a hard DLC layer is formed at least 1.0 to 10 μm on the surface layer portion. It is said. In the conventional plasma CVD method, PVD method, etc., in order to attract carbon ions in the plasma, it is common to apply a DC voltage or an AC bias voltage of several tens to several hundreds V. Carbon atoms were not ion-implanted by 10 nm or more from the surface of the object, and it did not contribute to improving the adhesion to the substrate.

高周波パルス電圧やパルス幅、周波数、印荷時間、処理温度等を種々変化させて評価した結果、被処理物表面から、より深くカーボン原子が注入されていることが密着性向上に寄与することを見出した。実験の結果少なくとも10nm以上イオン注入されていることが好ましく、これより浅いと密着性への寄与率が低下することが判った。この理由は、成膜される炭素膜の残留応力が表層より数十原子層では応力緩和することが出来ず、百原子層は必要であるためと考えている。 As a result of evaluating various changes in high-frequency pulse voltage, pulse width, frequency, loading time, processing temperature, etc., the fact that deeper carbon atoms are implanted from the surface of the workpiece contributes to improved adhesion. I found it. As a result of the experiment, it is preferable that at least 10 nm or more of ions are implanted, and it has been found that if it is shallower than this, the contribution rate to the adhesiveness decreases. The reason for this is thought to be that the residual stress of the carbon film to be formed cannot be relaxed in the tens of atomic layers from the surface layer, and a hundred atomic layers are necessary.

カーボン原子が表層部より深く注入され、その表面に形成される硬質なDLC膜層が少なくとも.01〜10μm成膜されていると、耐摩耗性、耐食性、潤滑性と耐汚染性を兼備したDLC膜でより大きな効果を発揮する。従来のプラズマCVD法やPVD法などは、基材界面に発生する残留応力のため0.1〜2.0μmの炭素膜を成膜するのが一般的であったが、本発明の10nm以上の傾斜構造化により基材界面に発生する残留応力が低減され、3.0μm以上のDLC膜の成膜が容易となった。実験によると例えば柔軟なアルミニウム基材に対して50〜100μmのDLC膜の成膜も可能であり、高機能・長寿命な摺動部材として応用可能であることが判った。 Carbon atoms are implanted deeper than the surface layer portion, and at least a hard DLC film layer formed on the surface thereof has a thickness of at least. When the film is formed to a thickness of 01 to 10 μm, a DLC film having wear resistance, corrosion resistance, lubricity and contamination resistance exhibits a greater effect. In the conventional plasma CVD method, PVD method, etc., it is common to form a carbon film of 0.1 to 2.0 μm due to residual stress generated at the base material interface. The residual stress generated at the substrate interface was reduced by the inclined structure, and the formation of a DLC film of 3.0 μm or more was facilitated. According to experiments, it was found that, for example, a DLC film having a thickness of 50 to 100 μm can be formed on a flexible aluminum substrate, and can be applied as a sliding member having a high function and a long life.

さらに半導体加工キャリア部材で重要なのはシリコンウエハーの研磨中に不純物が溶出してこないことである。従来のステンレス鋼を使用した半導体加工キャリア部材では、鉄、クロム、ニッケルなどの微量不純物が溶出して、ウエハーに悪影響を及ぼすことがあった。
本発明のDLC成膜した半導体加工キャリア部材では、カーボンイオン注入効果により、金属の溶出も低減効果に有用であることも判り、さらに均一なDLC成膜により不純物の溶出が全く検出されない半導体加工キャリア部材を得ることが可能となった。本発明の被処理物の表層より10nm以上のカーボンイオン注入層が形成され、元のカーボン元素濃度より数10at%以上高めた表面層の上に炭素膜を成膜することにより、イオン注入された基材は原子間距離を縮め、金属溶出を押さえているものと推察される。
Furthermore, what is important in the semiconductor processing carrier member is that impurities are not eluted during polishing of the silicon wafer. In semiconductor processing carrier members using conventional stainless steel, trace impurities such as iron, chromium and nickel are eluted, which may adversely affect the wafer.
In the semiconductor processing carrier member formed with DLC film according to the present invention, it can be understood that the metal ion elution effect is also effective for reducing the metal elution, and the semiconductor processing carrier in which no elution of impurities is detected by the uniform DLC film formation. It became possible to obtain a member. A carbon ion implantation layer having a thickness of 10 nm or more was formed from the surface layer of the object to be treated of the present invention, and the carbon film was formed on the surface layer higher than the original carbon element concentration by several tens at% or more, thereby performing ion implantation. It is inferred that the base material reduces the interatomic distance and suppresses metal elution.

本発明の半導体加工キャリア部材では、金属とプラスチック複合部材を負電圧印加試料台に取付け、これと高電圧のフィードスルーと一体化する。高周波(RF)電力はフィードスルーとチャンバーの間に加え、電子をその間の電界変化によって往復運動させ、気体分子と衝突を繰返すことにより炭化水素系ガス分子を電離させ、高密度のプラズマを形成する。プラズマ中にはイオン、ラジカル、電子が共存するので、高圧パルス電圧を印加すると、プラズマ中のイオンを金属とプラスチック複合試料に注入することができ、高圧パルス電圧を印加されないと自己バイアス(通常数十ボルト)によるイオンを表面に堆積させ、この時ラジカル重合によりカーボン元素が結合し成膜することが出来る。この重畳方式のプラズマイオン注入・成膜装置を用いて、RF電力と高圧パルス電力の制御により、イオン注入・成膜或いはイオン注入と成膜の組み合わせが可能である。   In the semiconductor processing carrier member of the present invention, a metal and plastic composite member is attached to a negative voltage application sample stage and integrated with a high voltage feedthrough. Radio frequency (RF) power is applied between the feedthrough and the chamber, and electrons are reciprocated by electric field changes between them, and gas molecules are ionized by repeating collisions with gas molecules to form a high-density plasma. . Since ions, radicals, and electrons coexist in the plasma, if a high voltage pulse voltage is applied, the ions in the plasma can be injected into the metal and plastic composite sample. If the high voltage pulse voltage is not applied, self-bias (normal number) 10 volts) is deposited on the surface, and at this time, carbon elements are bonded by radical polymerization to form a film. Using this superposed plasma ion implantation / deposition apparatus, ion implantation / deposition or a combination of ion implantation and deposition can be performed by controlling RF power and high-voltage pulse power.

DLC膜の物性は、使用するガス種、ガス圧、印加電圧等によって異なるが、基材との密着性に優れ、高硬度で膜厚の厚いDLC膜が好ましい。プラズマベースイオン注入・成膜装置では少なくとも3ステップのプロセスで成膜するのが好ましく、基板表面のクリーニング後に、高電圧でイオン注入して、その後カーボンイオン注入電圧より低い電圧でメタン、アセチレン、トルエン等のガスを導入してDLC膜の成膜を行い、引き続き更に低電圧(数kV)のエネルギーでDLC膜を成膜するのが好ましい。この理由は、高エネルギーでDLCの成膜を行うとカーボン結合が再切断されDLC微細膜構造が乱れ、硬高度な被膜が得られにくいばかりでなく、成膜速度が得られにくいためである。特に表層部分になるほど低エネルギーで成膜する方が高品質なDLC被膜が得られるので好ましい。このように高エネルギーイオン注入、中エネルギーDLC成膜、低エネルギーDLC成膜の3ステップがDLC膜中の残留応力の緩和に役立ち厚膜形成に有利であることが判った。   The physical properties of the DLC film vary depending on the type of gas used, the gas pressure, the applied voltage, etc., but a DLC film having excellent adhesion to the substrate, high hardness and a large film thickness is preferred. In the plasma-based ion implantation / deposition apparatus, it is preferable to form a film by a process of at least three steps. After cleaning the substrate surface, ion implantation is performed at a high voltage, and then methane, acetylene, toluene at a voltage lower than the carbon ion implantation voltage. It is preferable to form a DLC film by introducing a gas such as, and then form a DLC film at a lower voltage (several kV). This is because when the DLC film is formed with high energy, the carbon bond is recut, the DLC fine film structure is disturbed, and it is difficult to obtain a hard and high-quality film, and it is difficult to obtain the film formation speed. In particular, it is preferable to form a film with lower energy as the surface layer portion is obtained because a high-quality DLC film can be obtained. Thus, it has been found that the three steps of high energy ion implantation, medium energy DLC film formation, and low energy DLC film formation are useful for relaxation of residual stress in the DLC film and are advantageous for thick film formation.

以下、本発明の実施の形態を説明する。
まず、本発明の各種基材への表面処理方法に用いるプラズマベースイオン注入・成膜装置の概略構成を図1に基づいて説明する。この装置は、半導体加工キャリア部材1をセットする架台2を内蔵する真空チャンバー3を具えている。セット架台は負電圧印加のための電極を兼ねている。真空チャンバー3は、排気装置4により内部を所定の真空度に保持することができる。この装置は、所定の炭化水素系ガスを、導入口5を通して導入され、炭化水素系ガスプラズマを形成させ、また必要に応じてDLC膜の密着性を向上させるため金属系元素をイオン注入するための有機金属ガス導入源6も設けられている。
Embodiments of the present invention will be described below.
First, a schematic configuration of a plasma-based ion implantation / film formation apparatus used in the surface treatment method for various substrates of the present invention will be described with reference to FIG. This apparatus comprises a vacuum chamber 3 containing a frame 2 on which a semiconductor processing carrier member 1 is set. The set stand also serves as an electrode for applying a negative voltage. The inside of the vacuum chamber 3 can be maintained at a predetermined degree of vacuum by the exhaust device 4. In this apparatus, a predetermined hydrocarbon-based gas is introduced through the introduction port 5 to form a hydrocarbon-based gas plasma and, if necessary, ion implantation of a metal-based element to improve the adhesion of the DLC film. An organometallic gas introduction source 6 is also provided.

さらにこの装置は、各種形状の半導体加工キャリア部材1に高電圧の負電荷を印加する高電圧負パルス電源7と高周波(RF)電源8も具えている。高電圧負パルス電源7では、所定のエネルギーの負電荷を発生させ、高電圧用フィードスルー9を通じて半導体加工キャリア部材1に負電荷のパルスを印加する。このフィードスルーはセット架台とつながっており、セット架台は絶縁碍子10で、電気的に浮いた状態になっている。さらにDLCの成膜時には、高電圧パルスと高周波を重ね合わせる重畳装置11通じて高電圧用フィードスルー9から電力を供給して、供給ガスをプラズマ化させ成膜することが出来る。高電圧用フィードスルー9にはシールドカバー12が取り付けられフィードスルー9を防護している。   The apparatus further includes a high voltage negative pulse power source 7 and a radio frequency (RF) power source 8 for applying a high voltage negative charge to the semiconductor processing carrier member 1 having various shapes. The high voltage negative pulse power source 7 generates a negative charge having a predetermined energy, and applies a negative charge pulse to the semiconductor processing carrier member 1 through the high voltage feedthrough 9. This feed-through is connected to the set frame, and the set frame is in an electrically floating state with an insulator 10. Further, when forming the DLC, it is possible to supply the power from the high-voltage feedthrough 9 through the superimposing device 11 that superimposes the high-voltage pulse and the high frequency to form the supply gas into a plasma. A shield cover 12 is attached to the high voltage feedthrough 9 to protect the feedthrough 9.

本装置のセット架台2には、図1のA展開図に示すような半導体加工キャリア部材1がセットされ、これは直径500mm厚さ0.7mmの半導体加工キャリア部材1を3〜9枚セットすることが出来る。半導体加工キャリア部材1にはシリコンウエハー固定用の穴aが数箇所開いており、この穴外周部にはポリエーテル樹脂リング13が接着されている。穴の形状や樹脂材質などは任意に選定される。また部材の一部にはDLC成膜後の膜厚を正しく評価するために10×10×0.3mm角のシリコンウエハー(b)と、DLC成膜品の物理的、化学的特性を評価するための25×25×2mm角ステンレス鋼試験片(c)を貼り付け試験評価を行えるようにしている。   A semiconductor processing carrier member 1 as shown in the A development view of FIG. 1 is set on the set frame 2 of this apparatus. This sets 3 to 9 semiconductor processing carrier members 1 having a diameter of 500 mm and a thickness of 0.7 mm. I can do it. Several holes a for fixing a silicon wafer are opened in the semiconductor processing carrier member 1, and a polyether resin ring 13 is bonded to the outer peripheral portion of the hole. The shape of the hole and the resin material are arbitrarily selected. In addition, in order to correctly evaluate the film thickness after the DLC film is formed on a part of the member, the physical and chemical characteristics of the 10 × 10 × 0.3 mm square silicon wafer (b) and the DLC film-formed product are evaluated. Thus, a 25 × 25 × 2 mm square stainless steel specimen (c) is attached to enable test evaluation.

これら半導体加工キャリア部材に負電荷のパルスを印加すると、プラズマ中のカーボンイオンあるいはCH、CHx、C2等のイオンが半導体加工キャリア部材に引きつけられ、カーボンイオンあるいは水素イオンが注入される。半導体加工キャリア部材に負電荷のパルスを印加してイオンを注入するので、部材が平板でなく凹凸のある立体形状物でも、電界が部材の形状に沿って発生し、この表面に対してほぼ直角にカーボンイオンが衝突する。このため絶縁性のあるプラスチック部材に凹凸があってもプラスチック表面全体にカーボンイオンを注入することができる。なお、同時に水素イオンもイオン注入されるが、基材中の水素は注入後に拡散して脱ガスすることが知られており、基材の物性をあまり左右されることはないと考えられている。 When a negative charge pulse is applied to these semiconductor processed carrier members, carbon ions in the plasma or ions such as CH, CHx, and C2 are attracted to the semiconductor processed carrier member, and carbon ions or hydrogen ions are implanted. Since ions are implanted by applying a negative charge pulse to the semiconductor processing carrier member, an electric field is generated along the shape of the member, even if the member is not a flat plate but an uneven solid shape, and is almost perpendicular to the surface. Carbon ions collide with each other. Therefore, even if the insulating plastic member has irregularities, carbon ions can be implanted into the entire plastic surface. At the same time, hydrogen ions are also ion-implanted, but it is known that hydrogen in the base material diffuses and degass after injection, and it is considered that the physical properties of the base material are not greatly affected. .

カーボンイオン注入後連続してDLCを成膜する。カーボンイオン注入は数kV以上好ましくは10kV以上の電圧でイオン注入されるが、DLC膜の成膜はメタン、アセチレン、ベンゼン、トルエン等の炭化水素系ガスを任意な割合で混合したガスを10kV以下の電圧を印加しながら成膜する。この理由は、高エネルギーでDLCの成膜を行うとイオンの衝突エネルギーによりDLCの膜構造が乱れ、硬高度な被膜が得られにくいばかりでなく、成膜速度が得られにくいためである。特に表層部分になるほど低エネルギーで成膜する方が高品質なDLC膜被覆物品が得られるので好ましい。好ましくは成膜時に自動制御により高電圧側から低電圧側に徐々に低下させる成膜手法が好ましい。
以下実施例に基づき説明する。
A DLC film is continuously formed after carbon ion implantation. Carbon ion implantation is performed at a voltage of several kV or more, preferably 10 kV or more, but the DLC film is formed by mixing a mixture of hydrocarbon gases such as methane, acetylene, benzene, and toluene at an arbitrary ratio of 10 kV or less. The film is formed while applying a voltage of. This is because when the DLC film is formed at a high energy, the film structure of the DLC is disturbed by the collision energy of ions, and it is difficult to obtain a hard and high-grade film, and it is difficult to obtain a film formation speed. In particular, it is preferable to form a film with lower energy as the surface layer portion is obtained because a high-quality DLC film-coated article can be obtained. It is preferable to use a film forming technique in which the voltage is gradually lowered from the high voltage side to the low voltage side by automatic control during film formation.
This will be described below based on examples.

(実験例l)
図1のようなプラズマベースイオン注入・成膜装置を用いて、図中のA展開図に示すように半導体加工キャリア部材1に設けられた穴aの横に、分析用テストピースb、cを多数貼り付け、分析評価用に用いた。実験は次の条件でプラズマを発生させ、カーボンイオン注入+炭素膜の成膜を行い評価した。
(Experimental example l)
Using a plasma-based ion implantation / film formation apparatus as shown in FIG. 1, test pieces b and c for analysis are placed beside the hole a provided in the semiconductor processing carrier member 1 as shown in the A development view in FIG. A large number were pasted and used for analysis evaluation. In the experiment, plasma was generated under the following conditions, and carbon ion implantation + carbon film was formed and evaluated.

使用材料:ステンレス鋼(新日鐵住金ステンレス社製SUS304材)
使用ガス種:メタンガス/アセチレン混合ガス
ガス混合比:メタンガス50/アセチレン50
注入・成膜時圧力:0.5Pa〜1.0Pa
注入エネルギー:10keV、20keV、30keV
成膜エネルギー:10keV→2keV
注入時間:30分
炭素膜成膜時間:180分
印加周波数:2000Hz
Material used: Stainless steel (SUS304 made by Nippon Steel & Sumikin Stainless Steel)
Use gas type: Methane gas / acetylene mixed gas mixing ratio: Methane gas 50 / acetylene 50
Pressure during injection / film formation: 0.5 Pa to 1.0 Pa
Injection energy: 10 keV, 20 keV, 30 keV
Deposition energy: 10 keV → 2 keV
Injection time: 30 minutes Carbon film formation time: 180 minutes Application frequency: 2000 Hz

前記の3条件のエネルギーでカーボンイオン注入をステンレス鋼へイオン注入し、その後電圧を下げながらDLC膜をメタン/アセチレン混合ガスを用いて成膜を行った。なお成膜時圧力は負電圧や成膜エネルギーを変化すると圧力変動するため、その時の圧力範囲を示し、成膜エネルギーの矢印は成膜時間内に電圧を低下させながら実験したことを示す。注入されたカーボン元素の深さ方向の分布をオージェ分析装置(AES)で評価を行い、カーボンの注入深さと注入量(Atomic Concentration(%))を求めた。またステンレス鋼基材表面の硬度と密着性をダイナミック硬度計およびスクラッチ密着性評価試験機にて測定し、さらに摩擦係数をボール&ディスク法による摩擦試験で鋼球を用いて測定した。DLCの膜厚は半導体加工キャリア部材に9ヶづつ貼り付けたシリコンウエハーへに付着したDLC膜厚を求め、DLC膜厚のばらつきを評価した。AES分析については注入エネルギー10keV、20keV、30keVにおけるカーボン注入分布を図2に示した。また硬度、密着性、摩擦係数については図3に未処理のステンレス鋼と比較して示した。   Carbon ions were implanted into stainless steel with the energy of the above three conditions, and then a DLC film was formed using a methane / acetylene mixed gas while lowering the voltage. Since the pressure at the time of film formation fluctuates when the negative voltage or the film formation energy is changed, the pressure range at that time is shown, and the arrow of the film formation energy indicates that the experiment was performed while the voltage was reduced within the film formation time. The distribution of the implanted carbon element in the depth direction was evaluated by an Auger analyzer (AES), and the carbon implantation depth and the amount (Atomic Concentration (%)) were obtained. Further, the hardness and adhesion of the stainless steel substrate surface were measured with a dynamic hardness meter and a scratch adhesion evaluation tester, and the friction coefficient was measured with a steel ball in a friction test by a ball and disk method. The DLC film thickness was determined by obtaining the DLC film thickness adhered to the silicon wafers affixed to the semiconductor processing carrier member nine by nine, and evaluating the variation of the DLC film thickness. For AES analysis, the carbon injection distribution at injection energies of 10 keV, 20 keV, and 30 keV is shown in FIG. The hardness, adhesion, and friction coefficient are shown in FIG. 3 in comparison with untreated stainless steel.

図2の横軸はステンレス鋼材料の深さ方向を示して、原点はDLC膜材料を示し、縦軸は材料中のカーボン元素の割合を示している。なお分析に当たりDLC膜はあらかじめアルゴンスパッタにより薄くしてから分析した。図2から判るようにステンレス鋼表面ではDLC膜主成分であるカーボン層が300nm付近まで形成されており、330nm付近がステンレス鋼の最表層部分と見られる。ここからカーボン注入層が380nm〜450nm付近まで高濃度のカーボン層であることが判る。この結果、注入エネルギーが高いほどカーボンの侵入深さは深く、内部までイオン注入されていることが判る。カーボンの注入深さは10keVで60nm付近まで、20keVで90nm、30keVで120nmほどイオン注入されていることが判る。このことはDLC膜形成前の印加電圧が高い程、カーボンはステンレス材料中の深くまで入り込み傾斜構造を示していることが判る。   The horizontal axis in FIG. 2 indicates the depth direction of the stainless steel material, the origin indicates the DLC film material, and the vertical axis indicates the ratio of the carbon element in the material. In the analysis, the DLC film was analyzed after thinning it beforehand by argon sputtering. As can be seen from FIG. 2, the carbon layer, which is the main component of the DLC film, is formed on the stainless steel surface up to about 300 nm, and the vicinity of 330 nm is seen as the outermost layer portion of the stainless steel. From this, it can be seen that the carbon injection layer is a high-concentration carbon layer from 380 nm to about 450 nm. As a result, it can be seen that the higher the implantation energy, the deeper the carbon penetration depth, and the ion implantation into the interior. It can be seen that the carbon implantation depth is about 10 nm at 10 keV, 90 nm at 20 keV, and 120 nm at 30 keV. This shows that the higher the applied voltage before forming the DLC film, the deeper the carbon penetrates into the stainless material, indicating an inclined structure.

一方、ステンレス表面のダイナミック硬度、スクラッチ密着力と摩擦係数は図3に示すように未処理のステンレス鋼は硬度570と非常に柔らかいが、DLC膜を成膜することによりいずれも1300以上の硬度を示し、且つスクラッチ密着力も基材が柔らかいにもかかわらず15N以上の密着力を示すことが判る。またステンレス鋼は0.3以上の非常に高い摩擦係数を示すが、DLC膜によりいずれも0.18以下の低摩擦係数を示した。イオン注入エネルギーとの関係を見ると、適度な注入エネルギーにおいて、硬度は高く、摩擦係数が低くなることが判った。
さらに、DLC膜厚の均一性を半導体加工キャリア部材評価した結果、図3に示すように6枚の半導体加工キャリア部材に各9点づつ測定した結果、平均2μmの膜厚に対して、±0.3μmの誤差範囲でDLC成膜が出来ることが判った。
On the other hand, as shown in FIG. 3, the dynamic hardness, scratch adhesion and friction coefficient of the stainless steel surface are very soft with a hardness of 570 for the untreated stainless steel. It can also be seen that the scratch adhesion is 15 N or more even though the substrate is soft. Stainless steel exhibited a very high coefficient of friction of 0.3 or more, but all of the DLC films exhibited a low coefficient of friction of 0.18 or less. Looking at the relationship with the ion implantation energy, it was found that at a suitable implantation energy, the hardness was high and the friction coefficient was low.
Further, as a result of evaluating the uniformity of the DLC film thickness as a semiconductor processing carrier member, as a result of measuring nine points on each of six semiconductor processing carrier members as shown in FIG. It was found that DLC film formation was possible with an error range of 3 μm.

(実験例2)
図2のようなプラズマベースイオン注入・成膜装置を用いて、図中のA展開図に示すように半導体加工キャリア部材1に設けられた穴aの横に、分析用テストピースb、cを多数貼り付け、分析評価用に用いた。実験は次の条件でプラズマを発生させ、カーボンイオン注入+炭素膜の成膜を行い評価した。
(Experimental example 2)
Using the plasma-based ion implantation / film formation apparatus as shown in FIG. 2, the test pieces b and c for analysis are placed beside the hole a provided in the semiconductor processing carrier member 1 as shown in the A development view in FIG. A large number were pasted and used for analysis evaluation. In the experiment, plasma was generated under the following conditions, and carbon ion implantation + carbon film was formed and evaluated.

使用材料:チタン合金材料(株式会神戸製鋼所社製KS6−4材)
使用ガス種:アセチレン/トルエン混合ガス
ガス混合比:アセチレン70/トルエン30
注入・成膜時圧力:0.5Pa〜1.0Pa
注入エネルギー:10keV、20keV、30keV
成膜エネルギー:10keV→2keV
注入時間:30分
炭素膜成膜時間:180分
印加周波数:3000Hz
Material used: Titanium alloy material (KS6-4 manufactured by Kobe Steel, Ltd.)
Gas type used: Acetylene / toluene gas mixture ratio: Acetylene 70 / toluene 30
Pressure during injection / film formation: 0.5 Pa to 1.0 Pa
Injection energy: 10 keV, 20 keV, 30 keV
Deposition energy: 10 keV → 2 keV
Implantation time: 30 minutes Carbon film formation time: 180 minutes Application frequency: 3000 Hz

前記の3条件のエネルギーでカーボンイオン注入をチタン合金へイオン注入し、その後電圧を下げながらDLC膜をアセチレン/トルエン混合ガスを用いて成膜を行った。なお成膜時圧力は負電圧や成膜エネルギーを変化すると圧力変動するため、その時の圧力範囲を示し、成膜エネルギーの矢印は成膜時間内に電圧を低下させながら実験したことを示す。注入されたカーボン元素の深さ方向の分布をオージェ分析装置(AES)で評価を行い、カーボンの注入深さと注入量(Atomic Concentration(%))を求めた。またチタン合金基材表面の硬度と密着性をダイナミック硬度計およびスクラッチ密着性評価試験機にて測定し、さらに摩擦係数をボール&ディスク法による摩擦試験で鋼球を用いて測定した。DLCの膜厚は半導体加工キャリア部材に9ヶづつ貼り付けたシリコンウエハーへに付着したDLC膜厚を求め、DLC膜厚のばらつきを評価した。AES分析については注入エネルギー10keV、20keV、30keVにおけるカーボン注入分布を図5に示した。また硬度、密着性、摩擦係数については図6に未処理のチタン合金と比較して示した。   Carbon ions were implanted into the titanium alloy with the energy of the above three conditions, and then a DLC film was formed using an acetylene / toluene mixed gas while lowering the voltage. Since the pressure at the time of film formation fluctuates when the negative voltage or the film formation energy is changed, the pressure range at that time is shown, and the arrow of the film formation energy indicates that the experiment was performed while the voltage was reduced within the film formation time. The distribution of the implanted carbon element in the depth direction was evaluated by an Auger analyzer (AES), and the carbon implantation depth and the amount (Atomic Concentration (%)) were obtained. Further, the hardness and adhesion of the titanium alloy substrate surface were measured with a dynamic hardness meter and a scratch adhesion evaluation tester, and the friction coefficient was measured with a steel ball in a friction test by a ball and disk method. The DLC film thickness was determined by obtaining the DLC film thickness adhered to the silicon wafers affixed to the semiconductor processing carrier member nine by nine, and evaluating the variation of the DLC film thickness. For AES analysis, the carbon injection distribution at injection energies of 10 keV, 20 keV, and 30 keV is shown in FIG. Further, the hardness, adhesion, and coefficient of friction are shown in FIG. 6 in comparison with an untreated titanium alloy.

図4の横軸はチタン合金材料の深さ方向を示して、原点はDLC膜材料を示し、縦軸は材料中のカーボン元素の割合を示している。なお分析に当たりDLC膜はあらかじめアルゴンスパッタにより薄くしてから分析した。図4から判るようにチタン合金表面ではDLC膜主成分であるカーボン層が330nm付近まで形成されており、340nm付近がチタン合金の最表層部分と見られる。ここからカーボン注入層が420nm〜540nm付近まで高濃度のカーボン層であることが判る。この結果、注入エネルギーが高いほどカーボンの侵入深さは深く、内部までイオン注入されていることが判る。カーボンの注入深さは10keVで100nm付近まで、20keVで160nm、30keVで200nmほどイオン注入されていることが判る。このことはDLC膜形成前の印加電圧が高い程、カーボンはチタン材料中の深くまで入り込み傾斜構造を示していることが判る。   The horizontal axis of FIG. 4 indicates the depth direction of the titanium alloy material, the origin indicates the DLC film material, and the vertical axis indicates the ratio of the carbon element in the material. In the analysis, the DLC film was analyzed after thinning it beforehand by argon sputtering. As can be seen from FIG. 4, the carbon layer, which is the main component of the DLC film, is formed up to around 330 nm on the titanium alloy surface, and around 340 nm is seen as the outermost layer portion of the titanium alloy. From this, it can be seen that the carbon injection layer is a high concentration carbon layer from 420 nm to around 540 nm. As a result, it can be seen that the higher the implantation energy, the deeper the carbon penetration depth, and the ion implantation into the interior. It can be seen that the carbon implantation depth is about 10 nm at 10 keV, about 160 nm at 20 keV, and about 200 nm at 30 keV. This shows that the higher the applied voltage before forming the DLC film, the deeper the carbon enters the titanium material, indicating a tilted structure.

一方、チタン表面のダイナミック硬度、スクラッチ密着力と摩擦係数は図5に示すように未処理のチタン合金は硬度320と非常に柔らかいが、DLC膜を成膜することによりいずれも1100以上の硬度を示し、且つスクラッチ密着力も基材が柔らかいにもかかわらず12N以上の密着力を示すことが判る。またチタン合金は0.4と非常に高い摩擦係数を示すが、DLC膜によりいずれも0.16以下の低摩擦係数を示した。イオン注入エネルギーとの関係を見ると、高エネルギーでやや硬度が低くなる傾向になることが判った。
さらに、DLC膜厚の均一性を評価した結果、図5に示すように6枚の半導体加工キャリア部材に各9点づつ測定した結果、平均2μmの膜厚に対して、±0.3μmの誤差範囲でDLC成膜が出来ることが判った。
On the other hand, as shown in FIG. 5, the dynamic hardness, scratch adhesion and friction coefficient of the titanium surface are very soft with an untreated titanium alloy having a hardness of 320. However, by forming a DLC film, the hardness is 1100 or more. In addition, it can be seen that the scratch adhesion is 12 N or more even though the substrate is soft. Titanium alloys showed a very high friction coefficient of 0.4, but both showed low friction coefficients of 0.16 or less by the DLC film. Looking at the relationship with ion implantation energy, it was found that the hardness tends to be slightly lower at higher energies.
Furthermore, as a result of evaluating the uniformity of the DLC film thickness, as a result of measuring 9 points on each of 6 semiconductor processed carrier members as shown in FIG. 5, an error of ± 0.3 μm with respect to the average film thickness of 2 μm. It was found that DLC film formation was possible within the range.

また実験例には記載していないが、ガラスエポキシ基材に関しても同様の実験、評価を行った結果、10keVエネルギーで130nm付近までカーボンイオン注入が確認され、さらにアセチレン/トルエンで成膜したDLC膜形成後の物性もチタン合金と同様な表面物性を示すことが判った。このように金属、絶縁物問わずカーボンのパルスイオン注入とそれに続くDLC成膜が不可欠であることが明らかになった。 Although not described in the experimental examples, the same experiment and evaluation were performed with respect to the glass epoxy substrate. As a result, carbon ion implantation was confirmed up to about 130 nm with 10 keV energy, and a DLC film formed with acetylene / toluene. It was found that the physical properties after formation showed the same surface physical properties as titanium alloys. Thus, it became clear that pulse ion implantation of carbon regardless of metal or insulator and subsequent DLC film formation are indispensable.

以上、説明したように、本発明方法によれば、プラズマベースイオン注入・成膜法を用いて、半導体加工キャリア部材に、炭化水素系ガスプラズマからカーボンイオン注入を行い、さらに炭化水素ガスを少なくとも一種類以上混合して導入しつつDLC膜を形成することにより、半導体加工キャリア部材の耐摩耗性、耐食性、耐汚染性に優れたDLC被覆物品及びその表面処理方法を提供できることが判った。 As described above, according to the method of the present invention, carbon ion implantation is performed from a hydrocarbon-based gas plasma to a semiconductor processing carrier member using a plasma-based ion implantation / film formation method, and at least a hydrocarbon gas is added. It has been found that by forming a DLC film while mixing and introducing one or more kinds, it is possible to provide a DLC-coated article excellent in wear resistance, corrosion resistance, and contamination resistance of a semiconductor processed carrier member and a surface treatment method thereof.

また、本発明のDLC被覆物品は、カーボンイオンの注入により表面硬度が高く、耐摩耗性、耐食性、耐汚染性が優れていることから、半導体以外のアルミ磁気ディスク基板、ガラス製磁気ディスク基板、フォトマスク用ガラス基板、水晶発振子、光学レンズの研磨、反射鏡等の研磨へも利用可能である。さらに、本発明のカーボンイオン注入+DLC膜形成技術は、耐摩耗性、耐食性、耐汚染性以外に潤滑性、撥水性・離型性も増大させることが出来、本発明の用途以外の金属材料やセラミックス材料の表面硬度アップや潤滑性・離型性の機能性向上など工業用セラミックス材料や金属材料成形品等に対しても同様に応用可能である。
Further, the DLC-coated article of the present invention has high surface hardness due to carbon ion implantation, and has excellent wear resistance, corrosion resistance, and contamination resistance. Therefore, an aluminum magnetic disk substrate other than a semiconductor, a glass magnetic disk substrate, It can also be used for polishing photomask glass substrates, crystal oscillators, optical lenses, and reflecting mirrors. Furthermore, the carbon ion implantation + DLC film formation technology of the present invention can increase lubricity, water repellency, and release properties in addition to wear resistance, corrosion resistance, and contamination resistance. The present invention can also be applied to industrial ceramic materials and metal material molded products such as increasing the surface hardness of ceramic materials and improving the functionality of lubricity and releasability.

本発明の半導体加工キャリア部材に用いるプラズマベースイオン注入・成膜装置の構成図と部材形状図である。It is the block diagram and member shape figure of the plasma base ion implantation and film-forming apparatus used for the semiconductor processing carrier member of this invention. SUS304へのカーボンイオン注入+DLC形成後のオージェ分析によるカーボン注入深さとカーボン濃度との関係を示すグラフである。It is a graph which shows the relationship between the carbon implantation depth by the Auger analysis after carbon ion implantation + DLC formation to SUS304, and carbon concentration. SUS304へのカーボンイオン注入+DLC形成後の硬度、密着力、摩擦係数など物理的変化と膜厚分布を示す表である。It is a table | surface which shows physical changes, such as the hardness after carbon ion implantation + DLC formation to SUS304, adhesion, and a friction coefficient, and film thickness distribution. チタン材へのカーボンイオン注入+DLC形成後のオージェ分析によるカーボン注入深さとカーボン濃度との関係を示すグラフである。It is a graph which shows the relationship between the carbon implantation depth by the Auger analysis after carbon ion implantation + DLC formation to a titanium material, and carbon concentration. チタン材へのカーボンイオン注入+DLC形成後の硬度、密着力、摩擦係数など物理的変化と膜厚分布を示す表である。It is a table | surface which shows physical changes and film thickness distribution, such as the hardness after carbon ion implantation to DLC + DLC formation, adhesive force, and a friction coefficient.

符号の説明Explanation of symbols

1 半導体キャリア部材
2 架台
3 真空チャンバー
4 排気装置
5 炭化水素ガス導入口
6 有機金属ガス導入口
7 高電圧負パルス電源
8 高周波(RF)電源
9 高電圧用フィードスルー
10 絶縁碍子
11 重畳装置
12 シールドカバー
DESCRIPTION OF SYMBOLS 1 Semiconductor carrier member 2 Base 3 Vacuum chamber 4 Exhaust device 5 Hydrocarbon gas inlet 6 Organometallic gas inlet 7 High voltage negative pulse power source 8 High frequency (RF) power source 9 High voltage feedthrough 10 Insulator 11 Superimposing device 12 Shield cover

Claims (9)

0.1〜10Paの真空中でカーボンガスプラズマを発生させ、この中にステンレス鋼、チタン合金、ガラスエポキシ樹脂材料等からなる半導体加工キャリア部材をさらし、半導体加工キャリア部材に1〜50keV、100〜5000サイクルの高電圧負パルスを印加して、カーボンイオンを半導体加工キャリア部材表面に注入することを特徴とする半導体加工キャリア部材の表面処理方法。 Carbon gas plasma is generated in a vacuum of 0.1 to 10 Pa, and a semiconductor processing carrier member made of stainless steel, a titanium alloy, a glass epoxy resin material or the like is exposed therein, and the semiconductor processing carrier member is exposed to 1 to 50 keV, 100 to 100- A method for treating a surface of a semiconductor processed carrier member, comprising applying a high voltage negative pulse of 5000 cycles to inject carbon ions into the surface of the semiconductor processed carrier member. 非処理物である半導体加工キャリア部材を0.1〜10Paの真空中にセットし、ここに炭化水素系ガスを導入して高周波電力の供給によりプラズマを発生させ、半導体加工キャリア部材に1〜30keV、500〜5000サイクルの高圧負パルスを印加して、カーボンイオンを半導体加工キャリア部材表面からイオン注入し、その後ダイヤモンドライクカーボン層を表層に堆積することを特徴とする半導体加工キャリア部材の表面処理方法。 A non-processed semiconductor processing carrier member is set in a vacuum of 0.1 to 10 Pa, and a hydrocarbon gas is introduced therein to generate plasma by supplying high-frequency power. , A high-pressure negative pulse of 500 to 5000 cycles is applied, and carbon ions are ion-implanted from the surface of the semiconductor-worked carrier member, and then a diamond-like carbon layer is deposited on the surface layer. . 炭化水素系ガスとして、メタン、アセチレン、ベンゼン、トルエン及びシクロヘキサノン、クロロベンゼン、二フッ化炭素、四フッ化炭素等からなるガスから選択される、少なくとも1種類以上を主成分としたガスを使用してカーボンイオンを注入した後、DLC層を形成したことを特徴とする請求項2に記載の半導体加工キャリア部材の表面処理方法。 As a hydrocarbon gas, a gas mainly composed of at least one selected from gases consisting of methane, acetylene, benzene, toluene, cyclohexanone, chlorobenzene, carbon difluoride, carbon tetrafluoride, etc. is used. 3. The method of surface treatment of a semiconductor processing carrier member according to claim 2, wherein a DLC layer is formed after carbon ions are implanted. 少なくとも半導体加工キャリア部材への印加電圧が10keV以上で、カーボンイオン注入時間が30〜120分であることを特徴とする請求項2に記載の半導体加工キャリア部材の表面処理方法。 3. The surface treatment method for a semiconductor processed carrier member according to claim 2, wherein at least an applied voltage to the semiconductor processed carrier member is 10 keV or more and a carbon ion implantation time is 30 to 120 minutes. 半導体加工キャリア部材が主としてステンレス鋼、チタン合金等の金属部分とポリイミド樹脂、ポリアミドイミド樹脂、ポリエーテルエーテルケトン樹脂、ナイロン樹脂、ガラスエポキシ樹脂等のエンジニアリング樹脂が組み合わされた複合部材からなることを特徴とする請求項1から4のいずれかに記載の半導体加工キャリア部材の表面処理方法。 The semiconductor processing carrier member is mainly composed of a composite member in which a metal part such as stainless steel or titanium alloy is combined with an engineering resin such as polyimide resin, polyamideimide resin, polyetheretherketone resin, nylon resin or glass epoxy resin. A surface treatment method for a semiconductor processing carrier member according to any one of claims 1 to 4. 金属およびエンジニアリング樹脂を主成分とする部材に、カーボンイオン注入層を部材表層より10nm以上イオン注入したことを特徴とする請求項5に記載の半導体加工キャリア部材の表面処理方法。 6. The surface treatment method for a semiconductor-worked carrier member according to claim 5, wherein a carbon ion implanted layer is ion-implanted 10 nm or more from a member surface layer into a member mainly composed of a metal and an engineering resin. 金属およびエンジニアリング樹脂を主成分とする部材に、カーボンイオン注入を行い部材表層より内部のカーボン濃度が10at%以上であることを特徴とする請求項1から6のいずれかに記載の半導体加工キャリア部材の表面処理方法。 7. The semiconductor processing carrier member according to claim 1, wherein carbon ion implantation is performed on a member mainly composed of a metal and an engineering resin, and a carbon concentration inside the member surface layer is 10 at% or more. Surface treatment method. 半導体加工キャリア部材表面にカーボンイオン注入後、継続してダイヤモンドライクカーボン層を少なくとも1μm以上成膜して、表面摩擦係数を0.18以下にしたことを特徴とする請求項1に記載の半導体加工キャリア部材の表面処理方法。 2. The semiconductor processing according to claim 1, wherein after the carbon ions are implanted into the surface of the semiconductor processing carrier member, a diamond-like carbon layer is continuously formed at least 1 μm or more so that the surface friction coefficient is 0.18 or less. A surface treatment method for a carrier member. 請求項1から8のいずれかに記載の方法を用いて製造した半導体加工キャリア物品。
A semiconductor processed carrier article manufactured using the method according to claim 1.
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KR100761446B1 (en) * 2007-06-04 2007-09-27 에스엠엘씨디(주) Dlc coating machine for wafer carrier and dlc coating method of wafer carrier
JP2009263769A (en) * 2008-03-31 2009-11-12 Ngk Insulators Ltd Method and apparatus for mass-producing dlc films
JP2015501163A (en) * 2011-09-15 2015-01-15 エーメディカ コーポレーション Coated implants and related methods
JP2019117773A (en) * 2017-12-27 2019-07-18 株式会社プラズマイオンアシスト Fuel cell separator manufacturing method and film forming apparatus

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JP2004315876A (en) * 2003-04-15 2004-11-11 Ion Engineering Research Institute Corp Die for molding magnesium having sliding resistance improved, and surface treatment method thereof
JP2004323973A (en) * 2003-04-08 2004-11-18 Kurita Seisakusho:Kk Method of depositing dlc film, and dlc film-deposited product

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JP2004217975A (en) * 2003-01-14 2004-08-05 National Institute Of Advanced Industrial & Technology Carbon thin film and manufacturing method therefor
JP2004323973A (en) * 2003-04-08 2004-11-18 Kurita Seisakusho:Kk Method of depositing dlc film, and dlc film-deposited product
JP2004315876A (en) * 2003-04-15 2004-11-11 Ion Engineering Research Institute Corp Die for molding magnesium having sliding resistance improved, and surface treatment method thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007002268A (en) * 2005-06-21 2007-01-11 Plasma Ion Assist Co Ltd Surface treatment method for polishing member, and article obtained thereby
KR100761446B1 (en) * 2007-06-04 2007-09-27 에스엠엘씨디(주) Dlc coating machine for wafer carrier and dlc coating method of wafer carrier
JP2009263769A (en) * 2008-03-31 2009-11-12 Ngk Insulators Ltd Method and apparatus for mass-producing dlc films
JP2015501163A (en) * 2011-09-15 2015-01-15 エーメディカ コーポレーション Coated implants and related methods
JP2019117773A (en) * 2017-12-27 2019-07-18 株式会社プラズマイオンアシスト Fuel cell separator manufacturing method and film forming apparatus

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