JP2006331609A - Equalizer property setting apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To minimize a disk start time by shorting a time required for optimization processing on the assumption that optimization processing is performed at the time of start of a disk having a plurality of information layers. <P>SOLUTION: After optimization processing of the first layer equalizer property is performed, equalizer setting information optimized by the optimization processing is stored in a memory 25. When optimization processing of the second layer is performed, a frequency property of the information signal of the second layer is changed based on the equalizer setting information read from the memory 25, and jitter is detected. The detected jitter is compared with a jitter reference value by a comparing means 34, when the jitter exceeds the jitter reference value, optimization processing is performed. When the jitter does not exceed the jitter reference value, optimization processing is not performed, the information signal based on the equalizer setting information is output. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention is an equalizer effectively applied to an information reproducing apparatus or an information recording / reproducing apparatus for reproducing an information signal of an information medium (hereinafter abbreviated as a disk) having information recorded on at least two information layers. The present invention relates to a characteristic setting device.

  Generally, in this type of information reproducing apparatus and information recording / reproducing apparatus, tracking control and focus control of an optical head are performed, and data is accurately written and read during recording and reproduction. Such control is performed by controlling the optical head by a so-called servo control circuit. As a method for generating a tracking error signal used for tracking control of an optical head, a three-beam method and a phase difference method are generally used. Various types of disc-shaped optical recording media have been developed. As discs having a diameter of 12 cm, CD-ROM, DVD (digital versatile disc) and the like have been put into practical use in addition to so-called CDs (compact discs). Yes.

  Among these optical recording media, DVD has a high signal recording density. Of the EFM + reproduction signal having a wavelength of 3T to 14T obtained by reading a DVD recording signal with an optical head, the reproduction amplitude of the 3T wavelength signal is about 25% of the reproduction amplitude of the 14T wavelength signal. Accordingly, stable reproduction is realized by optimizing the equalizer characteristic of the information signal from the disk by using a waveform equivalent equalizer so as to obtain an information signal with good signal quality by minimizing the number of jitters and error corrections. That is, the frequency characteristics of the high frequency signal are raised to improve the signal jitter. Hereinafter, this jitter improvement processing is referred to as optimization processing.

  Conventionally, such optimization processing is generally performed at the time of starting the disk (from the time when the power of the apparatus main body is turned on until the recording / reproducing standby state). However, when there are a plurality of information layers in one information medium, such as a DVD-R or DVD-ROM, the characteristics are often different due to manufacturing variations of each information layer and external factors. Every time it is necessary to perform optimization processing such as servo control and reproduction signal, there arises a problem that it takes time to start the disk. That is, the time for optimization processing is required in proportion to the number of information layers of the information medium.

  Hereinafter, the optimization method in the conventional equalizer characteristic setting apparatus will be described. FIG. 5 is a block diagram showing the configuration of the equalizer characteristic setting device. In the figure, reference numeral 101 denotes a disk, which has first and second information layers 101a and 101b. Reference numeral 102 denotes a pickup which accesses the first information layer 101a or the second information layer 101b of the disc 101 and reads information. The read information is output as an electrical signal.

  103 is an equalizer characteristic setting means for setting an equalizer characteristic of an electric signal (RF signal) output from the pickup 102. Specifically, processing such as increasing the boost amount of the electrical signal or changing the cutoff frequency is performed to reduce the jitter of the electrical signal.

  Reference numeral 104 denotes signal quality detection means for detecting the jitter of the electrical signal output from the equalizer characteristic setting means 103. The detected jitter is output as a jitter value.

  Reference numeral 105 denotes an equalizer characteristic optimizing unit that sets an equalizer value based on the jitter value output from the signal quality detecting unit 104 and outputs the equalizer value to the equalizer characteristic setting unit 103. Specifically, the input jitter value is The equalizer setting value is optimized so as to decrease, and the optimum value is output to the equalizer characteristic setting means 103.

  The operation of the conventional equalizer characteristic setting apparatus configured as described above will be described below.

  First, when the apparatus is started up (that is, when the power is turned on or the disk is loaded), the pickup 102 irradiates the rotating disk 101 with a light beam, and the reflected light reflected from the information layer of the disk 101 is picked up. Receive light at. Note that the information layer at this time may be the first information layer 101a or the second information layer 101b, but the first information layer 101a is used as an example.

  The pickup 102 converts the received reflected light into an electric signal and outputs it to the equalizer characteristic setting means 103. The equalizer characteristic setting means 103 changes the frequency characteristic of the input electric signal according to a predetermined equalizer setting value. At present, the frequency characteristic is changed according to a preset equalizer initial value. The electrical signal whose frequency characteristic is changed is output to the signal quality detection means 104.

  The signal quality detection means 104 detects jitter of the input electrical signal. A jitter value is calculated based on the detected jitter, and the jitter value is output to the equalizer characteristic optimizing means 105.

  The equalizer characteristic optimizing means 105 sets the equalizer characteristic so that the input jitter value becomes small. Specifically, the cutoff frequency value, boost amount value, and the like are changed. The changed equalizer characteristic information is output to the equalizer characteristic setting means 103.

  The equalizer characteristic setting unit 103 performs equalizer setting based on the equalizer characteristic information output from the equalizer characteristic optimization unit 105 and changes the frequency characteristic of the electric signal.

  The above processing is executed until the jitter value detected by the signal quality detection means 104 is minimized. The electrical signal when the jitter value is minimized is output as the first layer optimization signal.

  Next, in order to optimize the electric signal of the second layer 101b of the disk 101, the same procedure as the optimization process of the first layer is performed.

  As described above, in the conventional optimization process, the optimization process for the first layer and the second layer is performed in the same procedure when the disk is started.

Moreover, there exists what was disclosed by patent document 1 as another structure of an optimization process. In the configuration of Patent Document 1, optimization processing is not performed at the time of starting the disc, but optimization processing is performed on a layer to be reproduced at the time of disc playback. Specifically, when a playback command for the first layer is issued, the optimization processing for the first layer is executed, and then the playback operation for the first layer is started. Next, the optimization process of the second layer is executed during the reproduction of the first layer.
Japanese Patent Laid-Open No. 10-134375

  However, the above-described conventional configuration has a problem that optimization processing takes time because the optimization processing of the same processing contents is performed for the first layer and the second layer. That is, the time required for the optimization process increases in proportion to the number of information layers, and the disk startup time becomes longer.

  Further, in the configuration disclosed in Patent Document 1, since the reproduction operation and the optimization process are performed at the same time, it is necessary to frequently access reading means such as a pickup to the first layer and the second layer. There is a problem that servo control becomes complicated and malfunction may occur.

  In view of the above problems, the present invention provides an equalizer characteristic setting device that can reduce the time required for the optimization process and minimize the disk startup time.

  In order to solve the above-described problem, an equalizer characteristic setting device according to the present invention reads first and second information signals from an information medium including at least first and second information layers, and equalizer characteristics of the read information signal An information reproduction apparatus for optimizing the frequency characteristics of the first information signal from a first equalizer characteristic setting unit that changes a frequency characteristic in a processing path of the first information signal based on an equalizer setting, and the first equalizer characteristic setting unit A first signal quality detecting unit for detecting jitter of the first information signal to be output; and a first equalizer characteristic setting unit for reducing the jitter detected by the first signal quality detecting unit. A first equalizer characteristic optimizing means for controlling to change the equalizer setting and outputting equalizer setting information when the jitter is minimized; A storage means for storing the equalizer setting information and a jitter reference value output from the first equalizer characteristic setting means, and a frequency characteristic in the processing path of the second information signal is changed based on the equalizer setting. 2 equalizer characteristic setting means, second signal quality detection means for detecting jitter of the second information signal output from the second equalizer characteristic setting means, and detected by the second signal quality detection means. A comparison unit comparing the jitter and the jitter reference value stored in the storage unit, and as a result of the comparison by the comparison unit, when the jitter exceeds the jitter reference value, Second equalizer characteristic optimizing means for controlling to change the equalizer setting of the second equalizer characteristic setting means, It means the result of comparison by the comparison means, if the jitter does not exceed the jitter reference value is configured to control so as to terminate the optimization process.

  As described above, according to the present invention, even when there are two or more information layers, it is possible to obtain a reproduction signal with optimized equalizer characteristics while minimizing the disk startup time.

  In the equalizer characteristic setting device of the present invention, the first information layer may be a layer in which a servo is initially drawn.

  The initial value of the equalizer setting of the second information signal may be the equalizer optimum value.

  Further, the first and second signal quality detection means may be configured to detect an error rate of the first and second information signals.

  Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1)
FIG. 1 is a block diagram showing a configuration of an information reproducing apparatus using the equalizer characteristic setting apparatus according to Embodiment 1 of the present invention, and corresponds to a configuration of a reproduction signal processing system of a general DVD player. FIG. 2 is a block diagram illustrating a detailed configuration of the signal correction unit 4.

  In FIG. 1, 1 is a disk. The disc 1 is an information medium on which various types of information such as video and audio are recorded. The disc 1 is provided with an information layer having a laminated structure of a plurality of layers. In the present embodiment, the disc 1 is provided with two information layers including a first information layer 1a and a second information layer 1b. In this embodiment, an optical information medium such as a DVD (digital versatile disk) is used as an example of the information medium. However, the information medium is not limited to an optical type. In this embodiment, a DVD-ROM that is a read-only information medium is taken as an example, but a record-type information medium may be used.

  That is, the information layer of the plurality of layers provided for the present invention includes a read-only type track in which a user information signal is formed as a pit (also referred to as emboss) on a substrate and a reflective layer such as aluminum is formed. A rewritable recording type in which a reversible optically active phase change occurs between a crystalline material such as an Ag-In system or Ge-Sb-Te system and an amorphous material on a substrate on which a guide groove is formed, or guidance Any of the write-once recording type in which an organic dye such as azo or cyanine is provided on the substrate on which the groove is formed may be used.

  Reference numeral 2 denotes a pickup. The pickup 2 receives the light beam irradiated and reflected on the disk 1 and reads information recorded on the information layer of the disk 1 as an electrical signal (information signal). Note that the pickup in this embodiment also includes a laser diode that emits a light beam. The laser diode irradiates the information layer of the disk 1 with a light beam, and outputs an electrical signal obtained by reproducing the optical information recorded on the disk 1 based on the reflected light, a focus error signal, and a tracking error signal.

  The amplifier 3 amplifies the RF signal read by the optical pickup 2.

  The signal correction unit 4 detects the jitter of the information signal amplified by the amplifier 3 and adjusts the signal characteristics so that the jitter is minimized. In this embodiment, the information signal jitter is detected, but an error rate may be detected and the signal characteristics may be adjusted to minimize the error rate. The detailed configuration of the signal correction unit 4 will be described later.

  Reference numeral 5 denotes an analog-digital converter (hereinafter referred to as ADC). The ADC 5 converts the RF signal (analog signal) corrected by the signal correction unit 4 into a digital signal, and outputs a binarized signal.

  Reference numeral 7 denotes a phase-locked loop unit (hereinafter referred to as PLL). The PLL 7 generates a reproduction clock based on the synchronization signal included in the digital signal from the ADC 5.

  The demodulator 6 demodulates the digital signal from the ADC 5 and outputs it as a reproduction signal. The demodulator 6 performs a demodulation process corresponding to the modulation method of the information signal recorded on the disk 1, for example, a demodulation process for 8/16 modulation. The demodulating unit 6 performs a demodulating operation in synchronization with the reproduction clock generated by the PLL unit 7.

  The error correction unit 8 detects a code error of the reproduction signal demodulated by the demodulation unit 6 and performs error correction processing on the code error. The error rate detection unit 10 detects the number of errors generated in the error correction unit 8 as an error rate.

  Reference numeral 9 denotes a digital-analog converter (hereinafter referred to as DAC). The reproduction signal (digital signal) error-corrected by the error correction unit 8 is converted into an analog signal.

  The reproduction signal memory 11 temporarily stores the reproduction signal converted into an analog signal by the DAC 9. A reproduction signal output from the reproduction memory 11 is output to a display device such as a television receiver externally connected to the apparatus and displayed.

  The operation of the information reproducing apparatus configured as described above will be described below.

  First, the starting operation, which is one of the basic operations of the DVD player, will be described.

  First, the DVD player is powered on, and the disc 1 is loaded into the DVD player. Then, the disk 1 is rotationally driven at a predetermined rotational speed by a loading mechanism (not shown) constituted by a turntable or the like. Next, the laser diode in the pickup 2 irradiates the information layer of the rotating disk 1 with a light beam. The light beam reflected from the information layer of the disk 1 is received by the pickup 2 and output as a focus error signal and a tracking error signal. Focus adjustment is performed based on the output focus error signal, and tracking adjustment is performed based on the tracking error signal. A means for controlling the focus / tracking adjustment is separately provided in the DVD player (not shown). In this embodiment, since a two-layer optical disk is used, focus / tracking adjustment is performed for both the first information layer 1a and the second information layer 1b.

  Next, the electric signal from the pickup 2 is amplified by the amplifier 3 and input to the signal correction unit 4. The signal correction unit detects signal jitter for each of the first and second information layers 1a and 1b, and performs signal correction such as equalizer adjustment so that the jitter is minimized. Detailed operation will be described later.

  Next, control signals and TOC (Table of Contents) recorded in the lead-in area (or lead-out area) of the disk 1 are read. Next, based on the read control signal and TOC, initial screens such as a title screen and a menu screen are generated inside the device and displayed on a display device such as a television receiver connected to the device. A description of the process from reading the TOC information to displaying the initial screen is omitted. With the above operation, the starting operation is completed, and the disk 1 can be reproduced.

  Next, the reproducing operation of the disc 1 will be described.

  When the startup operation is completed and the user operates the DVD player to give a playback command, the loading mechanism rotates the disc 1 at a predetermined number of rotations. Next, the laser diode in the pickup 2 irradiates a predetermined track on the information layer of the disk 1 with a light beam, and the pickup 2 receives the light beam reflected on the information layer. In the big cup 2, the received light beam is converted into an electric signal and output.

  Next, the electrical signal output from the pickup 2 is amplified by the amplifier 3 and input to the signal correction unit 4. The signal correction unit 4 sets the optimum equalizer obtained at the start-up operation to correct the electric signal input from the amplifier 3. The corrected electrical signal is input to the ADC 5 and converted from an analog signal to a digital signal. The converted digital signal is demodulated into a video signal by the demodulator 6. The demodulation operation in the demodulator 6 is performed based on the synchronization signal from the PLL 7. The demodulated video signal is input to the error correction unit 8 to detect a code error in the video signal and perform error correction processing on the code error. The video signal output from the error correction unit 8 is converted into an analog signal by the DAC 9 and input to the reproduction signal memory 11. The reproduction signal memory 11 is controlled so that the writing and reading speed and timing are controlled by a control circuit (not shown) provided separately, and at least the reading speed does not exceed the writing speed. This is because the reproduction signal may be interrupted when the reading speed exceeds the writing speed. The video signal read from the reproduction signal memory 11 is output from this apparatus and is displayed on a display device such as an externally connected television receiver.

  Next, the signal correction unit 4 will be described in detail.

  In FIG. 2, double line arrows indicate the flow of electrical signals read from the information layer of the disk 1, and solid line arrows indicate the flow of control signals and the like.

  Reference numeral 40 denotes an input terminal to which an electric signal from the amplifier 3 is input. Reference numeral 41 denotes an output terminal. The output terminal 41 is for outputting a signal from the first equalizer characteristic setting means 21 or the second equalizer characteristic setting means 31.

  The first equalizer characteristic setting means 21 sets the characteristic of the electric signal of the first layer of the disk 1 input from the input terminal 40. Elements to be set are a cutoff frequency and a boost amount. FIG. 4 is a characteristic diagram showing an example of the frequency characteristic of the electric signal, where the horizontal axis represents the frequency and the vertical axis represents the gain value of the electric signal. In the figure, fc is the cut-off frequency, fb is the boosting frequency, RF1 is the characteristic of the electric signal read from the disk 1, RF2 is the characteristic after the first equalizer characteristic setting, and RF3 is after the nth equalizer characteristic setting. The characteristics are shown. When the first equalizer characteristic setting means 21 sets the equalizer so as to increase the boost amount, the gain value at the frequency fb in FIG. 4 can be increased. If the equalizer characteristic is set so as to change the cutoff frequency, the frequency fc in FIG. 4 can be displaced in the horizontal axis direction.

  Here, the “first layer” corresponds to the information layer in which the servo is first drawn into the disk 1. For example, when the servo is first drawn into the disk 1 for the second information layer 1b, the second information layer 1b corresponds to the “first layer”. Next, when the servo is pulled in for the first information layer 1a, the first information layer 1a corresponds to the “second layer”.

  The first signal quality detection means 22 receives the electric signal whose characteristic is adjusted by the first equalizer characteristic setting means 21 and obtains a jitter value in the electric signal.

  The first equalizer characteristic optimizing unit 23 sets an equalizer characteristic for the first equalizer characteristic setting unit 21 based on the jitter value output from the first signal quality detecting unit 22. The set value in the first equalizer characteristic optimizing means 23 is set by quantitatively changing the initial value stepwise. That is, with the initial value set as a reference, the boost amount and the cut-off frequency are changed by a certain amount to obtain the first set value. Next, the boost amount and the cut-off frequency are changed by a certain amount on the basis of the first set value to obtain the second set value. In this embodiment, the equalizer setting value is quantitatively changed stepwise. However, a plurality of equalizer setting values (a boost amount, a cutoff frequency value, etc.) are prepared in advance, and a plurality of jitter values are set depending on the jitter value. A configuration may be adopted in which an optimum equalizer setting value is selected from the equalizer setting values.

  The first equalizer control unit 20 includes a first equalizer characteristic setting unit 21, a first signal quality detection unit 22, and a first equalizer characteristic optimization unit 23.

  When the first equalizer characteristic setting unit 21 learns the equalizer setting, the learned flag changing unit 24 sets the learned flag stored in the memory 25 (described later) to “unlearned” (for example, “0”). To “learned” (for example, “1”).

  The memory 25 is storage means for storing a learned flag, an equalizer initial value (hereinafter referred to as an initial value), an equalizer optimum value (hereinafter referred to as an optimal value), and a jitter reference value.

  The learned flag confirmation means 26 reads the learned flag from the memory 25 and confirms whether or not it has been learned based on the setting of the flag. The confirmation result is output to the first equalizer characteristic setting means 21.

  The second equalizer control unit 30 includes a second equalizer characteristic setting unit 31, a second signal quality detection unit 32, a second equalizer characteristic optimization unit 33, a comparison unit 34, and an optimization necessity control unit 35 (whichever Are also described below.

  The second equalizer characteristic setting means 31 sets the characteristic of the electric signal of the second layer of the disk 1 input from the input terminal 40. Elements to be set are a cutoff frequency and a boost amount. Since the specific setting operation is the same as that of the first equalizer characteristic setting means 21 described above, the description thereof is omitted. Further, the second equalizer characteristic setting unit 31 inputs the learned flag information from the learned flag confirmation unit 26, and inputs the equalizer optimum value from the memory 25 if it has been learned. If not learned, optimization learning for equalizer settings is started.

  The second signal quality detection unit 32 inputs the electric signal whose equalizer characteristic has been changed and is output from the second equalizer characteristic setting unit 31 and obtains its jitter value.

  The second equalizer characteristic optimizing unit 33 sets an equalizer characteristic for the second equalizer characteristic setting unit 31 based on the jitter value output from the second signal quality detecting unit 32. The set value in the second equalizer characteristic optimizing means 33 is set by changing the initial value quantitatively stepwise. Note that the specific equalizer characteristic setting method is the same as the operation of the first equalizer characteristic optimizing unit 23 described above, and a description thereof will be omitted.

  The comparison unit 34 compares the jitter value calculated by the second signal quality detection unit 32 with the jitter reference value read from the memory 25.

  If the jitter value is lower than the jitter reference value as a result of the comparison by the comparison unit 34, the optimization necessity control unit 35 issues an optimization unnecessary instruction to the second equalizer characteristic setting unit 31, and the jitter value is determined. If it is higher than the jitter reference value, an optimization command is issued to the second equalizer characteristic optimizing means 33.

  The control means 27 controls the first and second equalizer control means 20 and 30 and the learned flag confirmation means 26.

  With respect to the signal correction unit configured as described above, the equalizer setting operation will be described below with reference to the flowchart of FIG.

  An electrical signal read from each layer of the disk 1 is input to the input terminal 40. Specifically, an electric signal output from the amplifier 3 in FIG. 1 is input. When the input electric signal is an electric signal read from the first layer of the disk 1, the electric signal is input to the first equalizer characteristic setting means 21 and read from the second layer of the disk 1. In this case, it is input to the second equalizer characteristic setting means 31. Note that the association between the first layer of the disk 1 and the first equalizer control means 20 and the association between the second layer and the second equalizer control means 30 are performed by the control means 27. The control means 27 controls the information read from the information layer (first layer) accessed first in the disk 1 to be input to the first equalizer characteristic setting means 21, and next accesses the information layer (second layer). The second equalizer characteristic setting unit 31 is controlled to input the information read out from (2).

  First, the optimization process of the first layer will be described. The first layer optimization process is executed when the disk is started.

  When performing optimization learning of the first layer, it is confirmed whether or not the first layer has been learned (step S1 in FIG. 3). Specifically, the learned flag confirmation unit 26 confirms the state of the learned flag stored in the memory 25 under the control of the control unit 27, and outputs the confirmation result to the first equalizer characteristic setting unit 21. . In the first equalizer characteristic setting means 21, when the learned flag is set, it is not necessary to perform the optimization learning for the first layer, so the process proceeds to the optimization learning of the second layer. When not standing, optimization learning is started. Since the learned flag is reset when the power of the apparatus main body is turned off or the disk is taken out of the apparatus main body, the flag is not normally set immediately after loading the disk.

  Next, information is read from the first layer of the disk 1 by the pickup 2 and input to the input terminal 40 as an electrical signal (step S11). Next, the equalizer initial value is read from the memory 25, and the equalizer setting is performed by the first equalizer characteristic setting means 21 (step S12). The first equalizer characteristic setting means 21 outputs an electric signal whose characteristic has been changed to the first signal quality detection means 22 based on the set equalizer setting (initial value).

  The first signal quality detection means 22 calculates the jitter value of the input electrical signal (step S13). The calculated jitter value is output as first signal quality information.

  The first signal quality information is input to the first equalizer characteristic optimization unit 23. The first equalizer characteristic optimizing unit 23 changes the equalizer characteristic based on the first signal quality information, and outputs it as a “set value” to the first equalizer characteristic setting unit 21 (step S14). In the present embodiment, the “setting value” is set by changing the boost amount and the cut-off frequency by a certain amount with reference to the initial value setting.

  The first equalizer characteristic setting unit 21 changes the equalizer setting based on the setting value output from the first equalizer characteristic optimization unit 23. The electrical signal whose characteristics are changed by the changed equalizer setting is output to the first signal quality detection means 22.

  The first signal quality detection means 22 calculates the jitter value of the electrical signal and outputs it to the first equalizer characteristic optimization means 23 as the second signal quality information (step S15).

  The first equalizer characteristic optimizing means 23 compares the first signal quality information and the second signal quality information (step S16). That is, the jitter value in each signal quality information is compared, the one with the better value (the smaller value) is adopted, and the equalizer characteristics are set. Here, when the jitter value of the first signal quality information is lower, the setting value of the equalizer characteristic is returned to the initial value. However, when the jitter value of the second signal quality information is lower, the equalizer characteristic is the current state. Leave as it is.

  The optimization process as described above is repeated until the jitter value calculated by the first signal quality detection means 22 is minimized (step S17). Specifically, the jitter value is calculated by gradually changing the equalizer setting value that can be set by the first equalizer characteristic optimizing unit 23, and the jitter value calculated this time becomes larger than the jitter value calculated last time. It is determined that the previously detected jitter value is minimum. The equalizer setting value when the jitter value is minimized is set as the equalizer optimum value in the first layer.

  When the optimum value is set, the first equalizer characteristic setting means 21 outputs an electrical signal having the equalizer characteristic set by the optimum value from the output terminal 41 to the ADC 5. Further, it instructs the learned flag changing means 24 to change the learned flag in the memory 25. As a result, the learned flag changing unit 24 changes the learned flag in the memory 25. Further, the first equalizer characteristic setting unit 21 writes the optimum value in the memory 25 (step S18). This completes the optimization learning of the first layer (step S19).

  Next, the optimization process of the second layer will be described. Note that the optimization process for the second layer is also executed when the disk is started, as in the first layer.

  After the optimization process for the first layer is completed, information is read from the second layer of the disk 1 and input to the input terminal 40 as an electrical signal (step S2). The electric signal input to the input terminal 40 is input to the second equalizer characteristic setting unit 31.

  In the second equalizer characteristic setting unit 31, when an electric signal of the second layer is input, first, an optimum value is read from the memory 25, and the equalizer setting is performed by the second equalizer characteristic setting unit 31 (step S3). The second equalizer characteristic setting unit 31 outputs an electric signal whose characteristic has been changed to the second signal quality detection unit 32 based on the equalizer setting. Note that the optimum value stored in the memory 25 is the optimum value set during the optimization learning of the first layer as described above.

  The second signal quality detection means 32 calculates the jitter value of the input electrical signal (step S4). The calculated jitter value is output to the second equalizer characteristic optimizing means 33 and the comparing means 34 as the first signal quality information.

  The comparison means 34 receives the first signal quality information and the optimum jitter value output from the memory 25. The comparison unit 24 compares the jitter value, which is the first signal quality information, with the jitter reference value (step S5), and outputs the comparison result to the optimization necessity control unit 35. If the jitter value is smaller than the jitter reference value as a result of the comparison in the comparison unit 34, the optimization necessity control unit 35 determines that optimization learning is not necessary, and optimizes the second equalizer characteristic setting unit 31. Output unnecessary instructions. The second equalizer characteristic setting means 31 outputs an electric signal based on the equalizer setting of the optimum value from the output terminal 41 to the ADC 5, and the second layer optimization process is completed (step S25).

  On the other hand, if the comparison result in the comparison unit 34 indicates that the jitter value is larger than the jitter reference value, it is determined that optimization learning is necessary, and an optimization command is output to the second equalizer characteristic setting unit 33.

  When the optimization command is input from the optimization necessity control unit 35, the second equalizer characteristic optimization unit 33 changes the equalizer setting based on the first signal quality information, and sets the second “setting value” as the second setting value. Is output to the equalizer characteristic setting means 31 (step S21). The “setting value” is set by changing the boost amount and the cut-off frequency by a certain amount based on the setting of the optimum value.

  The second equalizer characteristic setting unit 31 changes the equalizer setting based on the setting value output from the second equalizer characteristic optimization unit 33. The electrical signal whose characteristics are changed by the changed equalizer setting is output to the second signal quality detection means 32.

  The second signal quality detection means 32 calculates the jitter value of the electrical signal, and outputs it to the second equalizer characteristic optimization means 33 as second signal quality information (step S22).

  The second equalizer characteristic optimizing means 33 compares the first signal quality information with the second signal quality information (step S23). That is, the jitter value in each signal quality information is compared, the one with the better value (the smaller value) is adopted, and the equalizer characteristics are set. If the jitter value of the first signal quality information is lower, the equalizer characteristic setting value is returned to the original state (the optimum value stored in the memory 25). However, if the jitter value is low, the equalizer characteristics remain as they are.

  The optimization process as described above is repeated until the jitter value calculated by the second signal quality detection unit 32 is minimized (step S24). The equalizer setting value when the jitter value is minimized is set as the optimum value in the second layer.

  When the optimum value is set, the second equalizer characteristic setting means 31 outputs the electric signal having the equalizer characteristic set by the optimum value to the ADC 5 from the output terminal 41, and the optimization learning of the second layer is finished. (Step S25).

  Although not shown, the second equalizer characteristic setting unit 31 may write the optimum value of the equalizer characteristic in the second layer into the memory 25.

  As described above, according to the present embodiment, in the optimization learning of the second layer, the equalizer setting is performed using the equalizer optimum value set in the optimization learning of the first layer, and the jitter value at that time is low. In this case, since the optimization learning of the second layer is configured to be omitted, the time required for the optimization learning can be shortened. Furthermore, when optimization learning is performed at the time of starting the apparatus as in the present embodiment, the starting time of the apparatus can be shortened.

  In the present embodiment, the equalizer is set based on the jitter value. However, the equalizer may be set based on the number of error corrections (error rate). For example, the number of error corrections is compared with a predetermined value (for example, the number of PI correction errors for 8 ECC blocks is 100). Then, the second equalizer characteristic optimization process is performed. When the error rate and the number of error corrections are used as described above, the error rate detection unit 10 in FIG. 1 detects the error rate of the reproduction signal, and the detected error rate is converted into the first signal quality detection unit 22 and the first signal quality detection unit 22 in FIG. 2 is input to the signal quality detection means 32.

  In this embodiment, the equalizer optimum value is stored in the memory 25. However, in an apparatus capable of recording information on a disc such as a DVD recorder, the optimum value is set to the lead-in of the disc. Write to the area (may be the inner circumference of the disc rather than the lead-in area) or the lead-out area (may be the inner data area of the lead-out area or the outer circumference of the disc than the lead-out area) It does not matter as a configuration. That is, the configuration in the surface direction of a recordable disc such as a DVD-RAM includes a lead-in area for recording control information and the like from the inner periphery of the disc, a data area for recording user information signals on the outer periphery of the lead-in area, and a data area. In order to increase redundancy on the outer periphery of the lead, the control information recorded in the lead-in area is roughly divided into lead-out areas. When a user information signal is recorded in this data area, a power calibration area (PCA) for learning the optimum laser power corresponding to the recording linear velocity is generally provided on the inner periphery side from the lead-in area or the lead-in area. (Hereinafter referred to as inner circumference PCA). Also, in recent years, since the disk is rotated at a high speed in response to a request for higher recording speed, it is assumed that the recording learning result cannot be recorded in the lead-in area or the PCA on the inner circumference side from the lead-in area. A configuration has been proposed in which a PCA (hereinafter referred to as an outer peripheral PCA) is provided on either the outer circumference side of the disc from the lead-out area or the data area on the lead-out area side (that is, the outer circumference side of the data area). Therefore, for example, the optimum value stored in the memory 25 when the disk is carried out from the device may be recorded on the inner circumference PCA and / or the outer circumference PCA. With this configuration, when the disk 1 is taken out from the apparatus and reloaded in the same apparatus or another apparatus, optimization learning can be omitted, so that the startup time can be further shortened. Further, by recording the optimum value on the inner circumference PCA and / or the outer circumference PCA, the optimum value of the equalizer characteristic can also be recorded without changing the area configuration of the recordable disc.

  Further, details and numerical values of the circuit configuration and the flowchart in the present embodiment are examples, and similar effects can be obtained even with other configurations and numerical values.

  The present invention is useful when applied to an information medium having a plurality of information layers.

Block diagram of an information reproducing apparatus according to an embodiment of the present invention The block diagram which shows the structure of the signal correction | amendment part in the embodiment Flow chart of equalizer characteristic optimization processing according to the embodiment Characteristic diagram showing frequency characteristics of electrical signals Block diagram of a conventional equalizer characteristic setting device

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Disc 2 Pickup 4 Signal correction | amendment part 21 1st equalizer characteristic change means 22 1st signal quality detection means 23 1st equalizer characteristic optimization means 25 Memory 31 2nd equalizer characteristic change means 32 2nd signal quality detection Means 33 Second equalizer characteristic optimizing means 34 Comparator

Claims (4)

An information reproducing apparatus that reads first and second information signals from an information medium including at least first and second information layers, and optimizes equalizer characteristics of the read information signals,
First equalizer characteristic setting means for changing a frequency characteristic in a processing path of the first information signal based on an equalizer setting;
First signal quality detection means for detecting jitter of the first information signal output from the first equalizer characteristic setting means;
Control is performed to change the equalizer setting of the first equalizer characteristic setting means so that the jitter detected by the first signal quality detection means is reduced, and equalizer setting information when the jitter is minimized First equalizer characteristic optimizing means for outputting
Storage means for storing the equalizer setting information output from the first equalizer characteristic setting means and a jitter reference value;
Second equalizer characteristic setting means for changing a frequency characteristic in the processing path of the second information signal based on an equalizer setting;
Second signal quality detection means for detecting jitter of the second information signal output from the second equalizer characteristic setting means;
Comparing means for comparing the jitter detected by the second signal quality detecting means with a jitter reference value stored in the storage means;
As a result of the comparison by the comparison means, when the jitter exceeds the jitter reference value, the second equalizer characteristic optimality is controlled to change the equalizer setting of the second equalizer characteristic setting means so that the jitter is reduced. Comprising
The second equalizer characteristic optimizing unit controls the end of the optimization process when the jitter does not exceed the jitter reference value as a result of the comparison by the comparing unit. apparatus.   The equalizer characteristic setting device according to claim 1, wherein the first information layer is a layer in which servo is first drawn.   The equalizer characteristic setting device according to claim 1, wherein an initial value of an equalizer setting of the second information signal is the equalizer optimum value.   2. The equalizer characteristic setting device according to claim 1, wherein the first and second signal quality detection means detect error rates of the first and second information signals.

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