JP2006303765A - Tcp/ip transmission processing circuit and semiconductor integrated circuit provided with the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a TCP/IP transmission processing circuit or the like capable of calculating a check sum of an IP header and a check sum of the TCP or the UDP. <P>SOLUTION: The TCP/IP transmission processing circuit 5 includes: a buffer memory 24; a check sum calculation processing section 25 for calculating the check sum of the IP header and the check sum of the TCP or the UDP; a DMA processing section 21 for applying DMA transfer to a frame generated by a higher-order layer; and a check sum control section 22 that receives the frame, writes the frame to the buffer memory 24, allows the check sum calculation processing section 25 to calculate the check sum of the IP header, thereafter allows the check sum calculation processing section 25 to calculate the check sum of the TCP or the UPD, inserts the check sum of the IP header and the check sum of the TCP or the UDP into the frame stored in the buffer memory 24, and transfers the resulting frame to a lower-order layer. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a TCP / IP transmission processing circuit for performing transmission processing of TCP / IP (Transmission Control Protocol / Internet Protocol). Furthermore, the present invention relates to a semiconductor integrated circuit including such a TCP / IP transmission processing circuit.

  Currently, a hierarchical model of a communication protocol called TCP / IP is widely used in the Internet, LAN (Local Area Network) and the like. FIG. 7 is a diagram showing an approximate correspondence between each layer of the TCP / IP hierarchical model and each layer of the OSI (Open Systems Interconnection) reference model established by ISO (International Organization for Standardization).

  The network interface layer of the TCP / IP hierarchical model is Ethernet (registered trademark), the Internet layer of the TCP / IP hierarchical model is IP (Internet Protocol), and the transport layer of the TCP / IP hierarchical model is TCP (Transmission Control). Protocol) or UDP (User Datagram Protocol) is widely used. Note that Ethernet (registered trademark) is defined in IEEE 802.3, etc., IP is defined in RFC (Request For Comments) 791, etc., TCP is defined in RFC 793, etc., and UDP is defined in RFC 768, etc.

  FIG. 8 is a diagram showing a format of an Ethernet (registered trademark) frame (hereinafter simply referred to as “frame”). As shown in FIG. 8, the frame has a header and a payload. An IP packet is stored in the payload. When a frame is actually transmitted on the network, a preamble is added to the head and a frame check sequence is added to the end.

  FIG. 9 is a diagram showing the format of an IP packet. As shown in FIG. 9, the IP packet has an IP header and an IP payload. An area for storing the header checksum exists in the IP header. The header checksum stored in this area is a 16-bit one's complement sum of the 16-bit width one's complement sum of the IP header. A TCP packet or a UDP packet is stored in the IP payload.

  FIG. 10 is a diagram illustrating a format of a TCP packet. As shown in FIG. 10, a TCP packet has a TCP pseudo header, a TCP header, and a TCP payload. An area for storing a checksum exists in the TCP header. The checksum stored in this area is a one's complement of the 16-bit wide one's complement sum of the TCP pseudo header, the TCP header, and the TCP payload. Note that the TCP pseudo header is used only for checksum calculation at the time of transmission, and is not actually transmitted on the network.

  FIG. 11 is a diagram illustrating a format of a UDP packet. As shown in FIG. 11, the UDP packet has a UDP pseudo header, a UDP header, and a UDP payload. An area for storing a checksum exists in the UDP header. The checksum stored in this area is a 1's complement of the 16-bit wide 1's complement sum of the UDP pseudo header, the UDP header, and the UDP payload. The UDP pseudo header is used for calculating the checksum at the time of transmission, and is not actually transmitted on the network.

  As described above, when a TCP packet is transmitted, it is necessary to calculate two checksums: an IP header checksum and a TCP checksum. Similarly, when a UDP packet is transmitted, it is necessary to calculate two checksums: an IP header checksum and a UDP checksum. The calculation load of these checksums is very heavy.

  As a related technique, the following Patent Document 1 discloses a network adapter system in which the overhead of a processor is reduced by calculating and inserting a checksum. The network adapter system is connected to a network and includes a processor, a main storage device, and a network adapter. The network adapter includes: (a) a DMA bus; (b) means connected to the DMA bus for storing network packets; (c) connected to the DMA bus for transferring network packets between the main memory and the packet storage means. Means for transferring; (d) means connected to the DMA bus for calculating the checksum of the network packet during the transfer of the network packet: the checksum calculating means comprises snoop means for monitoring the transfer data on the DMA bus.

  Patent Document 1 describes that a checksum of a network packet can be calculated during transfer of the network packet between the main storage device and the packet storage means. Is not described.

JP-A-6-78024 (first page, FIG. 1)

  Therefore, in view of the above points, an object of the present invention is to provide a TCP / IP transmission processing circuit capable of calculating an IP header checksum and a TCP or UDP checksum. Another object of the present invention is to provide a semiconductor integrated circuit including such a TCP / IP transmission processing circuit.

  In order to solve the above problems, a TCP / IP transmission processing circuit according to the present invention is a circuit for performing transmission processing of TCP / IP (Transmission Control Protocol / Internet Protocol), and a buffer for storing a frame. Memory, a checksum calculation processing unit for calculating an IP (Internet Protocol) header checksum and a TCP (Transmission Control Protocol) or UDP (User Datagram Protocol) checksum, and a frame created in an upper layer DMA processing unit for DMA (Direct Memory Access) transfer, a frame generated in the upper layer is received from the DMA processing unit and written to the buffer memory, and a checksum calculation processing unit based on the frame received from the DMA processing unit To calculate the IP header checksum and receive it from the DMA processor. The checksum calculation processing unit calculates the TCP or UDP checksum based on the received frame, the IP header checksum calculated by the checksum calculation processing unit in the frame stored in the buffer memory, and A checksum control unit for inserting a TCP or UDP checksum and transferring it to a lower layer.

  In this TCP / IP transmission processing circuit, a frame created in an upper layer includes a MAC (Media Access Control) header, an IP header, a TCP or UDP header, TCP or UDP data, and a TCP or UDP pseudo header in order. The DMA processing unit sequentially transfers the MAC header, IP header, TCP or UDP header, TCP or UDP data, TCP or UDP pseudo header in the frame created in the upper layer to the checksum control unit, and performs checksum control. Unit writes the MAC header, IP header, TCP or UDP header, and TCP or UDP data received from the DMA processing unit to the buffer memory, and sends the IP header received from the DMA processing unit to the checksum calculation processing unit. Header checksum total The TCP or UDP header, the TCP or UDP data, and the TCP or UDP pseudo header received from the DMA processing unit are sent to the checksum calculation processing unit to calculate the TCP or UDP checksum. Also good.

  Further, the frame created in the upper layer includes the MAC header, the IP header, the TCP or UDP header, and the TCP or UDP data in order, and the DMA processing unit performs the MAC header in the frame created in the upper layer. , IP header, TCP or UDP header, TCP or UDP data are sequentially transferred to the checksum control unit, and then the IP header in the frame created in the upper layer is transferred again to the checksum control unit, and the checksum control unit Writes the MAC header, IP header, TCP or UDP header, and TCP or UDP data received from the DMA processing unit to the buffer memory, and sends the IP header received from the DMA processing unit to the checksum calculation processing unit. Calculate header checksum, D A TCP or UDP header received from the A processing unit, and TCP or UDP data, and data corresponding to the TCP or UDP pseudo header created based on the IP header received again from the DMA processing unit to the checksum calculation processing unit It may be sent to calculate the TCP or UDP checksum.

  The semiconductor integrated circuit according to the present invention includes the TCP / IP transmission processing circuit according to the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, about the same component, it has shown with the same reference number.
FIG. 1 is a block diagram showing an outline of a computer using a TCP / IP (Transmission Control Protocol / Internet Protocol) transmission processing circuit as an embodiment of the present invention. The computer 1 includes a physical layer processing circuit (PHY) 2 connected to a network N, a MAC (Media Access Control) processing circuit 3, a MAC bridge circuit 4, and TCP / IP transmission as an embodiment of the present invention. A processing circuit 5, a TCP / IP reception processing circuit 6, an interface circuit 7, a CPU 8, a main memory 9, an HDD (hard disk drive) 10, an input unit 11, and a display unit 12 are provided.

  In this embodiment, the network interface layer of the TCP / IP hierarchical model is assumed to be Ethernet (registered trademark), and the physical layer processing circuit 2, the MAC processing circuit 3, and the MAC bridge circuit 4 serve as the network interface layer. Shall. The physical layer processing circuit 2 is connected to the network N, the MAC processing circuit 3 is connected to the physical layer processing circuit 2, and the MAC bridge circuit 4 is connected to the MAC processing circuit 3.

  In the present embodiment, the Internet layer and the transport layer of the TCP / IP hierarchical model are assumed to be IP (Internet Protocol) and TCP (Transmission Control Protocol) or UDP (User Datagram Protocol), and TCP / IP transmission processing Assume that the circuit 5, the TCP / IP reception processing circuit 6, and the interface circuit 7 serve as the Internet layer and the transport layer. The TCP / IP transmission processing circuit 5 and the TCP / IP reception processing circuit 6 are respectively connected between the MAC bridge circuit 4 and the interface circuit 7.

  In addition, the CPU 8, the main memory 9, the HDD 10, the input unit 11, and the display unit 12 assume an application layer of the TCP / IP hierarchical model. For example, the HDD 10 stores a web browser program, a mail client program, and the like, and the CPU 8 executes these programs while using the main memory 9 as a work area. The CPU 8, the main memory 9, the HDD 10, the input unit 11, and the display unit 12 are connected via a bus B, and the bus B is connected to the interface circuit 7.

  The TCP / IP transmission processing circuit 5 includes a DMA (Direct Memory Access) processing unit 21, a checksum control unit 22, a buffer memory 24, and a checksum calculation processing unit 25. The checksum control unit 22 has an IP checksum register 23.

Next, the operation of the TCP / IP transmission processing circuit 5 will be described.
FIG. 2 is a flowchart showing a first operation of the TCP / IP transmission processing circuit 5. The first operation of the TCP / IP transmission processing circuit 5 is that the frame of the format shown in FIG. 3 is the main memory 9 (see FIG. 1) in an API (Application Programming Interface) for using the transport layer and the Internet layer from the application layer. ) In the case of being created in ().

  The frame shown in FIG. 3 includes a MAC header (see (a) in FIG. 3), an IP header (see (a) in FIG. 3), a TCP header (see (c) in FIG. 3), data (see (d) in FIG. 3), And a TCP pseudo header (see (e) in FIG. 3). Note that although TCP is used here, the same applies to the case of using UDP. In the case of using UDP, if the frame includes a UDP header instead of a TCP header (see c in FIG. 3) and a UDP pseudo header instead of a TCP pseudo header (see o in FIG. 3). good.

  When the frame shown in FIG. 3 is created in the main memory 9 in the application layer as the upper layer, the DMA processing unit 21 in the TCP / IP transmission processing unit 5 transfers the frame from the main memory 9 to the checksum control unit 22. DMA transfer is performed (step S11). Note that the DMA processing unit 21 proceeds from the top to the bottom in the frame of FIG. 3, that is, in the order of MAC header, IP header, TCP header, data, and TCP pseudo header (a → i → c → DMA transfer is performed in the order of d to o).

  When receiving the MAC header from the DMA processing unit 21, the checksum control unit 22 writes the received MAC header in the buffer memory 24 (step S21).

  Next, when receiving the IP header from the DMA processing unit 21, the checksum control unit 22 writes the received IP header in the buffer memory 24 and sends it to the checksum calculation processing unit 25 (step S22). The checksum calculation processing unit 25 receives the IP header from the checksum control unit 22, calculates the IP header checksum, and sends the IP header checksum obtained as a result of the calculation to the checksum control unit 22. Send (step S31). Upon receiving the IP header checksum from the checksum calculation processing unit 25, the checksum control unit 22 stores it in the IP checksum register 23 (step S23).

  Further, when receiving the TCP header and data from the DMA processing unit 21, the checksum control unit 22 writes the received TCP header and data in the buffer memory 24 and sends the data to the checksum calculation processing unit 25 (step S23). The checksum calculation processing unit 25 receives the TCP header and data from the checksum control unit 22 and starts calculating the TCP checksum (step S32).

  When the checksum control unit 22 receives the TCP pseudo header from the DMA processing unit 21, the checksum control unit 22 sends the received TCP pseudo header to the checksum calculation processing unit 25 (step S25). As described above, since the TCP pseudo header is not actually transmitted on the network, the checksum control unit 22 does not write the TCP pseudo header to the buffer memory 24. Therefore, the buffer memory 24 stores the MAC header, IP header, TCP header, and data (A to D in FIG. 3) in FIG.

  After that, the checksum control unit 22 lowers the frame (including the MAC header, IP header, TCP header, and data) stored in the buffer memory 24 (here, the MAC bridge circuit 4 in FIG. 1). ) Is started (step S26). The checksum control unit 22 transfers the MAC header, the IP header, the TCP header, and the data in the buffer memory 24 to the MAC bridge circuit 4 in the order of data (a → b → c → d in FIG. 3).

  In the transfer to the MAC bridge circuit 4, when the checksum control unit 22 reads the header / checksum storage field of the IP header in the buffer memory 24, the IP header stored in the IP checksum register 23 is read. Insert a checksum into this field and send it to the MAC bridge circuit 4.

  On the other hand, the checksum calculation processing unit 25 receives the TCP pseudo header from the checksum control unit 22 and finishes calculating the TCP checksum, and sends the TCP checksum obtained as a result of the calculation to the checksum control unit 22. Send (step S32).

  When the checksum control unit 22 reads the checksum storage field of the TCP header in the buffer memory 24, the checksum control unit 22 receives the TCP checksum from the checksum calculation processing unit 25 and inserts the TCP checksum into this field. send. Thereafter, the checksum control unit 22 sends the data in the buffer memory 24 to the MAC bridge circuit 4 and ends the process.

  The MAC bridge circuit 4 sends the frame received from the checksum control unit 22 to the MAC processing circuit 3, and the MAC processing circuit 3 adds a frame check sequence to the end of the frame received from the MAC bridge circuit 4. The physical layer processing circuit 2 transmits the received frame on the network N.

  As described above, according to the TCP / IP transmission processing circuit 5, the calculation of two checksums of the IP header checksum and the TCP or UDP checksum is performed using one checksum calculation processing unit 25. Can be performed. Thereby, the speed of TCP / IP transmission processing can be improved with a small circuit scale.

  As shown in FIG. 4, generally, the TCP pseudo header and the UDP pseudo header are arranged before the TCP header and the UDP header (RFC 793, 768, etc.). Accordingly, assuming that the frame created by the upper layer in the main memory 9 has the format shown in FIG. 4, the checksum control unit 22 uses the buffer memory 24 for the MAC header and IP header (a and i in FIG. 4). After writing to the buffer, the TCP pseudo header (c in FIG. 4) is not written to the buffer memory 24, and then the TCP header and data (d and v in FIG. 4) are written to the buffer memory 24. There is a need. That is, the control of writing to the buffer memory 24 becomes complicated.

  On the other hand, in the present embodiment, as shown in FIG. 3, in the frame created by the upper layer in the main memory 9, the TCP pseudo header (see (e) in FIG. 3) is arranged at the end of the frame. Therefore, the checksum control unit 22 can perform continuous writing (burst writing) of the MAC header, IP header, TCP header, and data (A to D in FIG. 3) to the buffer memory 24. As described above, writing control is facilitated and the writing speed can be improved.

Although the operation of the TCP / IP transmission processing circuit 5 in the case of using TCP has been described here, the operation of the TCP / IP transmission processing circuit 5 in the case of using UDP is the same.
In the present embodiment, Ethernet (registered trademark) is used as the network interface layer, but other network interfaces may be used. Various applications such as HTTP can be used as the application layer.

Next, the second operation of the TCP / IP transmission processing circuit 5 will be described.
FIG. 5 is a flowchart showing a second operation of the TCP / IP transmission processing circuit 5. The second operation of the TCP / IP transmission processing circuit 5 is that the frame of the format shown in FIG. 6 is the main memory 9 (see FIG. 1) in the API (Application Programming Interface) for using the transport layer and the Internet layer from the application layer. ) In the case of being created in ().

  The frame shown in FIG. 6 includes a MAC header (see a in FIG. 6), an IP header (see a in FIG. 6), a TCP header (see c in FIG. 6), and data (see d in FIG. 6). ) Is included. Note that although TCP is used here, the same applies to the case of using UDP. When UDP is used, the frame may include a UDP header instead of the TCP header (see c in FIG. 6).

  When the frame shown in FIG. 6 is created in the main memory 9 in the application layer as the upper layer, the DMA processing unit 21 in the TCP / IP transmission processing unit 5 transfers the frame from the main memory 9 to the checksum control unit 22. DMA transfer is performed (step S41). Note that the DMA processing unit 21 proceeds from the top to the bottom in the frame of FIG. 6, that is, in the order of the MAC header, the IP header, the TCP header, and the data (a → b → c → d in FIG. 6). DMA transfer is performed.

  When receiving the MAC header from the DMA processing unit 21, the checksum control unit 22 writes the received MAC header in the buffer memory 24 (step S51).

  Next, when receiving the IP header from the DMA processing unit 21, the checksum control unit 22 writes the received IP header in the buffer memory 24 and sends it to the checksum calculation processing unit 25 (step S52). The checksum calculation processing unit 25 receives the IP header from the checksum control unit 22, calculates the IP header checksum, and sends the IP header checksum obtained as a result of the calculation to the checksum control unit 22. Send (step S61). Upon receiving the IP header checksum from the checksum calculation processing unit 25, the checksum control unit 22 stores it in the IP checksum register 23 (step S53).

  Further, when receiving the TCP header and data from the DMA processing unit 21, the checksum control unit 22 writes the received TCP header and data in the buffer memory 24 and sends the data to the checksum calculation processing unit 25 (step S53). The checksum calculation processing unit 25 receives the TCP header and data from the checksum control unit 22 and starts calculating the TCP checksum (step S62). The buffer memory 24 stores the MAC header, IP header, TCP header, and data (A to D in FIG. 6) in FIG.

  Thereafter, the DMA processing unit 21 DMA-transfers the IP header in the main memory 9 again to the checksum control unit 22 (step S42). Upon receiving the IP header again, the checksum control unit 22 creates data corresponding to the TCP pseudo header using the received IP header and sends the data to the checksum calculation processing unit 25 (step S55). As shown in FIG. 10, the TCP pseudo header includes a source IP address, a destination IP address, a protocol number (TCP protocol number is “6”), and a packet length (the sum of the TCP header length and the TCP payload length). Contains four pieces of information. Among these pieces of information, the source IP address, the destination IP address, and the protocol number are included in the IP header (see FIG. 9). The packet length can be obtained by subtracting the header length in the IP header from the datagram length in the IP header.

  Similar to the TCP pseudo header, the UDP pseudo header also includes a source IP address, a destination IP address, a protocol number (the UDP protocol number is “17”), and a packet length (the sum of the UDP header length and the UDP payload length). 4). Among these pieces of information, the source IP address, the destination IP address, and the protocol number are included in the IP header, and the packet length is obtained by subtracting the header length in the IP header from the datagram length in the IP header. Can be obtained.

  Referring to FIG. 5 again, the checksum control unit 22 moves to the lower layer (MAC bridge circuit 4) of the frame (including the MAC header, IP header, TCP header, and data) stored in the buffer memory 24. Is started (step S56). The checksum control unit 22 transfers the MAC header, IP header, TCP header, and data in the buffer memory 24 to the MAC bridge circuit 4 in the order of data (a → b → c → d in FIG. 6).

  In the transfer to the MAC bridge circuit 4, when the checksum control unit 22 reads the header / checksum storage field of the IP header in the buffer memory 24, the IP header stored in the IP checksum register 23 is read. Insert a checksum into this field and send it to the MAC bridge circuit 4.

  On the other hand, the checksum calculation processing unit 25 receives the data corresponding to the TCP pseudo header from the checksum control unit 22 and ends the calculation of the TCP checksum, and the checksum obtained as a result of the calculation is the checksum. The data is sent to the control unit 22 (step S62).

  When the checksum control unit 22 reads the checksum storage field of the TCP header in the buffer memory 24, the checksum control unit 22 receives the TCP checksum from the checksum calculation processing unit 25 and inserts the TCP checksum into this field. send. Thereafter, the checksum control unit 22 sends the data in the buffer memory 24 to the MAC bridge circuit 4 and ends the process.

  As described above, according to the TCP / IP transmission processing circuit 5, the calculation of two checksums of the IP header checksum and the TCP or UDP checksum is performed using one checksum calculation processing unit 25. Can be performed.

  Further, as shown in FIG. 6, it is possible to omit the TCP pseudo header in a frame created in the main memory 9 by the upper layer.

  Although the operation of the TCP / IP transmission processing circuit 5 in the case of using TCP has been described here, the operation of the TCP / IP transmission processing circuit 5 in the case of using UDP is the same.

  The present invention can be used in a TCP / IP transmission processing circuit. This TCP / IP transmission processing circuit can be used in personal computers, mobile phone devices, PDAs, home appliances (television devices, refrigerators, etc.) and the like.

The figure of the system using the TCP / IP transmission processing circuit concerning the embodiment of the present invention. 3 is a flowchart showing the operation of the TCP / IP transmission processing circuit 5 of FIG. The figure which shows the format of the flame | frame produced in the main memory 9 of FIG. The figure which shows the format of a general frame. 3 is a flowchart showing the operation of the TCP / IP transmission processing circuit 5 of FIG. The figure which shows the format of the flame | frame produced in the main memory 9 of FIG. The figure which shows the correspondence of an OSI reference model and a TCP / IP hierarchy model. The figure which shows the format of a frame. The figure which shows the format of an IP packet. The figure which shows the format of a TCP packet. The figure which shows the format of a UDP packet.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Computer, 2 Physical layer processing circuit, 3 MAC processing circuit, 4 MAC bridge circuit, 5 TCP / IP transmission processing circuit, 6 TCP / IP reception processing circuit, 7 Interface circuit, 8 CPU, 9 Main memory, 10 HDD, 11 Input unit, 12 display unit, 21 DMA processing unit, 22 checksum control unit, 23 IP checksum register, 24 buffer memory, 25 checksum calculation processing unit

Claims (4)

A circuit for performing transmission processing of TCP / IP (Transmission Control Protocol / Internet Protocol),
A buffer memory for storing frames;
A checksum calculation processing unit for calculating an IP (Internet Protocol) header checksum and a TCP (Transmission Control Protocol) or UDP (User Datagram Protocol) checksum;
A DMA processing unit for DMA (Direct Memory Access) transfer of a frame created in an upper layer;
A frame created in an upper layer is received from the DMA processing unit and written to the buffer memory, and the checksum calculation processing unit is caused to calculate an IP header checksum based on the frame received from the DMA processing unit. , Causing the checksum calculation processing unit to calculate a TCP or UDP checksum based on the frame received from the DMA processing unit, and calculating the checksum calculation processing unit within the frame stored in the buffer memory. A checksum controller for inserting the IP header checksum and the TCP or UDP checksum and transferring them to a lower layer;
A TCP / IP transmission processing circuit comprising: The frame created in the upper layer includes a MAC (Media Access Control) header, an IP header, a TCP or UDP header, a TCP or UDP data, and a TCP or UDP pseudo header in order,
The DMA processing unit
Transfer MAC header, IP header, TCP or UDP header, TCP or UDP data, TCP or UDP pseudo header in the frame created in the upper layer to the checksum control unit in order,
The checksum control unit
Write the MAC header, IP header, TCP or UDP header, and TCP or UDP data received from the DMA processing unit to the buffer memory, and send the IP header received from the DMA processing unit to the checksum calculation processing unit. IP header checksum calculation is performed, and the TCP or UDP header, TCP or UDP data, and TCP or UDP pseudo header received from the DMA processor are sent to the checksum calculator to send a TCP or UDP header. The TCP / IP transmission processing circuit according to claim 1, wherein checksum calculation is performed. The frame created in the upper layer includes a MAC header, an IP header, a TCP or UDP header, and TCP or UDP data in order,
The DMA processing unit
The MAC header, IP header, TCP or UDP header, TCP or UDP data in the frame created in the upper layer are sequentially transferred to the checksum control unit, and then the IP header in the frame created in the upper layer is Transfer again to the checksum control,
The checksum control unit
Write the MAC header, IP header, TCP or UDP header, and TCP or UDP data received from the DMA processing unit to the buffer memory, and send the IP header received from the DMA processing unit to the checksum calculation processing unit. The TCP or UDP header that is calculated based on the TCP or UDP header received from the DMA processing unit and the TCP or UDP data and the IP header received again from the DMA processing unit. The TCP / IP transmission processing circuit according to claim 1, wherein data corresponding to a pseudo header is sent to the checksum calculation processing unit to calculate a TCP or UDP checksum.   A semiconductor integrated circuit comprising the TCP / IP transmission processing circuit according to claim 1.

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