JP2006276642A - Error diffusion circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an error diffusion circuit which can reduce a sense of noise and does not fix dots of an error diffusion output, and to provide an image display device using the same. <P>SOLUTION: Output image signals of an input memory 101 are reversed to a forward direction and a backward direction in the unit of horizontal scan period. An error value memory 105 is reversed to a forward direction and a backward direction synchronously with the scanning direction of the input memory 101. An appearing pattern having the sense of noise reduced is obtained by error computations of interlace scanning. An output memory 104 returns video signals interlace-scanned to those scanned in the forward direction. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an error diffusion circuit particularly suitable for use in a video signal display device, and more particularly to an error diffusion process capable of linearly displaying the luminance of an input video signal and suppressing the contour.

  Human visual sensitivity has the characteristics of high sensitivity at dark luminance and low sensitivity at bright luminance. For example, a display device using a CRT rarely perceives a difference of one gradation as a contour. This is largely due to the non-linear gamma characteristic of the CRT itself. However, recently, a new digital display device having linear gradation characteristics has been proposed. One example is a display system using a DMD (digital micromirror device) proposed by Texas Instruments. This is a projection display using hundreds of thousands of movable micromirrors (DMDs). In this display system, the input / output characteristics are linear, and the resolution of the display gradation is limited to about 8 bits from the response speed of the movable micromirror. For this reason, human visual sensitivity is higher on the low luminance side, and so-called false contours that can recognize a difference of one gradation are easily perceived. In order to solve the problem of false contour, in a display system using DMD, in order to increase the resolution of display gradation, an input video signal of N bits (usually 8 bits) is converted to a larger number of M bits (gamma conversion). To about 12 bits). However, since the DMD display device is about 8 bits, an M-bit video signal must be converted to about 8 bits. In such a case, an error diffusion method is effective in which quantization is performed by an error diffusion method and a pseudo M-bit gradation can be expressed.

  The error diffusion method is a quantization method in which a quantization error that occurs when a pixel to be processed is quantized is diffused to surrounding unprocessed pixels so that the quantization error approaches 0 on average.

As a conventional error diffusion method, there is an error diffusion method in which the same display pixel is processed by the error diffusion method so that dots appear differently in each frame, and an M-bit gradation is expressed as a time average.
In one example, random noise is added to an error component of (MN) bits to be fed back, and this is added to an M-bit input signal to obtain an output signal with different dot appearances. (For example, refer to Patent Document 1).
In another example, in order to reduce the diffusion pattern characteristic of the image after the error diffusion processing, the forward scanning and the reverse scanning error calculation are alternately performed in the direction of error calculation in units of fields (see, for example, Patent Document 2). ).

JP-A-10-261080 (first page, FIG. 1) JP 2001-142440 A (first page, FIG. 1)

  The above-described conventional method of superimposing random noise has a problem in that the average luminance of the original image quality cannot be preserved and the image quality is deteriorated with a rough feeling. In addition, the method of performing error calculation alternately in the forward and reverse directions on a field basis is not sufficient to reduce the characteristic diffusion pattern, and when viewed from the viewer watching the video signal, the image becomes a noise-like image. Furthermore, in a still video scene, there is a problem that the appearance of dots in the error diffusion output is fixed.

  The present invention has been made to solve the above-described problems, and provides an error diffusion circuit that can reduce a sense of noise and that does not fix error diffusion output dots, and an image display device using the error diffusion circuit. Objective.

  The present invention controls an input memory in which a first video signal composed of a row of pixel signals is written, and writing to and reading from the input memory, so that pixels are line-by-line with respect to the first video signal. A memory control circuit that outputs a second video signal in which the order of the signals is reversed, and a pixel signal of each pixel included in the second video signal, the weighted average of quantization errors for pixels in the vicinity of the pixel; An adder for adding, an output of the adder, a quantization / error value detection unit that sequentially performs quantization and detection of a quantization error value for each pixel, and is processed by a quantization / error value detection unit An error value memory for storing a quantization error value for a pixel processed by the quantization / error value detection unit before a pixel (hereinafter referred to as a “target pixel”), and stored in the error value memory Of the above error values Obtains a weighted average of quantization error for pixels in the vicinity of, providing an error diffusion circuit having a weighted average for supplying the integrated error calculation unit of the error to the adder.

  According to the present invention, the error calculation direction of error diffusion is reversed every horizontal period, and accordingly, reference pixels (vertical component reference pixels) at different vertical positions in the error calculation matrix are processed in the forward direction. By inverting the line processed in the reverse direction, there is an effect that the dot outputted by error diffusion becomes a diffused pattern and the noise feeling is reduced.

Embodiment 1 FIG.
1 is a block diagram showing a configuration of an error diffusion circuit according to a first embodiment of the present invention.
The illustrated error diffusion apparatus includes an input memory 101, an adder 102, a quantization / error value detection unit 103, an output memory 104, an integrated error calculation unit 106, an error value memory 105, and a memory control circuit 107. Have The output of the output memory 104 is supplied to the DLP video display device 108.

  The memory control circuit 107 generates a write address and a read address based on the vertical synchronization signal, the horizontal synchronization signal, and the clock, and writes them to the input memory 101, the output memory 104, and the error value memory 105, respectively. A control signal and a read control signal are provided.

  The input memory 101 is composed of, for example, a line memory having a storage capacity for one line, stores an input video signal composed of a column of pixel signals by a write control signal from the memory control circuit 107, and outputs from the memory control circuit 107. The stored pixel signals are sequentially read by the read control signal. As will be described in detail below, by controlling the order of writing and reading, a video signal in the scanning direction reversed from the input video signal in units of one horizontal period is output.

The adder 102 adds a weighted average of errors, which will be described later, supplied from the integrated error calculation unit 106 to the signal (pixel signal) of each pixel of the video signal output from the line memory 101.
The quantization / error value detection unit 103 quantizes the video signal output from the adder 102 and outputs a quantized video signal, and the difference between the quantized video signal and the pre-quantized video signal. Calculate some quantization error.

  The output memory 104 is composed of, for example, a line memory having a storage capacity for one line, and outputs a video signal output from the quantization / error value detection unit 103 and whose scanning direction is reversed in units of one horizontal period. By performing an operation in accordance with the write control signal and the read control signal from the control circuit 107, a video signal having a uniform scanning direction (having a column of pixel signals in the same order as the input video signal) is output.

The error value memory 105 stores the quantization error value of the previous line.
The integrated error calculation unit 106 uses the error value of the previous pixel supplied from the quantization / error value detection unit 103 and the error value of the pixel on the previous line stored in the error value memory 105. Find the weighted average of the errors.

Next, the operation will be described. First, the input memory 101 in FIG. 1 outputs a video signal whose scanning direction (order of pixel signals) is reversed in units of one horizontal period. A video signal output from the input memory 101 is shown in FIG.
In order to reduce the memory capacity to the minimum necessary for one horizontal resolution (strictly speaking, effective pixels for one horizontal period) and output a video signal with the scanning direction reversed, the read address is preceded and the write address is set. I will follow you. This is realized by reversing the write and read addresses in units of two horizontal periods. Since the input video signal is input with different contents every moment, writing cannot be made faster or slower, but once stored, the readout time can be shifted. FIG. 3 shows the state of the preceding address, and the case where the horizontal resolution is 1024 pixels is described as an example. Note that the read video signal reads the signal one horizontal line before. FIG. 4 shows an operation in which the video signal is output by alternately reversing the order every horizontal period by using the arrow indicating the scanning direction in FIG. In addition, the order in which they are alternately reversed in this way is called “comb type”. In FIG. 4, the writing scanning direction repeats reversal in units of two horizontal scans, and the readout scanning direction repeats reversal in units of the same phase.

The above operation will be described in detail as follows.
(1) In the horizontal scanning line number 1 (horizontal period number 1), the writing scanning direction is the forward direction from left to right (→), the reading is the horizontal scanning number 2, and the reading scanning direction is from left to right (→). The direction and video output are also horizontal scanning number 2, which is the forward direction from left to right (→).
(2) In the horizontal scanning line number 2, the writing scanning direction is the forward direction from left to right (→), the reading is the horizontal scanning number 3, the reading scanning direction is the reverse direction from right to left (←), and the video output is also horizontal. Scan number 3 is the reverse direction from right to left (←).

(3) In the horizontal scanning line number 3, the writing scanning direction is the reverse direction from right to left (←), the reading is the horizontal scanning number 4, the reading scanning direction is the reverse direction from right to left (←), and the video output is also horizontal. Scan number 4 is forward from left to right (→).

Here, returning to FIG.
The address in the line memory is A0 (minimum address) to the maximum address A1023 (maximum address), and the video signal (pixel signal) in the screen is from S0 to S1023 in order from the left end to the right end of each line. To do. When writing is performed in the forward direction (in the forward writing scanning direction), the video signals S0 to S1023 are respectively written to the addresses A0 to A1023, and when writing is performed in the backward direction (in the backward writing scanning direction). Video signal S0-S1023 is written to addresses A1023-A0.
As described above, in the reverse writing scanning direction, the video signal S0 is written to the address A1023 having the maximum address, and finally the video signal S1023 is written to the address A0. When this is read out at the maximum address A1023, which is the readout scanning address in the reverse direction, the video signal S0 is output. Finally, when address A0 is read, the video signal is output by S1023, and as a result, the video signal is forward from left to right (→).

(4) In horizontal scanning line number 4, the writing scanning direction is the reverse direction from right to left (←), reading is horizontal scanning number 5, the reading scanning direction is the forward direction from left to right (→), and the video output is also horizontal. Scan number 5 is from the right to the left (←) in the reverse direction.

  Returning again to FIG. 3, the video signal (S0, S1,... S1023) is written at the write scanning direction address (A1023, A1022,... A0) in the reverse direction, and the read scanning address (A0, When read out at A1,... A1023), the video signal output is in the reverse direction of (S1023, S1022,... S0).

  Thereafter, the operations (1) to (4) are repeated. The video signal is output with a delay of one horizontal period.

  By controlling the input memory, the memory capacity can be realized by one horizontal pixel.

  The adder 102 in FIG. 1 adds the weighted average of errors already calculated by the integrated error calculation unit 106 and the signal of each pixel of the input video signal from the input memory 101, and the integrated error calculation unit 106 Then, a weighted average of errors around the target pixel is obtained.

  This process will be described with reference to the calculation matrix of FIG. 5 (a diagram showing surrounding pixels (reference pixels) used for error diffusion and weighting coefficients corresponding thereto). As shown in FIG. 5, the error signals (E1 to E4) in the vicinity of the target pixel are multiplied by weights (α1 to α4), respectively, and an error calculation is performed on the weighted average EA of (Expression 1).

  At this time, α must satisfy the following (Equation 2) in order to preserve the DC component of the image.

The adder 102 and the integrated error calculation unit 106 realize the above (Equation 1).
The quantization / error value detection unit 103 in FIG. 1 performs quantization so that each pixel matches the number of gradations of the display device, and calculates a quantization error at that time. For example, if the input video signal is 12 bits and the number of gradations of the display device is 8 bits, it is quantized from 12 bits to 8 bits, and the quantization error at that time is 4 bits.

  The error value memory 105 in FIG. 1 is a line memory for storing error values of vertical components (E1 to E3 in FIG. 5) viewed from the target pixel. In order to make the error calculation comb-like (performed in a direction that is alternately reversed every horizontal period), the error value memory also reverses scanning in units of one horizontal period in the same manner as the video signal. This operation is shown in FIG. The error value in FIG. 6 is an error value that is an output from the quantization / error value detection unit 103 in FIG. 1, and the scanning direction is reversed in units of one horizontal period. Reading to the error value memory is preceded and followed by writing, thereby realizing a capacity of one horizontal pixel (strictly, an effective pixel of one horizontal period). FIG. 7 shows an operation explanation for scanning the error value in a comb shape. In FIG. 7, the error value input is delayed by one horizontal period and output in a comb shape from the quantization / error value detection unit 103 in FIG. 1, and the error value writing and reading scanning directions are controlled in a comb shape. The error value memory output is output in a comb shape.

The following is a more detailed description.
(1) The error value input delayed by one horizontal period is scanned in the forward direction at horizontal scanning number 2. This error value input is written in the error value memory in the forward direction. Reading precedes writing and reads in the forward direction. The forward direction is output from the error value memory. Since reading is preceded, the error value memory output at the horizontal scanning number 2 is reading the error value memory value of the last line one field before. Even in a video signal that is stationary using an error value across the field, an effect that the appearance of dots is not fixed is obtained.

(2) In horizontal scanning number 3, an error value in the reverse direction is input, written in the reverse direction, and read in the reverse direction. Since reading is preceded, the error value written in the forward direction with the horizontal scanning number 2 is read in the reverse direction, so that the error location memory output is in the reverse direction.

(3) In horizontal scanning number 4, a forward error value is input, written in the forward direction, and read in the forward direction. That is, since the reading is preceded, the horizontal scan number 4 is the error value obtained by writing the reverse error value (E1023, E1022,... E0) with the reverse address (A1023, A1022,... A0). Since data is read out in the forward direction address (A0, A1,... A1023), the error value memory outputs data in the forward direction (E0, E1,... E1023).

(4) In horizontal scanning number 5, an error value in the reverse direction is input, written in the reverse direction, and read in the reverse direction. That is, since reading is preceded, the horizontal scanning number 5 is the error value obtained by writing the forward error values (E0, E1,... E1023) with the forward address (A0, A1,... A1023). Since data is read out in the reverse direction (A1023, A1022,... A0), it is output from the error value memory in the reverse direction (E1023, E1022,... E0).

  Thereafter, the operations (3) and (4) are repeated.

  Changing the reading position of the error value memory 105 changes the coordinates of the reference matrix (changing the horizontal position of the reference error value, that is, when the error value memory 105 is read in the forward direction and in the reverse direction). Use different horizontal positions for the calculation of the weighted average. FIG. 8 shows an example in which one pixel is advanced, and the forward scanning shown in FIG. 8A and the backward scanning shown in FIG. is there.

  The output memory 104 in FIG. 1 corrects the comb-shaped video signal in the forward direction.

  In order to keep the memory capacity to the minimum necessary for one horizontal resolution and to align the video signals whose scanning direction is reversed, the read address is preceded and the write address is followed. This is realized by reversing the write and read addresses in units of two horizontal periods.

  FIG. 9 shows the state of the preceding address, and the case where the horizontal resolution is 1024 pixels is described as an example. Note that the read video signal is a signal one horizontal line before. The operation of aligning the comb-shaped video signals in the forward direction using the arrows indicating the scanning direction in FIG. 9 will be described with reference to FIG.

  In FIG. 10, the writing scanning direction repeats reversal in units of two horizontal scans, and the reading scanning direction also repeats reversal in the same phase. As a result, the video signal output outputs video signals aligned in the forward direction.

The details will be described below with reference to FIG.
(1) In horizontal scanning number 2, the video input is the forward direction from left to right (→), the writing scanning direction is the forward direction from left to right (→), the reading is horizontal scanning number 3, and the reading scanning direction is left. From left to right (→), video output is from left to right (→).

(2) For horizontal scanning number 3, the video input is the reverse direction from right to left (←), the writing scanning direction is the forward direction from left to right (→), the reading is horizontal scanning number 4, and the reading scanning direction is right From left to right (←), video output is from left to right (→). To explain using the coordinates, the video signal is in the opposite direction to S1023, S1022,... S0, and the video signal is written to the write addresses A0, A1,. S1022 is written to. When read as read addresses A1023, A1022,... A0, S0, S1,.

(3) For horizontal scanning number 4, the video input is the forward direction from left to right (→), the writing scanning direction is the reverse direction from right to left (←), the reading is horizontal scanning number 5, and the reading scanning direction is right From left to right (←), video output is from left to right (→). To explain using the coordinates, the video signal is forwarded with S0, S1,... S1023, and the video signal is written to the write address A1023, A1022,... A0, that is, S0 is written to the write address A1023 and Go on. When read as read addresses A1023, A1022,... A0, S0, S1,.

(4) For horizontal scan number 5, the video input is the reverse direction from right to left (←), the write scan direction is the reverse direction from right to left (←), the read is horizontal scan number 6, and the read scan direction is left From left to right (→), video output is from left to right (→). To explain using the coordinates, the video signal is in the opposite direction to S1023, S1022,... S0, and the video signal is written to the write address A1023, A1022,. S1022 is written to. When read as read addresses A0, A1,... A1023, S0, S1,.

Thereafter, the operations (1) to (4) are repeated.
Since the video signal is output with a delay of one horizontal period, as a result, the video signal is output with a delay of two horizontal periods from the input of the video signal in FIG.
By controlling the output memory, the memory capacity can be realized by one horizontal pixel.

Embodiment 2. FIG.
FIG. 11 is a block diagram showing the structure of the error diffusion circuit according to the second embodiment of the present invention.
The error diffusion circuit shown in FIG. 11 is generally the same as the error diffusion circuit of FIG. 1, but differs in that a random number generator 109 is added. The output of the random number generator 109 is supplied to the integration error calculation 106.

  The bit accuracy of the integrated error calculation unit 106 means that the sum of the weights (α1 to α4) of the peripheral error values satisfies 1 from (Equation 2), so that the bit width is widened. For example, in the case of weights α1 = 1/8, α2 = 2/8, α3 = 1/8, α4 = 4/8, the sum of the weights is 1, and the bit width of the integrated arithmetic unit is 4 bits below the decimal point. . This means that a small number of random numbers can be added to the integrated error calculator 106, that is, random numbers can be added with a resolution equal to or greater than the bit width of the video signal input to the error calculation. Although it is effective to add random numbers to spread fixed appearance patterns, it is a trade-off with image quality (feeling of noise), and it is possible to provide a method that can add a slight value, thereby reducing the sense of noise There is.

  As an example of use of the present invention, a false contour is likely to occur in a display device with a limited number of gradations that can be expressed, and PDP and the like also artificially increase the number of gradations to prevent false contours. In order to increase the number of gradations, image quality becomes a problem. That is, there is a feeling of noise that the above-mentioned particles are scattered. Therefore, if the present invention is applied to a display device such as a DLP or a PDP, these points can be improved.

It is a block diagram which shows the structure of the error diffusion circuit of Embodiment 1 of this invention. It is a figure which shows the video signal which the scanning direction reversed in the unit of 1 horizontal period by Embodiment 1 of this invention. It is a figure which shows the state which controlled the read and write of the input memory by the comb type by Embodiment 1 of this invention. It is a figure which shows the operation | movement by the horizontal period unit which controls reading and writing of an input memory by comb type by Embodiment 1 of this invention. It is a figure which shows the error calculation matrix by Embodiment 1 of this invention. It is a figure which shows the state which controlled the reading and writing of the error value memory by the comb type by Embodiment 1 of this invention. It is a figure which shows the operation | movement by the horizontal period unit which controls reading and writing of an error value memory by a comb type by Embodiment 1 of this invention. It is a figure which shows the state which changed the coordinate of the error value calculation matrix for horizontal period unit by Embodiment 1 of this invention. It is a figure which shows the state which controlled the read and write of the output memory by the comb type | mold by Embodiment 1 of this invention. It is a figure which shows the operation | movement by the horizontal period unit which controls reading and writing of an output memory by comb type by Embodiment 1 of this invention. It is a block diagram which shows the structure of the error diffusion circuit of Embodiment 2 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Input memory, 102 Adder, 103 Quantization / error value detection part, 104 Output memory, 105 Error value memory, 106 Integrated error calculating part, 107 Memory control circuit, 108 DLP display apparatus, 109 Random number generator

Claims (8)

An input memory to which a first video signal composed of a column of pixel signals is written;
A memory control circuit that controls writing to and reading from the input memory and outputs a second video signal in which the order of pixel signals is reversed for each line with respect to the first video signal;
An adder that adds a weighted average of quantization errors for pixels in the vicinity of the pixel to the pixel signal of each pixel included in the second video signal;
A quantization / error value detection unit that receives the output of the adder and sequentially performs quantization and detection of a quantization error value for each pixel;
An error value for storing a quantization error value for a pixel processed by the quantization / error value detection unit before a pixel processed by the quantization / error value detection unit (hereinafter referred to as “target pixel”). Memory,
An integrated error calculation unit that obtains a weighted average of quantization errors for pixels near the target pixel among error values stored in the error value memory and supplies the weighted average of the error to the adder; Having an error diffusion circuit. The memory control circuit generates the second video signal by alternately switching writing and reading of the first video signal to and from the input memory in units of one horizontal period in a forward direction and a reverse direction. The error diffusion circuit according to claim 1. The input memory has a capacity for effective pixels in one horizontal period,
The memory control circuit performs control so that writing to the input memory is alternately performed in the forward direction and the reverse direction, and reading is preceded by writing, and is controlled to be performed alternately in the reverse direction and the forward direction. The error diffusion circuit according to claim 1. The memory control circuit stores the error value detected by the quantization / error value detection unit in the error value memory, and reverses writing and reading in the forward and reverse directions in units of one horizontal period,
2. The error diffusion circuit according to claim 1, wherein the integrated error calculation unit performs a calculation for obtaining a weighted average of the errors in a direction that is alternately reversed every horizontal period. The error value memory has a capacity for effective pixels in one horizontal period,
2. The error diffusion circuit according to claim 1, wherein the memory control circuit controls the error value memory so that reading is preceded and writing is followed.   By making the reading start position of the error value memory different in the forward direction and the reverse direction, the error value memory is used in the forward direction to calculate the weighted average among the error values stored in the error value memory. The error diffusion circuit according to claim 1, wherein the error diffusion circuit is used in a different horizontal position when being read and when being read in the reverse direction.   2. The error diffusion circuit according to claim 1, wherein when calculating a weighted average of errors for pixels in the first line of each field, an error of pixels in the last line of the previous field is used. A random number generator for generating random numbers;
2. The error diffusion circuit according to claim 1, wherein the integrated error calculation unit obtains a weighted average of errors using a random number generated by the random number generator.

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