JP2006267041A - Test system - Google Patents

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JP2006267041A
JP2006267041A JP2005089273A JP2005089273A JP2006267041A JP 2006267041 A JP2006267041 A JP 2006267041A JP 2005089273 A JP2005089273 A JP 2005089273A JP 2005089273 A JP2005089273 A JP 2005089273A JP 2006267041 A JP2006267041 A JP 2006267041A
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output
current
test
voltage
converter
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Shingo Morita
慎吾 森田
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Yokogawa Electric Corp
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Priority to JP2005089273A priority Critical patent/JP2006267041A/en
Priority to TW094145829A priority patent/TWI279570B/en
Priority to KR1020060007867A priority patent/KR100764861B1/en
Publication of JP2006267041A publication Critical patent/JP2006267041A/en
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3283—Details of drivers for data electrodes in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements

Abstract

<P>PROBLEM TO BE SOLVED: To implement a test system capable of precise measurement. <P>SOLUTION: This invention is acquired by improving a test system for testing objects to be tested which output a current. The system is provided with both a current measuring part for measuring output of an object to be measured and a current generating part provided between the current measuring part and a path of the object to be measured for providing a reverse current based on an expected value of output of the object to be tested. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、電流出力を行う被試験対象、例えば有機ＥＬドライバを試験するテストシステムに関し、精度よく測定できるテストシステムに関するものである。   The present invention relates to a test system for testing an object to be tested that outputs current, for example, an organic EL driver, and relates to a test system capable of measuring with high accuracy.

近年、有機ＥＬ（Electro Luminescence）を発光素子として用いたディスプレイが提案されている。この有機ＥＬは、ダイオード機能を有し、電流を与えられることで発光する。このため、従来の液晶駆動ドライバで用いられた電圧出力と異なり、有機ＥＬドライバは電流出力が用いられるようになった。このような有機ＥＬドライバを試験するＩＣテスタは例えば下記特許文献１等に記載されている。   In recent years, displays using organic EL (Electro Luminescence) as light emitting elements have been proposed. This organic EL has a diode function and emits light when supplied with a current. For this reason, unlike the voltage output used in the conventional liquid crystal drive driver, the organic EL driver has come to use a current output. An IC tester for testing such an organic EL driver is described, for example, in Patent Document 1 below.

特開２００４−２９４０９３号公報JP 2004-294093 A

このような装置を図４に示し説明する。図４において、被試験対象（以下ＤＵＴ）は、例えば有機ＥＬドライバで、複数の出力ピンを有し、多階調電流を出力する。マルチプレクサ２は、ＤＵＴ１の出力を切り換える。電流測定器３は、マルチプレクサ１の出力を測定し、切替リレーＲＬ１，ＲＬ２、レンジ部３１〜３４、測定部３５からなる。切替リレーＲＬ１は、可動接点ａをマルチプレクサ２の出力端に接続する。レンジ部３１〜３４は、測定レンジが異なり、それぞれ、切替リレーＲＬ１の固定接点ｂ〜ｅに入力端を接続する。切替リレーＲＬ２は、それぞれ、レンジ部３１〜３４の出力端に固定接点ｂ〜ｅを接続する。電流測定部３５は、リレーＲＬ２の可動接点ａに接続する。   Such an apparatus is shown and described in FIG. In FIG. 4, an object to be tested (hereinafter referred to as DUT) is an organic EL driver, for example, having a plurality of output pins and outputting a multi-gradation current. The multiplexer 2 switches the output of the DUT 1. The current measuring device 3 measures the output of the multiplexer 1 and includes switching relays RL1 and RL2, range units 31 to 34, and a measurement unit 35. The switching relay RL1 connects the movable contact a to the output terminal of the multiplexer 2. The range units 31 to 34 have different measurement ranges, and connect the input ends to the fixed contacts b to e of the switching relay RL1, respectively. The switching relay RL2 connects the fixed contacts b to e to the output ends of the range units 31 to 34, respectively. The current measuring unit 35 is connected to the movable contact a of the relay RL2.

このような装置の動作を以下に説明する。電流測定器３が、切替リレーＲＬ１，ＲＬ２を切り替えて、レンジ部３１〜３４を選択し、測定レンジを決める。例えば、測定レンジとして、レンジ部３１を選択する。そして、ＤＵＴ１が、図示しない装置から入力される入力パターンに基づいて、複数の出力ピンから多階調電流を出力し、マルチプレクサ２が出力ピンを順番に切り換える。マルチプレクサ２の出力が、レンジ部３１に入力され、レンジ部３１で測定レンジが最適化され、電流測定部３５に入力され、電流測定が行われる。この測定結果により、図示しない装置により、電流が所定の電流範囲に入っていた場合、良品と判定される。   The operation of such an apparatus will be described below. The current measuring device 3 switches the switching relays RL1 and RL2, selects the range units 31 to 34, and determines the measurement range. For example, the range unit 31 is selected as the measurement range. Then, the DUT 1 outputs a multi-gradation current from a plurality of output pins based on an input pattern input from a device (not shown), and the multiplexer 2 switches the output pins in order. The output of the multiplexer 2 is input to the range unit 31, the measurement range is optimized by the range unit 31, and input to the current measurement unit 35 to perform current measurement. From this measurement result, when the current is within a predetermined current range by a device (not shown), it is determined as a non-defective product.

このような装置で、ＤＵＴ１のピン間の出力差を測定する場合、ＤＵＴ１の出力が、３［μＡ］の場合と、１５［μＡ］の場合とで、レンジ部３１〜３４を切り替えて測定を行っている。しかし、レンジ部３１〜３４を切り替えると、測定分解能が異なり、同じ精度で測定を行うことができない。そこで、３μＡ、１５μＡの両方を測定できる大きい測定レンジで行うと、測定精度が悪くなってしまうという問題点があった。   When measuring the output difference between the pins of DUT1 with such a device, measurement is performed by switching the range units 31 to 34 depending on whether the output of DUT1 is 3 [μA] or 15 [μA]. Is going. However, when the range units 31 to 34 are switched, the measurement resolution is different, and measurement cannot be performed with the same accuracy. Therefore, there is a problem that the measurement accuracy deteriorates when the measurement is performed in a large measurement range capable of measuring both 3 μA and 15 μA.

そこで、本発明の目的は、精度よく測定できるテストシステムを実現することにある。   Therefore, an object of the present invention is to realize a test system capable of measuring with high accuracy.

このような課題を達成するために、本発明のうち請求項１記載の発明は、
電流出力を行う被試験対象を試験するテストシステムにおいて、
前記被試験対象の出力を測定する電流測定部と、
この電流測定部と前記被試験対象の経路間に設けられ、前記被試験対象の出力の期待値に基づく反転電流を与える電流発生部と
を備えたことを特徴とするテストシステム。 In order to achieve such a problem, the invention according to claim 1 of the present invention is:
In a test system for testing an object to be tested that outputs current
A current measuring unit for measuring the output of the test object;
A test system comprising: a current generation unit that is provided between the current measurement unit and a path of the test target, and that provides an inversion current based on an expected value of the output of the test target.

請求項２記載の発明は、
電流出力を行う被試験対象を試験するテストシステムにおいて、
前記被試験対象の出力を入力し、電圧に変換するＩ／Ｖ変換器と、
このＩ／Ｖ変換器の出力を測定する電圧測定部と、
前記被試験対象と前記Ｉ／Ｖ変換器との経路間に設けられ、前記被試験対象の出力の期待値に基づく反転電流を与える電流発生部と
を備えたことを特徴とするものである。 The invention according to claim 2
In a test system for testing an object under test that performs current output,
An I / V converter for inputting the output of the test object and converting it into a voltage;
A voltage measuring unit for measuring the output of the I / V converter;
A current generation unit is provided between a path between the test target and the I / V converter, and provides an inversion current based on an expected value of the output of the test target.

請求項３記載の発明は、
電流出力を行う被試験対象を試験するテストシステムにおいて、
前記被試験対象の出力を入力し、電圧に変換するＩ／Ｖ変換器と、
このＩ／Ｖ変換器の出力を入力するＩＣテスタと、
前記被試験対象と前記Ｉ／Ｖ変換器との経路間に設けられ、前記被試験対象の出力の期待値に基づく反転電流を与える電流発生部と
を備えたことを特徴とするものである。 The invention described in claim 3
In a test system for testing an object under test that performs current output,
An I / V converter for inputting the output of the test object and converting it into a voltage;
An IC tester for inputting the output of the I / V converter;
A current generation unit is provided between a path between the test target and the I / V converter, and provides an inversion current based on an expected value of the output of the test target.

請求項４記載の発明は、
電流出力を行う被試験対象を試験するテストシステムにおいて、
前記被試験対象の出力を入力し、電圧に変換するＩ／Ｖ変換器と、
このＩ／Ｖ変換器の出力を入力し、Ｉ／Ｖ変換器の出力と、前記被試験対象の出力の期待値に基づく電圧との差電圧を出力する差電圧発生部と、
この差電圧発生部の出力を測定する電圧測定部と
を備えたことを特徴とするものである。 The invention according to claim 4
In a test system for testing an object under test that performs current output,
An I / V converter for inputting the output of the test object and converting it into a voltage;
A differential voltage generator for inputting the output of the I / V converter, and outputting a differential voltage between the output of the I / V converter and a voltage based on an expected value of the output of the test object;
And a voltage measuring unit for measuring the output of the differential voltage generating unit.

請求項５記載の発明は、
電流出力を行う被試験対象を試験するテストシステムにおいて、
前記被試験対象の出力を入力し、電圧に変換するＩ／Ｖ変換器と、
このＩ／Ｖ変換器の出力を入力し、Ｉ／Ｖ変換の出力と前記被試験対象の出力の期待値に基づく電圧との差電圧を出力する差電圧発生部と、
この差電圧発生部の出力を入力するＩＣテスタと
を備えたことを特徴とするものである。
ものである。 The invention according to claim 5
In a test system for testing an object under test that performs current output,
An I / V converter for inputting the output of the test object and converting it into a voltage;
A differential voltage generator for inputting an output of the I / V converter and outputting a differential voltage between the output of the I / V conversion and a voltage based on an expected value of the output of the test object;
An IC tester for inputting the output of the differential voltage generator is provided.
Is.

請求項６記載の発明は、請求項２〜５のいずれかに記載の発明であって、
前記Ｉ／Ｖ変換器は、
反転入力端子に前記被試験対象の出力が入力され、非反転端子が所望の電位に接続され、出力端が前記電圧測定部に電気的に接続されるオペアンプと、
このオペアンプの反転入力端子と出力端との間に設けられる抵抗と
を有することを特徴とするものである。 Invention of Claim 6 is invention in any one of Claims 2-5, Comprising:
The I / V converter is
An operational amplifier in which the output of the object under test is input to an inverting input terminal, a non-inverting terminal is connected to a desired potential, and an output terminal is electrically connected to the voltage measuring unit;
The operational amplifier has a resistor provided between the inverting input terminal and the output terminal of the operational amplifier.

請求項７記載の発明は、請求項１〜６のいずれかに記載の発明であって、
前記被試験対象は、複数の出力ピンを有し、多階調電流を出力する有機ＥＬドライバであることを特徴とするものである。 Invention of Claim 7 is invention in any one of Claims 1-6, Comprising:
The test object is an organic EL driver that has a plurality of output pins and outputs a multi-gradation current.

本発明によれば、以下のような効果がある。
電流発生部が反転電流を出力し、この反転電流により、被試験対象の出力を縮小させ、電流測定部で測定を行うので、高精度に測定を行うことができる。
また、電流発生部が反転電流を出力し、この反転電流により、被試験対象の出力を縮小させ、Ｉ／Ｖ変換器で電圧に変換し、電圧測定部またはＩＣテスタに入力するので、高精度の試験を行うことができる。
そして、Ｉ／Ｖ変換器が被試験対象の出力を電圧に変換し、この電圧と被試験対象の期待値に基づく電圧との差電圧を、差電圧発生部が出力し、電圧測定部またはＩＣテスタに入力するので、高精度の試験を行うことができる。 The present invention has the following effects.
Since the current generator outputs an inversion current, the output of the object to be tested is reduced by the inversion current, and measurement is performed by the current measurement unit, so that measurement can be performed with high accuracy.
In addition, the current generator outputs an inversion current, and this inversion current reduces the output of the device under test, converts it to a voltage with an I / V converter, and inputs it to the voltage measurement unit or IC tester. Can be tested.
The I / V converter converts the output of the device under test into a voltage, and the difference voltage generator outputs the difference voltage between this voltage and the voltage based on the expected value of the device under test, and the voltage measuring unit or IC Since it is input to the tester, a highly accurate test can be performed.

以下本発明を、図面を用いて詳細に説明する。図１は本発明の一実施例を示した構成図である。ここで、図４と同一のものは同一符号を付し説明を省略する。   Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. Here, the same components as those in FIG.

図１において、電流発生部４は、ＤＵＴ１の出力の期待値に基づく、反転電流（オフセット電流）を、電流測定器３のレンジ部３４の入力端に与える。ここで、レンジ部３４は、レンジ部３１〜３３より、測定レンジが小さいとする。   In FIG. 1, the current generator 4 gives an inversion current (offset current) based on the expected value of the output of the DUT 1 to the input terminal of the range unit 34 of the current measuring device 3. Here, the range unit 34 is assumed to have a smaller measurement range than the range units 31 to 33.

このような装置の動作を以下に説明する。電流測定器３が、切替リレーＲＬ１，ＲＬ２を切り替えて、レンジ部３４を選択し、測定レンジを決める。そして、ＤＵＴ１が、図示しない装置から入力される入力パターンに基づいて、複数の出力ピンから多階調電流を出力し、マリチプレクサ２が出力ピンを順番に切り換える。このとき、電流発生部４は、入力パターンに対応するＤＵＴ１の出力の期待値に基づいて、図示しない制御部により制御され、期待される電流の反転電流、オフセット電流を出力する。マルチプレクサ２の出力が、電流発生部４が出力するオフセット電流により、０［Ａ］近傍になり、レンジ部３４に入力され、レンジ部３４で測定レンジが最適化され、電流測定部３５に入力され、電流測定が行われる。この測定結果により、図示しない装置により、ＤＵＴ１の赤、緑、青の各色のディスプレイを駆動させる出力ピンごとのピン間の出力差を求め、所定の電流範囲に入っていた場合、良品と判定され、入っていなかった場合、不良品と判定される。   The operation of such an apparatus will be described below. The current measuring device 3 switches the switching relays RL1 and RL2, selects the range unit 34, and determines the measurement range. The DUT 1 outputs a multi-gradation current from a plurality of output pins based on an input pattern input from a device (not shown), and the multiplexer 2 switches the output pins in order. At this time, the current generator 4 is controlled by a control unit (not shown) based on the expected value of the output of the DUT 1 corresponding to the input pattern, and outputs an expected current reversal current and offset current. The output of the multiplexer 2 becomes close to 0 [A] due to the offset current output from the current generator 4 and is input to the range unit 34, the measurement range is optimized by the range unit 34, and input to the current measurement unit 35. A current measurement is performed. Based on this measurement result, the output difference between each output pin that drives the display of each color of DUT1 red, green, and blue is obtained by a device (not shown), and if it is within a predetermined current range, it is determined to be a non-defective product. If not, it is determined as a defective product.

このように、電流発生部４がオフセット電流を出力し、このオフセット電流により、ＤＵＴ１の出力を縮小させ、レンジ部３４の倍率で増幅し、電流測定部３５で測定を行うので、高精度に測定を行うことができる。   In this way, the current generator 4 outputs an offset current, and the output of the DUT 1 is reduced by this offset current, amplified by the magnification of the range unit 34, and measured by the current measuring unit 35, so that the measurement is performed with high accuracy. It can be performed.

なお、電流発生部４は、レンジ部３４の入力端にオフセット電流を与える構成を示したが、電流測定部３５の入力端にオフセット電流を与える場合でもよい。この場合、オフセット電流は、レンジ部３１〜３４の倍率により、電流値を変更して与える。   In addition, although the electric current generation part 4 showed the structure which gives an offset current to the input terminal of the range part 34, the case where an offset current is given to the input terminal of the electric current measurement part 35 may be sufficient. In this case, the offset current is given by changing the current value according to the magnification of the range units 31 to 34.

次に、第２の実施例を図２に示し説明する。ここで、図４と同一のものは同一符号を付し説明を省略する。   Next, a second embodiment will be described with reference to FIG. Here, the same components as those in FIG.

図２において、Ｉ／Ｖ変換器５は、ＤＵＴ１の出力ピンごとに設けられ、ＤＵＴ１の出力を入力し、電圧に変換し、オペアンプ５１、抵抗Ｒからなる。オペアンプ５１は、反転入力端子にＤＵＴ１の出力が入力され、非反転端子が所望の電位、グランドに接続される。抵抗Ｒは、オペアンプ５１の反転入力端子と出力端との間に設けられる。電流発生部６は、ＤＵＴ１とＩ／Ｖ変換器５との間に設けられ、ＤＵＴ１の出力の期待値に基づく反転電流を、ＤＵＴ１の出力に与える。ＩＣテスタ７は、Ｉ／Ｖ変換器５の出力を入力し、電圧測定部７１等を有する。電圧測定部７１は、オペアンプ５１の出力端に接続する。   In FIG. 2, the I / V converter 5 is provided for each output pin of the DUT 1, receives the output of the DUT 1, converts it into a voltage, and includes an operational amplifier 51 and a resistor R. In the operational amplifier 51, the output of DUT1 is input to the inverting input terminal, and the non-inverting terminal is connected to a desired potential and ground. The resistor R is provided between the inverting input terminal and the output terminal of the operational amplifier 51. The current generator 6 is provided between the DUT 1 and the I / V converter 5, and gives an inversion current based on an expected value of the output of the DUT 1 to the output of the DUT 1. The IC tester 7 receives the output of the I / V converter 5 and has a voltage measuring unit 71 and the like. The voltage measuring unit 71 is connected to the output terminal of the operational amplifier 51.

このような装置の動作を説明する。ＤＵＴ１が、図示しない装置から入力される入力パターンに基づいて、複数の出力ピンから多階調電流を出力する。このとき、電流発生部６は、入力パターンに対応するＤＵＴ１の出力の期待値に基づいて、図示しない制御部により制御され、期待される電流の反転電流、オフセット電流を出力する。ＤＵＴ１の多階調電流が、電流発生部６が出力するオフセット電流により、０［Ａ］近傍になり、Ｉ／Ｖ変換器５に入力される。そして、Ｉ／Ｖ変換器５が、入力電流を電圧に変換し、電圧測定部７１に出力する。電圧測定部７１が電圧測定を行い、この測定結果により、図示しない装置により、ピン間の出力差を求め、所定の範囲に入っていた場合、良品と判定され、入っていない場合、不良品と判定される。   The operation of such an apparatus will be described. The DUT 1 outputs a multi-gradation current from a plurality of output pins based on an input pattern input from a device (not shown). At this time, the current generation unit 6 is controlled by a control unit (not shown) based on the expected value of the output of the DUT 1 corresponding to the input pattern, and outputs an expected current reversal current and offset current. The multi-gradation current of DUT 1 becomes close to 0 [A] due to the offset current output from current generator 6 and is input to I / V converter 5. Then, the I / V converter 5 converts the input current into a voltage and outputs it to the voltage measuring unit 71. The voltage measurement unit 71 performs voltage measurement. Based on the measurement result, an output difference between pins is obtained by a device (not shown). When the voltage difference is within a predetermined range, it is determined as a non-defective product. Determined.

ここで、オペアンプ５１の非反転入力端子に電圧発生部から電圧を与え、Ｉ／Ｖ変換器５の出力電圧を減衰させる構成が考えられるが、オペアンプ５１の非反転入力端子に入力された電圧が、反転入力端子に現われ、ＤＵＴ１の出力ピンに入力されることになる。この結果、ＤＵＴ１の多階調電流が変化してしまい、正確な試験を行うことができなくなってしまう。   Here, a configuration in which a voltage is applied from the voltage generation unit to the non-inverting input terminal of the operational amplifier 51 to attenuate the output voltage of the I / V converter 5 is conceivable, but the voltage input to the non-inverting input terminal of the operational amplifier 51 is Appears at the inverting input terminal and is input to the output pin of DUT1. As a result, the multi-gradation current of DUT 1 changes, and an accurate test cannot be performed.

そして、第３の実施例を図３に示し説明する。ここで、図２と同一のものは同一符号を付し説明を省略する。   A third embodiment will be described with reference to FIG. Here, the same components as those in FIG.

図３において、差電圧発生部８は、電流発生部６の代わりに設けられ、Ｉ／Ｖ変換器５の出力を入力し、Ｉ／Ｖ変換器５の出力とＤＵＴ１の出力の期待値に基づく電圧との差電圧を、ＩＣテスタ７の電圧測定部７１に出力する。そして、差電圧発生部８は、電圧源８１、加算器８２からなる。電圧源８１は、電圧を可変し、ＤＵＴ１の出力の期待値に基づく電圧を与える。加算器８２は、Ｉ／Ｖ変換器５の出力と電圧源８１の出力とを加算し、ＩＣテスタ７の電圧測定部７１に出力する。   In FIG. 3, a differential voltage generator 8 is provided instead of the current generator 6 and receives the output of the I / V converter 5 and is based on the expected value of the output of the I / V converter 5 and the output of the DUT 1. The voltage difference from the voltage is output to the voltage measuring unit 71 of the IC tester 7. The differential voltage generator 8 includes a voltage source 81 and an adder 82. The voltage source 81 varies the voltage and provides a voltage based on the expected value of the output of the DUT 1. The adder 82 adds the output of the I / V converter 5 and the output of the voltage source 81 and outputs the result to the voltage measuring unit 71 of the IC tester 7.

このような装置の動作を以下に説明する。ＤＵＴ１が、図示しない装置からの入力パターンに基づいて、複数の出力ピンから多階調電流を出力し、Ｉ／Ｖ変換器５に入力する。そして、Ｉ／Ｖ変換器５が、入力電流を電圧に変換し、加算器８２に出力する。このとき、電圧源８１は、入力パターンに対応するＤＵＴ１の出力の期待値に基づいて、図示しない制御部により制御され、ＤＵＴ１の出力の期待値に基づく電圧を出力している。加算器８２は、Ｉ／Ｖ変換器５の出力に、電圧源８１が出力するオフセット電圧を加算し、電圧測定部７１に出力する。電圧測定部７１が電圧測定を行い、この測定結果により、図示しない装置により、ピン間の出力差を求め、所定の範囲に入っていた場合、良品と判定され、入っていない場合、不良品と判定される。   The operation of such an apparatus will be described below. The DUT 1 outputs a multi-gradation current from a plurality of output pins based on an input pattern from a device (not shown) and inputs the current to the I / V converter 5. Then, the I / V converter 5 converts the input current into a voltage and outputs it to the adder 82. At this time, the voltage source 81 is controlled by a control unit (not shown) based on the expected value of the output of the DUT 1 corresponding to the input pattern, and outputs a voltage based on the expected value of the output of the DUT 1. The adder 82 adds the offset voltage output from the voltage source 81 to the output of the I / V converter 5 and outputs the result to the voltage measuring unit 71. The voltage measurement unit 71 performs voltage measurement. Based on the measurement result, an output difference between pins is obtained by a device (not shown). When the voltage difference is within a predetermined range, it is determined as a non-defective product. Determined.

なお、本発明はこれに限定されるものではなく、電圧測定部７１ではなく、コンパレータを設けた構成でもよい。この場合、コンパレータにより、所定の電圧範囲に入っているかどうか比較が行われる。なお、電圧測定部３５，７１により、ＤＵＴ１の出力が、所定の電圧範囲に入っているかの比較を行う構成でもよいことはいうまでもない。   In addition, this invention is not limited to this, The structure which provided the comparator instead of the voltage measurement part 71 may be sufficient. In this case, the comparator compares whether or not the voltage is within a predetermined voltage range. Needless to say, the voltage measuring units 35 and 71 may compare the output of the DUT 1 within a predetermined voltage range.

また、レンジ部３１〜３５を設けた構成を示したが、電流測定部３５内部にある構成でもよい。また、レンジ部３１〜３５がない構成でもよい。   Moreover, although the structure which provided the range parts 31-35 was shown, the structure which exists in the electric current measurement part 35 may be sufficient. Moreover, the structure without the range parts 31-35 may be sufficient.

また、Ｉ／Ｖ変換器５は、ＤＵＴ１の出力ピンごとに設けなくともよく、マルチプレクサを設け、ＤＵＴ１の出力ピンを選択し、Ｉ／Ｖ変換器５に与える構成でもよい。   Further, the I / V converter 5 may not be provided for each output pin of the DUT 1, and a configuration may be provided in which a multiplexer is provided, the output pin of the DUT 1 is selected, and the I / V converter 5 is provided.

また、差電圧発生部８は、加算器８２により構成される例を示したが、減算器の場合でもよい。この場合、電圧源８１は、加算器８２の場合とプラス、マイナスが逆の電圧を出力する。   Moreover, although the difference voltage generation part 8 showed the example comprised by the adder 82, the case of a subtractor may be sufficient. In this case, the voltage source 81 outputs a voltage in which plus and minus are opposite to those of the adder 82.

また、電圧測定部７１の入力段に増幅アンプを設け、電圧を増幅して測定する構成でもよく、電圧測定部７１内部に増幅アンプがある構成でもよい。   Further, an amplifier may be provided at the input stage of the voltage measuring unit 71 to amplify and measure the voltage, or a configuration in which the amplifier is provided inside the voltage measuring unit 71 may be used.

本発明の第１の実施例を示した構成図である。It is the block diagram which showed the 1st Example of this invention. 本発明の第２の実施例を示した構成図である。It is the block diagram which showed the 2nd Example of this invention. 本発明の第３の実施例を示した構成図である。It is the block diagram which showed the 3rd Example of this invention. 従来のＩＣテスタの構成を示した図である。It is the figure which showed the structure of the conventional IC tester.

符号の説明Explanation of symbols

１ ＤＵＴ
３５ 電流測定部
４，６ 電流発生部
５ Ｉ／Ｖ変換器
５１ オペアンプ
Ｒ 抵抗
７ ＩＣテスタ
７１ 電圧測定部
８ 差電圧発生部
８１ 電圧源
８２ 加算器
1 DUT
35 Current measurement unit 4, 6 Current generation unit 5 I / V converter 51 Operational amplifier R Resistance 7 IC tester 71 Voltage measurement unit 8 Differential voltage generation unit 81 Voltage source 82 Adder

Claims (7)

電流出力を行う被試験対象を試験するテストシステムにおいて、
前記被試験対象の出力を測定する電流測定部と、
この電流測定部と前記被試験対象の経路間に設けられ、前記被試験対象の出力の期待値に基づく反転電流を与える電流発生部と
を備えたことを特徴とするテストシステム。 In a test system for testing an object under test that performs current output,
A current measuring unit for measuring the output of the test object;
A test system comprising: a current generation unit that is provided between the current measurement unit and a path of the test target, and that provides an inversion current based on an expected value of the output of the test target. 電流出力を行う被試験対象を試験するテストシステムにおいて、
前記被試験対象の出力を入力し、電圧に変換するＩ／Ｖ変換器と、
このＩ／Ｖ変換器の出力を測定する電圧測定部と、
前記被試験対象と前記Ｉ／Ｖ変換器との経路間に設けられ、前記被試験対象の出力の期待値に基づく反転電流を与える電流発生部と
を備えたことを特徴とするテストシステム。 In a test system for testing an object to be tested that outputs current
An I / V converter for inputting the output of the test object and converting it into a voltage;
A voltage measuring unit for measuring the output of the I / V converter;
A test system comprising: a current generation unit that is provided between paths of the test target and the I / V converter, and that provides an inversion current based on an expected value of the output of the test target. 電流出力を行う被試験対象を試験するテストシステムにおいて、
前記被試験対象の出力を入力し、電圧に変換するＩ／Ｖ変換器と、
このＩ／Ｖ変換器の出力を入力するＩＣテスタと、
前記被試験対象と前記Ｉ／Ｖ変換器との経路間に設けられ、前記被試験対象の出力の期待値に基づく反転電流を与える電流発生部と
を備えたことを特徴とするテストシステム。 In a test system for testing an object under test that performs current output,
An I / V converter for inputting the output of the test object and converting it into a voltage;
An IC tester for inputting the output of the I / V converter;
A test system comprising: a current generation unit that is provided between paths of the test target and the I / V converter, and that provides an inversion current based on an expected value of the output of the test target. 電流出力を行う被試験対象を試験するテストシステムにおいて、
前記被試験対象の出力を入力し、電圧に変換するＩ／Ｖ変換器と、
このＩ／Ｖ変換器の出力を入力し、Ｉ／Ｖ変換器の出力と、前記被試験対象の出力の期待値に基づく電圧との差電圧を出力する差電圧発生部と、
この差電圧発生部の出力を測定する電圧測定部と
を備えたことを特徴とするテストシステム。 In a test system for testing an object under test that performs current output,
An I / V converter for inputting the output of the test object and converting it into a voltage;
A differential voltage generator for inputting the output of the I / V converter, and outputting a differential voltage between the output of the I / V converter and a voltage based on an expected value of the output of the test object;
A test system comprising: a voltage measuring unit that measures an output of the differential voltage generating unit. 電流出力を行う被試験対象を試験するテストシステムにおいて、
前記被試験対象の出力を入力し、電圧に変換するＩ／Ｖ変換器と、
このＩ／Ｖ変換器の出力を入力し、Ｉ／Ｖ変換の出力と前記被試験対象の出力の期待値に基づく電圧との差電圧を出力する差電圧発生部と、
この差電圧発生部の出力を入力するＩＣテスタと
を備えたことを特徴とするテストシステム。 In a test system for testing an object under test that performs current output,
An I / V converter for inputting the output of the test object and converting it into a voltage;
A differential voltage generator for inputting an output of the I / V converter and outputting a differential voltage between the output of the I / V conversion and a voltage based on an expected value of the output of the test object;
A test system comprising an IC tester for inputting the output of the differential voltage generator. 前記Ｉ／Ｖ変換器は、
反転入力端子に前記被試験対象の出力が入力され、非反転端子が所望の電位に接続され、出力端が前記電圧測定部に電気的に接続されるオペアンプと、
このオペアンプの反転入力端子と出力端との間に設けられる抵抗と
を有することを特徴とする請求項２〜５のいずれかに記載のテストシステム。 The I / V converter is
An operational amplifier in which the output of the object under test is input to an inverting input terminal, a non-inverting terminal is connected to a desired potential, and an output terminal is electrically connected to the voltage measuring unit;
6. The test system according to claim 2, further comprising a resistor provided between an inverting input terminal and an output terminal of the operational amplifier. 前記被試験対象は、複数の出力ピンを有し、多階調電流を出力する有機ＥＬドライバであることを特徴とする請求項１〜６のいずれかに記載のテストシステム。
The test system according to claim 1, wherein the test target is an organic EL driver that has a plurality of output pins and outputs a multi-gradation current.
JP2005089273A 2005-03-25 2005-03-25 Test system Pending JP2006267041A (en)

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