JP2006266917A - Confirmation system of circuit integrity - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To sense malfunction by performing diagnosis for a circuit while not used. <P>SOLUTION: When a register 1 or the like is not operated, an instruction is sent to a test pattern generator 2 from a BIST controller 3, and the test pattern is sent to a circuit of the part that is not used. A comparator 4 compares the output result and an expectation and notifies a circuit 5 for integrity determination. In the case of unmatch, the circuit 5 resets the data of the register or the like to separate a corresponding LSI. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a circuit soundness confirmation method, and more particularly, to an unused circuit soundness confirmation method.

  Conventionally, in a circuit inside an LSI, even when the circuit has failed, the failure cannot be detected unless the circuit is used.

  As described above, the conventional circuit soundness confirmation method has a problem that even if the circuit in the LSI is faulty, the fault cannot be detected unless the circuit is used.

  An object of the present invention is to provide a circuit soundness confirmation method in which a failure is detected by performing a diagnosis on a circuit when not in use, and a part including the corresponding LSI is preventively replaced.

  In the circuit soundness confirmation method of the present invention, a BIST circuit is provided, and when a circuit such as a register in the LSI is not used, the soundness is confirmed by performing self-diagnosis using the BIST circuit, and the circuit is malfunctioning. It is characterized in that the LSI is separated and preventive replacement is performed.

  According to the present invention, by performing self-diagnosis on unused circuits such as registers, there is an effect that a failure can be detected in advance and preventive replacement can be performed in the event of a failure.

  The best mode for carrying out the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram showing a circuit configuration of an embodiment of the present invention. The circuit is composed of a circuit such as a register 1, a built-in self test circuit (an embedded self-diagnosis circuit, hereinafter referred to as a BIST circuit) including a test pattern generator 2, a BIST controller 3, a comparator 4, and a soundness determination circuit 5.

  Next, the operation of the best mode for carrying out the present invention will be described with reference to the drawings. The operation will be described with reference to FIG.

  When the register 1 or the like is not operating, an instruction is sent from the BIST controller 3 to the test pattern generator 2 and the test pattern is sent to the unused circuit.

  The comparator 4 compares the output result with the expected value and notifies the soundness determination circuit 5 of the result.

  In the case of unmatching, the soundness determination circuit 5 resets data such as a register and disconnects the corresponding LSI.

  Therefore, preventive replacement is performed.

It is a block diagram which shows the circuit structure of embodiment of this invention.

Explanation of symbols

1 register 2 test pattern generator 3 BIST controller 4 comparator 5 soundness determination circuit

Claims (1)

A BIST circuit is provided, and when a circuit such as a register inside the LSI is not used, the BIST circuit is used for self-diagnosis to check the soundness, and when there is a failure, the LSI is disconnected and preventive replacement is performed. A circuit health check method.

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