JP2006253841A - Demodulator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a demodulator capable of accurately obtaining a center frequency of a PSK modulation signal and accurately carrying out demodulation even when the PSK modulation is a short burst signal. <P>SOLUTION: The demodulator includes: a first carrier component eliminating section 1 for roughly eliminating a carrier component from a signal obtained by applying orthogonal detection to a PSK modulation burst signal obtained by primary inverse spread; a second carrier component eliminating section 2 for eliminating the carrier component with high accuracy from the signal whose carrier component is roughly eliminated by the first carrier component eliminating section 1; and a delay detector 3 for applying delay detection to the signal whose carrier component is eliminated with high accuracy by the second carrier component eliminating section 2. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a demodulation device that demodulates a burst-like PSK (Phase Shift Keying) modulated signal.

  2. Description of the Related Art Conventionally, there is known a demodulator that demodulates an FH wave that has been spread spectrum over a wide band by frequency hopping (FH). In such a demodulator, if FH wave specifications such as a hopping frequency, a hopping pattern, a hopping interval, and a hopping timing are known, the received FH wave is linearly inverted based on the known specifications. Since the original modulated signal can be extracted by spreading (inverse FH), accurate demodulation is possible.

However, in a receiver used for applications such as radio wave monitoring, it is necessary to demodulate FH waves having unknown specifications. In the demodulator used in such a receiver, first, analysis and separation of FH waves having unknown specifications are performed. Then, the first-order despreading is performed on the separated FH wave based on the parameters obtained by the analysis to extract the original modulated signal, and the extracted modulated signal is demodulated. Is called.
JP-

  However, in the demodulator that demodulates the FH wave having the unknown specifications described above, the following problems exist with respect to the modulation signal extracted by the first-order despreading.

  The first problem is that the modulation signal obtained by the first-order despreading becomes a short burst signal such as the hopping interval. The burst length of this modulated signal is only about several tens of symbols when it is short. The second problem is that since the analysis accuracy of a wideband FH wave is limited, the center frequency of the modulation signal obtained by the first-order despreading cannot be detected accurately.

  Now, a PSK modulation signal is considered as a signal having the same problem as a signal obtained by first-order despreading of an FH wave. When demodulation is performed by obtaining the center frequency of the PSK modulation signal, the accurate center frequency is adopted for a long PSK modulation signal of thousands to tens of thousands of symbols by adopting, for example, the Costas loop method which is one of synchronous detection. Therefore, accurate demodulation is possible.

  However, when demodulating the above-described PSK modulation signal, since the burst length is short, the above-mentioned Costas loop method cannot be used. Therefore, in the conventional demodulator, delay detection is mainly used as a method for avoiding the first problem that the burst length is short.

  However, the delay detection has a drawback that the BER (Bit Error Rate) characteristic is basically poor. Further, if the center frequency of the signal obtained by the first-order despreading cannot be accurately known, there is a case where the delay detection cannot be performed, and even if the delay detection can be performed, the deterioration of the BER characteristic is further increased. There's a problem.

  The present invention has been made to solve the above-described problems, and the problem is that even a short burst-like PSK modulation signal can accurately determine the center frequency and perform accurate demodulation. The object is to provide a demodulator.

  In order to achieve the above object, the demodulator according to the first invention roughly removes the carrier component from the signal obtained by quadrature detection of the burst-like PSK modulation signal obtained by the first-order despreading. A first carrier wave component removing unit; a second carrier wave component removing unit for removing the carrier wave component from the signal from which the carrier wave component is roughly removed by the first carrier wave component removing unit 1; and a carrier wave in the second carrier wave component removing unit. And a delay detector for delay-detecting a signal from which components have been removed with high accuracy.

  The demodulator according to a second aspect of the invention is the demodulator according to the first aspect of the invention, wherein the second carrier component removal unit performs inverse tan using a CORDIC on the signal transmitted from the first carrier component removal unit. A phase calculation circuit that calculates a phase within ± 45 ° by performing reverse tan processing without rotation of ± 90 ° and ± 45 ° in the processing, and outputs a phase error between the calculated phase and a nearby pull-in point A frequency estimation unit for estimating the carrier frequency of the signal sent from the first carrier component removal unit based on the phase error output from the phase calculation circuit, and a complex carrier signal having the carrier frequency estimated by the frequency estimation unit And a complex carrier signal from the numerically controlled oscillator and a signal sent from the first carrier wave component removing unit are complex-multiplied to remove a carrier wave component with high accuracy. Characterized in that a multiplier.

  According to the demodulating device according to the first aspect of the present invention, the carrier component is roughly removed by estimating the carrier frequency in a wide band in the first carrier component removal unit in the first stage from the burst-like PSK modulated signal, In addition, the second carrier component removal unit in the second stage is configured to estimate the carrier frequency with high accuracy and remove the carrier component with high accuracy for the signal output from the first carrier component removal unit. Therefore, it is possible to remove the carrier frequency component by estimating the carrier frequency in a wide band and with high accuracy by a small and simple process. Therefore, accurate demodulation can be performed even when a short burst-like PSK modulation signal is input.

  In this case, since the first carrier wave component removal unit at the first stage widens the range for estimating the carrier frequency, the first carrier wave component removal unit can cope with the case where the carrier frequency changes widely and does not require high accuracy. Can be reduced in scale.

  Further, the second carrier component removal unit in the second stage can estimate the carrier frequency with high accuracy although the range for estimating the carrier frequency is narrow. By adopting such a configuration, it is possible to estimate the carrier frequency with high accuracy with a small circuit even when the width of change of the carrier frequency is large.

  Further, according to the demodulator according to the second invention, a part of the inverse tan process using the conventional CORDIC is modified, that is, rotations of ± 90 ° and ± 45 ° in the inverse tan process using the CORDIC. By performing the inverse tan processing without the above, the phase within ± 45 ° is calculated to obtain the phase error from the neighboring pull-in point, and the signal sent from the first carrier wave component removing unit based on the obtained phase error Therefore, the carrier frequency can be estimated with a smaller and simpler process than the inverse tan process using the conventional CORDIC.

  Hereinafter, a demodulator according to an embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram illustrating a configuration of a demodulation device according to Embodiment 1 of the present invention. First, the outline of the demodulator will be described.

  The demodulator includes a first carrier component removal unit 1, a first carrier component removal unit 2, and a delay detector 3.

  The first carrier component removal unit 1 roughly removes the carrier component from the PSK signal obtained by quadrature detection of the first-order despread burst-like PSK modulation signal and sends it to the second carrier component removal unit 2 . The first carrier wave component removing unit 1 has a feature that the estimated carrier frequency is low in accuracy, but can handle a wide range of carrier frequencies. Details of the first carrier wave component removing unit 1 will be described later.

  The second carrier component removal unit 2 removes the carrier component from the second PSK signal sent from the first carrier component removal unit 1 with high accuracy and sends it to the delay detector 3. Details of the second carrier component removal unit 2 will be described later.

  The delay detector 3 receives the carrier component from the second carrier component removal unit 2 from which the carrier component has been sufficiently removed, in other words, the accurate center frequency of the first-order despread PSK signal. The sufficiently removed signal is subjected to delay detection, and a burst-like PSK modulated signal is demodulated.

  Next, details of the first carrier wave component removal unit 1 will be described. The first carrier component removal unit 1 includes a memory 11, a discrete Fourier transformation (DFT) unit 12, a numerically controlled oscillator (NC 0) 13, and a complex multiplier 14.

  The memory 11 temporarily stores the orthogonally detected PSK signal input from the outside for one burst length. The contents of the memory 11 are read by the complex multiplier 14 in synchronization with the calculation timing of the complex multiplier 14. In other words, the memory 11 functions as a delay unit that delays the PSK signal by a necessary time (time required for processing in the DFT unit 12 and the NCO 13).

  The DFT unit 12 performs a discrete Fourier transform on one burst length of the PSK signal input from the outside. Data representing the frequency of the frequency component having the highest level (peak) among the frequency components obtained by this discrete Fourier transform is data representing the approximate center frequency of the PSK signal (hereinafter referred to as “center frequency data”). Sent to the NCO 13. Since frequency components are calculated discretely in the DFT unit 12, the frequency indicated by the center frequency data output from the DFT unit 12 may not completely match the center frequency of the PSK signal.

  The NCO 13 generates a SIN signal and a COS signal having a frequency indicated by the center frequency data sent from the DFT unit 12. The SIN signal and the COS signal generated by the NCO 13 are sent to the complex multiplier 14 as a complex carrier signal.

  The complex multiplier 14 sequentially reads out the PSK signals stored in the memory 11 in synchronization with the complex carrier signal sent from the NCO 13, and performs complex multiplication on these. As a result, the PSK signal read from the memory 11 is rotated by the rotation matrix defined by the complex carrier signal, and the complex multiplier 14 outputs the center frequency of the input PSK signal and the frequency output from the FFT unit 12. A signal modulated using the difference from the frequency indicated by the data as the carrier frequency is output.

  For example, if the center frequency of the input PSK signal is 108 MHz and the frequency indicated by the frequency data output from the FFT unit 12 is 107.5 MHz, the complex multiplier 14 outputs a carrier frequency of 0.5 MHz. The signal modulated by is output.

  Next, details of the second carrier component removal unit 2 will be described. The second carrier component removal unit 2 includes a memory 21, a phase calculation unit 22, a frequency estimation unit 23, a numerically controlled oscillator (NC0) 24, and a complex multiplier 25.

  The memory 21 temporarily stores the signal transmitted from the first carrier wave component removal unit 1 for one burst length. The contents of the memory 21 are read by the complex multiplier 25 in synchronization with the calculation timing of the complex multiplier 25. In other words, the memory 21 functions as a delay unit that delays the second PSK signal by a necessary time (time required for processing in the phase calculation unit 22, the frequency estimation unit 23, and the NCO 24).

  The phase calculation unit 22 calculates the phase difference between the phase of the signal sent from the first carrier wave component removal unit 1 and the pull-in point. The phase calculation unit 22 includes a phase calculation circuit configured by changing a part of an inverse tan calculation circuit using a well-known CORDIC (Coordinate Rotation Digital Computer), and the phase calculated by the phase calculation circuit It comprises a phase error calculation circuit (not shown) for calculating the phase difference from the point.

  2 and 3 are block diagrams showing a phase calculation circuit of the phase calculation unit 3, that is, a CORDIC inverse tan calculation circuit in which a part thereof is changed. FIG. 2 is a block diagram showing the first half of the CORDIC inverse tan calculation circuit. FIG. 3 is a block diagram showing the latter half of the CORDIC inverse tan calculation circuit.

  This phase calculation circuit is obtained by 11 rotators connected in series and a rotator to which the sign bit is input according to the sign bit output from each rotator except the highest-level rotator. 10 selectors for selecting the positive or negative value of the inverse tan value, 10 adders and 10 registers for accumulating and latching the outputs of the selectors in order from the top, and removing the first carrier component This is composed of a register for sequentially shifting the sign bit A of the signal sent from the section 1 and the sign bit B output from the highest-order rotator.

  This phase calculation circuit is a selector that selects a positive value or a negative value of a reverse tan value obtained by a ± 90 ° rotator to which a sine bit A is input from an inverse tan calculation circuit using a normal CORDIC. The selector for selecting the positive value or the negative value of the inverse tan value obtained by the ± 45 ° rotator to which B is input, and the adder and register related thereto are removed. In FIG. 2, “sam” represents the sample rate, and “sym” represents the symbol rate, where 1 sample rate = 4 × symbol rate.

  As a result of rotating the IQ signal, if the IQ phase is 0 ° to 180 °, the sign bit is +, and if the IQ phase is −180 ° to 0 °, the sign bit is negative.

  The phase output from the phase calculation circuit configured as described above is not the true phase of the input signal, but excludes rotations of ± 90 ° and ± 45 °. Therefore, the phase output from this phase calculation circuit is within ± 45 °. This simplifies the calculation of the phase difference with the neighboring pull-in point in the subsequent phase error calculation circuit (not shown). The sign bits A and B output from the phase calculation circuit are used to obtain the true phase of the input signal.

  Next, a phase error calculation circuit (not shown) will be described. This phase error calculation circuit calculates the difference between the phase sent from the phase calculation circuit and the phase of the nearby pull-in point, and outputs it as a phase error. The nearby pull-in point refers to the nearest point where the received IQ signal should be stopped.

  Here, the phase angle after the phase of the input signal is rotated ± 90 ° and ± 45 ° (hereinafter referred to as “reception point phase angle”) is always within ± 45 °, and true Due to the fact that the phase difference between the phase and its near pull-in point is equal to the difference between the reception point phase angle and its near pull-in point, the phase error is generally obtained by the following equation (1).

Phase error = Phase angle at nearby pull-in point-Phase angle at receiving point
FIG. 4 is a diagram for explaining the calculation of the phase error in the case of 8-phase PSK (hereinafter sometimes simply referred to as “8PSK”) modulation. FIGS. 4A and 4B are diagrams for explaining the calculation of the phase error when “reception point phase angle ≧ 0 °”. The phase error is obtained by the following equation (2). .

  4A shows a case where the reception point phase angle is smaller than the pull-in point phase angle, and FIG. 4A shows a case where the reception point phase angle is larger than the pull-in point phase angle. This corresponds to the case of the numbers 1, 3, 5, and 7 shown in FIG.

Phase error = 22.5 °-Receiving point phase angle (2)
FIGS. 4C and 4D are diagrams for explaining the calculation of the phase error in the case of “reception point phase angle <0 °”, and the phase error is obtained by the following equation (3). . FIG. 4C shows a case where the reception point phase angle is smaller than the pull-in point phase angle, and FIG. 4A shows a case where the reception point phase angle is larger than the pull-in point phase angle. This corresponds to the case of the numbers 0, 2, 4 and 6 shown in FIG.

Phase error = -22.5 °-Receiving point phase angle (3)
FIG. 6 is a diagram for explaining the calculation of the phase error in the case of QPSK modulation. The phase error is obtained by the following equation (4). In this case, it corresponds to the case where the pull-in points exist in the circled numbers 0, 1, 2, and 3 shown in FIG.

Phase error = 0 °-Receiving point phase angle (4)
FIG. 8 is a diagram for explaining the calculation of the phase error in the case of BPSK modulation. Assuming that the quadrant is defined by the sign bits A and B output from the phase calculation circuit as shown in FIG. 9, the phase error when B = 0 (A is arbitrary) is obtained by the following equation (5). The phase error when B = 1 (A is arbitrary) is obtained by the following equation (6). These correspond to the case where the pull-in points exist in the circled numbers 0 and 1 shown in FIG.

Phase error = -45 °-Receiving point phase angle (5)
Phase error = 45 °-Receiving point phase angle (6)
The phase error obtained by the phase difference calculation circuit as described above is sent to the frequency estimation unit 23 as an output of the phase calculation unit 22.

  The frequency estimation unit 23 estimates the input frequency based on the phase error sent from the phase calculation unit 22. In the following, only the case of 8-phase PSK will be described, but the frequency can be estimated by the same processing in the case of QPSK and BPSK.

Now, assuming that the phase of the phase modulation signal is φ (i) (i = 0, 1, 2,...), Φ (i) has a constant carrier frequency error. That is, if the amount of phase change per symbol time is constant at Δφ, it can be modeled as shown in the following equation (7).

However, i represents the i-th symbol, N (i) = 0, 1, 2, 3, 4, 5, 6, 7 and ∠Noize (i) is a noise component affecting the phase. , Φ ₀ represents the initial phase.

  The third term (π / 8 + N (i) · π / 4) of this equation (7) is the phase of the pull-in point and can be expressed as shown in FIG.

The frequency (Δφ) cannot be obtained even if a time difference is taken using this φ (i). This is because the term N (i) takes a value from 0 to 7 at random. When the forward difference regarding i of φ (i) is taken as an attempt, the following equation (8) is obtained.

  At this time, since “(N (i + 1) −N (i))” takes values of +7 to −7 regardless of the value of i, “∠Noize (i + 1) −∠Noize (i)” Δφ cannot be obtained even if is zero. Therefore, if the phase error φ ′ (i) output from the phase calculator 22 is used instead of φ (i), it is likely that the influence of the term N (i) can be eliminated.

This is the output itself of the phase error calculation circuit included in the phase calculation unit 22 and can be used. When this new phase is φ ′ (i) and φ ′ (i) is expressed using φ (i), the following equation (9) is obtained with respect to the above equation (7).

However, “Δφ × i + φ ₀ + ∠Noise (i)” in the first to third terms of Expression (7) is expressed as “error (i)” and “(π / 2 + N (i) π” in the fourth term. ) ”Is expressed as“ signal_phase (i) ”, the φ _{vicinity pull-in point} (i) is represented by the following formula (10).

This equation (10) is directly independent of N (i).

Here, “phase_offset (i)” is expressed by the following equation (11).

Here, n is an arbitrary integer (0, ± 1, ± 2...).

  This expression (11) represents that the pull-in point changes every time the value of error (i) crosses each region, as shown in FIG. FIG. 12 shows each region shown in equation (11). In FIG. 11, “error (i)” is in the region 1 and “error (i + 1)” is in the region.

Based on the above discussion, when “φ ′ (i + 1) −φ ′ (i)” is calculated, the following equation (12) is obtained.

  The influence of ((Noise (i + 1) −∠Noise (i)) in the above equation (12) can be reduced by averaging. Further, (phase_offset (i + 1) −phase_offset (i)) becomes zero when error (i) and error (i + 1) are in the same region.

  Unlike the above-mentioned “φ (i + 1) −φ (i)”, this equation (12) does not include the term N (i). Therefore, the term “∠Noize (i + 1) −∠Noize (i)” should be ignored and only the term “phase_offset (i + 1) −phase_offset (i)” should be considered. Since only this term has different contents for each modulation system, it is necessary to consider for each modulation system.

In 8-phase PSK, when error (i + 1) and error (i) are in the same region as shown in FIG. 14, the following equation (13) is obtained.

On the other hand, as shown in FIGS. 14 and 15, error (i + 1) and error (i) are expressed by the following equation (14) as the first carrier component removal unit in the adjacent region.

  Therefore, if it is possible to distinguish whether error (i + 1) and error (i) are in the same region or adjacent regions, Δφ is obtained from “φ ′ (i + 1) −φ ′ (i)”. Carrier frequency error can be obtained.

If error (i + 1) and error (i) are in adjacent regions, looking at the result of “φ ′ (i + 1) −φ ′ (i)”, if Δφ is “−π / 8 ≦ Δφ If it is in the range of ≦ π / 8, “Δφ−π / 4” and “Δφ + π / 4” are expressed by the following equation (15).

Depending on whether “φ ′ (i + 1) −φ ′ (i)” is larger or smaller than π / 8 or larger than or smaller than −π / 8, error (i + 1) and error (i) are It can be distinguished whether they are in the same region or adjacent regions (including Δφ ≧ 0 or Δφ <0). Therefore, Δφ is expressed by the following equation (17).

Of the above formula (17), only “when −π / 8 ≦ Δφ ≦ π / 8” is effective. This expression (17) does not include the noise term “∠Noise (i + 1) −∠Noise (i)”, but the influence of this term can be sufficiently reduced by averaging. Since Δφ is “−π / 8 ≦ Δφ ≦ π / 8” based on the precondition of the above equation (17), the carrier frequency error estimated value is expressed by the following equation (18).

  Here, sym represents a symbol rate.

Therefore, the carrier frequency error estimated value is in the range of the following equation (19), and cannot be estimated correctly in the following equation (20).

  As described above, the carrier frequency estimated by the frequency estimation unit 23 is sent to the NCO 24 as center frequency data.

  The NCO 24 generates a SIN signal and a COS signal having a frequency indicated by the center frequency data sent from the frequency estimation unit 23. The SIN signal and the COS signal generated by the NCO 24 are sent to the complex multiplier 25 as a complex carrier signal.

  The complex multiplier 25 sequentially reads the signals stored in the memory 11 in synchronization with the complex carrier signal sent from the NCO 13, and performs complex multiplication on these signals. As a result, the signal read from the memory 21 is rotated by the rotation matrix defined by the complex carrier signal, and the complex multiplier 25 outputs a modulated signal containing almost no carrier frequency component.

  For example, if the center frequency of the signal input from the first carrier wave component removal unit 1 is 0.5 MHz, the frequency estimation unit 23 outputs center frequency data representing about 0.5 MHz. Therefore, the complex multiplier 14 outputs a signal modulated with a carrier frequency of 0 Hz, that is, a modulated signal from which the carrier wave is almost completely removed. The modulation signal output from the complex multiplier 25 is sent to the delay detector 3.

  As described above, the delay detector 3 delay-detects the signal sent from the complex multiplier 25 from which the carrier component has been sufficiently removed, and demodulates the burst-like PSK modulation signal.

  As described above, according to the demodulator according to the first embodiment of the present invention, the first carrier component removal unit 1 in the first stage that roughly removes the carrier component by estimating the carrier frequency using the DFT. And adopting a two-stage configuration such as a second-stage second carrier component removal unit 2 that removes the carrier wave component with high accuracy by focusing on the phase and estimating the carrier frequency, and generating a carrier wave from the burst-like PSK modulated wave. Since the configuration is such that the components are removed, the broadband and highly accurate removal of the carrier wave components can be realized with a small-scale and simple process.

  In the second carrier component removal unit 2 at the second stage, the carrier component removal and the frequency estimation processing can be realized by using the inverse tan processing using the conventional CORDIC, but the inverse tan using the CORDIC. The phase within ± 45 ° is calculated by performing the reverse tan process, omitting the ± 90 ° and ± 45 ° rotations in the processing, and the phase error from the nearby pull-in point is obtained. Since it is configured to estimate the carrier frequency of the signal sent from the one carrier component removal unit, the carrier component removal and the frequency estimation processing can be realized with a small and simple process.

  The present invention is highly applicable to an apparatus having a large carrier offset.

It is a block diagram which shows the structure of the demodulation apparatus which concerns on Example 1 of this invention. It is a block diagram which shows the structure of the phase calculation circuit contained in the phase calculation part shown in FIG. It is a block diagram which shows the structure of the phase calculation circuit contained in the phase calculation part shown in FIG. It is a figure for demonstrating calculation of the phase error in the case of 8-phase PSK modulation performed in the demodulation apparatus which concerns on Example 1 of this invention. It is a figure for demonstrating the position where the drawing-in point in FIG. 3 exists. It is a figure for demonstrating calculation of the phase error in the case of the QPSK modulation performed in the demodulation apparatus which concerns on Example 1 of this invention. It is a figure for demonstrating the position where the drawing-in point in FIG. 6 exists. It is a figure for demonstrating calculation of the phase error in the case of the BPSK modulation performed in the demodulation apparatus which concerns on Example 1 of this invention. It is a figure for demonstrating the position where the drawing-in point in FIG. 8 exists. It is a figure for demonstrating the phase of the drawing-in point of 8-phase PSK modulation at the time of the frequency estimation in the demodulation apparatus which concerns on Example 1 of this invention. It is a figure for demonstrating that the pull-in point of the 8-phase PSK modulation at the time of the frequency estimation in the demodulator according to Embodiment 1 of the present invention changes every time error (i) crosses each region. It is a figure for demonstrating the area | region where the pull-in point of 8-phase PSK modulation at the time of the frequency estimation in the demodulating apparatus which concerns on Example 1 of this invention exists. It is a figure for demonstrating the state where error (i) of the 8-phase PSK modulation at the time of the frequency estimation in the demodulator according to Embodiment 1 of the present invention exists in the same region. It is a figure for demonstrating the state in which error (i) of the 8-phase PSK modulation at the time of the frequency estimation in the demodulating apparatus which concerns on Example 1 of this invention exists in an adjacent area | region. It is a figure for demonstrating the state in which error (i) of the 8-phase PSK modulation at the time of the frequency estimation in the demodulating apparatus which concerns on Example 1 of this invention exists in an adjacent area | region.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st carrier component removal part 2 2nd carrier component removal part 3 Delay detector 11, 21 Memory 12 Discrete Fourier-transform part (DFT)
13, 24 Numerically controlled oscillator (NCO)
14, 25 Complex multiplier 22 Phase calculator 23 Frequency estimator

Claims (2)

A first carrier component removing unit that roughly removes a carrier component from a signal obtained by quadrature detection of a bursty PSK modulation signal obtained by first-order despreading;
A second carrier component removing unit for removing the carrier component with high accuracy from the signal from which the carrier component is roughly removed in the first carrier component removing unit;
A delay detector for delay-detecting a signal from which the carrier wave component has been removed with high accuracy in the second carrier wave component removing unit;
A demodulating device comprising: The second carrier component removal unit includes:
A phase within ± 45 ° is obtained by performing reverse tan processing in which the rotation of ± 90 ° and ± 45 ° in the reverse tan processing using the CORDIC is omitted with respect to the signal sent from the first carrier wave component removing unit. And a phase calculation circuit that outputs a phase error between the calculated phase and the proximity pull-in point;
A frequency estimation unit that estimates a carrier frequency of a signal transmitted from the first carrier component removal unit based on a phase error output from the phase calculation circuit;
A numerically controlled oscillator that generates a complex carrier signal having a carrier frequency estimated by the frequency estimator;
A complex multiplier that complex-multiplies a complex carrier signal from the numerically controlled oscillator and a signal sent from the first carrier wave component removal unit and removes the carrier wave component with high accuracy. Item 10. A demodulator according to Item 1.

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