JP2006203875A - Receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the influence of an error caused by interference cancellation. <P>SOLUTION: A receiver which repeatedly removes an interference signal by creating a replica of the interference signal and subtracting the replica from a received signal comprises: logarithmical tolerance ratio adders 114-1 to 114-M for adding logarithmic tolerance ratios stored in memories 115-1 to 115-M and obtained by repetitions in the past to output logarithmic tolerance ratios of soft-input soft-output (SISO) decoders 113-1 to 113-M; and determinators 116-1 to 116-M for hard determination using outputs of the logarithmic tolerance ratio adding means, thereby reducing the influence of the cancellation error. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a system for receiving a plurality of signals transmitted in the same frequency band from at least one transmission terminal having at least one transmission antenna using at least one reception antenna, that is, one A spatial multiplexing (MIMO) system in which a terminal transmits signals simultaneously from multiple antennas, or a space division multiple access (SDMA, multiple transmission) in which one or more transmitting terminals with one or more antennas transmit signals simultaneously The present invention relates to a receiving apparatus including an interference canceller that repeatedly removes the same frequency interference and detects a desired signal in a system in which a user MIMO system or both exist.

  The interference canceller is a device that detects a desired signal by creating a replica from a signal determined once and canceling it from a received signal (see Non-Patent Document 1). Furthermore, the probability of a signal to be detected can be improved by repeatedly performing interference cancellation a plurality of times.

  However, if there is a bit that is erroneously determined in the determined bit sequence, the replica created based on the erroneous bit is different from the original bit sequence. If interference cancellation is performed using such an incorrect replica, it will adversely affect bits that were correctly determined before interference cancellation, resulting in errors that were not before interference cancellation after interference cancellation. End up. Such an error is hereinafter referred to as a cancellation error.

With respect to such a problem, in the conventional technique, a soft-input soft-output (SISO) decoder is used as a decoder, a replica is created using the output soft decision value, and the reliability of the replica is determined. There have been proposed a method of reducing the influence of cancellation errors by increasing the degree (see Patent Document 1 and Non-Patent Document 2) and a configuration for canceling a created replica with a weight (see Patent Document 2).
JP 2003-152603 A JP 10-51353 A M.M. K. Varani, and B.A. Aazhang, “Multistage Detection in Asynchronous Code-Division Multiple-Access Communications,” IEEE Trans. Commun. , Vol. COM-38, no. 4, pp. 509-519, April 1990. B. Lu, G .; Yue, and X. Wang, “Performance Analysis and Design Optimization of LDPC-Coded MIMO Systems,” IEEE Trans. Signal Processing, vol. 52, no. 2, February 2004.

  However, in the conventional configuration, since the replica is created using the soft decision output value of the SISO decoder, the amount of calculation increases. In particular, when multi-level modulation is used as a modulation method, a replica of a modulation signal is created from a plurality of soft decision values, which complicates processing. Further, in the method of canceling with replicas weighted, the normal weight is 1 or less, so the amount of improvement in the signal-to-interference power ratio (SIR) due to interference cancellation is reduced, The number of repetitions required increases. Furthermore, in the conventional configuration, the same processing is applied regardless of whether the determination value used for replica creation is correct or not, which causes an increase in the amount of computation more than necessary.

  In the conventional configuration, the reliability of the replica used for cancellation is increased, and the contribution of the replica is reduced by weighting, so that cancellation error is less likely to occur or even if it occurs, the effect is reduced. The purpose is that. Therefore, in order to reduce the influence of the cancellation error in a signal that has received a cancellation error, the next iterative process is required, and the required number of repetitions increases.

  The present invention solves the above-described conventional problems, and an object of the present invention is to provide a method for removing the influence of a cancellation error and improving the effect of an interference canceller by a simple process at the time of decoding for a signal affected by the cancellation error. And

  In order to solve the above-described conventional problems, the receiving apparatus of the present invention includes a first signal detector that detects an estimated value of a signal transmitted from a received signal, and replica creation that creates a replica of the received signal from the signal detection result. A subtractor that subtracts the replica signal from the received signal, a second signal detector that detects the estimated value of the signal transmitted from the signal after subtraction, and the likelihood obtained in the past iteration. It is characterized by comprising likelihood correcting means for correcting the likelihood obtained in the current iteration.

  According to this configuration, even when interference cancellation by an erroneous replica is performed in a certain repetition, and the likelihood of the affected bit becomes the likelihood for an incorrect determination value, it is not affected by the cancellation error. By correcting the likelihood in the current iteration using the past likelihood, the influence of the cancellation error can be removed. Further, since the influence of the cancellation error can be removed without requiring the next iteration, there is an effect that the number of necessary iterations can be reduced.

  In order to solve the conventional problem, an embodiment of the present invention further includes an error detector for detecting a bit error, and the second signal detector has no error by the error detector. The subsequent interference cancellation processing is not performed on the signal determined to be, and the interference cancellation processing is performed only on the signal determined to have an error.

  According to this configuration, for a signal determined not to have an error, signal detection is not performed in subsequent iterations, so that a series of processing becomes unnecessary and the amount of calculation can be reduced. In addition, it is possible to prevent an unnecessary cancellation error that occurs by subtracting a replica with low reliability from a correctly determined signal.

  In order to solve the conventional problem, in one embodiment of the present invention, the second signal detector transmits a signal using the output of the subtractor and the output of the first signal detector. An estimated value of the signal is detected.

  According to this configuration, even when subtraction using an incorrect replica signal is performed in the interference cancellation process, the influence is obtained by performing diversity combining taking into account the output of the detector in the previous iteration. Can be reduced. As a result, cancellation errors can be reduced.

  In order to solve the conventional problem, in one embodiment of the present invention, in a receiving apparatus that repeatedly performs signal detection, the likelihood obtained by each repetition of signal detection that is repeatedly performed is used. It is characterized by comprising likelihood correction means for performing correction.

  According to this configuration, the effect of subtraction using an incorrect replica signal is reduced by likelihood correction using the log-likelihood ratio after LDPC decoding obtained in each iteration after the interference cancellation processing is completed. be able to.

  According to the receiving apparatus of the present invention, even when a cancellation error occurs due to interference cancellation using an incorrect replica, when decoding a signal affected by the cancellation error, the likelihood obtained in the past iteration is used. By performing the process of correcting the likelihood obtained by the current repetition, the influence can be removed and the deterioration of the transmission characteristics can be suppressed.

  Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1)
FIG. 1 is a block diagram showing a configuration on the transmission side in Embodiment 1 of the present invention. FIG. 2 is a block diagram showing the configuration of the receiving apparatus according to Embodiment 1 of the present invention. The receiving apparatus shown in FIG. 2 includes a repetitive interference canceller that receives a spatially multiplexed signal. Hereinafter, in the present invention, a logarithmic likelihood is expressed as a logarithm of a ratio between a probability that a bit is +1 and a probability that is −1 (or a ratio between a probability that is 0 and a probability that is 1). Used as a ratio. LOG (Maximum a posteriori Probability) algorithm, sum-product algorithm, SOVA (Soft Output Viterbi Algorithm), turbo decoder, other SISO decoders, logarithm domain representation of output decision and output posterior probability The soft decision output and the output posterior probability of each decoding algorithm that performs processing in the logarithmic domain can be used.

  In FIG. 1, when the number of antennas on the transmission side is an integer M equal to or greater than 1, the transmission side has error correction encoders 101-1 to 101-M, modulators 102-1 to 102-M, and transmission. It comprises antennas 103-1 ... 103-M.

  In FIG. 2, when the number of reception antennas is an integer N equal to or greater than 1, the reception side is detected by reception antennas 111-1,... 111-N, a detector 112 that detects a transmission signal from a reception signal, and a detector 112. Likelihood correction for correcting likelihood output from SISO decoders 113-1 to 113 -M and SISO decoders 113-1 to 113 -M that perform error correction decoding on signals with likelihoods in past iterations 119-M, likelihood corrector 119-1 ... 119-M, the hard discriminator 116-1, ... 116-M, the discriminator 116-1, ... 116-M includes replica creators 117-1 to 117-M that create a replica signal, a propagation path estimator 118 that estimates a propagation path from the received signal, and an iteration counter 110.

  Moreover, in this Embodiment, likelihood correction | amendment part 119-1 ... 119-M adds the log likelihood ratio obtained by the past repetition to the log likelihood ratio obtained by the present repetition. Log likelihood ratio adders 114-1... 114-M and storage units 115-1... 115-M for storing past log likelihood ratios.

  In addition to the above components, the receiver includes a D / A converter, a frequency converter, a band limiting filter, a high frequency amplifier, and the like, but is not an element directly related to the operation of the present invention. This is omitted in FIG.

Next, the operation of the present invention will be described with reference to FIGS. In the M error correction encoders 101-1 to 101 -M on the transmission side, the information bit sequences b ₁ (i)... B _M (i) are respectively encoded bit sequences c ₁ (j). ... encoded as c _M (j). The coded bit sequences c ₁ (j)... C _M (j) are respectively modulated by the modulators 102-1 to 102 -M, and the transmission signal sequences s ₁ (k) to s _M (k ) Is obtained. Here, i = 1... I, j = 1... J, k = 1... K (I, J, and K are each an integer of 1 or more) are an index of information bit sequence and encoding, respectively. Indicates the index of bit sequence and the index of transmission signal sequence.

Transmission signal series s ₁ (k)... S _M (k) are transmitted from transmission antennas 103-1... 103-M, respectively, and receive antennas 111-1. N is received. Received signal sequences r ₁ (k)... R _N (k) received by receiving antennas 111-1 to 111 -N are input to detector 112 and propagation path estimator 118. The detector 112 outputs log likelihood ratios λ ₁ (j)... Λ _M (j) corresponding to the M transmission signals. Here, the maximum number of repetitions of the interference canceller is an integer G of 1 or more.

Log-likelihood ratios λ ₁ (j)... Λ _M (j) are respectively input to SISO error correction decoders 113-1 to 113 -M, and log likelihoods in the g (≦ G) -th iteration. The ratio Λ ₁ ^g (i)... Λ _M ^g (i) is obtained. In the log likelihood ratio adders 114-1... 114-M, the log likelihood ratios Λ ₁ ^g (i)... Λ _M ^g (i) in the g-th iteration are stored in the storage units 115-1. The log likelihood ratio obtained by the g-1th iteration stored in 115-M is added. The output Λ _Cm ^g (i) of the log likelihood ratio adder 114-m is expressed by (Expression 1).

Performs hard decision of the decision unit 116-1 · · · 116-M in Λ _Cm ^g (i), and outputs a hard decision value ^{_{B 1 g (i) ··· B}} M g (i).

When the iteration counter 110 detects that the hard decision values B ₁ ^g (i)... B _M ^g (i) are output from the determiners 116-1 to 116 -M, the iteration count g is set to 1. Count up.

Here, in the determiners 116-1 to 116 -M, when g <G, the hard decision values B ₁ ^g (i)... B _M ^g (i) are used as estimated values in the g-th iteration. , Replica creators 117-1 to 117-M. On the other hand, the determiners 116-1 to 116 -M output B ₁ ^G (i)... B _M ^G (i) as final determination values when g = G.

In the replica creators 117-1 to 117-M, the hard decision values B ₁ ^g (i) to B _M ^g (i) are re-encoded and re-modulated, and then estimated by the propagation path estimator 118. By multiplying the propagation path response, a replica signal sequence s _mn ^g (k) in the g-th iteration is created.

FIG. 3 shows a specific functional configuration example of the detector 112 in the first iteration. In the first iteration, the received signal series r ₁ (k)... R _N (k) received by the preceding antennas 111-1 to 111 -N is branched to the number of simultaneously transmitted signals. , And subtracters 304-11 to 304-MN. In the case of the first iteration, the replica signal sequence s _mn ¹ (k) is subtracted as 0 by the subtractors 304-11... 304-MN, so the output of the subtractors 304-11. Is equal to the input. The adaptive filters 301-1 to 302-M are adapted to r _m = [r _m1 (k),..., R _mN (k)], which are the outputs of the subtractors 304-11 to 304-MN. A transmission signal is detected by performing a filtering process. The detected transmission signal sequence u _m (k) is expressed as (Equation 2).

Here, w _m represents the optimum weight coefficient of the adaptive filters 301-1 to 302-M, and is obtained from the propagation path estimated by the propagation path estimator 118. The detected transmission signal sequence u _m (k) is demodulated by the demodulators 203-1 to 203-M and weighted by the weighting units 203-1 to 203-M, so that the log likelihood ratio λ _{1 is obtained.} (J)... Λ _M (j) is obtained.

FIG. 4 shows a specific functional configuration example of the detector 112 in the second and subsequent iterations. In the g-th iteration, received signal sequences r ₁ (k)... r _N (k) received by the receiving antennas 111-1 to 111 -N are branched into the number of simultaneously transmitted signals, Subtracters 304-11 to 304-MN respectively subtract interference replicas created from the determination values obtained in the previous iteration. The signal series r _mn (k) after subtraction by the subtractors 304-11... 304-MN is expressed as ( _Equation 3).

Thereafter, r _m1 (k)... R _mN (k) is weighted and synthesized by adaptive filters 301-1... 302-M, and a transmission signal is detected. The transmission signal u _m (k) is expressed as (Equation 4).

Here, w _m is a coefficient of the adaptive filters 301-1 to 301 -M, and is obtained from the propagation path estimated by the propagation path estimator 118. r _m = [r _m1 (k),..., r _mN (k)] represents a received signal vector after interference cancellation. Next, u _m (k) is demodulated by the demodulators 203-1 to 203-M and weighted by the weighting units 203-1 to 203-M, so that the log likelihood ratio λ ₁ (j). ... Λ _M (j) is obtained.

The procedure of the above interference cancellation processing is shown in FIG. As shown in FIG. 5, in the receiving apparatus according to the present embodiment, when a spatially multiplexed signal is received, iteration number counter 110 initializes g to 0 (A1). The detector 112 performs adaptive filter processing (A2), and receives data u ₁ (k),..., U _M (k) corresponding to the signals transmitted from the transmitting antennas 103-1 to 103-M. ) Is detected. The m SISO decoders perform error correction decoding on the detected m received data (A3). On the transmission side, information bits are encoded by an error correction encoding method.

  Next, the likelihood correcting unit 119 adds the log likelihood ratio in the previous iteration to the log likelihood ratio in the current iteration (A4). The determiner 116 makes a hard decision on the output of the log likelihood ratio addition (A5). The iteration count counter 110 increments the interference cancellation iteration count g by 1 (A6). Next, the iteration counter 110 checks whether g has become G (A7). If it is G, the determiner 116 outputs the hard decision value as a received bit sequence to the subsequent stage, and ends the process. If it is not G, the determiner 116 sends the hard decision value to the replica creator 117 to create a replica (A8). Next, the subtractor 304 subtracts the interference replica from the signal received by each receiving antenna (A9), and the adaptive filter 301 performs adaptive filter processing (A10). Thereafter, error correction decoding of the received data is performed by the SISO decoder of (A3).

  Thus, according to the receiving apparatus of the present embodiment, the logarithm input to the bit decision unit is performed in order to perform the process of adding the log likelihood ratio in the past iteration to the log likelihood ratio in the current iteration. The likelihood ratio is a value obtained by integrating the log likelihood ratios obtained from the past iteration to the current iteration, and the contribution of the log likelihood ratio affected by the cancellation error at the time of bit determination can be reduced. . As a result, the number of bit errors due to cancellation errors can be reduced.

  In the present embodiment, the likelihood correction unit 119 adds the log likelihood ratio in the g-1th iteration and the log likelihood ratio in the gth iteration with equal gain, but the likelihood correction unit 119 May be added after applying an appropriate weight v to the log likelihood ratio in the g-1 iteration and the log likelihood ratio in the g iteration, as in (Equation 5).

  By doing in this way, when the reliability of the log-likelihood ratio in the g-1th iteration is high, there is an effect that the contribution at the time of addition can be increased, and the effect of removing the cancellation error is increased. When the reliability of the log-likelihood ratio in the first iteration is low, there is an effect that an increase in errors due to addition can be prevented by increasing the weight v.

  In this embodiment, the log likelihood ratio in the g-1 iteration and the log likelihood ratio in the g iteration are added to all bits, but the g-1 iteration is performed. It is also possible to add only the bits having different signs in the log likelihood ratio in the log and the log likelihood ratio in the g-th iteration, and do not add if the signs are the same. By doing in this way, there is an effect that the log likelihood ratio addition processing for the bits in which no cancellation error has occurred can be reduced.

  In this embodiment, the adaptive filters 301-1 to 301-M are provided. However, a configuration in which a zero-forcing detector or a maximum likelihood detector is provided may be employed. When a zero-forcing detector is provided, the amount of detection processing can be reduced. When a maximum likelihood detector is provided, the number of reception antennas and the number of required repetitions can be reduced. There is.

  In the present embodiment, the transmission apparatus shown in FIG. 1 includes M error correction encoders 101-1 to 101-M and M modulators 102-1 to 102-M. As shown in FIG. 6, one error correction encoder 101 and one modulator 102 are provided on the transmission side, and the modulated signal is divided into M sequences by a serial-parallel converter 504. It is also possible to transmit from each of the transmission antennas 103-1 to 103-M. In this case, as shown in FIG. 7, on the receiving side, the log likelihood ratio corresponding to each transmission signal output from the detector 112 is converted into one signal sequence by the parallel-serial converter 511, Processing can be performed using the SISO decoder 113, one likelihood correction unit 119, and one determiner 116.

  In the present embodiment, the receiving apparatus may be configured to use a serial interference canceller as shown in FIG. In this case, first, the M transmission signals to be detected are ranked in the order in which the signal is detected by the ranking unit 121.

Next, the detector 120-1 detects the signal having the highest rank. The output of detector 120-1 is subjected to error correction decoding by SISO decoder 113-1, likelihood-corrected by likelihood correction section 119-1, and hard-decisioned by determiner 116-1. The hard decision value B ₁ (i) is input to the replica creator 117-1 and a replica signal is created. The created replica signal is input to the subtracters 122-11... 122-1N and subtracted from the received signal series r ₁ (k)... R _N (k). The above processing is performed from the signal with the highest rank to the signal with the lowest rank.

  Thereafter, the detection process from the signal with the highest rank to the signal with the lowest rank is repeated G times. In this way, it is possible to detect received data based on a signal in which a signal having a higher rank than the signal to be detected is canceled from the received signal, i.e., a signal having a higher rank canceled from the received signal. Since the high signal component is in a canceled state, if the signal is detected using that signal, the diversity gain is equal to the number of signal components canceled compared to the case where detection is performed using the received signal that has not been canceled. Therefore, the diversity gain by a plurality of antennas can be improved as compared with the case where all signals are detected in parallel. Examples of ranking include received power of each transmission signal, mean square error after interference cancellation, signal-to-noise power ratio, and SIR size.

  In the present embodiment, a multicarrier signal may be used as the spatially multiplexed signal. By providing a discrete Fourier transformer that divides a multicarrier signal into subcarriers and performing the interference cancellation processing for each subcarrier, interference cancellation processing in a multipath propagation environment can be effectively realized.

In the present embodiment, likelihood correction means 1901 having a low-pass filter that inputs a likelihood ratio obtained from the past to the current iteration shown in FIG. 9 as input may be used as the likelihood correction means. . The likelihood correcting unit 1901 includes a likelihood converter 1902, a storage 1903, tap coefficient multipliers 1904-0 to 1904 -T, and an adder 1905. Here, T is an integer of 1 or more and represents the number of taps of the low-pass filter. The likelihood converter 1902 converts the input log likelihood ratio Λ _m ^g (i) into the expected value X _m ^g (i) using the conversion formula of (Equation 6).

The expected value X _m ^g (i) is multiplied by a tap coefficient h _m ^g (i) of the low-pass filter by a tap coefficient multiplier 1904-0. The storage 1903 stores an expected value in the past T iterations. In the tap coefficient multipliers 1904-1 ··· 1904-T, the expected value _X ^{m g-t} (i) and row multiplication of the tap coefficient _h ^m t (i) of the low-pass filter in the repeating of the previous t times each Is called. Here, t is an arbitrary positive integer of 1 or more and T or less. The outputs of the multipliers 1904-0 to 1904 -T are added by an adder 1905. The output of the adder 1905 is expressed by (Equation 7), and the likelihood correcting means performs inverse transformation of the transformation equation of (Equation 6) on the maximum value of the signal given by (Equation 7), and then the likelihood after correction. Output as degrees.

  By doing so, it is possible to correct the fluctuation of the likelihood ratio for each repetition caused by the influence of the cancellation error.

(Embodiment 2)
FIG. 10 is a diagram of a receiving apparatus according to Embodiment 2 of the present invention. The configuration on the transmission side in Embodiment 2 of the present invention is the same as that in FIG. In FIG. 10, the same constituent elements as those in FIGS.

In error detectors 602-1... 602-M in FIG. 10, hard decision values B ₁ ^g (i) in the g-th iteration output from the determiners 116-1. performing error detection of B _M ^g (i), 1 if there is an error the error detection result _{e m,} 0 if not, sends the _{e m} to the detector 601. Here, when e _m = 0, the determiner 116-m sends the hard decision value B _m ^g (i) to the replica creator 117-m. Also, the determiner 116-m outputs the hard decision value B _m ^g (i) to the subsequent stage as the decision value of the signal transmitted from the transmission antenna 103-m, and transmits from the transmission antenna 103-m in the subsequent iterations. The interference cancellation process is not performed on the received signal. On the other hand, when e _m = 1, the same processing as in the first embodiment of the present invention is performed, and thus the description thereof is omitted. Note that the error detector outputs the hard decision value B _m ^g (i) without processing.

  FIG. 11 shows a specific functional configuration example of the detector 601 in the second and subsequent iterations. A specific functional configuration example of the detector 601 in the first iteration is the same as that of the detector 112 in Embodiment 1 of the present invention shown in FIG.

In the g-th iteration, the detection results e ₁ ... e _M sent from the error detectors 602-1 to 602-M in FIG. 4 are input to the switches 701-1 to 701-M. The

The switches 701-1 to 701-M output the output signals of the subtractors 304-m1 to 304-mN to the adaptive filter 301-m when e _m = 1. When e _m = 0, the output signal of the subtractors 304-m1... 304-mN is not output to the adaptive filter 301-m, and the processing in the adaptive filter 301-m is not performed. Thereafter, the same processing as that of the first embodiment is performed for the signal sequence for which the adaptive filter 301-m performs adaptive filter processing, and nothing is repeated for the signal sequence for which no adaptive filter processing is performed in the adaptive filter 301-m. Not performed.

FIG. 12 shows the procedure of the interference cancellation process described above. As shown in FIG. 12, in the receiving apparatus according to the present embodiment, when a spatially multiplexed signal is received, iteration count counter 110 initializes g to 0. Further, the error detector 602-m initializes _em to 1 (B1). Next, the detector 601 performs adaptive filter processing (B2), and receives data u ₁ (k),..., U _M corresponding to the signals transmitted from the transmitting antennas 103-1. (K) is detected. Then, the detector 601 performs the determination of _{e m (B3),} in the case of _e m = 0, which through the subsequent processing for the m-th signal up (B8). When e _m = 1, the received data u _m (k) is subjected to error correction decoding (B4). On the transmission side, information bits are encoded by an error correction encoding method.

Next, the log likelihood ratio in the previous iteration is added to the log likelihood ratio in the current iteration (B5). The outputs of the log likelihood ratio adders 114-1... 114-M are hard-decided (B6). Error detector 602 performs error detection of the hard decision signal, if there is an error _e m = 0, and _e m = 1 if there is an error (B7). The iteration count counter 110 increments the interference cancellation iteration count g by one (B8). Next, the iteration counter 110 checks whether g is G (B9). If it is G, the determiner 116 outputs the hard decision value as a received bit sequence to the subsequent stage, and ends the process. If it is not G, the determiner 116 sends the hard decision value to the replica creator 117 and creates a replica (B10).

  Next, the subtractor 304 subtracts the interference replica from the signal received by the receiving antennas 111-1 to 111-N (B11). The adaptive filter 301 performs adaptive filter processing (B12). Thereafter, the process returns to (B3).

  Thus, according to the receiving apparatus of the present embodiment, the logarithm input to the bit decision unit is performed in order to perform the process of adding the log likelihood ratio in the past iteration to the log likelihood ratio in the current iteration. The likelihood ratio is a value obtained by integrating the log likelihood ratios obtained from the past iteration to the current iteration, and the contribution of the log likelihood ratio affected by the cancellation error at the time of bit determination can be reduced. . As a result, the number of bit errors due to cancellation errors can be reduced.

  In addition, in this case, interference cancellation is not performed in subsequent iterations for a signal determined to have no error by error detection, so that a series of adaptive filters, SISO decoding, log likelihood ratio addition, and hard decision are performed. Therefore, the amount of calculation can be reduced. In addition, it is possible to prevent an unnecessary cancellation error that occurs by subtracting a replica with low reliability from a correctly determined signal.

  In the present embodiment, the interference canceller apparatus may be a serial interference canceller that ranks M transmission signals in the order in which signal detection is performed and performs interference cancellation processing in order according to the rank. By doing so, since a signal with a lower rank is detected after a signal with a higher rank than that signal is canceled, the diversity gain by multiple antennas can be improved as compared with the case where all signals are detected in parallel. is there. Examples of ranking include received power of each transmission signal, mean square error after interference cancellation, signal-to-noise power ratio, and SIR size.

(Embodiment 3)
FIG. 13 is a block diagram showing the configuration of the transmission side in the third embodiment of the present invention. FIG. 14 is a block diagram showing the configuration of the receiving apparatus according to Embodiment 3 of the present invention.

  14 is an iterative interference canceller that receives a spatially multiplexed LDPC encoded signal, and detects a transmission signal from the reception antennas 111-1 to 111 -M and the reception signal. Detector 112, LDPC decoding unit for decoding detected LDPC encoded signal, and log likelihood ratio adder for adding log likelihood ratio obtained in past iteration to log likelihood ratio obtained in current iteration An LDPC decoder 911 including a storage device for storing logarithmic likelihood ratios in the past and a determiner for hard-decision of the output of the log-likelihood ratio adder, and a replica generator for generating a replica signal from the output of the determiner 117 includes a propagation path estimator 118 that estimates a propagation path from a received signal.

  13 and 14, the same components as those in FIGS. 1, 2, 3, and 4 are denoted by the same reference numerals, and description thereof is omitted.

Next, the operation in the third embodiment of the present invention will be described with reference to FIGS. Let g (≦ G) be the number of repetitions of the interference canceller. On the transmission side, information bit sequences b ₁ (i)... B _M (i) are encoded bit sequences c ₁ (j), respectively, in M LDPC encoders 901-1. Encoded as c _M (j) The coded bit sequences c ₁ (j)... C _M (j) are respectively modulated by the modulators 102-1 to 102-M, and the transmission signal sequences s ₁ (k) to s _M (k). Is obtained.

Transmission signal sequence s ₁ (k)... S _M (k) is transmitted from each of transmission antennas 103-1... 103-M, and N reception antennas 111-1. Received at 111-N. Received signal series r ₁ (k)... R _N (k) received by receiving antennas 111-1 to 111 -N are input to detector 112. The detector 112 outputs log likelihood ratios λ ₁ (j)... Λ _M (j) corresponding to the signals transmitted from the transmission antennas 103-1 to 103-M, respectively. The configuration of the detector 112 is the same as that in the first embodiment shown in FIGS. Log-likelihood ratios λ ₁ (j)... Λ _M (j) are input to LDPC decoders 911-1 to 911-M, respectively. LDPC decoder 911-1 ··· 911-M outputs the hard decision value ^{_{B 1 g (i) ··· B}} M g (i).

When the iteration counter 110 detects that the hard decision values B ₁ ^g (i)... B _M ^g (i) are output from the determiners 116-1 to 116 -M, the iteration count g is set to 1. Count up.

Here, the decision unit 116-1 ··· 116-M, g <time G, the feed hard decision value _B ^m g (i) to the replica generator 117-1 ··· 117-M, g + 1 th Use repeatedly. On the other hand, the determiners 116-1 to 116-M output the hard decision values B ₁ ^g (i)... B _M ^g (i) as the output of the interference canceller when g = G. The replica creators 117-1 to 117-M re-encode and remodulate the hard decision values B ₁ ^g (i)... B _M ^g (i), and then apply a propagation path response. A replica signal sequence s _mn ^g (k) in the g-th iteration is obtained.

FIG. 15 shows the configuration of the LDPC decoder 911-m. Let p (≦ P) be the number of decoding iterations of the LDPC decoder 911-m (P is an integer of 1 or more). The log likelihood ratio λ _m (j) input to the LDPC decoder 911-m is subjected to LDPC decoding by the LDPC decoding unit 1001, and a log likelihood ratio Λ _m ^{g, p} (j) in the p-th decoding iteration is obtained. It is done. Next, a log likelihood ratio Λ _Cm ^g−1 (j) obtained by repeating the g−1th interference canceller in the log likelihood ratio adder 114 -m is obtained from the LDPC decoder 1001 Λ _m ^g, It is added to ^p (j). The log likelihood ratio Λ _Cm ^{g, p} (j) in the g-th interference cancellation iteration and the p-th LDPC decoding iteration is obtained by the addition represented by the following (Equation 8).

The log likelihood ratio Λ _Cm ^{g, p} (j) is hard-decided by the determiner 116-m, and a hard decision value B _m ^{g, p} (i) is obtained. The hard decision value B _m ^{g, p} (i) is parity-checked by the parity checker 1002, and if the parity check sum is 0, the hard decision value B _m ^g (i) of the g-th interference cancellation repetition is a hard decision. and outputs the value _B ^{m g,} p the (i).

Further, the log likelihood ratio Λ _Cm ^{g, p} (j) at this time is sent to the storage device 115-m as the log likelihood ratio Λ _Cm ^g (j) in the g-th interference cancellation repetition, and the g + 1-th interference cancellation repetition is performed. Used in.

On the other hand, if the parity check sum is not 0 and the number of repetitions p = P of the LDPC decoder 911-m, the hard decision value B _m ^{g, p is} set as the hard decision value B _m ^g (i) of the g-th interference cancellation iteration. (i) outputs, sends the log-likelihood ratio lambda _Cm ^g, p storing unit 115-m to (j) as a log likelihood ratio in the interference cancellation iteration of g-th lambda _Cm ^g (j) at this time, g + 1 Used for repeated interference cancellation. That is, compared to the case where the parity check sum is 0, the hard decision value is not output. If the number of iterations p <P of the LDPC decoder 911-m, the log likelihood ratio Λ _Cm ^{g, p} (j) is input as an initial likelihood to the LDPC decoding unit 1001 to perform p + 1-th LDPC decoding.

The procedure of the above interference cancellation process is shown in FIG. As shown in FIG. 16, in the receiving apparatus according to the present embodiment, when a spatially multiplexed LDPC encoded signal is received, iteration number counter 110 initializes g to 0 (C1). The detector 112 detects received data u ₁ (k),..., U _M (k) corresponding to the signal transmitted from each transmitting antenna (C2). The LDPC decoder 911 initializes the number of repetitions p of LDPC decoding to 1 (C3). The LDPC decoder 911 performs LDPC decoding on the detected signal (C4).

  Next, the likelihood correcting unit 119 adds the log likelihood ratio in the previous iteration to the log likelihood ratio in the current iteration (C5). The hard-decision unit 116 makes a hard decision on the output after the log likelihood ratio addition (C6). Next, the parity checker 1002 performs a parity check (C7). If the parity check sum is 0, the parity checker 1002 proceeds to (C10), and if not, determines the number of repetitions of the LDPC decoder 911 (C8). If p = P, the process proceeds to (C10). If p <P, the LDPC decoder 911 increments p by 1 (C9) and performs LDPC decoding again (C4). The iteration number counter 110 increments the interference cancellation iteration number g by 1 (C10). Next, the iteration counter 110 adjusts whether g has become G (C11). If it is G, the determiner 116 outputs a hard decision value and ends the process. If it is not G, the determiner 116 sends a hard decision value to the replica creator 117 to create a replica (C12).

  Next, the subtractor 304 subtracts the interference replica from the signal received by each receiving antenna (C13). The detector 112 performs adaptive filter processing (C14). Thereafter, the process proceeds to (C3).

  Thus, according to the receiving apparatus of the present embodiment, the logarithm input to the bit decision unit is performed in order to perform the process of adding the log likelihood ratio in the past iteration to the log likelihood ratio in the current iteration. The likelihood ratio is a value obtained by integrating the log likelihood ratios obtained from the past iteration to the current iteration, and the contribution of the log likelihood ratio affected by the cancellation error at the time of bit determination can be reduced. . As a result, the number of bit errors due to cancellation errors can be reduced.

In this embodiment, as shown in FIGS. 17 and 18, the LDPC decoders 1211-1 to 1211-M have hard decision values B ₁ ^g (i) to B _M ^g (i ) And parity check result B _m H _m ^t may be output, and the detector 601 in the second embodiment may be used. In this case, if the parity check sum B _m H _m ^t is 0, the hard decision value B _m ^{g, p} (i) and the parity check sum as the hard decision value B _m ^g (i) of the g-th interference cancellation repetition B _m H _m ^t is output, and interference cancellation processing for the m-th signal is stopped in the subsequent interference cancellation repetition. Further, the log likelihood ratio Λ _Cm ^{g, p} (j) at this time is sent to the storage device 115-m as the log likelihood ratio Λ _Cm ^g (j) in the g-th interference cancellation repetition, and the g + 1-th interference cancellation repetition is performed. Used in.

  In this way, in addition to the effects of the present embodiment described above, interference cancellation is not performed on the signal determined by the parity checker 1002 that there is no error in subsequent iterations. Since a series of processes of cancellation, adaptive filter, SISO decoding, log likelihood ratio addition, and hard decision are not required, the amount of calculation can be reduced, and unnecessary cancellation errors can be prevented from occurring.

  Here, it was confirmed by performing a simulation under the following conditions that a good bit error rate characteristic can be obtained according to the above configuration. The propagation path response is assumed to be known. The parameters used for the simulation are as follows.

Number of transmitting antennas: 4
Number of receiving antennas: 4
Modulation method: 64QAM-OFDM
Number of subcarriers: 48
Error correction method: LDPC code with coding rate 0.8 and code length 2000 Decoding method: min-sum decoding, maximum number of repetitions 50
Maximum number of interference canceller repetitions: 6
Fading: Quasi-static 20-wave Rayleigh fading (rms delay spread 50 ns)
Interleaving: Block interleaver with a depth of 16 bits FIG. 19 shows a simulation result of this bit error rate characteristic. The horizontal axis is the average E _b / N ₀ (bit energy / noise power density). According to this embodiment, the value of E _b / N ₀ that achieves a bit error rate of 10 ⁻⁴ is about 5 dB compared to the case where no interference canceller is used, and an interference canceller that does not add a log likelihood ratio is used. Compared to the case, the improvement is about 3 dB. Therefore, it can be seen that the configuration of the present embodiment operates effectively.

(Embodiment 4)
Embodiment 4 of the present invention uses low-density parity check (LDPC) coding as an error correction code system, and includes an LDPC decoder as a SISO decoder on the receiving side (multi-input multiple-output ( 1 illustrates a configuration of a receiving apparatus that receives a spatially multiplexed signal using a repetitive interference canceller in a MIMO (Multi-Input Multi-Output) system. In this embodiment, a likelihood correction unit is provided after the LDPC decoder, and the error rate is improved by correcting the likelihood obtained at each iteration.

  FIG. 20 is a block diagram showing a configuration on the transmission side in Embodiment 4 of the present invention. FIG. 21 is a block diagram showing the configuration of the receiving apparatus according to Embodiment 4 of the present invention.

  Hereinafter, in the present invention, a log likelihood ratio is a ratio of a probability that a bit is +1 and a probability that is −1 (or a ratio of a probability that is 0 and a probability that is 1) expressed as a logarithm. Define and use. As the log likelihood ratio, an LDPC decoding algorithm that performs processing in a probability domain, for example, a logarithmic representation of input values and output values of a sum-product algorithm or a Belief propagation algorithm, or an input value of the decoding algorithm that performs processing in a logarithmic domain And output values are available.

  In the following, in order to simplify the description, in a MIMO system in which the number of transmitting antennas M is 2 and the number of receiving antennas N is 2, the maximum number of repetitions G (the second interference cancellation processing unit of G-1 stage) is An interference canceller that repeats signal detection processing three times will be described. Of course, this is merely an example, and the present invention can be applied even when the number of antennas and the number of repetitions are other than those described above, and the effects of the present invention can be obtained.

  The transmission side illustrated in FIG. 20 includes two LDPC encoders 2101, a modulator 2102, and a transmission antenna 2103.

  The receiving side shown in FIG. 21 includes a receiving antenna 2111, a detector 2112 (first detector) that detects received data from the received signal in the first signal detection process, and a received signal and a replica in the second and subsequent signal detection processes. A detector 2120 (second detector) that detects a transmission signal from the signal, an LDPC decoder 2113 that performs LDPC decoding on signals detected by the detectors 2112 and 2120, and an LDPC decoder 2113 in the second and subsequent iterations. A bit decision unit 2116 that hard-decides the output of the likelihood correction unit 2119, the LDPC decoder 2113, or the likelihood correction unit 2119 that corrects the output likelihood with the likelihood in the past iteration and accumulates the corrected likelihood. The replica generator 2117 that creates and stores a replica signal from the output of the bit decision unit 2116 and the propagation path from the received signal Composed of propagation path estimator 2118 that estimates.

  Here, the first interference cancellation processing unit includes a detector 2112, an LDPC decoder 2113-1, 2113-2, and bit determiners 2116-1, 2116-2, and the second interference in the first stage. The cancel processing unit includes a detector 2120-1, an LDPC decoder 21113-3, 2113-4, a bit decision unit 2116-3, 2116-4, a replica generator 2117-1, and a likelihood correction unit 2119-1, 2119-. 2, the second interference cancellation processing unit in the second stage includes a detector 2120-2, LDPC decoders 2113-5 and 2113-6, bit determiners 2116-5 and 2116-6, and a replica generator 2117-2 and likelihood correctors 2119-3 and 2119-4.

  In the present embodiment, the likelihood correction unit 2119, as shown in FIG. 22, adds the log likelihood ratio obtained in the past iteration to the log likelihood ratio obtained in the current iteration. The likelihood ratio adder 2114 is configured. In addition to the above components, the receiver includes an A / D converter, a frequency converter, a band limiting filter, a high frequency amplifier, and the like, but is not an element directly related to the operation of the present invention. In FIG. 21, this is omitted.

Next, the operation of the present invention will be described with reference to FIGS. In the two LDPC encoders 2101-1 and 2101-2 on the transmission side, the information bit sequences b ₁ (i) and b ₂ (i) are encoded bit sequences c ₁ (j) and c ₂ (j, respectively). ). The coded bit sequences c ₁ (j) and c ₂ (j) are modulated by modulators 2102-1 and 2102-2, respectively, and transmission signal sequences s ₁ (k) and s ₂ (k) are obtained. Here, i = 1... I, j = 1... J, k = 1... K (I, J, and K are each an integer of 1 or more) are an index of information bit sequence and encoding, respectively. Indicates the index of bit sequence and the index of transmission signal sequence.

The transmission signal sequences s ₁ (k) and s ₂ (k) are transmitted from the transmission antennas 2103-1 and 2103-2, respectively, and received by the reception antennas 2111-1 and 111-2 of the reception device through the propagation path.

Received signal sequences r ₁ (k) and r ₂ (k) received by receiving antennas 2111-1 and 111-2 are input to detector 2112 and propagation path estimator 2118. The detector 2112 outputs log likelihood ratios λ ₁ (j) and λ ₂ (j) respectively corresponding to the two transmission signals.

Log-likelihood ratios λ ₁ (j) and λ ₂ (j) are respectively input to LDPC decoders 2113-1 and 2113-2, and log-likelihood ratios Λ ₁ ¹ (i) and Λ ₂ ^{1 in the first} iteration. (I) is output. Thereafter, bit determination is performed in the bit determiners 2116-1 and 116-2, and hard determination values B ₁ ¹ (i) and B ₂ ¹ (i) are obtained.

The replica creator 2117-1 re-encodes and remodulates the hard decision values B ₁ ¹ (i) and B ₂ ¹ (i) obtained in the first iteration (first interference cancellation processing unit). By multiplying the propagation path response estimated by the propagation path estimator 2118, the replica signal sequence s ₁₁ ¹ (k), s ₁₂ ¹ (k), s ₂₁ ¹ (k), s ₂₂ ^{1 in the first} iteration is obtained. Create (k).

The detector 2120-1 determines the second time based on the received signal sequence and the replica signals s ₁₁ ¹ (k), s ₁₂ ¹ (k), s ₂₁ ¹ (k), s ₂₂ ¹ (k), and the propagation path estimation value. Logarithmic likelihood ratios λ ₁ (j) and λ ₂ (j) respectively corresponding to the two transmission signals in the repetition (second interference cancellation processing unit in the first stage) are output. Log likelihood ratios λ ₁ (j) and λ ₂ (j) are input to LDPC decoders 213-3 and 2113-4, respectively, and log likelihood ratios Λ ₁ ² (i) and Λ ₂ ^{2 in the second} iteration. (I) is output. In the log likelihood ratio adder 2114 in the likelihood correction units 2119-1 and 2119-2, the log likelihood ratios Λ ₁ ² (i) and Λ ₂ ² (i) in the second iteration are repeated in the first iteration. The obtained log likelihood ratios Λ _C1 ¹ (i) and Λ _C2 ¹ (i) are added. The outputs Λ _C1 ² (i) and Λ _C2 ² (i) of the log likelihood ratio adder 2114 are expressed by (Equation 9).

The bit decision unit 2116-3,2116-4 performs hard decision of ^{_{Λ C1 2 (i), Λ}} C2 2 (i), the hard decision value _{^{B 1 2 (i), B}} 2 2 (i) is obtained .

The replica creator 2117-2 uses the hard decision values B ₁ ² (i) and B ₂ ² (i) obtained in the second iteration and the propagation path estimation values to determine the replica signals s ₁₁ ² (k) and s _12. ² (k), s ₂₁ ² (k), and s ₂₂ ² (k) are created.

The detector 2120-2 determines the third time based on the received signal sequence and the replica signals s ₁₁ ² (k), s ₁₂ ² (k), s ₂₁ ² (k), s ₂₂ ² (k), and the propagation path estimation value. Logarithmic likelihood ratios λ ₁ (j) and λ ₂ (j) respectively corresponding to the two transmission signals in the repetition (second interference cancellation processing unit in the second stage) are output. Log-likelihood ratios λ ₁ (j) and λ ₂ (j) are input to LDPC decoders 2113-5 and 2113-6, respectively, and log-likelihood ratios Λ ₁ ³ (i) and Λ _{2 in the} ^third iteration. ³ (i) is output. Thereafter, the likelihood correction units 2119-3 and 2119-4 perform the same processing as in the second iteration, and Λ _C1 ³ (i) and Λ _C2 ³ (i) are obtained.

The bit decision unit 2116-5,2116-6 performs hard decision of ^{_{Λ C1 3 (i), Λ}} C2 3 (i), the hard decision value _{^{B 1 3 (i), B}} 2 3 (i) is obtained .

The receiving device outputs the hard decision values B ₁ ³ (i) and B ₂ ³ (i), which are the outputs of the bit decision units 2116-5 and 216-6, as received bit values to the subsequent stage.

FIG. 23 shows a specific functional configuration example of the detector 2112 in the first iteration. In the first iteration, received signal sequences r ₁ (k) and r ₂ (k) received by the receiving antennas 2111-1 and 111-2 are input to the linear filter 2301. The linear filter 2301 detects received data by performing linear filter processing on r = [r ₁ (k), r ₂ (k)]. The detected received data series u = [u ₁ (k), u ₂ (k)] is expressed as (Equation 10).

Here, w represents an optimum weighting factor of the linear filter 2301, and is determined by a minimum mean square error (MMSE) standard (the mean square error between the transmitted signal and the received data u is minimum). w is calculated from the propagation path estimated by the propagation path estimator 2118. The detected received data sequences u ₁ (k) and u ₂ (k) are demodulated by the demodulators 2202-1 and 2202-2, respectively, and weighted by the weighters 2203-1 and 2203-2, so that the log likelihood ratio is obtained. λ ₁ (j) and λ ₂ (j) are obtained.

FIG. 24 shows a specific functional configuration example of the detector 2120 in the second and subsequent iterations. In the repetition of g (≧ 2) times, the received signal sequences r ₁ (k) and r ₂ (k) received by the receiving antennas 2111-1 and 111-2 are divided into two as the number of simultaneously transmitted signals. Branching is performed, and subtraction of the interference replica created from the determination value obtained in the previous iteration is performed in the subtracters 2304-11. The signal series r ₁₁ (k), r ₁₂ (k), r ₂₁ (k), and r ₂₂ (k) after subtraction by the subtracters 2304-11... 2304-22 are expressed as (Equation 3). . In this embodiment, the detector 2120 includes the subtractor 2304. However, the subtractor 2304 can operate in the same manner even if it is disposed outside the detector 2120.

Thereafter, r ₁₁ (k) and r ₁₂ (k) are combined by diversity combiner 2305-1, and r ₂₁ (k) and r ₂₂ (k) are combined by diversity combiner 2305-2. The received data u ₁ (k) and u ₂ (k) output from the diversity combiner are expressed as (Equation 11).

Here, w _{1 and} w ₂ are coefficients of the diversity combiner filters 2301-1 and 2301-2, and a signal-to-noise power ratio (SNR: Signal−) after diversity combining from the propagation path estimated by the propagation path estimator 2118. to-Noise Power Ratio) is maximized.

r ₁ = [r ₁₁ (k), r ₁₂ (k)], r ₂ = [r ₂₁ (k), r ₂₂ (k)] represents a received signal vector after interference cancellation. Next, u ₁ (k) and u ₂ (k) are demodulated by the demodulators 2202-1 and 2202-2, and weighted by the weighting units 2203-1 and 2203-2, so that the log likelihood ratio λ ₁ (j ), Λ ₂ (j).

  In the following, as a specific example, when the phenomenon that “the third bit is incorrect at the first time, the third bit is detected correctly at the second time, but the fifth bit is incorrect due to a cancellation error” occurs. If the likelihood correction is used, the effect of the invention will be described for a case where “the third bit is incorrect at the first time and all bits can be detected correctly at the second time”.

  It is assumed that the transmission apparatus has transmitted a bit sequence of (1, 0, 0, 1, 0). Furthermore, as shown in FIG. 25, log likelihood ratio sequences output by the LDPC decoder 21113-1 in the first detection process in the receiving apparatus are (1.2, -2.8, 0.8, 4.0). , -1.4). Here, the bit decision unit 21116-1 performs bit decision based on the sign of the log likelihood ratio obtained by the first signal detection, and outputs a bit sequence of (1, 0, 1, 1, 0). To do.

  Comparing the bit sequence that has been bit-determined with the transmitted bit sequence reveals that the third bit is incorrect. Next, a replica signal is created using this bit-determined bit sequence, and the log likelihood ratio sequence output by the LDPC decoder 213-3 after performing the second signal detection process is (3.6). , -3.4, -1.2, 5.6, 0.9). When the bit decision unit 2116 bit-determines the log-likelihood ratio sequence as it is, it becomes (1, 0, 0, 1, 1). This time, the result of the first signal detection is correct, and the fifth bit is incorrect. End up. This is a cancellation error.

  At this time, the logarithmic likelihood ratio sequence (3.6, − output by the LDPC decoder 21113-3 in the second signal detection process before the second bit determination is performed by the likelihood correction unit 2119-1 of the present invention. 3.4, -1.2, 5.6, 0.9) in the log likelihood ratio sequence (1.2, -2...) After LDPC decoding in the first signal detection processing by the LDPC decoder 2113-1. (8, 0.8, 4.0, -1.4) is added, the log-likelihood ratio series is (4.8, -6.2, -0.4, 9.6, -0.5) Become. When this is bit-determined, it becomes (1, 0, 0, 1, 0), and it can be seen that the transmitted bit sequence is correctly received by performing likelihood correction.

  As described above, according to the receiving apparatus of the present embodiment, by adding the log likelihood ratio in the past iteration not affected by the cancellation error to the log likelihood ratio in the current iteration, the current iteration It is possible to eliminate the effects of cancellation errors that occurred in

  In the present embodiment, the likelihood correction unit adds the log likelihood ratio in the g−1th iteration and the log likelihood ratio in the gth iteration with equal gain, but as in (Equation 12) May be added with an appropriate weight v.

  By performing (Equation 12), for example, when the likelihood correction unit determines that the absolute value of the log likelihood ratio in the g-1th iteration is large and the reliability is high, the contribution at the time of addition By increasing the value, the cancellation error elimination effect can be enhanced, and the weight v is increased when it is determined that the absolute value of the log-likelihood ratio in the g-1th iteration is low and the reliability is low. Thus, an increase in errors due to addition can be suppressed.

  In the present embodiment, the log likelihood ratio in the g−1th iteration and the log likelihood ratio in the gth iteration are added with equal gain, but an appropriate weight v is given as in (Equation 13). You may add it.

  By doing in this way, when the reliability of the log likelihood ratio in the g-1th iteration is high, it is possible to increase the contribution at the time of addition, and there is an effect that the cancellation error removal effect is enhanced. Moreover, as an appropriate weight v at this time, the ratio of the absolute value of the log likelihood ratio in the g-1 iteration and the log likelihood ratio in the g iteration, or a fixed value obtained in advance by simulation or the like Etc. can be used.

  In the present embodiment, the log-likelihood ratio in the g-1th iteration and the log-likelihood ratio in the g-th iteration are added with equal gain, but the log-likelihood ratio as in (Equation 14). You may add after weighting by the absolute value of.

  By doing in this way, there exists an effect that the contribution of the log likelihood ratio with a large absolute value in addition, ie, high reliability, can be enlarged.

  In the present embodiment, the log likelihood ratio in the g-1 iteration and the log likelihood ratio in the g iteration are added to all bits, but in the g-1 iteration. Only a bit having a different log likelihood ratio code and a log likelihood ratio code in the g-th iteration may be added, and if the codes are the same, the addition may not be performed. By doing in this way, there is an effect that the log likelihood ratio addition processing for the bits in which no cancellation error has occurred can be reduced.

  In the present embodiment, the likelihood correction unit has a configuration in which the log likelihood ratio in the g−1th iteration and the log likelihood ratio in the gth iteration are added with equal gain. A configuration may be adopted in which the larger of the absolute values of the log-likelihood ratio in the first iteration and the log-likelihood ratio in the g-th iteration is selected. By doing so, the addition process can be omitted, and the amount of calculation and the amount of processing delay can be reduced.

  In the present embodiment, the likelihood correction unit is configured to be connected after the LDPC decoder in all the second and subsequent iterations. However, the likelihood correction unit is not provided until a certain number of iterations. The likelihood correction unit may be provided for subsequent iterations. By doing so, it is possible to reduce the influence of errors generated by performing the likelihood correction with the likelihood of not converging in the initial iteration of interference cancellation.

  Here, when the likelihood is not converged, the sign of the log likelihood ratio changes every iteration, and the absolute value of the log likelihood ratio changes greatly. Further, when the likelihood converges, the sign of the log likelihood ratio settles to either positive or negative, and the change in absolute value is reduced.

  In this embodiment, the linear filter 2301 for obtaining the weight according to the MMSE standard is provided in the detector 2112. However, a zero forcing detector for generating the weight from the inverse matrix of the propagation path estimation value is provided. It is also good. By doing in this way, there exists an effect that the amount of calculations at the time of weight generation can be reduced.

  Further, instead of the linear filter 2301, a maximum likelihood detector may be provided. By doing so, it is possible to output a log likelihood ratio with higher reliability than when a linear filter is used.

  Furthermore, instead of the linear filter 2301, a maximum posterior probability demodulator may be provided. By doing so, it is possible to output a log likelihood ratio with higher reliability than when the linear filter 2301 is used.

  In the present embodiment, diversity combiner 2305 in detector 2120 is configured to perform weighting that maximizes SNR, but may be configured to perform weighting that maximizes SINR. In this way, even when an interference component remains in the signal after interference cancellation, diversity combining that suppresses the interference component can be performed.

  Furthermore, the diversity combiner 2305 may be configured to perform weighting that minimizes the mean square error. In this way, even when an error component such as an interference component or a noise component is included in the signal after interference cancellation, diversity combining can be performed with the component minimized.

  Further, the diversity combiner 2305 is configured to perform weighting that maximizes the SNR, but may be configured to perform diversity combining with equal gain without performing weighting. In this way, it is possible to perform diversity combining while omitting the weight coefficient multiplication process.

  Furthermore, although the diversity combiner 2305 is configured to perform weighting that maximizes the SNR, it may be configured to select and output only one of the two input signals having higher power. In this way, diversity combining calculation can be simplified.

  In the present embodiment, two LDPC encoders 2101-1, 2101-2, and two modulators 2102-1, 2102-2 are provided, but as shown in FIG. Then, one error correction encoder 2101 and one modulator 2102 are provided, and the modulated signal is divided into two sequences by a serial / parallel converter 2504 and transmitted from transmission antennas 2103-1 and 2103-2, respectively. It is also possible.

  In this case, as shown in FIG. 27, on the receiving side, the log likelihood ratio corresponding to each transmission signal output from the detector 2112 is converted into one signal sequence by the parallel-serial converter 2511, and then LDPC decoding is performed. , Likelihood correction and bit determination.

In the present embodiment, the receiving apparatus may be configured to use a serial interference canceller as shown in FIG. In this case, first, two transmission signals are ranked by the ranking unit 2132. Next, the detector 2130-1 detects the signal with the first rank. The output of the detector 2130-1 is subjected to error correction decoding by the LDPC decoder 21113-1, and hard-decided by the bit decision unit 21116-1. Next, the replica creator 2117-1 creates a replica signal using the hard decision value B ₁ (i). The created replica signal is input to the detector 2131-1. In the detector 2131-1, the replica signal is first subtracted from the received signal series r ₁ (k), r ₂ (k). Thereafter, linear filtering is performed to output a log likelihood ratio. The above processing is performed from the signal with the highest rank to the signal with the lowest rank.

  Thereafter, the detection process from the signal with the highest rank to the signal with the lowest rank is repeated G times. In this way, a low rank signal can be detected based on a signal in which a higher rank signal is canceled from the received signal, so that diversity gain with multiple antennas can be detected compared to when all signals are detected in parallel. There is an effect that can be improved.

  Examples of ranking include received power of each transmission signal, mean square error after interference cancellation, signal-to-noise power ratio, and magnitude of SIR. Moreover, it is good also as the method of determining a rank at random, and the order decided beforehand.

  Here, by detecting one signal at a time in order of rank, it is possible to detect in a state where many signals are canceled when detecting a signal having a low rank, so that the gain is improved compared to detecting all signals at once. .

In the present embodiment, likelihood correction means 1901 having a low-pass filter that inputs a likelihood ratio obtained from the past to the current iteration shown in FIG. 9 as input may be used as the likelihood correction means. . The likelihood correcting unit 1901 includes a likelihood converter 1902, a storage 1903, tap coefficient multipliers 1904-0 to 1904 -T, and an adder 1905. Here, T is an integer of 1 or more and represents the number of taps of the low-pass filter. In the present embodiment, likelihood converter 1902 converts input log likelihood ratio Λ ^g (i) to expected value X ^g (i) using the conversion equation of (Equation 15).

The expected value X ^g (i) is multiplied by the tap coefficient h ^g (i) of the low-pass filter by the tap coefficient multiplier 1904-0. The storage 1903 stores an expected value in the past T iterations. The tap coefficient multipliers 1904-1 to 1904 -T respectively multiply the expected value X ^g−t (i) in the t-th previous iteration by the tap coefficient h ^t (i) of the low-pass filter. . Here, t is an arbitrary positive integer of 1 or more and T or less. The outputs of the multipliers 1904-0 to 1904 -T are added by an adder 1905. The output of the adder 1905 is expressed by (Equation 16), and the likelihood correcting means performs inverse transformation of the conversion equation of (Equation 15) on the maximum value of the signal given by (Equation 16), and then the likelihood after correction. Output as degrees.

  By doing so, it is possible to correct the fluctuation of the likelihood ratio for each repetition caused by the influence of the cancellation error.

  In the present embodiment, the LDPC encoder 2101 is used as the transmitter encoder and the LDPC decoder 2113 is used as the decoder of the receiver. However, the turbo encoder is used as the transmitter encoder. In the case of using a turbo decoder implemented by BCJR algorithm, MAP (Maximum a posteriori Probability) algorithm, Max-Log-MAP algorithm, Log-MAP algorithm, SOVA (Soft Output Viterbi Algorithm) as a decoder of the receiving device. The effects of the present invention can be obtained.

  Furthermore, the effect of the present invention can be obtained even when a convolutional encoder is used as the transmitter encoder and a SISO decoder implemented by SOVA is used as the decoder of the receiving apparatus.

  Furthermore, even when an arbitrary error correction encoder is used as the encoder on the transmission side and an arbitrary SISO decoder capable of decoding the error correction code is used as the decoder of the receiving apparatus, the effect of the present invention is obtained. be able to.

(Embodiment 5)
The fifth embodiment of the present invention has a function of stopping subsequent signal detection processing when it is determined by the parity check of the LDPC code that there is no error in the process of repeatedly performing signal detection processing. A receiving apparatus is disclosed. In the following, description of parts common to the fourth embodiment of the present invention will be omitted, and only parts related to the function of stopping the signal detection process will be described.

FIG. 29 is a diagram of a receiving apparatus according to Embodiment 5 of the present invention. The configuration on the transmission side in Embodiment 5 of the present invention is the same as that in FIG. The LDPC decoder 2113 in FIG. 29 performs a parity check using a parity check matrix, sets the parity check results e ₁ and e ₂ to 1 if there is an error and 0 if there is an error, and sets e ₁ and e ₂ to the detector 21201. Send to.

FIG. 30 shows a specific functional configuration example of the detector 21201. In the g-th iteration, the detection results e ₁ and e ₂ are input to the switches 21210-1 and 21210-2. The switch 21210-1 outputs the output signals of the subtracters 2304-11 and 2304-12 to the diversity combiner 2305-1 when e ₁ = 1. When e ₁ = 0, the output signals of the subtractors 2304-11 and 2304-12 are not output to the diversity combiner 2305-1, and the reception process in the g-th iteration for the first transmission signal is not performed. The bit determination value obtained in the first iteration is output to the subsequent stage.

Similarly, 21210-2 outputs the output signals of the subtracters 2304-21 and 2304-22 to the diversity combiner 2305-2 when e ₂ = 1. When e ₂ = 0, the output signals of the subtracters 2304-21 and 2304-22 are not output to the diversity combiner 2305-2, and the reception process in the g-th iteration for the second transmission signal is not performed, and g The bit determination value obtained in the first iteration is output to the subsequent stage.

  As described above, since a signal determined to have no error by the parity check is not subjected to signal detection in subsequent iterations, a series of diversity combining, LDPC decoding, log-likelihood ratio addition, and hard determination are performed. Since no processing is required, the amount of calculation can be reduced. Further, it is possible to prevent an unnecessary cancellation error that occurs by subtracting a replica having low reliability from a correctly determined signal.

In the present embodiment, the transmission side performs LDPC encoding, and the reception apparatus has a configuration in which the parity check results of the LDPC code are e ₁ and e _2. However, on the transmission side, a parity bit is added. Arbitrary encoding may be performed, a parity check may be performed by the receiving apparatus, and the results may be set as e ₁ and e ₂ . Furthermore, on the transmission side, an error detection bit may be added after the code obtained by arbitrary encoding, and error detection may be performed by the reception device, and the result may be set as e ₁ and e ₂ . This also has the effect that signal detection is not performed in subsequent iterations for signals determined to have no errors in the present embodiment.

(Embodiment 6)
Embodiment 6 of the present invention discloses a receiving apparatus that performs likelihood correction before an LDPC decoder. In the following, description of parts common to Embodiment 4 of the present invention is omitted, and only parts related to performing likelihood correction before the LDPC decoder will be described.

FIG. 31 shows a configuration diagram of a receiving apparatus in this embodiment. In this embodiment, detector 2112 outputs log likelihood ratios λ ₁ ¹ (j) and λ ₂ ¹ (j) corresponding to signals transmitted from two transmission antennas. In the second iteration, the detector 2120-1 outputs log likelihood ratios λ ₁ ² (j) and λ ₂ ² (j). The likelihood correction unit 2119 sets the output log likelihood ratio of the detector 2120-1 to λ ₁ ² (j) and λ ₂ ² (j) as shown in (Equation 17), and the output log likelihood of the detector 2112. Likelihood correction is performed by adding the degree ratios λ ₁ ¹ (j) and λ ₂ ¹ (j).

Thereafter, the corrected log-likelihood ratios λ _c1 ² (j) and λ _c2 ² (j) are input to the LDPC decoders 2113-1 and 1133-1 and subjected to LDPC decoding. In the third iteration, the output log likelihood ratios λ ₁ ³ (j) and λ ₂ ³ (j) of the detector 2120-2 are log likelihood ratios λ _c1 ² that have been likelihood-corrected in the second iteration. (J) and λ _c2 ² (j) are used for likelihood correction to obtain λ _c1 ³ (j) and λ _c2 ³ (j).

  By doing in this way, the receiving apparatus of this embodiment performs likelihood correction before LDPC decoding, so that the influence of the cancellation error is propagated to other bits in the block by the iterative process of LDPC decoding. Adverse effects caused by this can be reduced.

  In this embodiment, the likelihood correction unit 2119 is configured to add the log likelihood ratio in the previous iteration to the log likelihood ratio in the current iteration. Even if other likelihood correction methods are used, the effect of likelihood correction can be obtained.

  In the present embodiment, the likelihood correction unit 2119 is configured to correct the log likelihood ratio in the current iteration using the log likelihood ratio before LDPC decoding in the previous iteration. As shown in FIG. 32, the log likelihood ratio before LDPC decoding in this iteration may be corrected using the log likelihood ratio after LDPC decoding in the previous iteration. By doing in this way, the log likelihood ratio in this iteration can be corrected using the log likelihood ratio after improving the reliability by the LDPC decoding process in the previous iteration.

(Embodiment 7)
The seventh embodiment of the present invention corrects the likelihood by performing diversity combining using the output likelihood of the detector in the previous iteration at the time of diversity combining after interference cancellation, and the influence of the cancellation error. A receiving apparatus for reducing the above is disclosed. In the following, description of parts common to the fourth embodiment of the present invention is omitted, and only parts related to diversity combining using the output likelihood of the detector in the previous iteration will be described.

  FIG. 33 shows a configuration diagram of a receiving apparatus in this embodiment. In the present embodiment, detector 21701 performs linear filter processing and weighting processing, and outputs detection signals corresponding to signals transmitted from two transmission antennas. The detection signal is demodulated by the digital demodulator 21702, LDPC-decoded by the LDPC decoder 2113, and bit-determined by the bit determiner 2116.

  Thereafter, the replica creator 2117 creates a replica signal using the hard decision value after the bit decision. The subtracter 2304 subtracts the replica signal from the reception signals received by the reception antennas 2111-1 and 111-2. Diversity combiner 21703 performs diversity combining using the signal after subtraction of the two replica signals and the detection signal output from detector 21701. Thereafter, the diversity combined signal is demodulated by the digital demodulator 21702, LDPC-decoded by the LDPC decoder 2113, and bit-determined by the bit determiner 2116.

  Examples of the diversity combining method include a method of combining by weighting so that the SNR after diversity combining is maximized, a method of combining by weighting so that the SINR after diversity combining is maximized, and a mean square after diversity combining There are a method of weighting and combining so as to minimize the error, a method of combining with equal gain, and a method of selecting and outputting a signal having the highest power.

  According to the present embodiment, in the interference cancellation processing, even when subtraction using an incorrect replica signal is performed, by performing diversity combining taking into account the output of the detector in the previous iteration, The influence can be reduced. As a result, cancellation errors can be reduced.

(Embodiment 8)
Embodiment 8 of the present invention discloses a receiving apparatus that performs likelihood correction after performing a predetermined number of repetition signal detection processes, rather than performing likelihood correction in the process of performing repetition signal detection processing. To do. In the following, description of parts common to the fourth embodiment of the present invention is omitted.

FIG. 34 shows a configuration diagram of a receiving apparatus according to the present embodiment. In the present embodiment, received signal sequences r ₁ (k) and r ₂ (k) received by receiving antennas 2111-1 and 111-2 are input to detector 2112 and propagation path estimator 2118. The detector 2112 outputs log likelihood ratios respectively corresponding to the two transmission signals. Thereafter, LDPC decoding is performed by the LDPC decoder 2113, and a hard decision is made by the bit decision unit 2116. The replica creator 2117-1 re-encodes and remodulates the hard decision value obtained in the first iteration, and then multiplies the channel response estimated by the channel estimator 2118, thereby repeating the first iteration. Create a replica signal at.

  Detector 2120-1 outputs log likelihood ratios corresponding to the two transmission signals in the second iteration based on the received signal sequence, replica signal, and propagation path estimation value. The log likelihood ratios are input to LDPC decoders 213-3 and 2113-4, respectively, and the log likelihood ratios after LDPC decoding in the second iteration are output. Bit decision units 2116-3 and 2116-4 perform a hard decision on the log likelihood ratio after LDPC decoding. The signal detection process in the third iteration is performed in the same manner as the signal detection process in the second iteration.

  Likelihood correction sections 21801-1, 21801-2 perform likelihood correction using the log likelihood ratio after LDPC decoding output in the signal detection process in each iteration. The log likelihood ratio after likelihood correction is hard-decided by the bit decision units 2116-7 and 2116-8. The hard decision value is delivered to the subsequent stage as a received value.

  Examples of likelihood correction processing performed by the likelihood correction units 21801-1, 21801-2 include a method of weighting and combining log likelihood ratios obtained by signal detection processing in each iteration, a method of combining with equal gain, and absolute There are a method of selecting and outputting the largest value, and a method of using a low-pass filter.

  According to the present embodiment, the influence of subtraction using an incorrect replica signal is performed by likelihood correction using the log likelihood ratio after LDPC decoding obtained in each iteration after the interference cancellation processing is finished. Can be reduced.

  As mentioned above, although embodiment of this invention was described with reference to drawings, the specific structure is not restricted to this embodiment, The design change etc. of the range which does not deviate from the summary of this invention are included.

  Since the receiving apparatus of the present invention is configured to include likelihood correcting means for correcting the likelihood obtained in the current iteration with the likelihood obtained in the past iteration, the same frequency interference is repeatedly removed, The present invention can be used in a receiving device that detects a desired signal.

The figure which shows the structure of the transmission side in Embodiment 1 of this invention. The figure which shows the structure of the receiver in Embodiment 1 of this invention. The figure which shows the specific functional structural example of the detector 112 in the 1st repetition in FIG. The figure which shows the specific functional structural example of the detector 112 in the repetition after the 2nd time in FIG. Flow chart showing an example of a processing procedure in the first embodiment of the present invention The figure which shows the example of the transmission side at the time of comprising the error correction encoder, the SISO decoder, the memory | storage device, and the determination device as one in the receiver in Embodiment 1 of this invention. The figure which shows the example of the receiving side at the time of comprising the error correction encoder, the SISO decoder, the memory | storage device, and the determination device as one in the receiver in Embodiment 1 of this invention. The figure which shows the example at the time of using a serial type interference canceller in the receiver in Embodiment 1 of this invention The figure which shows the example at the time of providing the low pass filter as a likelihood correction means in the receiver in Embodiment 1 of this invention. The figure which shows the structure of the receiver in Embodiment 2 of this invention. The figure which shows the specific functional structural example of the detector 112 in the repetition after the 2nd time in FIG. The flowchart which shows the example of the process sequence in Embodiment 2 of this invention. The figure which shows the structure of the transmission side in Embodiment 3 of this invention. The figure which shows the structure of the receiver in Embodiment 3 of this invention. The figure which shows the specific functional structural example of LDPC decoder 911-m in FIG. The flowchart which shows the example of the process sequence in Embodiment 3 of this invention. The figure which shows the example in the case of stopping an interference cancellation process according to a parity check sum in the receiver in Embodiment 3 of this invention. The figure which shows the specific functional structural example of LDPC decoder 1211-m in FIG. The figure which shows the bit error rate characteristic with respect to average Eb / N0 in Embodiment 3 of this invention. The figure which shows the structure of the transmission side in Embodiment 4. FIG. FIG. 10 shows a configuration of a receiving apparatus in the fourth embodiment. The figure which shows the structure of the likelihood correction | amendment part in Embodiment 4. FIG. The figure which shows the structure of the detector in Embodiment 4. FIG. The figure which shows the structure of the detector in Embodiment 4. FIG. FIG. 10 shows a configuration of a receiving apparatus in the fourth embodiment. The figure which shows another example of the structure of the transmission side in Embodiment 4. FIG. FIG. 15 is a diagram illustrating another example of a configuration of a reception device in Embodiment 4 Flow chart showing an example of a processing procedure in the fourth embodiment FIG. 9 shows a configuration of a receiving apparatus in the fifth embodiment. The figure which shows the structure of the detector in Embodiment 5. FIG. FIG. 10 shows a configuration of a receiving apparatus in the sixth embodiment. FIG. 18 is a diagram illustrating another configuration example of the reception device in the sixth embodiment. FIG. 10 shows a structure of a receiving device in the seventh embodiment. FIG. 18 shows a configuration of a receiving apparatus in the eighth embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Error correction encoder 102, 2102 Modulator 103, 2103 Transmitting antenna 110 Repetition counter 111, 211 Receiving antenna 112, 601, 1122, 2120, 2130, 2131, 21201, 21701 Detector 113 SISO decoder 114, 2114 Logarithm Likelihood ratio adder 115, 1903, 21903 Storage device 116 Judgment device 117, 2117 Replica creation device 118, 2118 Channel estimator 119, 1901, 2119, 21801, 19901 Likelihood correction unit 120 Detector for m-th rank signal 121,132 Ranking unit 203,2202 Demodulator 203,2203 Weighter 301 Adaptive filter 304,2304 Subtractor 504,516,2504 Series-parallel converter 511,2511 Parallel series Converter 602 Error detector 701, 21210 Switch 901 LDPC encoder 911, 1001, 1211, 2113 LDPC decoder 1002 Parity checker 1902, 21902 Likelihood converter 1904, 21904 Tap coefficient multiplier 1905, 21905 Adder 2101 LDPC Encoder 2116 Bit decision unit 2301 Linear filter 2305 and 21703 Diversity combiner 21702 Digital demodulator

Claims (16)

A first interference cancellation processing unit including: a first detector that detects a likelihood of received data from a received signal; and a first determiner that makes a hard decision on the likelihood to obtain a received bit value;
A second replica generator for generating and storing a replica signal of the received signal from the received bit value; and a second detector for detecting a likelihood of received data from the received signal obtained by subtracting the past replica signal; A likelihood correcting unit that corrects the current likelihood using the past likelihood and accumulates the corrected likelihood; and secondly obtains a received bit value by making a hard decision on the corrected likelihood. A second interference cancellation processing unit of G-1 (G is a natural number) stage including a determiner;
Have
The received bit value output from the second determiner of the second interference cancellation processing unit of the g (0 <g <G-2) stage is the value of the second interference cancellation processing unit of the (g + 1) stage. A receiving device that is input to the replica creator. A plurality of error correction decoders for performing error correction decoding of likelihood output from the first or second signal detector;
The receiving apparatus according to claim 1, wherein the likelihood correcting unit corrects the current likelihood obtained after error correction decoding with a past likelihood obtained after error correction decoding. A first error correction decoder for performing error correction decoding of likelihood output from the first signal detector;
At least one second error correction decoder for performing error correction decoding of the likelihood of correction output from the likelihood correction unit;
With
The receiving apparatus according to claim 1, wherein the likelihood correcting unit corrects the current likelihood before error correction decoding with a past likelihood obtained after error correction decoding. A first error correction decoder for performing error correction decoding of likelihood output from the first signal detector;
At least one second error correction decoder for performing error correction decoding of the likelihood of correction output from the likelihood correction unit;
With
The receiving apparatus according to claim 1, wherein the likelihood correcting unit corrects a current likelihood before error correction decoding with a past likelihood before error correction decoding. The receiving apparatus according to claim 1, wherein the likelihood correcting unit adds a past likelihood to a current likelihood. The receiving apparatus according to any one of claims 1 to 4, wherein the likelihood correcting means adds a weight to a past likelihood and a current likelihood. The receiving apparatus according to any one of claims 1 to 4, wherein the likelihood correcting unit performs addition only in a portion where the positive and negative signs of the past likelihood and the current likelihood are different. The receiving apparatus according to claim 1, wherein the likelihood correcting unit selects and outputs a larger one of an absolute value of a past likelihood and an absolute value of a current likelihood. 5. The receiving apparatus according to claim 1, wherein the likelihood correcting unit includes a low-pass filter that receives current and past likelihoods and outputs a peak value of an output sequence of the low-pass filter. . The received signal is a signal received by a plurality of antennas from a plurality of signals transmitted in the same frequency band from at least one transmission antenna;
The receiving apparatus according to claim 1, wherein the second signal detector includes a diversity combiner that performs diversity combining of reception signals received by different antennas. The diversity combiner has a maximum signal-to-interference noise power ratio (SINR) after diversity combining, and a signal-to-noise power ratio (SNR) after diversity combining. 11. The synthesis is performed such that (Ratio) is the maximum, the mean square error after diversity combining is the minimum, the input signal is equal gain, or the input signal having the highest power is selected. Receiver. The receiving apparatus according to claim 1, wherein the likelihood correcting unit corrects the current likelihood by adding all the likelihoods output from the first and second detectors. A plurality of error correction decoders that perform error correction decoding of likelihood output from the first or second detector, and an error detector that performs error detection;
The error detector performs error detection on the bit-determined signal sequence, and sends an error detection result to the first or second detector.
The receiving apparatus according to claim 1, wherein the first or second detector stops detecting the likelihood of the signal determined to have no error by the error detector. The receiving apparatus according to claim 13, wherein the error correction decoder performs error determination using a parity check that performs a parity check using a check matrix, and sends an error determination result to the second detector. It has a ranker that ranks the received data in order of interference cancellation processing,
The receiving apparatus according to claim 1, wherein the first and second interference cancellation processing units detect received data according to the ranking order. The rank according to claim 15, wherein the ranker ranks based on received power strength, SINR magnitude after signal detection, mean square error magnitude after signal detection, or the result of the error detector. Receiver.

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