JP2006190058A - Abnormality detection device and method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an abnormality detection device capable of flexibly responding to a change in a system by significantly reducing the labor hour for developing a new corresponding abnormality detecting algorithm even in a case that new electronic parts that are abnormality detection objects are increased, and reducing the man power for ensuring reliability by unified management of information. <P>SOLUTION: The abnormality detection device for executing arithmetic processing for inputting or outputting signals among a plurality of electronic parts and also executing abnormality detecting processing for determining abnormality for the electronic parts comprises an abnormality detection means dividing the electronic parts to a plurality of groups based on abnormality detection patterns, and executing a unique abnormality detection algorithm for every divided group to detect abnormality. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an abnormality detection apparatus and method for executing an arithmetic process for inputting or outputting a signal to / from a plurality of electronic components and executing an abnormality detection process for determining whether there is an abnormality in the electronic component.

  In general, the control system is provided with an arithmetic processing unit including a CPU or the like, and is configured to realize a predetermined function based on a control program that is repeatedly executed at a preset period. For example, when driving and controlling a plurality of actuators so as to realize a predetermined function based on signals input from various sensors for monitoring the state of the system and communication data from other related arithmetic processing devices. Is a process in which various processes such as an input process from a sensor, a communication process with another arithmetic processing unit, an arithmetic process, and an output process to an actuator are repeated at a predetermined cycle. Detects whether the operation state of various electronic components such as sensors, other arithmetic processing units, or actuators is normal or abnormal, and executes abnormality detection processing to prevent serious accidents in advance An abnormality detection device is provided.

Conventionally, this type of abnormality detection apparatus has been configured to execute an abnormality detection algorithm individually prepared for each electronic component connected to the arithmetic processing apparatus. Therefore, as the number of electronic components to be detected increases, it is necessary not only to develop additional individual programs for abnormality detection processing, but also because the processing increases and the load on the CPU increases, the original system control Therefore, it is possible to reduce the processing time for abnormality detection executed in one cycle and improve the reliability by dividing the abnormality detection processing of multiple electronic components at different calculation cycles. Techniques to make it have been proposed.
JP 2002-259158 A

  However, according to the above-described conventional abnormality detection process, as the number of electronic components to be detected for abnormality increases, more abnormality detection algorithms, that is, abnormality detection programs have to be constructed, which increases the program capacity and causes the ROM. In addition to the increase in parts costs, etc., because of the fact that such individual anomaly detection algorithms cannot centrally manage information, production costs such as program development man-hours and debugging man-hours to ensure reliability There was a serious problem of rising.

  In view of the above-described conventional drawbacks, the present invention greatly reduces the time and effort to develop a new corresponding abnormality detection algorithm even when the number of new electronic components to be detected for abnormality increases, and unifies information. An object of the present invention is to provide an abnormality detection apparatus and method that can reduce man-hours for ensuring reliability by management and can flexibly cope with changes in the system.

  In order to achieve the above-described object, the first characteristic configuration of the abnormality detection device according to the present invention performs an arithmetic process for inputting or outputting signals to / from a plurality of electronic components, and performs an abnormality on the electronic components. An abnormality detection apparatus for executing an abnormality detection process for determining the presence or absence of an electronic component, wherein the electronic component is divided into a plurality of groups based on an abnormality detection pattern, and a unique abnormality detection algorithm is executed for each of the divided groups. This is in that an abnormality detecting means for detecting an abnormality is provided.

  According to the above configuration, the abnormality detection algorithm unique to each group divided based on the abnormality detection pattern is executed. Therefore, the abnormality detection algorithm can be configured to the minimum and optimal, and the number of electronic components has been newly increased. Even if it is a case, the effort which develops a new abnormality detection algorithm can be reduced significantly by using the existing detection algorithm which can respond to it. In addition, it is possible to perform unified management of information in units of groups, and it is possible to flexibly cope with system changes.

  The second characteristic configuration includes an abnormality detection device that performs arithmetic processing for inputting or outputting signals to / from a plurality of electronic components, and performs abnormality detection processing that determines whether there is an abnormality in the electronic components And state data for determining presence / absence of abnormality of the electronic component, determination condition data for determining presence / absence of abnormality, a data table storing determination result data indicating a determination result, and the data table With reference to each electronic component, an abnormality detecting means for detecting an abnormality by executing the same abnormality detecting algorithm is provided.

  According to the above-described configuration, it becomes possible to detect an abnormality of each electronic component with the same abnormality detection algorithm while referring to the data table, and even when a new electronic component is added as an abnormality detection target, It can be handled simply by adding a data table for electronic components, and the effort to develop a new abnormality detection algorithm can be greatly reduced. By referring to such an information table, centralized management of each electronic component information is possible. Can be easily performed.

  The third feature configuration is an abnormality detection device that executes an arithmetic process for inputting or outputting a signal to / from a plurality of electronic components, and performs an abnormality detection process for determining whether there is an abnormality in the electronic component The electronic component is divided into a plurality of groups based on an abnormality detection pattern, and status data for determining the presence / absence of abnormality of the electronic component for each divided group and determination for determining presence / absence of abnormality A data table in which condition data, determination result data indicating a determination result are stored, and an abnormality detection means for detecting an abnormality by executing the same abnormality detection algorithm on each electronic component with reference to the data table It is in.

  According to the above-described configuration, since a specific abnormality detection algorithm is executed for each group divided based on the abnormality detection pattern, the abnormality detection algorithm can be constructed at the minimum and optimally, and each electronic component has the same configuration. Since it is executed with reference to the data table, centralized management of each piece of electronic component information can be easily performed. In addition, even when the number of electronic components to be abnormally detected is increased, a new data area corresponding to the electronic component is simply formed in the data table, and an existing detection algorithm corresponding to the data table is created. As a result, it is possible to detect anomalies, so that it is possible to greatly reduce the time and effort required to develop a new anomaly detection algorithm and to flexibly cope with system changes.

  In the fourth feature configuration, in addition to the second or third feature configuration described above, the data table is set with unique determination condition data for each electronic component to be detected for abnormality, and the determination condition data is at least the Including the address information of the electronic component, the abnormality detection algorithm is in the point of inputting the state data of the electronic component based on the address information.

  According to the above-described configuration, it is possible to make an abnormality determination using the same abnormality detection algorithm by referring to determination condition data for determining an abnormality for each electronic component set in the data table. In addition, based on the address information of each electronic component set in the data table, the status data of each electronic component can be input by the same status data input algorithm.

  In the fifth feature configuration, in addition to any of the second to fourth feature configurations described above, in the data table, unique determination condition data is set for each electronic component that is an abnormality detection target, and the determination condition The data includes at least determination timing data that defines the determination timing and determination threshold data that defines the determination reference value.

  According to the above-described configuration, the abnormality detection can be reliably performed based on the optimum determination timing and determination reference value corresponding to each electronic component.

  In the sixth feature configuration, in addition to the fifth feature configuration described above, the determination condition data further includes an abnormal count counter that counts the number of times of abnormality determination, and an abnormal count threshold counter that defines a threshold value of the abnormal count counter. It is in.

  According to the above-described configuration, it is possible to perform abnormality detection with higher reliability while avoiding accidental abnormality determination such as noise different from the original abnormality.

  In the seventh feature configuration, in addition to the first or third feature configuration described above, the group outputs an electronic component that outputs an analog signal to the arithmetic processing device, and a digital signal to the arithmetic processing device. The electronic component that outputs data, the electronic component that performs data communication with the arithmetic processing device, and the electronic component that outputs an abnormal state signal to the arithmetic processing device are included.

  By adopting the above-described configuration, it is possible to configure an abnormality detection algorithm having high efficiency and effect with the minimum unit abnormality detection algorithm.

  The first characteristic configuration of the abnormality detection method according to the present invention is an abnormality detection process for executing an arithmetic process for inputting or outputting a signal to / from a plurality of electronic components and determining whether or not there is an abnormality in the electronic component. The electronic component is divided into a plurality of groups based on an abnormality detection pattern, and an abnormality detection algorithm specific to each divided group is executed to detect an abnormality.

  The second feature configuration is an abnormality detection method for performing an arithmetic process for inputting or outputting a signal to / from a plurality of electronic components and executing an abnormality detection process for determining whether there is an abnormality in the electronic component And generating a data table storing status data for determining the presence / absence of abnormality of the electronic component, determination condition data for determining the presence / absence of abnormality, and determination result data indicating a determination result, Referring to the table, the same abnormality detection algorithm is executed for each electronic component to detect the abnormality.

  The third feature configuration is an abnormality detection method for performing an arithmetic process for inputting or outputting a signal to / from a plurality of electronic components, and performing an abnormality detection process for determining whether there is an abnormality in the electronic component The electronic component is divided into a plurality of groups based on an abnormality detection pattern, and status data for determining the presence / absence of abnormality of the electronic component for each divided group and determination for determining presence / absence of abnormality A data table storing condition data and determination result data indicating the determination result is generated, and an abnormality detection is performed by executing the same abnormality detection algorithm for each electronic component with reference to the data table.

As described above, according to the present invention, even when new electronic components to be detected for an abnormality increase, the effort for developing a corresponding new abnormality detection algorithm can be greatly reduced, and information can be unified. It is possible to provide an anomaly detection apparatus and method that can reduce man-hours for ensuring reliability by management and can flexibly cope with changes in the system.

  The case where the abnormality detection apparatus according to the present invention is applied to a vehicle travel control system will be described below. As shown in FIG. 1, the vehicle travel control system is configured by connecting a plurality of ECUs (electronic control units) via a CAN (controller area network) bus 10. Each ECU includes, for example, an engine control ECU-A, an automatic transmission (AT) control ECU-B, an ABS control ECU-C, a TRC (traction control) control ECU-D, and the like.

  Each of the plurality of ECUs is provided with an arithmetic processing unit having a CPU or the like, and is configured to realize a predetermined function based on a control program that is repeatedly executed at a preset cycle. For example, in the case of an engine control ECU, a predetermined value is determined based on input signals from sensors such as an intake pressure sensor and an A / F sensor and communication data from other related ECUs (for example, an ECU for automatic transmission control). An actuator such as a fuel injection valve is driven and controlled so as to realize the engine function.

The CAN bus 10 is defined by SAE J1939, and communication data is transmitted and received by a communication frame (data frame) as shown in FIG. 2, and the data frame includes an arbitration field, a control field, a data field, and the like. The details will be described below.

1. Description of each component of data frame: (1) SOF (Start Of Frame) is an identifier indicating the start of a frame, and is always “0”. (2) The identifier is an ID in a standard format, and details will be described in the section “2.1. Arbitration field” described later. (3) SRR (Substitute Remote Request) is a bit for selecting either the standard frame format or the extended frame format in combination with the IDE of (4) described later. (4) IDE (Identifier Extension bit) is a bit indicating that the extended frame format is used. When the SRR bit is “1” and the IDE bit is “1”, the extended frame format is not present and the SRR bit is not present. When the IDE bit is “0”, it indicates that the standard frame format is selected. (5) identifier ext. Is an ID indicating that the standard frame format is extended. Details will be described later in “2.1. Arbitration field”. (6) RTR (Remote Transmission Request) is a bit indicating a request for remote transmission. In addition,
Remote transmission refers to requesting data transmission to a certain system. When this RTR bit is “0”, normal transmission (data frame transmission), and when “1”, remote transmission (remote frame transmission). Indicates that (7) R1 and R0 are bits (reserved bits) reserved for future data length expansion, and are currently all “0”. The data length is scheduled to be extended in combination with (8) DLC bits described later. (8) DLC (Data Length Code) is data field data and is a bit for setting the byte length. (9) Data Field is a data field for storing transmission data. SAE J1939 recommends 8-byte data. (10) CRC (Cyclic Redundancy Check) is a field for storing a check code for transmission data errors. (11) CRC delimiter is a CRC delimiter and is always “1”. (12) ACK (Acknowledgement) is a field for confirming normal reception, and the transmission side stores “11”. The receiving side stores “01” if the data check result in the CRC field is normal, and “11” if there is an abnormality. (13) EOF (End Of Frame) is a field (7 bits) indicating the end of transmission, and is always “1111111”.

2. 2. Description of PDU (Protocol Data Unit): Next, the PDU in FIG. 2 will be described. The PDU is the main information in the data frame, and (2) identifier, (5 ) identifier ext. And (9) Da
It is comprised by ta Field. From this data, PGN (Parameter Group
Number) is determined. Here, PGN is a number for identifying data, and R (spare), DP (data page), PF (PDU format), etc. in the arbitration field (for details, see 2.1. Explanation of arbitration field below) (Data length 3 bytes).

2.1. Arbitration field The arbitration field includes a 29-bit ID and a 3-bit control bit. FIG. 3 shows an outline of the arbitration field. Hereinafter, each part of the arbitration field will be described. (1) The priority is used to determine the priority of the message. “000” has the highest priority and “111” has the lowest priority. (2) Reserved are bits reserved by SAE for future function expansion. Since it is not currently used, it is set to “0”. (3) The data page is used as a selector for two PDU pages. Used from page 0. (4) The PDU format (PF) is a parameter that determines the content of the PDU Specific [see (7)], and is one field constituting the PGN. (5) For SRR, see item (3) in “1. Explanation of each component of data frame”. (6) For IDE, see item (4) in “1. Description of each component of data frame”. (7) PDU Specific (
PS) is either the transmission destination address (DA) or the group expansion (GE) depending on the value of PF. (8) The source address of the message is described in the source address. The address of each system is defined by SAEJ1939.

  2.2. Control field: As shown in FIG. 4, the control field includes a reserved bit (2 bits) and a DLC (4 bits).

2.3. Data field: A field for storing transmission data, SAE
J1939 recommends a fixed data length of 8 bytes.

  FIG. 5 shows a block configuration of an abnormality detection device in a vehicle travel control system including a plurality of ECUs connected by the above-described CAN bus. The abnormality detection device performs an AD value (voltage value) acquisition process via an AD converter 15 on an analog input from each sensor connected to the plurality of ECUs. The sensor input abnormality detection unit 20 that commonly detects the input abnormality from the ECU, the output value to each actuator connected to the plurality of ECUs, and the monitor value (digital input / output) are obtained and processed, and the voltage value The actuator output abnormality detection unit 30 that performs common detection of output abnormality to the actuators, the communication abnormality detection unit 40 that performs common communication state detection between ECUs, and other ECUs (or systems). An ECU abnormality detection unit 50 that performs abnormality detection in common based on the abnormality detection result, and an information table that includes judgment values and counter values required for abnormality detection. Constructed and a table memory 60 for storing the table 01.

As shown in FIG. 6, the sensor input abnormality detection unit 20 acquires an AD value from each sensor as state data, and stores the AD value acquisition processing unit 21 in the table memory 60, and the table memory 60. The AD value stored in each sensor is compared with the abnormality determination threshold value (upper / lower limit) stored in advance in the table memory 60 to determine whether each AD value exceeds the threshold value. When the determination is made, the threshold detection processing unit 22 counts up an abnormality detection counter corresponding to each sensor partitioned in the table memory 60 and measures the abnormality detection time, and the abnormality detection counter corresponding to each sensor. When the count value exceeds an abnormality detection count threshold that is an abnormality detection time threshold stored in advance in the table memory 60, it is determined that there is an abnormality. Abnormality determination processing section 23 and the abnormality determination processing section 23 by the abnormality determined as a case of the determination result abnormality confirmation outputs an abnormality flag as the data processing section 2
4.

  The sensor input abnormality detection unit 20 stores an abnormality determination threshold value (upper and lower limits) corresponding to each sensor stored in the table memory 60 in advance, and an abnormality detection count threshold value, which are stored in the table memory 60 each time. The judgment condition data consisting of the AD values corresponding to various sensors and the abnormality detection counter are gathered together in one information table 01, so that unified management of information, a plurality of abnormality judgment conditions, etc. are sequentially performed in the table. The processing can be performed after being taken out from the memory 60.

  Similarly, as shown in FIG. 7, the actuator output abnormality detection unit 30 is connected to the actuator side as status data with respect to the digital output values (command values) output from the digital output processing unit 31 to the actuators. A digital output value (command value) / input value (monitor value) processing unit 32 that performs input processing of the monitor value fed back from the table and stores it in the table memory 60, and each actuator stored in the table memory 60. When it is confirmed that the command value and the monitor value are different by comparing the command value with the monitor value and comparing the abnormality determination threshold value corresponding to each actuator stored in the table memory 60 in advance. A counter (abnormality detection counter) corresponding to each actuator formed in the table memory 60 is counted. When the command value / monitor value confirmation unit 32 to be updated and the values of the abnormality detection count corresponding to the various actuators exceed the abnormality detection count threshold value stored in advance in the table memory 60, it is determined that there is an abnormality. An abnormality determination processing unit 33 and an abnormality confirmation processing unit 34 that outputs an abnormality flag as determination result data when the abnormality determination processing unit 33 determines that an abnormality has occurred.

  The actuator output abnormality detection unit 30 corresponds to the abnormality determination threshold value corresponding to each actuator stored in the table memory 60 in advance, the abnormality detection count threshold value, and each actuator stored in the table memory 60 each time. The determination condition data including the command value and the monitor value to be performed and the abnormality detection counter are collected in one information table 01, so that unified management of information, a plurality of abnormality determination conditions, and the like can be performed from the table memory 60. It is possible to take out and process sequentially.

  As shown in FIG. 8, the communication abnormality detection unit 40 receives a sum error, an ORFE error (overrun error / framing error), and no reception with respect to a communication state between the ECUs executed in a communication interrupt process described later. A communication error detection unit 44 that determines errors, identifier errors, etc., and sequentially counts up the count value corresponding to each error partitioned in the table memory 60, and the count value is stored in the table memory 60 in advance. The counter check unit 41 sequentially updates a counter (abnormality detection counter) corresponding to the communication state between the ECUs partitioned in the table memory 60 when it is determined as a true error exceeding the communication error count threshold. And the value of the abnormality detection counter corresponding to the communication data of the various ECUs is the table memory. An abnormality determination processing unit 42 that determines that an abnormality is detected when an abnormality detection count threshold value stored in advance in the memory 60 is exceeded, and an abnormality confirmation that outputs an abnormality flag when the determination processing unit 42 determines that an abnormality has occurred. And a processing unit 43.

  The communication abnormality detection unit 40 has the same communication error count threshold for the sum error, the ORFE error, the no reception error, and the identifier error corresponding to the communication state between the ECUs stored in the table memory 60 in advance. The abnormality detection count threshold value and the communication error counter for the sum error, the ORFE error, the no-reception error, the identifier error corresponding to the communication state between the ECUs stored in the table memory 60 each time, and the abnormality detection counter Are integrated into the information table 01 as the determination condition data, so that unified management of information and a plurality of abnormality determination conditions can be sequentially extracted from the table memory 60 and processed. ing.

  As shown in FIG. 9, the ECU abnormality detection unit 50 includes abnormality information input via the CAN bus and detected by another ECU, and abnormality detected by the internal slave CPU input via the local communication unit. When there is information, an abnormality information capturing unit 51 that stores the abnormality information in the table memory 60, and a counter (abnormality) corresponding to each ECU partitioned in the table memory 60 when the abnormality information exists. Detection counter), and an abnormality reference unit 52 that determines an abnormality when the abnormality detection count threshold value stored in advance in the table memory 60 is exceeded, and the abnormality reference unit 52 determines an abnormality. And an abnormality confirmation processing unit 53 that outputs an abnormality flag as determination result data.

  The ECU abnormality detection unit 50 includes abnormality detection count thresholds corresponding to the ECUs stored in the table memory 60 in advance, and abnormality information corresponding to the ECUs stored in the table memory 60 each time. By integrating the abnormality detection counters into one information table 01, it is possible to perform centralized management of information, a plurality of abnormality determination conditions, and the like sequentially from the table memory 60 for processing. .

  In the sensor input abnormality detection unit 20, the actuator output abnormality detection unit 30, the communication abnormality detection unit 40, and the ECU abnormality detection unit 50, when any abnormality flag is output, the abnormality information is displayed on a predetermined display unit. A warning display based on this is displayed.

  When a new electronic component is connected to the control system configured with the above-described abnormality detection device, or when a new abnormality needs to be detected with respect to the roughly connected electronic part, the electronic component is, for example, a sensor. If so, in the information table 01 corresponding to the sensor input abnormality detection unit 20, various information related to the sensor, that is, status data for determining the presence or absence of abnormality in the electronic part, and the presence or absence of abnormality. It is possible to construct a new abnormality detection system only by additionally setting an area for storing determination condition data to be determined and determination result data indicating the determination result. In the case of an actuator, a new system can be constructed simply by configuring an area for storing various information related to the actuator in the information table 01 corresponding to the actuator output abnormality detection unit 30. ing.

  For example, as shown in the flowchart of FIG. 15, the main routine of each ECU includes a signal input process for each of the sensors and the like (SA1) after the initialization process (not shown) after the power is turned on, and the input signal. Calculation processing for controlling the target electronic component based on (SA2), predetermined control signal processing to the actuator or the like based on the calculation result (SA3), and then detection processing for the presence or absence of abnormality for each electronic component (SA4) ) Is repeated every time a predetermined internal timer interrupt occurs, and communication processing from other ECUs is executed in the communication interrupt processing.

  Hereinafter, the abnormality detection process (SA4) of the control system including the plurality of ECUs will be described in detail based on the flowcharts shown in FIGS.

The abnormality detection algorithm in step SA4 is configured such that the same abnormality detection algorithm is repeatedly executed for each of a plurality of groups divided based on the abnormality detection pattern, and each abnormality detection algorithm refers to the table memory 60 described above. The process is advanced. First, although not mentioned in the description of the table memory 60 described above, it is an abnormality detection processing timing based on the abnormality detection timing data set for each electronic component that is set as an abnormality detection target in the data table 60. When the determination is made (S1), the AD value acquisition processing unit 21 detects the AD value of each sensor, and the AD value is stored in the table memory 60 (S2).

  The stored AD value is compared with the upper limit value and the lower limit value, which are abnormality determination threshold values stored in advance in the table memory 60, by the threshold determination processing unit 22 (S3, S4), and the upper limit value or the lower limit value. Is exceeded, the abnormality detection counter (abnormality detection time) of the table memory is counted up (S5). If it is within the range between the upper limit value and the lower limit value, the abnormality detection counter is cleared (S6).

  The value of the abnormality detection counter is compared with an abnormality detection count threshold (determination time) stored in advance in the table memory 60 by the abnormality determination processing unit 23 (S7), and when the abnormality detection count threshold is exceeded. An abnormality is determined, and an abnormality flag is output by the abnormality confirmation processing unit 24 (S8). If there is another sensor input, the process returns to step S2 (S9).

  In addition, about step S2-S8, it is good also as a structure which performs step S2-S8 for every sensor, or it is good also as a structure which performs each step sequentially about each sensor.

  When the preset abnormality detection processing timing is the abnormality detection processing timing for the output signal to each actuator (S1), the digital output value (command value) / input value (monitor value) processing unit 32 The digital output value (command value) of each sensor and its monitor value are detected, and the command value and the monitor value are stored in the table memory 60 (S10).

  The stored command value and monitor value are compared with an abnormality determination threshold value stored in advance in the table memory 60 by the command value / monitor value confirmation unit 33, so that the command value and the monitor value are equal. (S11), and if it is confirmed that they are different, the abnormality detection counter (abnormality detection time) of the table memory is counted up (S12). If it is confirmed that they are equal, the abnormality detection counter is cleared (S13).

  The abnormality detection counter is compared with an abnormality detection count threshold (determination time) stored in advance in the table memory 60 by the abnormality determination processing unit 34 (S14), and an abnormality is determined when the abnormality detection count threshold is exceeded. Then, the abnormality confirmation processing unit 35 outputs an abnormality flag (S15). If there is an output to another actuator, the process returns to step S10 (S16).

  In addition, about step S10-S15, it is good also as a structure which performs step S10-S15 for every actuator, or it is good also as a structure which performs each step sequentially about each actuator.

  When the preset abnormality detection processing timing is the abnormality detection processing timing for the communication state between the ECUs (S1), the communication error detection unit 44 performs a sum error, ORFE error (overrun error / Framing errors), no reception errors, identifier errors, etc. are determined, and communication errors corresponding to the communication error counters sequentially counted up corresponding to the various errors formed in the table memory 60 are provided. Comparison with the count threshold is performed (S17, S18, S19, S20). If any error exceeds the communication error count threshold, the abnormality detection counter (abnormality detection time) of the table memory 60 is counted up (S21). If any communication error counter value is within the communication error count threshold, the abnormality detection counter is cleared (S22).

The abnormality detection count value is compared with an abnormality detection count threshold value (determination time) stored in advance in the table memory 60 by the abnormality determination processing unit 42 (S23), and an abnormality occurs when the abnormality detection count threshold value is exceeded. The abnormality flag is output by the abnormality confirmation processing unit 43 (S24). If there is communication data from another ECU, the process returns to step S17 (S25).

  In addition, about step S17-S24, it is good also as a structure which performs step S17-S24 for every communication state between ECUs, or it is good also as a structure which performs each step sequentially about each communication state between ECUs.

  When the preset abnormality detection processing timing is the abnormality detection processing timing for the abnormality information of each ECU (S1), the abnormality reference unit 52 uses the abnormality information capturing unit 51 to detect abnormality information from other ECUs. Is detected from the table memory 60 in which is stored (S26), and if there is abnormality information, the abnormality detection count value (abnormality detection time) of the table memory 60 is counted up (S27). If there is no abnormality information, the abnormality detection count value is cleared (S28).

  In addition, the abnormality reference unit 52 compares the abnormality detection count value with the abnormality detection count threshold value (determination time) stored in advance in the table memory 60 (S29), and exceeds the abnormality detection count threshold value. An abnormality flag is output by the abnormality confirmation processing unit 53 (S30). If there is abnormality information of another ECU, the process returns to step S26 (S31).

  In addition, about step S26-S30, it is good also as a structure which performs step S17-S24 for every abnormality information of ECU, or it is good also as a structure which performs each step sequentially about abnormality information of each ECU.

  As described above, the electronic part is divided into a plurality of groups based on the abnormality detection pattern, and state data for determining the presence / absence of abnormality of the electronic component for each divided group and determination condition data for determining the presence / absence of the abnormality And generating a data table in which determination result data indicating the determination result is stored, and executing the same abnormality detection algorithm on each electronic part with reference to the data table to detect a new abnormality detection target Even when there is an increase in development, the development load for newly generating a program for detecting an abnormality is reduced.

  Hereinafter, another embodiment will be described. In the above-described embodiment, the algorithm for detecting an abnormality is grouped into a sensor system electronic component that outputs an analog signal, an actuator system electronic component that detects a monitor signal for the actuator, a communication system electronic component that detects a communication abnormality for the ECU, and the like. However, the division criterion is not limited to this, and may be divided into other groups as long as division is performed based on the abnormality detection pattern.

  In the above-described embodiment, the description has been given of the case where the signals from the respective electronic components are input in the abnormality detection process for each group except for the communication abnormality data, but the values are obtained by inputting the signals in the process of step SA1 in FIG. May be configured to be stored in the data table. In addition, a description has been given of performing various abnormality detection counter count-up processing in each routine. However, the count-up processing is performed by timer interruption processing for a predetermined time, and the main routine compares the value of the abnormality counter with the abnormality count threshold value. Only the determination of setting the abnormality flag may be performed.

In addition, address information such as an input port address assigned by the hardware configuration for each electronic component can be set for each electronic component of the data table, and when a new abnormality detection target increases, If the address information is added, the input process routine (step SA1) can be shared with the signal input process routine by performing the input process while referring to the address information stored in the data table. There is no need to develop algorithms.

  The above-mentioned data table can be constructed on a nonvolatile RAM. However, if an initialization program that defines a data table partitioned on the RAM is generated, even an ordinary volatile RAM can be used. Is possible.

  In the above-described embodiment, the electronic component is divided into a plurality of groups based on the abnormality detection pattern, and status data for determining the presence / absence of abnormality of the electronic component and the presence / absence of abnormality are determined for each divided group. A description will be given of an abnormality detection method for detecting an abnormality by generating a data table storing determination condition data and determination result data indicating a determination result, and executing the same abnormality detection algorithm for each electronic component with reference to the data table. However, it does not have to be divided into a plurality of groups. In addition, if the electronic component is divided into a plurality of groups based on the abnormality detection pattern and abnormality is detected by executing a unique abnormality detection algorithm for each of the divided groups, the above data table may be constructed. In the point that the same program can be used for each group, there is a certain effect that the development load for newly constructing the abnormality detection algorithm can be reduced.

Explanatory diagram of network configuration of vehicle travel control system Illustration of network configuration data format Illustration of network configuration data format Illustration of network configuration data format Block diagram of anomaly detection device Block diagram of sensor abnormality detection unit Block diagram of actuator abnormality detection unit Block diagram of communication error detector Block diagram of ECU abnormality detection unit Flow chart for control system abnormality detection Flowchart in sensor abnormality detection Flow chart for detecting actuator abnormality Flowchart in communication error detection Flowchart in ECU abnormality detection Flowchart in the control system constituting the abnormality detection device

Explanation of symbols

01: Information table 15: AD converter 20: Sensor abnormality detection unit 30: Actuator abnormality detection unit 40: Communication abnormality detection unit 50: ECU abnormality detection unit 60: Table memory

Claims (10)

An abnormality detection device that performs arithmetic processing for inputting or outputting signals to and from a plurality of electronic components, and performs abnormality detection processing for determining whether there is an abnormality with respect to the electronic components,
An abnormality detection apparatus comprising an abnormality detection unit that divides the electronic component into a plurality of groups based on an abnormality detection pattern, and detects an abnormality by executing a unique abnormality detection algorithm for each of the divided groups. An abnormality detection device that performs arithmetic processing for inputting or outputting signals to and from a plurality of electronic components, and performs abnormality detection processing for determining whether there is an abnormality with respect to the electronic components,
Status data for determining presence / absence of abnormality of the electronic component, determination condition data for determining presence / absence of abnormality, a data table storing determination result data indicating a determination result, and each of the data tables with reference to the data table An abnormality detection apparatus comprising abnormality detection means for detecting an abnormality by executing the same abnormality detection algorithm on an electronic component. An abnormality detection device that performs arithmetic processing for inputting or outputting signals to and from a plurality of electronic components, and performs abnormality detection processing for determining whether there is an abnormality with respect to the electronic components,
The electronic component is divided into a plurality of groups based on an abnormality detection pattern, status data for determining presence / absence of abnormality of the electronic component for each divided group, determination condition data for determining presence / absence of abnormality, An abnormality detection apparatus comprising: a data table storing determination result data indicating a determination result; and an abnormality detection unit that detects an abnormality by executing the same abnormality detection algorithm on each electronic component with reference to the data table.   In the data table, unique determination condition data is set for each electronic component to be detected for abnormality, the determination condition data includes at least address information of the electronic component, and the abnormality detection algorithm uses the electronic information based on the address information. The abnormality detection device according to claim 2 or 3, wherein state data of parts is input.   In the data table, unique determination condition data is set for each electronic component to be detected as an abnormality, and the determination condition data includes at least determination timing data that defines a determination timing and determination threshold data that defines a determination reference value. The abnormality detection device according to any one of 2 to 4.   The abnormality detection device according to claim 5, wherein the determination condition data further includes an abnormality count counter that counts the number of abnormality determinations and an abnormality count threshold counter that defines a threshold value of the abnormality count counter.   The group is an electronic component that outputs an analog signal to the arithmetic processing device, an electronic component that outputs a digital signal to the arithmetic processing device, an electronic component that performs data communication with the arithmetic processing device, The abnormality detection device according to claim 1, comprising any group of electronic components that output an abnormal state signal to the arithmetic processing device. An abnormality detection method for performing an arithmetic process for inputting or outputting a signal between a plurality of electronic components and executing an abnormality detection process for determining the presence or absence of an abnormality with respect to the electronic component,
An abnormality detection method for detecting an abnormality by dividing the electronic component into a plurality of groups based on an abnormality detection pattern and executing a unique abnormality detection algorithm for each of the divided groups. An abnormality detection method for performing an arithmetic process for inputting or outputting a signal between a plurality of electronic components and executing an abnormality detection process for determining the presence or absence of an abnormality with respect to the electronic component,
Generate a data table storing status data for determining the presence / absence of abnormality of the electronic component, determination condition data for determining presence / absence of abnormality, and determination result data indicating a determination result, and refer to the data table An abnormality detection method for detecting an abnormality by executing the same abnormality detection algorithm for each electronic component. An abnormality detection method for performing an arithmetic process for inputting or outputting a signal between a plurality of electronic components and executing an abnormality detection process for determining the presence or absence of an abnormality with respect to the electronic component,
The electronic component is divided into a plurality of groups based on an abnormality detection pattern, status data for determining presence / absence of abnormality of the electronic component for each divided group, determination condition data for determining presence / absence of abnormality, An anomaly detection method for detecting an anomaly by generating a data table storing determination result data indicating a determination result and executing the same anomaly detection algorithm for each electronic component with reference to the data table.

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