JP2006180165A - Pll synthesizer and multiband wireless equipment using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the number of oscillators for sharing a modulating/demodulating circuit on a subsequent stage by switching oscillators according to a frequency band that is used as well as the modulating/demodulating circuits on the subsequent stage according to a communication system used. <P>SOLUTION: A first switch circuit 102 is provided to the outputs of a first oscillator 100 and a second oscillator 101 used in a plurality of frequency bands and communication system modes, to select division signals of first, second, and third frequency dividers 103, 104, and 105. Second and third switch circuits 122 and 123 are provided to a previous stage of the first and second amplifiers 107 and 108, to select a signal according to the mode of a communication system which is inputted in the first and second amplifiers 107 and 108 for amplification. The output is synthesized with the base band signal of the communication system using first and second mixers 109 and 111. The synthesized signal is amplified by third and fourth amplifiers 110 and 112 for outputting. A circuit corresponding to a frequency band of specified mode and communication system is selected by the switch, for sharing. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a communication system using a plurality of communication systems and a mobile radio apparatus operating in a plurality of frequency bands in a portable wireless communication device, and in particular, a PLL that reduces the number of parts by using different parts that can be shared. The present invention relates to a synthesizer and a multiband radio using the same.

  In recent years, various systems have been combined in mobile communication devices, and multiband systems having a plurality of frequency bands are increasing. Conventionally, a radio device compatible with such a plurality of communication systems has a very complicated configuration, increases the number of oscillators, and increases the circuit scale.

Further, in Patent Document 1, in a dual-mode mobile phone terminal, there are few shared parts of the radio part, and the transmission system has two complete systems, and it is extremely difficult to reduce the size, weight, and power consumption. To provide a mode switch at the input of the quadrature modulator in the transmission system of the dual-mode mobile phone terminal, share the quadrature modulator and the control amplifier, provide a mode switch at the output of the control amplifier, In addition, a ½ divider circuit is provided between the second local oscillator output and the quadrature modulator input, and the operation state of the ½ divider circuit is controlled by mode switching. A multimode wireless device is described in which the frequency control range of the voltage controlled oscillator of the second local oscillator is narrowed, and the voltage controlled oscillator switching of the second local oscillator is not required.
JP 2000-13274 A

  However, in the conventional configuration, it is necessary to have an oscillator and a modulation / demodulation circuit for each frequency band for transmitting and receiving each frequency band and mode of the communication system, which is disadvantageous in terms of cost and circuit scale, In addition, the number of oscillators is increased, and as a result, there is a problem that spurious factors have a great influence.

  The present invention is directed to solving the above-mentioned problems of the prior art, and the number of oscillators is reduced by switching the oscillator according to the frequency band to be used and switching the modulation / demodulation circuit at the subsequent stage according to the communication system to be used. Another object of the present invention is to provide a PLL synthesizer that can commonly use a downstream modulation / demodulation circuit and a multiband radio using the PLL synthesizer.

  In order to achieve the above object, a PLL synthesizer according to claim 1 of the present invention includes a first oscillator that outputs a first predetermined frequency, and a second predetermined different from the first oscillator. A second oscillator that outputs a frequency; a first switch that selects a signal generated by the first oscillator and the second oscillator; and a signal output from the first switch is divided into a half frequency. A first frequency divider that circulates, a first amplifier that amplifies the signal output from the first frequency divider, and a signal output from the second oscillator are divided by a half frequency. A second frequency divider, a third frequency divider that divides the signal output from the second frequency divider into a half frequency, and a signal output from the third frequency divider. A second amplifier that amplifies, a fourth frequency divider that divides the signal output from the first frequency divider by half, a third frequency divider, A first switching amplifier having input terminals for a signal output from the frequency divider, a signal output from the fourth frequency divider, and a control signal, and selects, amplifies and outputs one signal by the control signal; A frequency synthesizer that divides the signal output from the first switching amplifier into a frequency that can be compared with a reference frequency applied from the outside, and outputs a signal corresponding to a phase shift compared to the reference frequency, and an output of the frequency synthesizer A loop filter for outputting a signal to the first oscillator and the second oscillator is provided, and the frequency output from the first oscillator and the second oscillator is controlled.

  According to a second aspect of the present invention, a PLL synthesizer includes a first oscillator that outputs a first predetermined frequency, a second oscillator that outputs a second predetermined frequency different from the first oscillator, A first switch that selects a signal generated by the first oscillator and the second oscillator, a first frequency divider that divides the signal output from the first switch to a half frequency, A second frequency divider that divides the signal output from the second oscillator to a half frequency, and a second frequency divider that divides the signal output from the second frequency divider to a half frequency. 3 frequency dividers, second and third switches for selecting signals output from the first frequency divider and the third frequency divider, and a first for amplifying the signal selected by the second switch. Amplifier, a second amplifier that amplifies the signal selected by the third switch, and a signal output from the first frequency divider. A fourth frequency divider, and a signal output from the third frequency divider, a signal output from the fourth frequency divider, and a control signal input terminal. A first switching amplifier that selects and amplifies and outputs one signal by a control signal, and divides the signal output from the first switching amplifier into a frequency that can be compared with a reference frequency applied from the outside; A frequency synthesizer that outputs a signal corresponding to a phase shift compared to the first and second loop oscillators that output an output signal of the frequency synthesizer to a first oscillator and a second oscillator, the first oscillator and the second oscillator It controls the frequency which outputs.

  According to a third aspect of the present invention, there is provided a multiband radio including first combining means for combining a signal amplified by a first amplifier of a PLL synthesizer and a baseband signal using the PLL synthesizer according to the first aspect. A third amplifier for amplifying the signal synthesized by the first synthesis means, a second synthesis means for synthesizing the signal amplified by the second amplifier of the PLL synthesizer and the baseband signal, and a second synthesis means. And a fourth amplifier for amplifying the synthesized signal, wherein the first oscillator and the second oscillator that output a predetermined frequency are selected by the first switch and switched according to a predetermined frequency band mode. And

  According to a fourth aspect of the present invention, there is provided a multiband radio that uses the PLL synthesizer according to the second aspect and a signal amplified by a first amplifier of the PLL synthesizer and a baseband signal generated by the first modulation method. , A third amplifier for amplifying the signal synthesized by the first synthesis means, a signal amplified by the second amplifier of the PLL synthesizer, and a base generated by the second modulation method A second synthesizer for synthesizing the band signal; and a fourth amplifier for amplifying the signal synthesized by the second synthesizer; a first oscillator for outputting a predetermined frequency; a second oscillator; The circuit configurations of the modulation method and the second modulation method are selected by the first switch, the second switch, and the third switch, and are switched according to a predetermined modulation method and frequency band mode.

  According to a fifth aspect of the present invention, in the multiband radio of the third and fourth aspects, a received signal is used instead of the baseband signal input to the first synthesizing unit and the second synthesizing unit. Is input.

  According to the above configuration, the oscillator is switched according to the frequency band to be used, and the modulation / demodulation circuit at the subsequent stage is switched according to the communication system to be used. A PLL synthesizer and a multiband radio using the PLL synthesizer can be configured without increasing the modulation / demodulation circuit.

  According to the present invention, the PLL synthesizer and the number of oscillators and the subsequent modulation / demodulation circuit are not increased by switching the oscillator according to the frequency band to be used and switching the subsequent modulation / demodulation circuit according to the communication system to be used. It is possible to configure a multiband radio using this, and there is an effect that the apparatus can be reduced in size and spurious factors can be reduced.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram showing a schematic configuration of a multiband radio using the PLL synthesizer according to the first embodiment of the present invention. First, in the block diagram shown in FIG. 1, when the first frequency band is set to the 2 GHz mode, a signal of 4 GHz is generated from the first oscillator 100 and output to the first frequency divider 103. The first frequency divider 103 divides the frequency to 2 GHz and outputs it. After the output signal is amplified by the first amplifier 107, the output signal and a baseband signal from a baseband signal processing unit (not shown) are input to a first mixer 109 to obtain an orthogonal modulation signal. . Thereafter, the signal is amplified by the third amplifier 110 and output.

  Further, the signal frequency-divided to 1 GHz by the fourth frequency divider 106 is amplified by the first switching amplifier 113, and then frequency-divided by the frequency synthesizer (variable frequency divider) 114 to be applied from the outside. By comparing with the reference frequency, a signal corresponding to the phase shift is output. The output of the frequency synthesizer 114 is applied to the first oscillator 100 via the loop filter 115. This loop stabilizes the frequency of the carrier wave output from the first oscillator 100.

  Next, when the second frequency band is set to the 800 MHz mode, a 3.2 GHz signal is generated from the second oscillator 101 and output to the second and third frequency dividers 104 and 105. The second and third frequency dividers 104 and 105 divide to 800 MHz and output. After the output signal is amplified by the second amplifier 108, the output signal and a baseband signal from a baseband signal processing unit (not shown) are input to a second mixer 111, which obtains an orthogonal modulation signal. . Thereafter, the signal is amplified by the fourth amplifier 112 and output.

  Further, the signal frequency-divided to 800 MHz by the third frequency divider 105 is amplified by the first switching amplifier 113 and then divided into a comparison frequency by a frequency synthesizer (variable frequency divider) 114 and applied from the outside. By comparing with the reference frequency, a signal corresponding to the phase shift is output. The output of the frequency synthesizer 114 is applied to the second oscillator 101 via the loop filter 115. By this loop, the frequency of the carrier wave output from the second oscillator 101 is stabilized.

  Next, when the third frequency band is set to the 1.9 GHz mode, a signal of 3.8 GHz is generated from the first oscillator 100 and output to the first frequency divider 103. The first frequency divider 103 divides the frequency into 1.9 GHz and outputs it. After the output signal is amplified by the first amplifier 107, the output signal and a baseband signal from a baseband signal processing unit (not shown) are input to the first mixer 109 to obtain a quadrature modulation signal. Thereafter, the signal is amplified by the third amplifier 110 and output.

  Further, the signal frequency-divided to 950 MHz by the fourth frequency divider 106 is amplified by the first switching amplifier 113, and then frequency-divided by the frequency synthesizer (variable frequency divider) 114 to be applied from the outside. The signal is output as a signal corresponding to the phase shift. The output of the frequency synthesizer 114 is applied to the first oscillator 100 via the loop filter 115. This loop stabilizes the frequency of the carrier wave output from the first oscillator 100.

  Next, when the fourth frequency band is set to the 1.7 GHz mode, a 3.4 GHz signal is generated and output from the second oscillator 101. This output is output from the first switch circuit 102 to the first frequency divider 103, and the first frequency divider 103 divides the frequency to 1.7 GHz and outputs the result. After the output signal is amplified by the first amplifier 107, the output signal and a baseband signal from a baseband signal processing unit (not shown) are input to the first mixer 109 to obtain a quadrature modulation signal. Thereafter, the signal is amplified by the third amplifier 110 and output.

  Further, the signal frequency-divided to 850 MHz by the fourth frequency divider 106 is amplified by the first switching amplifier 113, and then divided into a comparison frequency by the frequency synthesizer (variable frequency divider) 114 and applied from the outside. The signal is output as a signal corresponding to the phase shift. The output of the frequency synthesizer 114 is applied to the second oscillator 101 via the loop filter 115. By this loop, the frequency of the carrier wave output from the second oscillator 101 is stabilized.

  FIG. 2 shows an internal block diagram of the first switching amplifier 113 in FIG. As shown in FIG. 2, the signals from the fourth frequency divider 106 and the third frequency divider 105 that divide and output the frequency band signal are the first frequency band input terminal 116, the second frequency band Input to each of the frequency band input terminals 117. A control signal corresponding to the first frequency band mode or the second frequency band mode is sent to the control terminal 118 for controlling the first frequency band input terminal 116 and the second frequency band input terminal 117, and the changeover switch Switching is performed by controlling 119. A signal in the first frequency band or the second frequency band corresponding to the control signal amplified by the amplifier 120 is output from the frequency band output terminal 121.

  In accordance with the frequency band mode to be used in this way, the output to the subsequent circuit is switched by the first switch circuit 102, so that it is possible to reduce the size by making it common without adding an oscillator. The number of oscillators can be reduced and spurious from the oscillators can also be reduced. Further, the frequency band is not limited to the above-described band, and it is obvious that the same effect can be obtained within a range that can be covered by the oscillator. Further, the above-described content can be reflected as a received signal instead of the baseband signal and also as a demodulator instead of the modulator.

  FIG. 3 is a block diagram showing a schematic configuration of a multiband radio using the PLL synthesizer according to the second embodiment of the present invention. Here, components having equivalent functions corresponding to the components described in FIG. 1 showing the first embodiment are denoted by the same reference numerals.

  In the block diagram shown in FIG. 3 in the second embodiment, when the first communication system is an 800 MHz band QPSK (Quadrature Phase Shift Keying) modulation method, the second oscillator 101 starts. A signal of 3.2 GHz is generated as the second frequency band and is output to the second and third frequency dividers 104 and 105. The second and third frequency dividers 104 and 105 divide to 800 MHz and output. After the output signal is amplified by the first amplifier 107 via the second switch circuit 122, the output signal and the baseband signal from the baseband signal processing unit (not shown) in the QPSK modulation mode are first converted. To obtain a quadrature modulation signal in QPSK modulation mode. Thereafter, the signal is amplified by the third amplifier 110 and output.

  Further, after the signal frequency-divided to 800 MHz by the third frequency divider 105 is amplified by the first switching amplifier 113, it is frequency-divided by the frequency synthesizer (variable frequency divider) 114 to be applied from the outside. The signal is output as a signal corresponding to the phase shift. The output of the frequency synthesizer 114 is applied to the second oscillator 101 via the loop filter 115. By this loop, the frequency of the carrier wave output from the second oscillator 101 is stabilized.

  Next, when the second communication system is a 850 MHz band GMSK (Gaussian Filtered Minimum Shift Keying) modulation system, the second oscillator 101 uses the second frequency band as the second frequency band. A 4 GHz signal is generated and output to the second and third frequency dividers 104 and 105. The second and third frequency dividers 104 and 105 divide to 850 MHz and output. After the output signal is amplified by the second amplifier 108 via the third switch circuit 123, the output signal and the baseband signal from the baseband signal processing unit (not shown) in the GMSK modulation mode are supplied to the second amplifier 108. To obtain a quadrature modulation signal in the GMSK modulation mode. Thereafter, the signal is amplified by the fourth amplifier 112 and output.

  Further, the signal frequency-divided to 850 MHz by the third frequency divider 105 is amplified by the first switching amplifier 113, and then frequency-divided by the frequency synthesizer (variable frequency divider) 114 to be applied from the outside. The signal is output as a signal corresponding to the phase shift. The output of the frequency synthesizer 114 is applied to the second oscillator 101 via the loop filter 115. By this loop, the frequency of the carrier wave output from the second oscillator 101 is stabilized.

  Next, when the third communication system is a 1.9 GHz band GMSK modulation system, the first frequency divider 103 generates a 3.8 GHz signal as the first frequency band from the first oscillator 100. Output to. The first frequency divider 103 divides the frequency into 1.9 GHz and outputs it. After the output signal is amplified by the second amplifier 108 via the second switch circuit 122 and the third switch circuit 123, the output signal and the baseband signal processing unit (not shown) in the GMSK modulation mode are used. Are input to the second mixer 111 to obtain a quadrature modulation signal in the GMSK modulation mode. Thereafter, the signal is amplified by the fourth amplifier 112 and output.

  Further, the signal frequency-divided to 950 MHz by the fourth frequency divider 106 is amplified by the first switching amplifier 113, and then frequency-divided by the frequency synthesizer (variable frequency divider) 114 to be applied from the outside. The signal is output as a signal corresponding to the phase shift. The output of the frequency synthesizer 114 is applied to the first oscillator 100 via the loop filter 115. This loop stabilizes the frequency of the carrier wave output from the first oscillator 100.

  As described above, in addition to the first embodiment described above, the first, second, and third switch circuits 102, 122, and 123 are used to switch the circuit configuration of the subsequent stage in accordance with the communication system mode. It is possible to reduce the size of the apparatus by making the circuit common without adding a circuit.

  A PLL synthesizer according to the present invention and a multiband radio using the same switch an oscillator according to a frequency band to be used, and switch a modulation / demodulation circuit at a subsequent stage according to a communication system to be used. Without increasing the number of modulation / demodulation circuits, it is possible to reduce the size of the device and reduce spurious factors, and it is useful to reduce the number of parts by using different parts that can be shared.

1 is a block diagram showing a schematic configuration of a multiband radio using a PLL synthesizer in Embodiment 1 of the present invention. Internal block diagram showing a first switching amplifier of a multiband radio in the first embodiment The block diagram which shows schematic structure of the multiband radio | wireless machine using the PLL synthesizer in Embodiment 2 of this invention.

Explanation of symbols

100 1st oscillator 101 2nd oscillator 102 1st switch circuit 103 1st frequency divider 104 2nd frequency divider 105 3rd frequency divider 106 4th frequency divider 107 1st amplifier 108 Second amplifier 109 First mixer 110 Third amplifier 111 Second mixer 112 Fourth amplifier 113 First switching amplifier 114 Frequency synthesizer (variable frequency divider)
115 Loop filter 116 First frequency band input terminal 117 Second frequency band input terminal 118 Control terminal 119 Changeover switch 120 Amplifier 121 Frequency band output terminal 122 Second switch circuit 123 Third switch circuit

Claims (5)

  Generated by a first oscillator that outputs a first predetermined frequency, a second oscillator that outputs a second predetermined frequency different from the first oscillator, and the first oscillator and the second oscillator A first switch for selecting the signal, a first frequency divider for dividing the signal output from the first switch to a half frequency, and an output from the first frequency divider. A first amplifier that amplifies the received signal, a second frequency divider that divides the signal output from the second oscillator to one-half frequency, and the second frequency divider that is output from the second frequency divider. A third frequency divider that divides the received signal by a half frequency, a second amplifier that amplifies the signal output from the third frequency divider, and the first frequency divider. A fourth frequency divider that divides the output signal by a factor of two; a signal output from the third frequency divider; and the fourth frequency divider A first switching amplifier which has an input terminal for the signal output from the control signal and a control signal, selects one signal by the control signal, amplifies and outputs the signal, and a signal output from the first switching amplifier. A frequency synthesizer that divides the frequency into a frequency that can be compared with a reference frequency applied from the outside, and outputs a signal corresponding to a phase shift compared to the reference frequency; and an output signal of the frequency synthesizer A PLL synthesizer comprising a loop filter that outputs to two oscillators, and controls the frequencies output from the first oscillator and the second oscillator.   Generated by a first oscillator that outputs a first predetermined frequency, a second oscillator that outputs a second predetermined frequency different from the first oscillator, the first oscillator, and the second oscillator A first switch for selecting the selected signal, a first frequency divider for dividing the signal output from the first switch by a half frequency, and a signal output from the second oscillator A second frequency divider that divides the frequency of the signal output from the second frequency divider into a frequency that is half the frequency, Second and third switches for selecting signals output from the first frequency divider and the third frequency divider; a first amplifier for amplifying the signal selected by the second switch; A second amplifier for amplifying the signal selected by the third switch; and a signal output from the first frequency divider. A fourth frequency divider that divides the frequency by one; an input terminal for a signal output from the third frequency divider, a signal output from the fourth frequency divider, and a control signal; A first switching amplifier that selects and amplifies and outputs one signal by the control signal, and divides the signal output from the first switching amplifier into a frequency that can be compared with a reference frequency applied from the outside, A frequency synthesizer that outputs a signal corresponding to a phase shift compared to the reference frequency; and a loop filter that outputs an output signal of the frequency synthesizer to the first oscillator and the second oscillator. A PLL synthesizer characterized by controlling the output frequency of the oscillator and the second oscillator.   A first synthesizing unit that synthesizes a baseband signal and a signal amplified by the first amplifier of the PLL synthesizer, and a signal synthesized by the first synthesizing unit, using the PLL synthesizer according to claim 1. A second amplifier for combining the baseband signal with the signal amplified by the second amplifier of the PLL synthesizer, and a fourth amplifier for amplifying the signal combined by the second combiner A multiband radio comprising: an amplifier, wherein the first oscillator and the second oscillator that output the predetermined frequency are selected by a first switch and switched according to a predetermined frequency band mode.   A first synthesizing unit that synthesizes a signal amplified by the first amplifier of the PLL synthesizer and a baseband signal generated by a first modulation method using the PLL synthesizer according to claim 2, and A third amplifier for amplifying the signal synthesized by the synthesis means, and a second synthesis means for synthesizing the signal amplified by the second amplifier of the PLL synthesizer and the baseband signal generated by the second modulation method. And a fourth amplifier for amplifying the signal synthesized by the second synthesizing means, the first oscillator for outputting the predetermined frequency, the second oscillator, the first modulation scheme, and the second A multiband radio device characterized in that the circuit configuration of the modulation system is selected by the first switch, the second switch, and the third switch and is switched in accordance with a predetermined modulation system and frequency band mode.   5. The multiband radio according to claim 3, wherein a reception signal is input instead of a baseband signal input to the first combining unit and the second combining unit.

Images