JP2006178429A5 - - Google Patents

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JP2006178429A5
JP2006178429A5 JP2005335195A JP2005335195A JP2006178429A5 JP 2006178429 A5 JP2006178429 A5 JP 2006178429A5 JP 2005335195 A JP2005335195 A JP 2005335195A JP 2005335195 A JP2005335195 A JP 2005335195A JP 2006178429 A5 JP2006178429 A5 JP 2006178429A5
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terminal
resistor
electrically connected
operational amplifier
buffer
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JP2005335195A
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JP2006178429A (en
JP4869688B2 (en
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Priority claimed from JP2005335195A external-priority patent/JP4869688B2/en
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Publication of JP2006178429A5 publication Critical patent/JP2006178429A5/ja
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オペアンプ、抵抗、及びバッファを有し、An operational amplifier, a resistor, and a buffer;
前記オペアンプの第１の入力端子は、前記抵抗の一方の端子に電気的に接続され、A first input terminal of the operational amplifier is electrically connected to one terminal of the resistor;
前記オペアンプの出力端子は、前記抵抗の他方の端子と、前記バッファの低電源端子とに電気的に接続され、The output terminal of the operational amplifier is electrically connected to the other terminal of the resistor and the low power supply terminal of the buffer,
前記オペアンプの第２の入力端子は、前記バッファの高電源端子に電気的に接続されていることを特徴とする半導体装置。The semiconductor device, wherein a second input terminal of the operational amplifier is electrically connected to a high power supply terminal of the buffer. オペアンプ、抵抗、バッファ、及びバイポーラトランジスタを有し、An operational amplifier, a resistor, a buffer, and a bipolar transistor;
前記オペアンプの第１の入力端子は、前記抵抗の一方の端子に電気的に接続され、A first input terminal of the operational amplifier is electrically connected to one terminal of the resistor;
前記オペアンプの出力端子は、前記バイポーラトランジスタのベースに電気的に接続され、The output terminal of the operational amplifier is electrically connected to the base of the bipolar transistor,
前記バイポーラトランジスタのエミッタは、前記抵抗の他方の端子と、前記バッファの低電源端子とに電気的に接続され、An emitter of the bipolar transistor is electrically connected to the other terminal of the resistor and a low power supply terminal of the buffer;
前記オペアンプの第２の入力端子は、前記バッファの高電源端子に電気的に接続されていることを特徴とする半導体装置。The semiconductor device, wherein a second input terminal of the operational amplifier is electrically connected to a high power supply terminal of the buffer. オペアンプ、抵抗、バッファ、及び発光素子を有し、An operational amplifier, a resistor, a buffer, and a light emitting element;
前記オペアンプの第１の入力端子は、前記抵抗の一方の端子に電気的に接続され、A first input terminal of the operational amplifier is electrically connected to one terminal of the resistor;
前記オペアンプの出力端子は、前記抵抗の他方の端子と、前記バッファの低電源端子とに電気的に接続され、The output terminal of the operational amplifier is electrically connected to the other terminal of the resistor and the low power supply terminal of the buffer,
前記オペアンプの第２の入力端子は、前記バッファの高電源端子と、前記発光素子のアノードとに電気的に接続されていることを特徴とする半導体装置。The semiconductor device, wherein a second input terminal of the operational amplifier is electrically connected to a high power supply terminal of the buffer and an anode of the light emitting element. オペアンプ、抵抗、バッファ、発光素子、及びバイポーラトランジスタを有し、It has an operational amplifier, resistor, buffer, light emitting element, and bipolar transistor,
前記オペアンプの第１の入力端子は、前記抵抗の一方の端子に電気的に接続され、A first input terminal of the operational amplifier is electrically connected to one terminal of the resistor;
前記オペアンプの出力端子は、前記バイポーラトランジスタのベースに電気的に接続され、The output terminal of the operational amplifier is electrically connected to the base of the bipolar transistor,
前記バイポーラトランジスタのエミッタは、前記抵抗の他方の端子と、前記バッファの低電源端子とに電気的に接続され、An emitter of the bipolar transistor is electrically connected to the other terminal of the resistor and a low power supply terminal of the buffer;
前記オペアンプの第２の入力端子は、前記バッファの高電源端子と、前記発光素子のアノードとに電気的に接続されていることを特徴とする半導体装置。The semiconductor device, wherein a second input terminal of the operational amplifier is electrically connected to a high power supply terminal of the buffer and an anode of the light emitting element. オペアンプ、第１の抵抗、第２の抵抗、第３の抵抗、第４の抵抗、及びバッファを有し、An operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, and a buffer;
前記オペアンプの第１の入力端子は、前記第１の抵抗の一方の端子と、前記第２の抵抗の一方の端子とに電気的に接続され、A first input terminal of the operational amplifier is electrically connected to one terminal of the first resistor and one terminal of the second resistor;
前記オペアンプの第２の入力端子は、前記第３の抵抗の一方の端子と、前記第４の抵抗の一方の端子とに電気的に接続され、A second input terminal of the operational amplifier is electrically connected to one terminal of the third resistor and one terminal of the fourth resistor;
前記オペアンプの出力端子は、前記第２の抵抗の他方の端子と、前記バッファの低電源端子とに電気的に接続され、The output terminal of the operational amplifier is electrically connected to the other terminal of the second resistor and the low power supply terminal of the buffer;
前記第１の抵抗の他方の端子は、第１の配線に電気的に接続され、The other terminal of the first resistor is electrically connected to the first wiring;
前記第３の抵抗の他方の端子は、第２の配線に電気的に接続され、The other terminal of the third resistor is electrically connected to the second wiring,
前記第４の抵抗の他方の端子は、第３の配線に電気的に接続され、The other terminal of the fourth resistor is electrically connected to the third wiring,
前記第２の配線は、前記バッファの高電源端子に電気的に接続されていることを特徴とする半導体装置。The semiconductor device, wherein the second wiring is electrically connected to a high power supply terminal of the buffer. オペアンプ、第１の抵抗、第２の抵抗、第３の抵抗、第４の抵抗、バッファ、及びバイポーラトランジスタ、を有し、An operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a buffer, and a bipolar transistor,
前記オペアンプの第１の入力端子は、前記第１の抵抗の一方の端子と、前記第２の抵抗の一方の端子とに電気的に接続され、A first input terminal of the operational amplifier is electrically connected to one terminal of the first resistor and one terminal of the second resistor;
前記オペアンプの第２の入力端子は、前記第３の抵抗の一方の端子と、前記第４の抵抗の一方の端子とに電気的に接続され、A second input terminal of the operational amplifier is electrically connected to one terminal of the third resistor and one terminal of the fourth resistor;
前記オペアンプの出力端子は、前記バイポーラトランジスタのベースに電気的に接続され、The output terminal of the operational amplifier is electrically connected to the base of the bipolar transistor,
前記バイポーラトランジスタのコレクタは、第４の配線に電気的に接続され、A collector of the bipolar transistor is electrically connected to a fourth wiring;
前記バイポーラトランジスタのエミッタは、前記第２の抵抗の他方の端子と、前記バッファの低電源端子とに電気的に接続され、An emitter of the bipolar transistor is electrically connected to the other terminal of the second resistor and a low power supply terminal of the buffer;
前記第１の抵抗の他方の端子は、第１の配線に電気的に接続され、The other terminal of the first resistor is electrically connected to the first wiring;
前記第３の抵抗の他方の端子は、第２の配線に電気的に接続され、The other terminal of the third resistor is electrically connected to the second wiring,
前記第４の抵抗の他方の端子は、第３の配線に電気的に接続され、The other terminal of the fourth resistor is electrically connected to the third wiring,
前記第２の配線は、前記バッファの高電源端子に電気的に接続されることを特徴とする半導体装置。The semiconductor device, wherein the second wiring is electrically connected to a high power supply terminal of the buffer. オペアンプ、第１の抵抗、第２の抵抗、第３の抵抗、第４の抵抗、バッファ、及び発光素子を有し、An operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a buffer, and a light emitting element;
前記オペアンプの第１の入力端子は、前記第１の抵抗の一方の端子と、前記第２の抵抗の一方の端子とに電気的に接続され、A first input terminal of the operational amplifier is electrically connected to one terminal of the first resistor and one terminal of the second resistor;
前記オペアンプの第２の入力端子は、前記第３の抵抗の一方の端子と、前記第４の抵抗の一方の端子とに電気的に接続され、A second input terminal of the operational amplifier is electrically connected to one terminal of the third resistor and one terminal of the fourth resistor;
前記オペアンプの出力端子は、前記第２の抵抗の他方の端子と、前記バッファの低電源端子とに電気的に接続され、The output terminal of the operational amplifier is electrically connected to the other terminal of the second resistor and the low power supply terminal of the buffer;
前記第１の抵抗の他方の端子は、第１の配線に電気的に接続され、The other terminal of the first resistor is electrically connected to the first wiring;
前記第３の抵抗の他方の端子は、第２の配線に電気的に接続され、The other terminal of the third resistor is electrically connected to the second wiring,
前記第４の抵抗の他方の端子は、第３の配線に電気的に接続され、The other terminal of the fourth resistor is electrically connected to the third wiring,
前記第２の配線は、前記バッファの高電源端子と、前記発光素子のアノードとに電気的に接続されていることを特徴とする半導体装置。The semiconductor device, wherein the second wiring is electrically connected to a high power supply terminal of the buffer and an anode of the light emitting element. オペアンプ、第１の抵抗、第２の抵抗、第３の抵抗、第４の抵抗、バッファ、発光素子、及びバイポーラトランジスタ、を有し、An operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a buffer, a light emitting element, and a bipolar transistor,
前記オペアンプの第１の入力端子は、前記第１の抵抗の一方の端子と、前記第２の抵抗の一方の端子とに電気的に接続され、A first input terminal of the operational amplifier is electrically connected to one terminal of the first resistor and one terminal of the second resistor;
前記オペアンプの第２の入力端子は、前記第３の抵抗の一方の端子と、前記第４の抵抗の一方の端子とに電気的に接続され、A second input terminal of the operational amplifier is electrically connected to one terminal of the third resistor and one terminal of the fourth resistor;
前記オペアンプの出力端子は、前記バイポーラトランジスタのベースに電気的に接続され、The output terminal of the operational amplifier is electrically connected to the base of the bipolar transistor,
前記バイポーラトランジスタのコレクタは、第４の配線に電気的に接続され、A collector of the bipolar transistor is electrically connected to a fourth wiring;
前記バイポーラトランジスタのエミッタは、前記第２の抵抗の他方の端子と、前記バッファの低電源端子とに電気的に接続され、An emitter of the bipolar transistor is electrically connected to the other terminal of the second resistor and a low power supply terminal of the buffer;
前記第１の抵抗の他方の端子は、第１の配線に電気的に接続され、The other terminal of the first resistor is electrically connected to the first wiring;
前記第３の抵抗の他方の端子は、第２の配線に電気的に接続され、The other terminal of the third resistor is electrically connected to the second wiring,
前記第４の抵抗の他方の端子は、第３の配線に電気的に接続され、The other terminal of the fourth resistor is electrically connected to the third wiring,
前記第２の配線は、前記バッファの高電源端子と、前記発光素子のアノードとに電気的に接続されることを特徴とする半導体装置。The semiconductor device, wherein the second wiring is electrically connected to a high power supply terminal of the buffer and an anode of the light emitting element.
JP2005335195A 2004-11-24 2005-11-21 Active matrix light emitting device Expired - Fee Related JP4869688B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005335195A JP4869688B2 (en) 2004-11-24 2005-11-21 Active matrix light emitting device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2004339684 2004-11-24
JP2004339684 2004-11-24
JP2005335195A JP4869688B2 (en) 2004-11-24 2005-11-21 Active matrix light emitting device

Publications (3)

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JP2006178429A JP2006178429A (en) 2006-07-06
JP2006178429A5 true JP2006178429A5 (en) 2008-12-18
JP4869688B2 JP4869688B2 (en) 2012-02-08

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JP2005335195A Expired - Fee Related JP4869688B2 (en) 2004-11-24 2005-11-21 Active matrix light emitting device

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JP (1) JP4869688B2 (en)

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Publication number Priority date Publication date Assignee Title
WO2012077258A1 (en) * 2010-12-10 2012-06-14 パナソニック株式会社 Display device and driving method therefor

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