JP2006156369A - Display device and method for producing display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reliable display device and a technology to produce such a display device at low cost in good yield. <P>SOLUTION: The display device comprises an electroluminescent layer on a first reflective electrode layer and a transparent second electrode layer on the electroluminescent layer. The electroluminescent layer comprises a layer containing organic compounds and inorganic compounds in contact with the first electrode layer which is made of a film containing aluminum alloy including at least one or more of molybdenum, titanium, and carbon. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to a display device and a method for manufacturing the display device.

    As a display device having an electroluminescence (hereinafter also referred to as “EL”) element or a liquid crystal element has been enlarged and refined, pure aluminum, which has a low specific resistance and is easy to process, is used as a wiring material. Attention has been paid.

    However, pure aluminum has a problem in heat resistance, and a bump-like protrusion called hillock is generated on the surface of the pure aluminum film by heat treatment in the manufacturing process of the display device. A hillock causes a short circuit between wirings and causes a defect.

Therefore, a wiring material that has low resistance and heat resistance and can suppress hillocks is desired, and an aluminum alloy thin film to which other elements are added has been developed (see, for example, Patent Document 1).
JP 2003-89864 A

    In the present invention, by using a wiring material that has low resistance, heat resistance, and can suppress hillocks, a display device having high reliability and excellent electrical characteristics can be obtained without complicating the process and the device with high yield. It aims at providing the technology which can be manufactured.

    In the present invention, the first electrode layer, which is the reflective electrode layer, includes an aluminum alloy having at least one of molybdenum, titanium, and carbon, or a plurality of types. A film containing an aluminum alloy having at least one of molybdenum, titanium, and carbon, or a plurality of kinds of carbon is difficult to crystallize even when heat treatment is performed, and the film surface has excellent flatness. Furthermore, it has high reflectivity with respect to light in the vicinity of the visible light region, and can efficiently reflect light. A film containing an aluminum alloy having at least one or more of molybdenum, titanium, and carbon has an excellent advantage that it is not toxic and is safe to the human body and the environment.

    In a display device to which the present invention can be used, light emission in which an organic substance that emits light called electroluminescence (hereinafter also referred to as “EL”) or a layer containing a mixture of an organic substance and an inorganic substance is interposed between electrodes is used. There is a light-emitting display device in which an element and a TFT are connected.

    One display device of the present invention has an electroluminescent layer on a reflective first electrode layer, a translucent second electrode layer on the electroluminescent layer, and the electroluminescent layer is a first electroluminescent layer. The first electrode layer contains an aluminum alloy containing at least one kind or a plurality of kinds of molybdenum, titanium, and carbon.

    One display device of the present invention includes a light-transmitting conductive film over a reflective first electrode layer, an electroluminescent layer over the conductive film, and a light-transmitting first electrode over the electroluminescent layer. The electroluminescent layer has a layer containing an organic compound and an inorganic compound in contact with the conductive film, and the first electrode layer is at least one of molybdenum, titanium, and carbon, or a plurality of layers. Includes aluminum alloy with seeds.

    One embodiment of the display device of the present invention includes a thin film transistor including a semiconductor layer, a gate insulating layer, a gate electrode layer, a source electrode layer, and a drain electrode layer, an insulating layer over the thin film transistor, and an interlayer film over the insulating layer. A reflective first electrode layer on the interlayer film, an electroluminescent layer on the first electrode layer, and a translucent second electrode layer on the electroluminescent layer The electroluminescent layer has a layer containing an organic compound and an inorganic compound in contact with the first electrode layer, the interlayer film has only under the first electrode layer, the first electrode layer has molybdenum, An aluminum alloy containing at least one or more of titanium and carbon is included.

    One embodiment of the display device of the present invention includes a thin film transistor including a semiconductor layer, a gate insulating layer, a gate electrode layer, a source electrode layer, and a drain electrode layer, an insulating layer over the thin film transistor, and an interlayer film over the insulating layer. A reflective first electrode layer on the interlayer film, a translucent conductive film on the first electrode layer, an electroluminescent layer on the conductive film, and an electroluminescent layer A light-transmitting second electrode layer is provided above, the electroluminescent layer is in contact with the conductive film and includes a layer containing an organic compound and an inorganic compound, and the interlayer film is provided only below the first electrode layer. In addition, the first electrode layer includes an aluminum alloy having at least one of molybdenum, titanium, and carbon, or a plurality of them.

    According to one method for manufacturing a display device of the present invention, a reflective first electrode layer including an aluminum alloy including at least one of molybdenum, titanium, and carbon or a plurality of types is formed, and the first electrode layer is formed. An electroluminescent layer is formed on the electroluminescent layer, and a light-transmitting second electrode layer is formed on the electroluminescent layer. The electroluminescent layer is formed by contacting a layer containing an organic compound and an inorganic compound with the first electrode layer. .

    According to one method for manufacturing a display device of the present invention, a reflective first electrode layer including an aluminum alloy including at least one of molybdenum, titanium, and carbon or a plurality of types is formed, and the first electrode layer is formed. A light-transmitting conductive film is formed, an electroluminescent layer is formed on the conductive film, and a light-transmitting second electrode layer is formed on the electroluminescent layer. The electroluminescent layer includes an organic compound and an inorganic compound. And a layer containing is formed in contact with the conductive film.

    One embodiment of a method for manufacturing a display device of the present invention is to form a thin film transistor including a semiconductor layer, a gate insulating layer, a gate electrode layer, a source electrode layer, and a drain electrode layer, form an insulating layer over the thin film transistor, An interlayer film is formed, an opening reaching the source electrode layer or the drain electrode layer is formed in the insulating layer and the interlayer film, and molybdenum, titanium, And a conductive film containing an aluminum alloy having at least one kind or a plurality of kinds of carbon, a conductive film and an interlayer film are processed, a reflective first electrode layer is formed, and a first electrode layer is formed on the first electrode layer. An electroluminescent layer is formed, and a light-transmitting second electrode layer is formed over the electroluminescent layer, and the electroluminescent layer is formed in contact with the first electrode layer including an organic compound and an inorganic compound.

    One embodiment of a method for manufacturing a display device of the present invention is to form a thin film transistor including a semiconductor layer, a gate insulating layer, a gate electrode layer, a source electrode layer, and a drain electrode layer, form an insulating layer over the thin film transistor, An interlayer film is formed, an opening reaching the source electrode layer or the drain electrode layer is formed in the insulating layer and the interlayer film, and molybdenum, titanium, And a first conductive film containing an aluminum alloy having at least one kind or a plurality of kinds of carbon, a second conductive film is formed over the first conductive film, and the first conductive film, the second conductive film, The conductive film and the interlayer film are processed, a reflective first electrode layer is formed, an electroluminescent layer is formed on the first electrode layer, and a translucent second electrode layer is formed on the electroluminescent layer. Forming and electroluminescent layer with organic compound and inorganic A layer containing a compound in contact with the first electrode layer is formed.

    By using the present invention, a highly reliable display device can be manufactured. Therefore, a display device with high definition and high image quality can be manufactured with high yield.

    Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in structures of the present invention described below, the same portions or portions having similar functions are denoted by the same reference numerals in different drawings, and description thereof is not repeated.

(Embodiment 1)
A display device in this embodiment will be described with reference to FIG.

    As shown in FIG. 1, the display device described in this embodiment is a top emission display device which extracts light through a sealing substrate. The display devices in FIGS. 1A and 1B are examples in which the electrode structures of the light-emitting elements are different.

    The display device in FIG. 1A functions as a base film 601a, a base film 601b, a thin film transistor 605, a gate insulating layer 602, an insulating layer 603, an insulating layer 606, an insulating layer 607, an interlayer film 608, and a partition over a substrate 600. And an insulating layer 609, a first electrode layer 610, an electroluminescent layer 611, a second electrode layer 612, and a protective film 613. The thin film transistor 605 includes a semiconductor layer having an impurity region functioning as a source region and a drain region, a gate insulating layer 602, a gate electrode layer having a stacked structure of two layers, a source electrode layer, and a drain electrode layer. Alternatively, the drain electrode layer is in contact with and electrically connected to the impurity region of the semiconductor layer and the first electrode layer 610.

    In the display device of this embodiment, the first electrode layer 610 is a reflective electrode layer having reflectivity and reflects light emitted from the light-emitting element 614. Thus, light is emitted in the direction of the arrow from the second electrode layer 612 side. As described above, the reflective electrode layer used for the pixel electrode layer of the light-emitting element needs to have high reflectivity and good surface flatness.

    In the present invention, a film containing an aluminum alloy having at least one kind or a plurality of kinds of molybdenum, titanium, and carbon is used for the first electrode layer 610 which is a reflective electrode layer. In this embodiment, a film containing an aluminum alloy containing molybdenum (hereinafter also referred to as an Al (Mo) film) is used for the first electrode layer 610. A film containing an aluminum alloy having at least one of molybdenum, titanium, and carbon, or a plurality of kinds of carbon is difficult to crystallize even when heat treatment is performed, and the film surface has excellent flatness. Furthermore, it has high reflectivity with respect to light in the vicinity of the visible light region, and can efficiently reflect light. A film containing an aluminum alloy having at least one or more of molybdenum, titanium, and carbon has an excellent advantage that it is not toxic and is safe to the human body and the environment.

    Further, although an aluminum alloy containing nickel has low resistance to a chemical solution such as a developer used when forming the insulating layer 609 functioning as a partition wall that covers a part of the first electrode layer 610, the present invention has a low resistance. A film containing an aluminum alloy having at least one or more of molybdenum, titanium, and carbon has high resistance. In particular, a film containing an aluminum alloy containing titanium (hereinafter also referred to as an Al (Ti) film) and a film containing an aluminum alloy containing 20 atomic% or more of molybdenum have high resistance to chemicals, so that the film thickness on the surface is reduced in the manufacturing process. Defects such as rough and rough are unlikely to occur. Therefore, a favorable surface state can be maintained, so that the stacked electroluminescent layer 611 can be stably formed, and the reliability of the display device is improved. Of course, it is more effective to use a developer having high corrosion resistance as the developer. In addition, when the content of molybdenum or titanium in the film containing an aluminum alloy including at least one or more of molybdenum, titanium, and carbon is increased, the effect of suppressing polarization of light emitted from the light-emitting element is also obtained. is there.

    In a film containing an aluminum alloy having at least one or more of molybdenum, titanium, and carbon, it is preferable that the content of molybdenum or titanium in the film is higher than 7.0 atoms%. In addition, in a film including an aluminum alloy including at least one kind or plural kinds of molybdenum, titanium, and carbon, the content of molybdenum or titanium in the film is 20 atoms% or less with respect to light in the visible light region. And has an advantage of high reflectivity. In a film containing an aluminum alloy containing carbon (hereinafter, also referred to as an Al (C) film), the carbon content in the film is 0.1 atom% or more and 10 atom% or less, preferably less than 1 atom%. In a film containing an aluminum alloy containing molybdenum and carbon and a film containing an aluminum alloy containing titanium and carbon, the amount of carbon contained is effective even when the amount is small, and the carbon content in the film is 0.3 atoms. % Or less, and further 0.1 atom% or less.

    A film containing an aluminum alloy containing titanium is also called a film containing a titanium-aluminum alloy, and a film containing an aluminum alloy containing carbon is also called an aluminum alloy carbon film or an aluminum-carbon alloy film.

    In this embodiment, the substrate 600 is a glass substrate, the base film 601a is a silicon nitride oxide film, the base film 601b is a silicon oxynitride film, the gate insulating layer 602 is a silicon oxynitride film, the insulating layer 603 is a silicon nitride oxide film, and an insulating film The layer 606 is a silicon oxide film, the insulating layer 607 is a silicon oxide film containing an alkyl group, the interlayer film 608 is a silicon nitride oxide film, the insulating layer 609 functioning as a partition is polyimide, and the protective film 613 is a silicon nitride oxide film. Yes. The interlayer film 608 is formed in order to improve the adhesion between the first electrode layer 610 and the insulating layer 607.

  A structure of the light-emitting element 614 that can be applied to this embodiment will be described in detail with reference to FIGS. 18, the first electrode layer 870 corresponds to the first electrode layer 610 in FIG. 1, the electroluminescent layer 860 corresponds to the electroluminescent layer 611, and the second electrode layer 850 corresponds to the second electrode. Corresponds to layer 612.

  FIG. 18 illustrates an element structure of a light-emitting element of the present invention, in which an electroluminescent layer 860 formed by mixing an organic compound and an inorganic compound is sandwiched between a first electrode layer 870 and a second electrode layer 850. It is a light emitting element. The electroluminescent layer 860 includes a first layer 804, a second layer 803, and a third layer 802 as shown in the drawing, and particularly has a great feature in the first layer 804 and the third layer 802. .

  First, the first layer 804 is a layer that has a function of transporting holes to the second layer 803, and includes a first organic compound and a first organic electron-accepting property with respect to the first organic compound. It is a structure containing an inorganic compound. What is important is not simply that the first organic compound and the first inorganic compound are mixed, but the first inorganic compound exhibits an electron accepting property with respect to the first organic compound. By adopting such a configuration, a large number of hole carriers are generated in the first organic compound which has essentially no inherent carrier, and exhibits extremely excellent hole injection properties and hole transport properties.

  Therefore, the first layer 804 has not only effects (such as improved heat resistance) that are considered to be obtained by mixing an inorganic compound, but also excellent conductivity (in particular, in the first layer 804, hole injection). And transportability) can also be obtained. This is an effect that cannot be obtained with a conventional hole transport layer in which an organic compound and an inorganic compound that do not have an electronic interaction with each other are simply mixed. Due to this effect, the drive voltage can be made lower than in the prior art. Further, since the first layer 804 can be thickened without causing an increase in driving voltage, a short circuit of an element due to dust or the like can be suppressed.

By the way, as described above, since hole carriers are generated in the first organic compound, the first organic compound is preferably a hole-transporting organic compound. Examples of the hole-transporting organic compound include phthalocyanine (abbreviation: H ₂ Pc), copper phthalocyanine (abbreviation: CuPc), vanadyl phthalocyanine (abbreviation: VOPc), 4,4 ′, 4 ″ -tris (N, N -Diphenylamino) triphenylamine (abbreviation: TDATA), 4,4 ′, 4 ″ -tris [N- (3-methylphenyl) -N-phenylamino] triphenylamine (abbreviation: MTDATA), 1,3 , 5-tris [N, N-di (m-tolyl) amino] benzene (abbreviation: m-MTDAB), N, N′-diphenyl-N, N′-bis (3-methylphenyl) -1,1 ′ -Biphenyl-4,4'-diamine (abbreviation: TPD), 4,4'-bis [N- (1-naphthyl) -N-phenylamino] biphenyl (abbreviation: NPB), 4,4'-bis {N -[4-di m-tolyl) amino] phenyl-N-phenylamino} biphenyl (abbreviation: DNTPD), 4,4 ′, 4 ″ -tris (N-carbazolyl) triphenylamine (abbreviation: TCTA), and the like. It is not limited to. Among the above-mentioned compounds, aromatic amine compounds represented by TDATA, MTDATA, m-MTDAB, TPD, NPB, DNTPD, TCTA, etc. are likely to generate hole carriers and are suitable as the first organic compound. A group.

  On the other hand, the first inorganic compound may be anything as long as it can easily receive electrons from the first organic compound, and various metal oxides or metal nitrides can be used. Any transition metal oxide belonging to Group 12 is preferable because it easily exhibits electron acceptability. Specific examples include titanium oxide, zirconium oxide, vanadium oxide, molybdenum oxide, tungsten oxide, rhenium oxide, ruthenium oxide, and zinc oxide. Among the metal oxides described above, any of the transition metal oxides in Groups 4 to 8 of the periodic table has a high electron accepting property and is a preferred group. Vanadium oxide, molybdenum oxide, tungsten oxide, and rhenium oxide are particularly preferable because they can be vacuum-deposited and are easy to handle.

  Note that the first layer 804 may be formed by stacking a plurality of layers to which the above-described combination of an organic compound and an inorganic compound is applied. Moreover, other organic compounds or other inorganic compounds may be further contained.

  Next, the third layer 802 will be described. The third layer 802 is a layer having a function of transporting electrons to the second layer 803, and includes at least a third organic compound and a third inorganic compound that exhibits an electron donating property with respect to the third organic compound. It is the structure containing these. What is important is not that the third organic compound and the third inorganic compound are merely mixed, but that the third inorganic compound exhibits an electron donating property with respect to the third organic compound. By adopting such a structure, a large number of electron carriers are generated in the third organic compound which has essentially no inherent carrier, and exhibits extremely excellent electron injecting properties and electron transporting properties.

  Therefore, the third layer 802 has not only an effect (such as improvement in heat resistance) considered to be obtained by mixing an inorganic compound but also excellent conductivity (especially in the third layer 802, electron injection). And transportability) can also be obtained. This is an effect that cannot be obtained with a conventional electron transport layer in which an organic compound and an inorganic compound that do not have an electronic interaction with each other are simply mixed. Due to this effect, the drive voltage can be made lower than in the prior art. In addition, since the third layer 802 can be thickened without causing an increase in driving voltage, a short circuit of an element due to dust or the like can be suppressed.

By the way, as described above, since an electron carrier is generated in the third organic compound, the third organic compound is preferably an electron-transporting organic compound. Examples of the electron-transporting organic compound include tris (8-quinolinolato) aluminum (abbreviation: Alq ₃ ), tris (4-methyl-8-quinolinolato) aluminum (abbreviation: Almq ₃ ), bis (10-hydroxybenzo [ h] -quinolinato) beryllium (abbreviation: BeBq ₂ ), bis (2-methyl-8-quinolinolato) (4-phenylphenolato) aluminum (abbreviation: BAlq), bis [2- (2′-hydroxyphenyl) benzoxa Zolato] zinc (abbreviation: Zn (BOX) ₂ ), bis [2- (2′-hydroxyphenyl) benzothiazolate] zinc (abbreviation: Zn (BTZ) ₂ ), bathophenanthroline (abbreviation: BPhen), bathocuproin (abbreviation: BCP), 2- (4-biphenylyl) -5- (4-tert-butylphenyl)- , 3,4-oxadiazole (abbreviation: PBD), 1,3-bis [5- (4-tert-butylphenyl) -1,3,4-oxadiazol-2-yl] benzene (abbreviation: OXD) -7), 2,2 ′, 2 ″-(1,3,5-benzenetriyl) -tris (1-phenyl-1H-benzimidazole) (abbreviation: TPBI), 3- (4-biphenylyl)- 4-phenyl-5- (4-tert-butylphenyl) -1,2,4-triazole (abbreviation: TAZ), 3- (4-biphenylyl) -4- (4-ethylphenyl) -5- (4- tert-butylphenyl) -1,2,4-triazole (abbreviation: p-EtTAZ) and the like, but are not limited thereto. Among the compounds described above, a chelate metal complex having a chelate ligand containing an aromatic ring typified by Alq ₃ , Almq ₃ , BeBq ₂ , BAlq, Zn (BOX) ₂ , Zn (BTZ) ₂ , Organic compounds having a phenanthroline skeleton typified by BPhen, BCP, etc., and organic compounds having an oxadiazole skeleton typified by PBD, OXD-7, etc., are likely to generate electron carriers and are suitable as a third organic compound. Compound group.

  On the other hand, the third inorganic compound may be anything as long as it easily gives electrons to the third organic compound, and various metal oxides or metal nitrides can be used. Earth metal oxides, rare earth metal oxides, alkali metal nitrides, alkaline earth metal nitrides, and rare earth metal nitrides are preferable because they easily exhibit electron donating properties. Specific examples include lithium oxide, strontium oxide, barium oxide, erbium oxide, lithium nitride, magnesium nitride, calcium nitride, yttrium nitride, and lanthanum nitride. In particular, lithium oxide, barium oxide, lithium nitride, magnesium nitride, and calcium nitride are preferable because they can be vacuum-deposited and are easy to handle.

  Note that the third layer 802 may be formed by stacking a plurality of layers to which the above-described combination of an organic compound and an inorganic compound is applied. Moreover, other organic compounds or other inorganic compounds may be further contained.

  Next, the second layer 803 will be described. The second layer 803 is a layer having a light emitting function and includes a light emitting second organic compound. Moreover, the structure containing a 2nd inorganic compound may be sufficient. The second layer 803 can be formed using various light-emitting organic compounds and inorganic compounds. However, since the second layer 803 is less likely to flow current than the first layer 804 and the third layer 802, the thickness is preferably about 10 nm to 100 nm.

The second organic compound is not particularly limited as long as it is a luminescent organic compound. For example, 9,10-di (2-naphthyl) anthracene (abbreviation: DNA), 9,10-di (2 -Naphthyl) -2-tert-butylanthracene (abbreviation: t-BuDNA), 4,4'-bis (2,2-diphenylvinyl) biphenyl (abbreviation: DPVBi), coumarin 30, coumarin 6, coumarin 545, coumarin 545T , Perylene, rubrene, periflanthene, 2,5,8,11-tetra (tert-butyl) perylene (abbreviation: TBP), 9,10-diphenylanthracene (abbreviation: DPA), 5,12-diphenyltetracene, 4- ( Dicyanomethylene) -2-methyl- [p- (dimethylamino) styryl] -4H-pyran (abbreviation: DCM1), 4- (di Cyanomethylene) -2-methyl-6- [2- (julolidin-9-yl) ethenyl] -4H-pyran (abbreviation: DCM2), 4- (dicyanomethylene) -2,6-bis [p- (dimethylamino) ) Styryl] -4H-pyran (abbreviation: BisDCM) and the like. In addition, bis [2- (4 ′, 6′-difluorophenyl) pyridinato-N, C ^{2 ′} ] iridium (picolinate) (abbreviation: FIrpic), bis {2- [3 ′, 5′-bis (trifluoromethyl) ) Phenyl] pyridinato-N, C ^{2 ′} } iridium (picolinate) (abbreviation: Ir (CF ₃ ppy) ₂ (pic)), tris (2-phenylpyridinato-N, C ^{2 ′} ) iridium (abbreviation: Ir (Ppy) ₃ ), bis (2-phenylpyridinato-N, C ^{2 ′} ) iridium (acetylacetonate) (abbreviation: Ir (ppy) ₂ (acac)), bis [2- (2′-thienyl) pyridinato -N, C ^{3 ']} iridium (acetylacetonate) _{(abbreviation: Ir (thp) 2 (acac} )), bis (2-phenylquinolinato--N, C ^2') iridium (Asechirua Tonato) _{(abbreviation: Ir (pq) 2 (acac} )), bis [2- (2'-benzothienyl) pyridinato -N, C ^{3 ']} iridium (acetylacetonate) (abbreviation: Ir _(btp) 2 (acac A compound capable of emitting phosphorescence such as)) can also be used.

For the second layer 803, a triplet excitation material containing a metal complex or the like may be used in addition to the singlet excitation light-emitting material. For example, among red light emitting pixels, green light emitting pixels, and blue light emitting pixels, a red light emitting pixel having a relatively short luminance half time is formed of a triplet excitation light emitting material, and the other A singlet excited light emitting material is used. The triplet excited luminescent material has a feature that the light emission efficiency is good, so that less power is required to obtain the same luminance. That is, when applied to a red pixel, the amount of current flowing through the light emitting element can be reduced, so that reliability can be improved. As a reduction in power consumption, a red light-emitting pixel and a green light-emitting pixel may be formed using a triplet excitation light-emitting material, and a blue light-emitting pixel may be formed using a singlet excitation light-emitting material. By forming a green light-emitting element having high human visibility with a triplet excited light-emitting material, power consumption can be further reduced.

Further, in the second layer 803, not only the second organic compound that emits light but also other organic compounds may be added. Examples of the organic compound that can be added include TDATA, MTDATA, m-MTDAB, TPD, NPB, DNTPD, TCTA, Alq ₃ , Almq ₃ , BeBq ₂ , BAlq, Zn (BOX) ₂ , and Zn (BTZ) described above. ₂ , BPhen, BCP, PBD, OXD-7, TPBI, TAZ, p-EtTAZ, DNA, t-BuDNA, DPVBi, etc., 4,4′-bis (N-carbazolyl) biphenyl (abbreviation: CBP), 1 , 3,5-tris [4- (N-carbazolyl) phenyl] benzene (abbreviation: TCPB) can be used, but is not limited thereto. In addition, the organic compound added in addition to the second organic compound in this way has an excitation energy larger than the excitation energy of the second organic compound in order to efficiently emit the second organic compound, and the second organic compound. It is preferable to add more than the organic compound (by this, concentration quenching of the second organic compound can be prevented). Or as another function, you may show light emission with a 2nd organic compound (Thereby, white light emission etc. are also attained).

    The second layer 803 may have a structure in which a light emitting layer having a different emission wavelength band is formed for each pixel to perform color display. Typically, a light emitting layer corresponding to each color of R (red), G (green), and B (blue) is formed. In this case as well, it is possible to improve color purity and prevent mirror reflection (reflection) of the pixel portion by providing a filter that transmits light in the emission wavelength band on the light emission side of the pixel. Can do. By providing the filter, it is possible to omit a circularly polarized plate that has been conventionally required, and it is possible to eliminate the loss of light emitted from the light emitting layer. Furthermore, a change in color tone that occurs when the pixel portion (display screen) is viewed obliquely can be reduced.

    The material that can be used for the second layer 803 may be a low molecular weight organic light emitting material or a high molecular weight organic light emitting material. The polymer organic light emitting material has higher physical strength and higher device durability than the low molecular weight material. In addition, since the film can be formed by coating, the device can be manufactured relatively easily.

    Since the light emission color is determined by the material for forming the light emitting layer, a light emitting element exhibiting desired light emission can be formed by selecting these materials. Examples of the polymer electroluminescent material that can be used for forming the light emitting layer include polyparaphenylene vinylene, polyparaphenylene, polythiophene, and polyfluorene.

    Examples of the polyparaphenylene vinylene include poly (paraphenylene vinylene) [PPV] derivatives, poly (2,5-dialkoxy-1,4-phenylene vinylene) [RO-PPV], poly (2- (2′- Ethyl-hexoxy) -5-methoxy-1,4-phenylenevinylene) [MEH-PPV], poly (2- (dialkoxyphenyl) -1,4-phenylenevinylene) [ROPh-PPV] and the like. Examples of polyparaphenylene include derivatives of polyparaphenylene [PPP], poly (2,5-dialkoxy-1,4-phenylene) [RO-PPP], poly (2,5-dihexoxy-1,4-phenylene). ) And the like. The polythiophene series includes polythiophene [PT] derivatives, poly (3-alkylthiophene) [PAT], poly (3-hexylthiophene) [PHT], poly (3-cyclohexylthiophene) [PCHT], poly (3-cyclohexyl). -4-methylthiophene) [PCHMT], poly (3,4-dicyclohexylthiophene) [PDCHT], poly [3- (4-octylphenyl) -thiophene] [POPT], poly [3- (4-octylphenyl) -2,2 bithiophene] [PTOPT] and the like. Examples of the polyfluorene series include polyfluorene [PF] derivatives, poly (9,9-dialkylfluorene) [PDAF], poly (9,9-dioctylfluorene) [PDOF], and the like.

  The second inorganic compound may be any inorganic compound as long as it is difficult to quench the light emission of the second organic compound, and various metal oxides and metal nitrides can be used. In particular, a metal oxide of Group 13 or Group 14 of the periodic table is preferable because it is difficult to quench the light emission of the second organic compound, and specifically, aluminum oxide, gallium oxide, silicon oxide, and germanium oxide are preferable. . However, it is not limited to these.

Note that the second layer 803 may be formed by stacking a plurality of layers to which the above-described combination of an organic compound and an inorganic compound is applied. Moreover, other organic compounds or other inorganic compounds may be further contained.
The layer structure of the light-emitting layer can be changed, and instead of having a specific electron injection region or light-emitting region, an electrode layer for this purpose is provided, or a light-emitting material is dispersed. Modifications can be made without departing from the spirit of the present invention.

    A light-emitting element formed using the above materials emits light by being forward-biased. A pixel of a display device formed using a light-emitting element can be driven by a simple matrix method or an active matrix method. In any case, each pixel emits light by applying a forward bias at a specific timing, but is in a non-light emitting state for a certain period. By applying a reverse bias during this non-light emitting time, the reliability of the light emitting element can be improved. The light emitting element has a degradation mode in which the light emission intensity decreases under a constant driving condition and a degradation mode in which the non-light emitting area is enlarged in the pixel and the luminance is apparently decreased. However, alternating current that applies a bias in the forward and reverse directions. By performing a typical drive, the progress of deterioration can be slowed and the reliability of the light emitting device can be improved. Further, either digital driving or analog driving can be applied.

    Therefore, a color filter (colored layer) may be formed on the sealing substrate. The color filter (colored layer) can be formed by an evaporation method or a droplet discharge method. When the color filter (colored layer) is used, high-definition display can be performed. This is because the color filter (colored layer) can correct a broad peak to be sharp in the emission spectrum of each RGB.

    A full color display can be performed by forming a material exhibiting monochromatic light emission and combining a color filter and a color conversion layer. The color filter (colored layer) and the color conversion layer may be formed, for example, on the second substrate (sealing substrate) and attached to the substrate.

    Of course, monochromatic light emission may be displayed. For example, an area color type display device may be formed using monochromatic light emission. As the area color type, a passive matrix type display unit is suitable, and characters and symbols can be mainly displayed.

  The materials of the first electrode layer 870 and the second electrode layer 850 need to be selected in consideration of the work function, and both the first electrode layer 870 and the second electrode layer 850 are anodes depending on the pixel structure. Or a cathode. In the case where the polarity of the driving thin film transistor is a p-channel type, the first electrode layer 870 may be an anode and the second electrode layer 850 may be a cathode as illustrated in FIG. In the case where the polarity of the driving thin film transistor is an n-channel type, it is preferable that the first electrode layer 870 be a cathode and the second electrode layer 850 be an anode as shown in FIG. Materials that can be used for the first electrode layer 870 and the second electrode layer 850 are described. In the case where the first electrode layer 870 and the second electrode layer 850 function as anodes, a material having a high work function (specifically, a material of 4.5 eV or more) is preferable, and the first electrode layer and the second electrode In the case where the layer 850 functions as a cathode, a material having a low work function (specifically, a material having a value of 3.5 eV or less) is preferable. However, since the first layer 804 has excellent hole injection characteristics and hole transport characteristics, and the third layer 802 has excellent electron injection characteristics and electron transport characteristics, both the first electrode layer 870 and the second electrode layer 850 are used. Various materials can be used with almost no work function limitation.

  The second electrode layer 850 may be light transmissive. In that case, a transparent conductive film may be specifically used, and indium tin oxide (ITO), indium zinc oxide (IZO), indium tin oxide added with silicon oxide (ITSO), or the like can be used. Further, even if it is a metal film, light can be emitted from the second electrode layer 850 by reducing the film thickness (preferably about 5 nm to 30 nm) so that light can be transmitted. It becomes possible. As the metal thin film that can be used for the second electrode layer 850, a conductive film made of titanium, tungsten, nickel, gold, platinum, silver, aluminum, magnesium, calcium, lithium, or an alloy thereof is used. Can do. Further, the first electrode layer 870 and the second electrode layer 850 include a metal thin film such as a film containing an aluminum alloy having at least one kind or a plurality of kinds of molybdenum, titanium, and carbon, and the above-described transparent conductive film. You may laminate. In the case where ITO or ITSO which is the transparent conductive film is used for the second electrode layer 850, the second electrode layer 850 may be formed over a BzOs-Li film obtained by adding Li to a benzoxazole derivative (BzOs).

  Note that the light-emitting element of the present invention has various variations by changing types of the first electrode layer 870 and the second electrode layer 850.

  FIG. 18B illustrates a case where the electroluminescent layer 860 includes the third layer 802, the second layer, and the first layer 804 in this order from the first electrode layer 870 side.

  As described above, in the light-emitting element of the present invention, the layer sandwiched between the first electrode layer 870 and the second electrode layer 850 includes a layer in which an organic compound and an inorganic compound are combined. The electroluminescent layer 860 is formed. Then, by mixing the organic compound and the inorganic compound, there are provided layers (that is, the first layer 804 and the third layer 802) that can obtain functions of high carrier injection and carrier transport that cannot be obtained independently. This is a novel organic-inorganic composite light-emitting element. In addition, when the first layer 804 and the third layer 802 are provided on the first electrode layer 870 side which is a reflective electrode, the first layer 804 and the third layer 802 need to be layers in which an organic compound and an inorganic compound are combined. In the case of being provided on the second electrode layer 850 side, only an organic compound or an inorganic compound may be used.

  Note that although the electroluminescent layer 860 is a layer in which an organic compound and an inorganic compound are mixed, various known methods can be used as a formation method thereof. For example, there is a technique in which both an organic compound and an inorganic compound are evaporated by resistance heating and co-evaporated. In addition, while the organic compound is evaporated by resistance heating, the inorganic compound may be evaporated by electron beam (EB) and co-evaporated. Further, there is a method of evaporating the organic compound by resistance heating and simultaneously sputtering the inorganic compound and depositing both at the same time. In addition, the film may be formed by a wet method.

  Similarly, for the first electrode layer 870 and the second electrode layer 850, a vapor deposition method using resistance heating, an EB vapor deposition method, a sputtering method, a wet method, or the like can be used.

    In the display device in FIG. 1B, a base film 621a, a base film 621b, a thin film transistor 625, a gate insulating layer 622, an insulating layer 623, an insulating layer 626, an insulating layer 627, an interlayer film 628, and an interlayer film 636 are formed over a substrate 620. And an insulating layer 629 functioning as a partition, a first electrode layer 630, a transparent conductive film 635, an electroluminescent layer 631, a second electrode layer 632, and a protective film 633. The thin film transistor 625 includes a semiconductor layer having an impurity region functioning as a source region and a drain region, a gate insulating layer 622, a gate electrode layer having a stacked structure of two layers, a source electrode layer, and a drain electrode layer. Alternatively, the drain electrode layer is in contact with and electrically connected to the impurity region of the semiconductor layer and the first electrode layer 630.

    A light-emitting element 634 in the display device in FIG. 1B includes a first electrode layer 630, a transparent conductive film 635, an electroluminescent layer 631, and a second electrode layer 632. The first electrode layer 630 and the transparent conductive film 635 have a stacked structure, and the first electrode layer 630 includes a film containing an aluminum alloy having at least one kind or plural kinds of molybdenum, titanium, and carbon. An ITSO film is used as the transparent conductive film 635. When the transparent conductive film 635 is stacked as illustrated in FIG. 1B, the first electrode layer 630 can be protected, so that yield is improved. For the second electrode layer 632 in FIG. 1B, a thin silver film that is light-transmitting is used.

    Other components in FIG. 1B may be formed using the same materials as in FIG. In the display device in FIG. 1B, the interlayer film 628 is a silicon nitride oxide film, and the interlayer film 636 is a titanium nitride film. By forming the interlayer film 628 and the interlayer film 636 between the insulating layer 627 and the first electrode layer 630, adhesion between the insulating layer 627 and the first electrode layer 630 can be improved. Further, the titanium nitride film can also serve as a countermeasure against static electricity. A silicon oxide film containing an alkyl group used for the insulating layer 627 may be formed to be thinner than the insulating layer 627 between the silicon nitride oxide film and the titanium nitride film used as the interlayer film 628.

    As described above, by using the present invention, a highly reliable display device can be manufactured. Therefore, a display device with high definition and high image quality can be manufactured with high yield.

(Embodiment 2)
A method for manufacturing the display device in this embodiment will be described in detail with reference to FIGS.

    FIG. 16A is a top view illustrating a structure of a display panel according to the present invention, in which a pixel portion 2701 in which pixels 2702 are arranged in a matrix over a substrate 2700 having an insulating surface, a scanning line side input terminal 2703, a signal A line side input terminal 2704 is formed. The number of pixels may be provided in accordance with various standards. For XGA, 1024 × 768 × 3 (RGB), for UXGA, 1600 × 1200 × 3 (RGB), and for full specification high vision, 1920 × 1080. X3 (RGB) may be used.

    The pixels 2702 are arranged in a matrix by a scan line extending from the scan line side input terminal 2703 and a signal line extending from the signal line side input terminal 2704 intersecting. Each of the pixels 2702 includes a switching element and a pixel electrode layer connected to the switching element. A typical example of a switching element is a TFT. By connecting the gate electrode layer side of the TFT to a scanning line and the source or drain side to a signal line, each pixel can be controlled independently by a signal input from the outside. It is said.

    A TFT includes a semiconductor layer, a gate insulating layer, and a gate electrode layer as main components, and a wiring layer connected to a source region and a drain region formed in the semiconductor layer is attached to the TFT. Structurally, the top gate type in which the semiconductor layer, the gate insulating layer and the gate electrode layer are arranged from the substrate side, and the bottom gate type in which the gate electrode layer, the gate insulating layer and the semiconductor layer are arranged from the substrate side are representative. In the present invention, any of those structures may be used.

    FIG. 16A illustrates a structure of a display panel in which signals input to the scan lines and the signal lines are controlled by an external driver circuit. As illustrated in FIG. 17A, COG (Chip on The driver IC 2751 may be mounted on the substrate 2700 by a glass method. As another mounting mode, a TAB (Tape Automated Bonding) method as shown in FIG. 17B may be used. The driver IC may be formed on a single crystal semiconductor substrate or may be a circuit in which a TFT is formed on a glass substrate. In FIG. 17, the driver IC 2751 is connected to an FPC (Flexible printed circuit) 2750.

    In the case where a TFT provided for a pixel is formed using a crystalline semiconductor, a scan line driver circuit 3702 can be formed over the substrate 3700 and integrated as shown in FIG. In FIG. 16B, the pixel portion 3701 is controlled by an external driver circuit as in FIG. 16A connected to the signal line side input terminal 3704. In the case where a TFT provided for a pixel is formed using a polycrystalline (microcrystalline) semiconductor, a single crystal semiconductor, or the like with high mobility, FIG. 16C illustrates a pixel portion 4701, a scan line driver circuit 4702, and a signal line driver circuit. 4704 can be integrally formed on the substrate 4700.

    Silicon nitride oxide by a sputtering method, a PVD method (Physical Vapor Deposition), a low pressure CVD method (LPCVD method), or a CVD method (Chemical Vapor Deposition) such as a plasma CVD method as a base film over the substrate 100 having an insulating surface. A base film 101a is formed to a thickness of 10 to 200 nm (preferably 50 to 100 nm) using a film (SiNO), and a base film 101b is stacked to a thickness of 50 to 200 nm (preferably 100 to 150 nm) using a silicon oxynitride film (SiON). . In this embodiment, the base film 101a and the base film 101b are formed by a plasma CVD method. As the substrate 100, a glass substrate, a quartz substrate, a silicon substrate, a metal substrate, or a stainless substrate on which an insulating film is formed may be used. Further, a plastic substrate having heat resistance that can withstand the processing temperature of this embodiment may be used, or a flexible substrate such as a film may be used. As the plastic substrate, a substrate made of PET (polyethylene terephthalate), PEN (polyethylene naphthalate) or PES (polyethersulfone) can be used, and as the flexible substrate, a synthetic resin such as acrylic can be used.

As the base film, silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, or the like can be used, and a single layer or a laminated structure of two layers or three layers may be used. Note that in this specification, silicon oxynitride is a substance in which the oxygen content is higher than the nitrogen content, and can also be referred to as silicon oxide containing nitrogen. Similarly, silicon nitride oxide is a substance in which the nitrogen content is higher than the oxygen content, and can be said to be silicon nitride containing oxygen. In this embodiment, a silicon nitride oxide film is formed to a thickness of 50 nm on a substrate using SiH ₄ , NH ₃ , N ₂ O, N _2, and H ₂ as reactive gases, and oxidized using SiH ₄ and N ₂ O as reactive gases. A silicon nitride film is formed with a thickness of 100 nm. The thickness of the silicon nitride oxide film may be 140 nm, and the thickness of the stacked silicon oxynitride film may be 100 nm.

    Next, a semiconductor film is formed over the base film. The semiconductor film may be formed by a known means (a sputtering method, an LPCVD method, a plasma CVD method, or the like) with a thickness of 25 to 200 nm (preferably 30 to 150 nm). In this embodiment mode, it is preferable to use a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film by laser crystallization.

    As a material for forming the semiconductor film, an amorphous semiconductor (hereinafter also referred to as “amorphous semiconductor: AS”) manufactured by a vapor deposition method or a sputtering method using a semiconductor material gas typified by silane or germane is used. A polycrystalline semiconductor obtained by crystallizing a crystalline semiconductor using light energy or thermal energy, or a semi-amorphous (also referred to as microcrystal or microcrystal; hereinafter, also referred to as “SAS”) semiconductor can be used.

SAS is a semiconductor having an intermediate structure between amorphous and crystalline structures (including single crystal and polycrystal) and having a third state that is stable in terms of free energy and has a short-range order and a lattice. It includes a crystalline region with strain. A crystal region of 0.5 to 20 nm can be observed in at least a part of the film, and when silicon is a main component, the Raman spectrum is shifted to a lower wave number side than 520 cm ^−1. Yes. In X-ray diffraction, diffraction peaks of (111) and (220) that are derived from the silicon crystal lattice are observed. At least 1 atomic% or more of hydrogen or halogen for terminating dangling bonds (dangling bonds) is contained. The SAS is formed by glow discharge decomposition (plasma CVD) of a silicide gas. As the silicide gas, SiH ₄ , Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4, and the} like can be used. Further, F ₂ and GeF ₄ may be mixed. This silicide gas may be diluted with H ₂ , or H ₂ and one or more kinds of rare gas elements selected from He, Ar, Kr, and Ne. The dilution rate is in the range of 2 to 1000 times, the pressure is in the range of approximately 0.1 Pa to 133 Pa, and the power supply frequency is 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature is preferably 300 ° C. or lower, and can be formed even at a substrate heating temperature of 100 to 200 ° C. Here, as an impurity element mainly taken in at the time of film formation, impurities derived from atmospheric components such as oxygen, nitrogen, and carbon are preferably 1 × 10 ²⁰ cm ⁻³ or less, and in particular, the oxygen concentration is 5 × 10 5. It is preferable to be ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ cm ⁻³ or less. Further, by adding a rare gas element such as helium, argon, krypton, or neon to further promote lattice distortion, stability is improved and a favorable SAS can be obtained. In addition, a SAS layer formed of a hydrogen-based gas may be stacked on a SAS layer formed of a fluorine-based gas as a semiconductor film.

    A typical example of an amorphous semiconductor is hydrogenated amorphous silicon, and a typical example of a crystalline semiconductor is polysilicon. Polysilicon (polycrystalline silicon) is mainly made of so-called high-temperature polysilicon using polysilicon formed through a process temperature of 800 ° C. or higher as a main material, or polysilicon formed at a process temperature of 600 ° C. or lower. And so-called low-temperature polysilicon, and polysilicon crystallized by adding an element that promotes crystallization. Needless to say, as described above, a semi-amorphous semiconductor or a semiconductor containing a crystal phase in part of a semiconductor film can also be used.

In the case where a crystalline semiconductor film is used as the semiconductor film, a method for manufacturing the crystalline semiconductor film can be a known method (laser crystallization method, thermal crystallization method, or heat using an element that promotes crystallization such as nickel. A crystallization method or the like may be used. In addition, a microcrystalline semiconductor that is a SAS can be crystallized by laser irradiation to improve crystallinity. In the case where an element for promoting crystallization is not introduced, the concentration of hydrogen contained in the amorphous semiconductor film is set to 1 × by heating at 500 ° C. for 1 hour in a nitrogen atmosphere before irradiating the amorphous semiconductor film with laser light. Release to 10 ²⁰ atoms / cm ³ or less. This is because when an amorphous semiconductor film containing a large amount of hydrogen is irradiated with laser light, the amorphous semiconductor film is destroyed. As the heat treatment for crystallization, a heating furnace, laser irradiation, irradiation with light emitted from a lamp (also referred to as lamp annealing), or the like can be used. As a heating method, there are RTA methods such as a GRTA (Gas Rapid Thermal Anneal) method using a heated gas and an LRTA (Lamp Rapid Thermal Anneal) method using a lamp.

    The method of introducing the metal element into the amorphous semiconductor film is not particularly limited as long as the metal element can be present on the surface of the amorphous semiconductor film or inside the amorphous semiconductor film. For example, sputtering, CVD, A plasma treatment method (including a plasma CVD method), an adsorption method, or a method of applying a metal salt solution can be used. Among these, the method using a solution is simple and useful in that the concentration of the metal element can be easily adjusted. At this time, in order to improve the wettability of the surface of the amorphous semiconductor film and to spread the aqueous solution over the entire surface of the amorphous semiconductor film, irradiation with UV light in an oxygen atmosphere, thermal oxidation method, hydroxy radical It is desirable to form an oxide film by treatment with ozone water or hydrogen peroxide.

By using a solid-state laser capable of continuous oscillation and irradiating laser light of the second to fourth harmonics of the fundamental wave, a crystal having a large grain size can be obtained. For example, typically, it is desirable to use the second harmonic (532 nm) or the third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm). Specifically, laser light emitted from a continuous wave YVO ₄ laser is converted into a harmonic by a non-linear optical element to obtain laser light having an output number of W or more. Then, it is preferably formed into a rectangular or elliptical laser beam on the irradiation surface by an optical system and irradiated onto the semiconductor film. At this time, the energy density of about 0.001~100MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation is performed at a scanning speed of about 0.5 to 2000 cm / sec (preferably 10 to 200 cm / sec).

    The laser beam shape is preferably linear. As a result, throughput can be improved. Further, the laser may be irradiated with an incident angle θ (0 <θ <90 degrees) with respect to the semiconductor film. This is because laser interference can be prevented.

    Laser irradiation can be performed by relatively scanning such a laser and the semiconductor film. In laser irradiation, a marker can be formed in order to superimpose beams with high accuracy and to control the laser irradiation start position and laser irradiation end position. The marker may be formed on the substrate simultaneously with the amorphous semiconductor film.

As the laser, a continuous wave or pulsed gas laser, solid state laser, copper vapor laser, gold vapor laser, or the like can be used. Examples of the gas laser include an excimer laser, an Ar laser, a Kr laser, and a He—Cd laser, and the solid laser includes a YAG laser, a YVO ₄ laser, a YLF laser, a YAlO ₃ laser, a Y ₂ O ₃ laser, a glass laser, and a ruby laser. Alexandrite laser, Ti: sapphire laser, and the like.

    Further, the laser crystallization may be performed using a frequency band significantly higher than a frequency band of several tens to several hundreds Hz that is usually used with an oscillation frequency of pulsed laser light of 0.5 MHz or more. It is said that the time from irradiating a semiconductor film with laser light by pulse oscillation until the semiconductor film is completely solidified is several tens to several hundreds nsec. Therefore, by using the above frequency band, it is possible to irradiate the next pulse of laser light from when the semiconductor film is melted by the laser light to solidification. Accordingly, since the solid-liquid interface can be continuously moved in the semiconductor film, a semiconductor film having crystal grains continuously grown in the scanning direction is formed. Specifically, a set of crystal grains having a width of 10 to 30 μm in the scanning direction of the included crystal grains and a width of about 1 to 5 μm in a direction perpendicular to the scanning direction can be formed. By forming single crystal grains extending long along the scanning direction, a semiconductor film having almost no crystal grain boundary at least in the channel direction of the thin film transistor can be formed.

    Further, laser light may be irradiated in an inert gas atmosphere such as a rare gas or nitrogen. Accordingly, the surface roughness of the semiconductor can be suppressed by laser light irradiation, and variations in threshold values caused by variations in interface state density can be suppressed.

    Crystallization of the amorphous semiconductor film may be a combination of heat treatment and crystallization by laser light irradiation, or may be performed multiple times by heat treatment or laser light irradiation alone.

In this embodiment, an amorphous semiconductor film is formed over the base film 101b, and the crystalline semiconductor film is formed by crystallizing the amorphous semiconductor film. As the amorphous semiconductor film, amorphous silicon formed using a reactive gas of SiH ₄ and H ₂ is used. In this embodiment mode, the base film 101a, the base film 101b, and the amorphous semiconductor film are formed continuously while switching the reaction gas at the same temperature of 330 ° C. without breaking the vacuum in the same chamber.

    After removing the oxide film formed on the amorphous semiconductor film, the oxide film is made 1 by irradiation with UV light in an oxygen atmosphere, a thermal oxidation method, treatment with ozone water containing hydrogen radicals or hydrogen peroxide, and the like. Form ~ 5 nm. In this embodiment mode, Ni is used as an element for promoting crystallization. An aqueous solution containing 10 ppm of Ni acetate is applied by spin coating.

    In this embodiment mode, heat treatment is performed at 750 ° C. for 3 minutes by an RTA method, and then an oxide film formed over the semiconductor film is removed and laser light is irradiated. The amorphous semiconductor film is crystallized by the above crystallization treatment and formed as a crystalline semiconductor film.

    When crystallization using a metal element is performed, a gettering step is performed in order to reduce or remove the metal element. In this embodiment mode, a metal element is captured using an amorphous semiconductor film as a gettering sink. First, an oxide film is formed over the crystalline semiconductor film by irradiation with UV light in an oxygen atmosphere, a thermal oxidation method, treatment with ozone water containing hydroxyl radicals or hydrogen peroxide, and the like. The oxide film is preferably thickened by heat treatment. Next, an amorphous semiconductor film is formed to a thickness of 50 nm by a plasma CVD method (conditions 350 W and 35 Pa in this embodiment).

Thereafter, heat treatment is performed at 744 ° C. for 3 minutes by the RTA method to reduce or remove the metal element. The heat treatment may be performed in a nitrogen atmosphere. Then, the amorphous semiconductor film serving as the gettering sink and the oxide film formed over the amorphous semiconductor film are removed by hydrofluoric acid or the like, and the crystalline semiconductor film 102 in which the metal element is reduced or removed is removed. Can be obtained (see FIG. 2A). In this embodiment mode, the amorphous semiconductor film serving as a gettering sink is removed using TMAH (Tetramethyl ammonium hydroxide).

    In order to control the threshold voltage of the thin film transistor, the semiconductor film thus obtained may be doped with a trace amount of impurity element (boron or phosphorus). This doping of the impurity element may be performed on the amorphous semiconductor film before the crystallization step. When the impurity element is doped in the state of the amorphous semiconductor film, the impurity can be activated by heat treatment for subsequent crystallization. In addition, defects and the like generated during doping can be improved.

    Next, the crystalline semiconductor film 102 is processed into a desired shape using a mask. In this embodiment mode, after the oxide film formed over the crystalline semiconductor film 102 is removed, a new oxide film is formed. Then, a photomask is manufactured, and the semiconductor layer 103, the semiconductor layer 104, the semiconductor layer 105, and the semiconductor layer 106 are formed by processing using a photolithography method.

As the etching process, either plasma etching (dry etching) or wet etching may be employed, but plasma etching is suitable for processing a large area substrate. As an etching gas, a fluorine-based or chlorine-based gas such as CF ₄ , NF ₃ , Cl ₂ , or BCl ₃ may be used, and an inert gas such as He or Ar may be appropriately added. Further, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

    In the present invention, a conductive layer for forming a wiring layer or an electrode layer, a mask layer for forming a predetermined pattern, or the like may be formed by a method capable of selectively forming a pattern such as a droplet discharge method. . A droplet discharge (ejection) method (also called an ink-jet method depending on the method) is a method in which a droplet of a composition prepared for a specific purpose is selectively ejected (ejection) to form a predetermined pattern (such as a conductive layer or a conductive layer). An insulating layer or the like can be formed. At this time, a process for controlling wettability and adhesion may be performed on the formation region. In addition, a method by which a pattern can be transferred or drawn, for example, a printing method (a method for forming a pattern such as screen printing or offset printing) can be used.

In this embodiment mode, a resin material such as an epoxy resin, an acrylic resin, a phenol resin, a novolac resin, a melamine resin, or a urethane resin is used as a mask to be used. Also, organic materials such as benzocyclobutene, parylene, flare, permeable polyimide, compound materials made by polymerization of siloxane polymers, composition materials containing water-soluble homopolymers and water-soluble copolymers, etc. are used. You can also Alternatively, a commercially available resist material containing a photosensitizer may be used. For example, a novolak resin that is a typical positive resist and a naphthoquinonediazide compound that is a photosensitizer, a base resin that is a negative resist, diphenylsilanediol, and An acid generator or the like may be used. When using the droplet discharge method, regardless of which material is used, the surface tension and viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

    The oxide film over the semiconductor layer is removed, and a gate insulating layer 107 is formed to cover the semiconductor layer 103, the semiconductor layer 104, the semiconductor layer 105, and the semiconductor layer 106. The gate insulating layer 107 is formed of an insulating film containing silicon with a thickness of 10 to 150 nm using a plasma CVD method, a sputtering method, or the like. The gate insulating layer 107 may be formed using a known material such as silicon nitride, silicon oxide, silicon oxynitride, or silicon oxide or nitride material typified by silicon nitride oxide, and may be a stacked layer or a single layer. . Further, the insulating layer may be a three-layer stack of a silicon nitride film, a silicon oxide film, and a silicon nitride film, or a stack of a single layer and two layers of a silicon oxynitride film. A silicon nitride film having a dense film quality is preferably used. Further, a thin silicon oxide film with a thickness of 1 to 100 nm, preferably 1 to 10 nm, more preferably 2 to 5 nm may be formed between the semiconductor layer and the gate insulating layer. As a method for forming a thin silicon oxide film, a thin silicon oxide film can be formed by oxidizing the surface of the semiconductor region using a GRTA method, an LRTA method, or the like to form a thermal oxide film. Note that in order to form a dense insulating film with low gate leakage current at a low deposition temperature, a rare gas element such as argon is preferably contained in a reaction gas and mixed into the formed insulating film. In this embodiment, a silicon oxynitride film is formed to a thickness of 115 nm as the gate insulating layer 107.

    Next, a first conductive film 108 with a thickness of 20 to 100 nm and a second conductive film 109 with a thickness of 100 to 400 nm which are used as a gate electrode layer are stacked over the gate insulating layer 107 (FIG. 2 ( See B). The first conductive film 108 and the second conductive film 109 can be formed by a known method such as a sputtering method, an evaporation method, or a CVD method. The first conductive film 108 and the second conductive film 109 are tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), neodymium. An element selected from (Nd) or an alloy material or compound material containing the element as a main component may be used. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus, or an AgPdCu alloy may be used as the first conductive film 108 and the second conductive film 109. The structure is not limited to a two-layer structure. For example, a tungsten film with a thickness of 50 nm is used as the first conductive film, an aluminum-silicon alloy (Al-Si) film with a thickness of 500 nm is used as the second conductive film, The conductive film may have a three-layer structure in which titanium nitride films with a thickness of 30 nm are sequentially stacked. In the case of a three-layer structure, tungsten nitride may be used instead of tungsten of the first conductive film, or aluminum instead of the aluminum and silicon alloy (Al-Si) film of the second conductive film. A titanium alloy film (Al—Ti) may be used, or a titanium film may be used instead of the titanium nitride film of the third conductive film. Moreover, a single layer structure may be sufficient. In this embodiment, tantalum nitride (TaN) is formed to a thickness of 30 nm as the first conductive film 108 and tungsten (W) is formed to a thickness of 370 nm as the second conductive film 109.

Next, a resist mask 110a, a mask 110b, a mask 110c, a mask 110d, and a mask 110f are formed by photolithography, and the first conductive film 108 and the second conductive film 109 are processed into desired shapes. The first gate electrode layer 121, the first gate electrode layer 122, the first gate electrode layer 124, the first gate electrode layer 125, the first gate electrode layer 126, the conductive layer 111, and the conductive layer 112, a conductive layer 114, a conductive layer 115, and a conductive layer 116 are formed (see FIG. 2C). ICP (Inductively Coupled Plasma) etching method, etching conditions (amount of power applied to coil-type electrode layer, amount of power applied to substrate-side electrode layer, substrate-side electrode temperature, etc.) By appropriately adjusting the first gate electrode layer 121, the first gate electrode layer 122, the first gate electrode layer 124, the first gate electrode layer 125, the first gate electrode layer 126, and the conductive The layer 111, the conductive layer 112, the conductive layer 114, the conductive layer 115, and the conductive layer 116 can be etched to have a desired tapered shape. In addition, the taper shape can control the angle and the like by the shapes of the mask 110a, the mask 110b, the mask 110d, and the mask 110f. As the etching gas, a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl ₄ or CCl ₄ , a fluorine-based gas typified by CF ₄ , C ₂ F ₈ , SF ₆ or NF _3, or the like O ₂ can be used as appropriate. In this embodiment mode, the second conductive film 109 is etched using an etching gas composed of CF ₄ , Cl ₂ , and O ₂ , and then continuously etched using an etching gas composed of CF ₄ and Cl ₂ . The first conductive film 108 is etched.

Next, the conductive layer 111, the conductive layer 112, the conductive layer 114, the conductive layer 115, and the conductive layer 116 are processed into desired shapes using the mask 110a, the mask 110b, the mask 110d, and the mask 110f. At this time, the conductive layer is etched under an etching condition with a high selection ratio between the second conductive film 109 that forms the conductive layer and the first conductive film 108 that forms the first gate electrode layer. By this etching, the conductive layer 111, the conductive layer 112, the conductive layer 114, the conductive layer 115, and the conductive layer 116 are etched, and the second gate electrode layer 131, the second gate electrode layer 132, and the second gate electrode layer are etched. 134, a second gate electrode layer 135, and a second gate electrode layer 136 are formed. In this embodiment mode, the third conductive layer also has a tapered shape, and the taper angles thereof are the first gate electrode layer 121, the first gate electrode layer 122, the first gate electrode layer 124, It is larger than the taper angle of the first gate electrode layer 125 and the first gate electrode layer 126. Note that the taper angle is an angle of a side surface with respect to the surfaces of the first gate electrode layer, the second gate electrode layer, and the conductive layer. Therefore, when the taper angle is increased and the angle is 90 degrees, the conductive layer has a vertical side surface and does not have a tapered shape. In this embodiment mode, Cl ₂ , SF ₆ , and O ₂ are used as an etching gas for forming the second gate electrode layer.

    In this embodiment, since the first gate electrode layer, the conductive layer, and the second gate electrode layer are formed to have a tapered shape, both of the two gate electrode layers have a tapered shape. However, the present invention is not limited thereto, and only one gate electrode layer may have a tapered shape, and the other may have a vertical side surface by anisotropic etching. As in this embodiment, the taper angle may be different between the stacked gate electrode layers, or may be the same. By having a tapered shape, the coverage of a film stacked thereon is improved and defects are reduced, so that reliability is improved.

    Through the above steps, the peripheral driver circuit region 204 includes the gate electrode layer 117 including the first gate electrode layer 121 and the second gate electrode layer 131, and includes the first gate electrode layer 122 and the second gate electrode layer 132. The gate electrode layer 118 includes a gate electrode layer 127 including a first gate electrode layer 124 and a second gate electrode layer 134, and a gate electrode including a first gate electrode layer 125 and a second gate electrode layer 135. A gate electrode layer 129 including the layer 128, the first gate electrode layer 126, and the second gate electrode layer 136 can be formed (see FIG. 2D). In this embodiment mode, the gate electrode layer is formed by dry etching, but may be wet etching.

    The gate insulating layer 107 may be slightly etched by an etching process when forming the gate electrode layer, and the film thickness may be reduced (so-called film reduction).

    When forming the gate electrode layer, a thin film transistor capable of high-speed operation can be formed by reducing the width of the gate electrode layer. Two methods for forming the gate electrode layer with a narrow width in the channel direction are described below.

    In the first method, after a mask for the gate electrode layer is formed, the mask is slimmed in the width direction by etching, ashing, or the like to form a mask having a narrower width. By using a mask formed in advance in a narrow shape, the gate electrode layer can also be formed in a narrow shape.

    Next, in the second method, a normal mask is formed, and a gate electrode layer is formed using the mask. Next, the obtained gate electrode layer is further thinned by side etching in the width direction. Therefore, a narrow gate electrode layer can be finally formed. Through the above steps, a thin film transistor with a short channel length can be formed later, and a thin film transistor capable of high-speed operation can be manufactured.

Next, an impurity element 151 imparting n-type conductivity is added using the gate electrode layer 117, the gate electrode layer 118, the gate electrode layer 127, the gate electrode layer 128, and the gate electrode layer 129 as a mask, and the first n-type impurity region is added. 140a, first n-type impurity region 140b, first n-type impurity region 141a, first n-type impurity region 141b, first n-type impurity region 142a, first n-type impurity region 142b, first An n-type impurity region 142c, a first n-type impurity region 143a, and a first n-type impurity region 143b are formed (see FIG. 3A). In this embodiment, phosphine (PH ₃ ) (doping gas is PH ₃ diluted with hydrogen (H ₂ ), and the ratio of PH _{3 in} the gas is 5%) is used as a doping gas containing an impurity element. Doping is performed at a gas flow rate of 80 sccm, a beam current of 54 μA / cm, an acceleration voltage of 50 kV, and an added dose of 7.0 × 10 ¹³ ions / cm ² . Here, the first n-type impurity region 140a, the first n-type impurity region 140b, the first n-type impurity region 141a, the first n-type impurity region 141b, the first n-type impurity region 142a, the first In the n-type impurity region 142b, the first n-type impurity region 142c, the first n-type impurity region 143a, and the first n-type impurity region 143b, an impurity element imparting n-type conductivity is 1 × 10 ^{17 to} 5 ×. It is added so as to be contained at a concentration of about 10 ¹⁸ / cm ³ . In this embodiment mode, phosphorus (P) is used as the impurity element imparting n-type conductivity.

In this embodiment, a region where the impurity region overlaps with the gate electrode layer through the gate insulating layer is referred to as a Lov region, and a region where the impurity region does not overlap with the gate electrode layer through the gate insulating layer is referred to as a Loff region. In FIG. 3, hatching and white background are shown in the impurity region, but this does not indicate that the impurity element is not added to the white background part, but the concentration distribution of the impurity element in this region is mask or doping. This is because it is possible to intuitively understand that the conditions are reflected. This also applies to other drawings in this specification.

Next, a mask 153a, a mask 153b, a mask 153c, and a mask 153d that cover the semiconductor layer 103, part of the semiconductor layer 105, and the semiconductor layer 106 are formed. An n-type impurity element 152 is added using the mask 153a, the mask 153b, the mask 153c, the mask 153d, and the second gate electrode layer 132 as a mask, and the second n-type impurity region 144a and the second n-type impurity region are added. 144b, a third n-type impurity region 145a, a third n-type impurity region 145b, a second n-type impurity region 147a, a second n-type impurity region 147b, a second n-type impurity region 147c, a third An n-type impurity region 148a, a third n-type impurity region 148b, a third n-type impurity region 148c, and a third n-type impurity region 148d are formed. In this embodiment, PH ₃ (doping gas is PH ₃ diluted with hydrogen (H ₂ ) and the ratio of PH _{3 in} the gas is 5%) is used as a doping gas containing an impurity element, and the gas flow rate is 80 sccm. Doping is performed with a beam current of 540 μA / cm, an acceleration voltage of 70 kV, and a dose of 5.0 × 10 ¹⁵ ions / cm ² to be added. Here, the second n-type impurity region 144a and the second n-type impurity region 144b are added so that the impurity element imparting n-type is included at a concentration of about 5 × 10 ^{19 to} 5 × 10 ²⁰ / cm ^3. To do. The third n-type impurity region 145a and the third n-type impurity region 145b include a third n-type impurity region 148a, a third n-type impurity region 148b, a third n-type impurity region 148c, and a third n-type impurity region 148a. It is formed so as to contain an impurity element imparting n-type at a concentration similar to or slightly higher than that of the type impurity region 148d. Further, a channel formation region 146 is formed in the semiconductor layer 104, and a channel formation region 149a and a channel formation region 149b are formed in the semiconductor layer 105 (see FIG. 3B).

    The second n-type impurity region 144a, the second n-type impurity region 144b, the second n-type impurity region 147a, the second n-type impurity region 147b, and the second n-type impurity region 147c are high-concentration n-type impurities. It is a region and functions as a source and a drain. On the other hand, a third n-type impurity region 145a, a third n-type impurity region 145b, a third n-type impurity region 148a, a third n-type impurity region 148b, a third n-type impurity region 148c, and a third The n-type impurity region 148d is a low concentration impurity region and becomes an LDD (Lightly Doped Drain) region. Since the n-type impurity region 145a and the n-type impurity region 145b are covered with the first gate electrode layer 122 through the gate insulating layer 107, they are Lov regions, which relieve an electric field in the vicinity of the drain and are caused by hot carriers. It is possible to suppress deterioration of on-current. As a result, a thin film transistor capable of high speed operation can be formed. On the other hand, the third n-type impurity region 148a, the third n-type impurity region 148b, the third n-type impurity region 148c, and the third n-type impurity region 148d are covered with the gate electrode layer 127 and the gate electrode layer 128. Therefore, the electric field in the vicinity of the drain is relaxed to prevent deterioration due to hot carrier injection and to reduce the off current. As a result, a highly reliable semiconductor device with low power consumption can be manufactured.

Next, the mask 153a, the mask 153b, the mask 153c, and the mask 153d are removed, and a mask 155a and a mask 155b that cover the semiconductor layer 103 and the semiconductor layer 105 are formed. An impurity element 154 imparting p-type conductivity is added using the mask 155a, the mask 155b, the gate electrode layer 117, and the gate electrode layer 129 as a mask, and the first p-type impurity region 160a, the first p-type impurity region 160b, and the first P-type impurity region 163a, first p-type impurity region 163b, second p-type impurity region 161a, second p-type impurity region 161b, second p-type impurity region 164a, and second p-type impurity region 164b is formed. In this embodiment, since boron (B) is used as the impurity element, diborane (B ₂ H ₆ ) (doping gas is obtained by diluting B ₂ H ₆ with hydrogen (H ₂ ) as a doping gas containing the impurity element. The ratio of B ₂ H ₆ in the gas is 15%), and doping is performed at a gas flow rate of 70 sccm, a beam current of 180 μA / cm, an acceleration voltage of 80 kV, and a dose of 2.0 × 10 ¹⁵ ions / cm ² to be added. Here, the first p-type impurity region 160a, the first p-type impurity region 160b, the first p-type impurity region 163a, the first p-type impurity region 163b, the second p-type impurity region 161a, and the second The p-type impurity region 161b, the second p-type impurity region 164a, and the second p-type impurity region 164b contain an impurity element imparting p-type at a concentration of about 1 × 10 ^{20 to} 5 × 10 ²¹ / cm ^3. Add as required. In this embodiment, the second p-type impurity region 161a, the second p-type impurity region 161b, the second p-type impurity region 164a, and the second p-type impurity region 164b include the gate electrode layer 117 and the gate electrode. Reflecting the shape of the layer 129, the concentration is lower than that of the first p-type impurity region 160a, the first p-type impurity region 160b, the first p-type impurity region 163a, and the first p-type impurity region 163b in a self-aligned manner. It forms so that it becomes. In addition, a channel formation region 162 is formed in the semiconductor layer 103 and a channel formation region 165 is formed in the semiconductor layer 106 (see FIG. 3C).

    The second n-type impurity region 144a, the second n-type impurity region 144b, the second n-type impurity region 147a, the second n-type impurity region 147b, and the second n-type impurity region 147c are high-concentration n-type impurities. It is a region and functions as a source and a drain. On the other hand, the second p-type impurity region 161a, the second p-type impurity region 161b, the second p-type impurity region 164a, and the second p-type impurity region 164b are low-concentration impurity regions, and are LDD (Lightly Doped Drain). It becomes an area. The second p-type impurity region 161a, the second p-type impurity region 161b, the second p-type impurity region 164a, and the second p-type impurity region 164b are connected to the first gate electrode through the gate insulating layer 107. Since it is covered with the layer 121 and the first gate electrode layer 126, it is a Lov region, and an electric field in the vicinity of the drain can be relaxed and deterioration of on-current due to hot carriers can be suppressed.

The masks 155a and 155b are removed by O ₂ ashing or resist stripping solution, and the oxide film is also removed. After that, an insulating film, so-called sidewall, may be formed so as to cover the side surface of the gate electrode layer. The sidewall can be formed using an insulating film containing silicon by a plasma CVD method or a low pressure CVD (LPCVD) method.

    In order to activate the impurity element, heat treatment, intense light irradiation, or laser light irradiation may be performed. Simultaneously with activation, plasma damage to the gate insulating layer and plasma damage to the interface between the gate insulating layer and the semiconductor layer can be recovered.

    Next, an interlayer insulating layer is formed to cover the gate electrode layer and the gate insulating layer. In this embodiment, a stacked structure of the insulating film 167 and the insulating film 168 is employed (see FIG. 4A). A silicon nitride oxide film with a thickness of 100 nm is formed as the insulating film 167, and an insulating film with a thickness of 900 nm is formed as the insulating film 168 to have a stacked structure. Further, a silicon oxynitride film is formed to a thickness of 30 nm, a silicon nitride oxide film is formed to a thickness of 140 nm, a silicon oxynitride film is formed to a thickness of 800 nm, and the three-layer stack is formed to cover the gate electrode layer and the gate insulating layer. It is good also as a structure. In this embodiment, the insulating film 167 and the insulating film 168 are continuously formed using a plasma CVD method as in the case of the base film. The insulating film 167 and the insulating film 168 are not limited to the above materials, and may be a silicon nitride film, a silicon nitride oxide film, a silicon oxynitride film, a silicon oxide film formed by sputtering or plasma CVD, or other silicon. An insulating film containing may be used as a single layer or a stacked structure of three or more layers.

    Further, a heat treatment is performed at 300 to 550 ° C. for 1 to 12 hours in a nitrogen atmosphere to perform a step of hydrogenating the semiconductor layer. Preferably, it carries out at 400-500 degreeC. This step is a step of terminating dangling bonds in the semiconductor layer with hydrogen contained in the insulating film 167 which is an interlayer insulating layer. In this embodiment, heat treatment is performed at 410 ° C. for 1 hour.

    In addition, as the insulating films 167 and 168, aluminum nitride (AlN), aluminum oxynitride (AlON), aluminum nitride oxide (AlNO) or aluminum oxide in which the nitrogen content is higher than the oxygen content, diamond like carbon (DLC) A nitrogen-containing carbon film (CN) can be formed of a material selected from substances including other inorganic insulating materials. A siloxane material may also be used. Note that the siloxane material corresponds to a resin including a Si—O—Si bond. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent. Moreover, an organic insulating material may be used, and as the organic material, polyimide, acrylic, polyamide, polyimide amide, resist, benzocyclobutene, or polysilazane can be used. A coating film formed by a coating method with good flatness may be used.

Next, contact holes (openings) reaching the semiconductor layers are formed in the insulating film 167, the insulating film 168, and the gate insulating layer 107 using a resist mask. Etching may be performed once or a plurality of times depending on the selection ratio of the material to be used. In this embodiment, the first etching is performed under a condition in which the insulating film 168 that is a silicon oxynitride film, the insulating film 167 that is a silicon nitride oxide film, and the gate insulating layer 107 have a selection ratio, and the insulating film 168 is formed. Remove. Next, the insulating film 167 and the gate insulating layer 107 are removed by second etching, and the first p-type impurity region 160a, the first p-type impurity region 160b, and the first p-type which are source regions or drain regions are removed. The impurity region 163a, the first p-type impurity region 163b, the second n-type impurity region 144a, the second n-type impurity region 144b, the second n-type impurity region 147a, and the second n-type impurity region 147b are reached. An opening is formed. In this embodiment mode, the first etching is performed by wet etching, and the second etching is performed by dry etching. As an etchant for wet etching, a hydrofluoric acid-based solution such as a mixed solution containing ammonium hydrogen fluoride and ammonium fluoride is preferably used. As an etching gas, a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl ₄ or CCl ₄ , a fluorine-based gas typified by CF ₄ , SF ₆ or NF _3, or O ₂ is appropriately used. it can. Further, an inert gas may be added to the etching gas used. As the inert element to be added, one or more elements selected from He, Ne, Ar, Kr, and Xe can be used.

    A conductive film is formed so as to cover the opening, and the conductive film is etched to be electrically connected to a part of each source region or drain region, respectively, a source or drain electrode layer 169a, a source electrode layer or a drain electrode layer 169b, source / drain electrode layer 170a, source / drain electrode layer 170b, source / drain electrode layer 171a, source / drain electrode layer 171b, source / drain electrode layer 172a, source electrode layer Alternatively, the drain electrode layer 172b is formed. The source electrode layer or the drain electrode layer can be formed by forming a conductive film by a PVD method, a CVD method, an evaporation method, or the like and then etching the conductive film into a desired shape. Further, the conductive layer can be selectively formed at a predetermined place by a droplet discharge method, a printing method, an electroplating method, or the like. Furthermore, a reflow method or a damascene method may be used. The material of the source electrode layer or the drain electrode layer is Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, Al, Ta, Mo, Cd, Zn, Fe, Ti, Si, Ge, Zr, Ba Or a metal nitride thereof or a metal nitride thereof. Moreover, it is good also as these laminated structures. In this embodiment, titanium (Ti) is formed to a thickness of 60 nm, a titanium nitride film is formed to a thickness of 40 nm, aluminum is formed to a thickness of 700 nm, and titanium (Ti) is formed to a thickness of 200 nm to form a stacked structure. Process into the desired shape.

    Through the above steps, a p-channel thin film transistor 173 having a p-type impurity region in the Lov region in the peripheral driver circuit region 204, an n-channel thin film transistor 174 having an n-channel impurity region in the Lov region, and an n-channel thin film transistor 174 in the pixel region 206 in the Loff region. An active matrix substrate including a multi-channel n-channel thin film transistor 175 having a p-type impurity region and a p-channel thin film transistor 176 having a p-type impurity region in the Lov region can be manufactured (see FIG. 4B).

    The active matrix substrate can be used for a light emitting device having a self light emitting element, a liquid crystal display device having a liquid crystal element, and other display devices. Further, it can be used for various processors typified by a CPU (Central Processing Unit) and a semiconductor device such as a card equipped with an ID chip.

    Without being limited to this embodiment mode, the thin film transistor may have a single gate structure in which one channel formation region is formed, a double gate structure in which two channel formation regions are formed, or a triple gate structure in which three channel formation regions are formed. The thin film transistor in the peripheral driver circuit region may have a single gate structure, a double gate structure, or a triple gate structure.

    Note that, not limited to the method for manufacturing the thin film transistor described in this embodiment mode, a top gate type (planar type), a bottom gate type (reverse stagger type), or 2 arranged above and below a channel region with a gate insulating film interposed therebetween. The present invention can also be applied to a dual gate type or other structure having two gate electrode layers.

    Next, an insulating layer 181 is formed as a second interlayer insulating layer, and an interlayer film 180 is formed between the insulating layer 181 and the first electrode layer 396 (see FIG. 5A). FIG. 5 shows a manufacturing process of a display device. A separation region 201 for separation by scribing, an external terminal connection region 202 as an FPC pasting portion, a wiring region 203 as a peripheral wiring region, They are a drive circuit area 204 and a pixel area 206. The wiring region 203 is provided with wirings 179a and 179b, and the external terminal connection region 202 is provided with a terminal electrode layer 178 that is connected to an external terminal.

    The interlayer film 180 and the insulating layer 181 include silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum nitride (AlN), aluminum oxynitride (AlON), and aluminum nitride oxide having a nitrogen content higher than the oxygen content ( AlNO) or aluminum oxide, diamond-like carbon (DLC), nitrogen-containing carbon film (CN), PSG (phosphorus glass), BPSG (phosphorus boron glass), alumina film, and other inorganic insulating materials. Can be made of material. A siloxane material (inorganic siloxane or organic siloxane) may also be used. Further, an organic insulating material may be used, and the organic material may be either photosensitive or non-photosensitive, such as polyimide, acrylic, polyamide, polyimide amide, resist or benzocyclobutene, polysilazane, and low dielectric constant Low. k material can be used.

    In this embodiment mode, an interlayer insulating layer provided for planarization is required to have high heat resistance, high insulating property, and a high planarization rate. It is preferable to use a coating method typified by a coating method. In this embodiment, the interlayer film 180 has a function of improving adhesion between the insulating layer 181 and the first electrode layer 396, and a silicon nitride oxide film and a titanium nitride film are stacked over the insulating layer 181. Form. A silicon nitride oxide film is formed with a thickness of 50 nm by CVD, and a titanium nitride film is formed thereon with a thickness of 10 nm by sputtering. The interlayer film 180 improves the adhesion between the insulating layer 181 and the first electrode layer 396, so that the reliability and yield of the manufactured display device are also improved.

    In this embodiment, as the material of the insulating layer 181, a coating film using a siloxane material is used. The film after baking can be called a silicon oxide film (SiOx) containing alkyl groups (x = 1, 2,...). This silicon oxide film containing an alkyl group can withstand heat treatment at 300 ° C. or higher.

    For the interlayer film 180 and the insulating layer 181, dipping, spray coating, doctor knife, roll coater, curtain coater, knife coater, CVD method, vapor deposition method, or the like can be employed. The interlayer film 180 and the insulating layer 181 may be formed by a droplet discharge method. When the droplet discharge method is used, the material liquid can be saved. Further, a method capable of transferring or drawing a pattern, such as a droplet discharge method, for example, a printing method (a method for forming a pattern such as screen printing or offset printing) or the like can be used.

    Next, as illustrated in FIG. 5B, openings are formed in the insulating layer 181 and the interlayer film 180 which are second interlayer insulating layers. The interlayer film 180 and the insulating layer 181 need to be etched over a wide area in the connection region (not shown), the wiring region 203, the external terminal connection region 202, the separation region 201, and the like. However, in the pixel region 206, the opening area is very small and finer than the opening area of the connection region or the like. Therefore, by providing the photolithography process for forming the opening in the pixel region and the photolithography process for forming the opening in the connection region, the margin of the etching condition can be further widened. As a result, the yield can be improved. Further, since the margin of the etching condition is widened, the contact hole formed in the pixel region can be formed with high accuracy.

    Specifically, wide-area openings are formed in the interlayer film 180 and the insulating layer 181 provided in part of the connection region, the wiring region 203, the external terminal connection region 202, the separation region 201, and the peripheral driver circuit region 204. . Therefore, a mask is formed so as to cover the pixel region 206, part of the connection region, and part of the interlayer film 180 and the insulating layer 181 of the peripheral driver circuit region 204. For the etching, a parallel plate RIE apparatus or an ICP etching apparatus can be used. Note that the etching time is preferably set so that the wiring layer and the first interlayer insulating layer are over-etched. When the over-etching is performed as described above, it is possible to reduce the film thickness variation in the substrate and the etching rate variation. In this way, the openings 183 are formed in the external terminal connection regions 202, respectively.

    After that, a fine opening, that is, a contact hole is formed in the interlayer film 180 and the insulating layer 181 in the pixel region 206 (see FIG. 5C). At this time, a mask is formed so as to cover the pixel region 206, the peripheral driver circuit region 204, and the pixel region 206. The mask is a mask for forming an opening in the pixel region 206, and a fine opening is provided at a predetermined location. As such a mask, for example, a resist mask can be used.

    Then, the interlayer film 180 and the insulating layer 181 are etched using a parallel plate RIE apparatus. Note that the etching time is preferably set so that the wiring layer and the first interlayer insulating layer are over-etched. When the over-etching is performed as described above, it is possible to reduce the film thickness variation in the substrate and the etching rate variation.

    An ICP apparatus may be used as the etching apparatus. Through the above process, an opening 184 reaching the source or drain electrode layer 172a is formed in the pixel region 206. In addition, the source electrode layer or the drain electrode layer connected to the first electrode layer can be formed in a region where many thin films are stacked and the total film thickness is large. In the thin film transistor of this embodiment, a source electrode layer or a drain electrode layer is preferably formed over the gate electrode layer. In this case, since it is not necessary to open the opening 184 deeply, the opening process can be shortened and controllability is improved. In addition, since the electrode layer formed in the opening does not need to cover the opening having a large angle widely, it can be formed with good coverage and reliability is improved.

    In this embodiment mode, a mask that covers a part of the wiring region 203, the external terminal connection region 202, the separation region 201, and the peripheral driver circuit region 204 and has a predetermined opening in the pixel region 206 is used. Although the case where the insulating layer 181 is etched has been described, the present invention is not limited to this. For example, since the opening of the connection region has a large area, the etching amount is large. Such a wide-area opening may be etched a plurality of times. Further, in the case where a deep opening is formed as compared with other openings, etching may be performed a plurality of times in the same manner. Therefore, only a part of the interlayer film 180 and the insulating layer 181 in the wiring region 203, the external terminal connection region 202, the separation region 201, and the peripheral driver circuit region 204 is covered, and a mask provided with a predetermined opening is provided in the pixel region 206. Alternatively, the interlayer film 180 and the insulating layer 181 may be etched.

In this embodiment mode, the openings in the interlayer film 180 and the insulating layer 181 are formed in a plurality of times as shown in FIGS. 5B and 5C. However, the openings are formed by one etching process. You may do it. In this case, using an ICP apparatus, etching is performed with an ICP power of 7000 W, a bias power of 1000 W, a pressure of 0.8 Pascal (Pa), CF ₄ as an etching gas of 240 sccm, and O ₂ of 160 sccm. The bias power is preferably 1000 to 4000 W. Since the opening can be formed by one etching process, there is an advantage that the process is simplified.

    Next, a first electrode layer 396 (also referred to as a pixel electrode layer) is formed so as to be in contact with the source or drain electrode layer 172a.

    In this embodiment, a light-emitting element is used as a display element and light from the light-emitting element is extracted from the second electrode layer 189 side; therefore, the first electrode layer 185 has reflectivity. The first electrode layer 396 is formed using a material containing at least one of Al (aluminum), Mo (molybdenum), Ti (titanium), and C (carbon), or etched into a desired shape. Thus, the first electrode layer 396 is formed. In this embodiment, a stack of a silicon nitride oxide film and a titanium nitride film is used for the interlayer film 180. Since the titanium nitride film has conductivity, the first electrode layer 396 is formed into a desired shape. When processing, the interlayer film 180 is also processed.

    In the present invention, a film containing an aluminum alloy including at least one kind or plural kinds of molybdenum, titanium, and carbon is used for the first electrode layer 396 which is a reflective electrode layer. In this embodiment, an Al (Mo) film is used for the first electrode layer 396. The thickness of the first electrode layer 396 may be 20 nm to 200 nm, preferably 35 nm to 100 nm. In this embodiment mode, the film is formed with a film thickness of 35 nm by a sputtering method. A film containing an aluminum alloy having at least one of molybdenum, titanium, and carbon, or a plurality of kinds of carbon is difficult to crystallize even when heat treatment is performed, and the film surface has excellent flatness. Furthermore, it has high reflectivity with respect to light in the vicinity of the visible light region, and can efficiently reflect light. A film containing an aluminum alloy having at least one or more of molybdenum, titanium, and carbon has an excellent advantage of being non-toxic and safe for the human body and the environment (see FIG. 6A). .)

    In a film containing an aluminum alloy having at least one or more of molybdenum, titanium, and carbon, it is preferable that the content of molybdenum or titanium in the film is higher than 7.0 atoms%. In addition, in a film including an aluminum alloy including at least one kind or plural kinds of molybdenum, titanium, and carbon, the content of molybdenum or titanium in the film is 20 atoms% or less with respect to light in the visible light region. And has an advantage of high reflectivity. In the Al (C) film, the carbon content in the film is not less than 0.1 atoms% and not more than 10 atoms%, preferably less than 1 atoms%. In a film containing an aluminum alloy containing molybdenum and carbon and a film containing an aluminum alloy containing titanium and carbon, the amount of carbon contained is effective even when the amount is small, and the carbon content in the film is 0.3 atoms. % Or less, and further 0.1 atom% or less.

A transparent conductive film such as an ITO film or an ITSO film may be formed over the first electrode layer 396. The ITSO film uses a target in which indium tin oxide is mixed with 1 to 10% silicon oxide (SiO ₂ ). The Ar gas flow rate is 120 sccm, the O ₂ gas flow rate is 5 sccm, the pressure is 0.25 Pa, and the power is 3 The film thickness may be set to 2 kW with a film thickness of 185 nm by sputtering. The first electrode layer 396 may be wiped with a CMP method or a polyvinyl alcohol-based porous body and polished so that the surface thereof is planarized. In addition, after polishing using the CMP method, the surface of the first electrode layer 396 may be irradiated with ultraviolet light, oxygen plasma treatment, or the like.

    Heat treatment may be performed after the first electrode layer 396 is formed. By this heat treatment, moisture contained in the first electrode layer 396 is released. Therefore, since the first electrode layer 396 does not cause degassing or the like, even when a light-emitting material that is easily deteriorated by moisture is formed over the first electrode layer, the light-emitting material is not deteriorated and the display device has high reliability. Can be produced. In this embodiment mode, the first electrode layer 396 is formed using a film containing an aluminum alloy having at least one kind or plural kinds of molybdenum, titanium, and carbon. The state remains. Accordingly, the flatness is high, and even if the layer containing an organic compound is thin, short-circuiting with the second electrode layer is unlikely to occur.

    In this embodiment mode, photosensitive polyimide is used for the insulating layer 186, the insulating layer 187a, and the insulating layer 187b. In addition, when the insulating layer 186, the insulating layer 187a, and the insulating layer 187b are formed using the same material as the insulating layer 181 in the same step, manufacturing cost can be reduced. In addition, the cost can be reduced by using a common apparatus such as a coating film forming apparatus or an etching apparatus.

    Although an aluminum alloy containing nickel has low resistance to a chemical solution such as a developer used when forming the insulating layer 186 functioning as a partition wall that covers a part of the first electrode layer 396, the molybdenum of the present invention, A film containing an aluminum alloy having at least one or more of titanium and carbon has high resistance, so that defects such as film loss and roughness on the surface are less likely to occur in the manufacturing process. Therefore, a favorable surface state can be maintained, so that the stacked electroluminescent layer 188 can also be formed stably, and the display device has high reliability.

    The insulating layer 186 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, and other inorganic insulating materials, acrylic acid, methacrylic acid, and derivatives thereof, polyimide, aromatic, and the like. It can be formed of a heat-resistant polymer such as polyamide, polybenzimidazole, or a siloxane resin material. You may form using photosensitive and non-photosensitive materials, such as an acryl and a polyimide. The insulating layer 186 preferably has a shape in which the radius of curvature continuously changes, and the coverage of the electroluminescent layer 188 and the second electrode layer 189 formed thereon is improved.

    The end portions of the interlayer film 180 and the insulating layer 181 processed to have a step have a steep step, and thus the coverage of the second electrode layer 189 stacked thereover is poor. Therefore, by covering the step around the opening with the insulating layer 186 and smoothing the step, the coverage with the second electrode layer 189 to be stacked can be improved. In the connection region, the wiring layer formed using the same material and the same process as the second electrode layer is electrically connected to the wiring layer formed using the same material and the same process as the gate electrode layer.

    In order to further improve the reliability, it is preferable to perform deaeration by performing vacuum heating before forming the electroluminescent layer 188. For example, before vapor deposition of the organic compound material, it is desirable to perform heat treatment at 200 to 400 ° C., preferably 250 to 350 ° C. in a reduced pressure atmosphere or an inert atmosphere in order to remove gas contained in the substrate. In addition, it is preferable to form the electroluminescent layer 188 by vacuum deposition or a droplet discharge method under reduced pressure without exposing it to the atmosphere. By this heat treatment, moisture contained in and adhering to the conductive film or insulating layer (partition wall) to be the first electrode layer can be released. This heat treatment can be combined with the previous heating step as long as the substrate can be transported in the vacuum chamber without breaking the vacuum, and the previous heating step may be performed once after the formation of the insulating layer (partition wall). . Here, if the interlayer insulating film and the insulating layer (partition wall) are formed using a material having high heat resistance, a heat treatment process for improving reliability can be sufficiently performed.

    An electroluminescent layer 188 is formed over the first electrode layer 396. Although only one pixel is shown in FIG. 1, field electrode layers corresponding to each color of R (red), G (green), and B (blue) are separately formed in this embodiment. The electroluminescent layer 188 may be manufactured as shown in Embodiment Mode 1, and by mixing an organic compound and an inorganic compound over the first electrode layer 396, high carrier injectability that cannot be obtained individually. In addition, a layer that provides a function of carrier transportability is provided.

    A material that emits red (R), green (G), or blue (B) light (such as a low-molecular or high-molecular material) can also be formed by a droplet discharge method.

Next, a second electrode layer 189 made of a conductive film is provided over the electroluminescent layer 188. As the second electrode layer 189, a material having a low work function (Al, Ag, Li, Ca, or an alloy thereof, MgAg, MgIn, AlLi, compound CaF ₂ , or calcium nitride) may be used. Thus, a light-emitting element 190 including the first electrode layer 185, the electroluminescent layer 188, and the second electrode layer 189 is formed.

    In the display device of this embodiment mode illustrated in FIG. 7, light emitted from the light-emitting element 190 is transmitted through and emitted from the second electrode layer 189 side in the direction of the arrow in FIG.

    It is effective to provide a passivation film so as to cover the second electrode layer 189. Examples of the passivation film include silicon nitride, silicon oxide, silicon oxynitride (SiON), silicon nitride oxide (SiNO), aluminum nitride (AlN), aluminum oxynitride (AlON), and nitridation oxidation in which the nitrogen content is higher than the oxygen content The insulating film includes aluminum (AlNO) or aluminum oxide, diamond-like carbon (DLC), and a nitrogen-containing carbon film (CN), and a single layer or a combination of the insulating films can be used. A siloxane material may also be used.

At this time, it is preferable to use a film with good coverage as the passivation film, and it is effective to use a carbon film, particularly a DLC film. Since the DLC film can be formed in a temperature range from room temperature to 100 ° C., it can be easily formed over the electroluminescent layer 188 having low heat resistance. The DLC film is formed by a plasma CVD method (typically, an RF plasma CVD method, a microwave CVD method, an electron cyclotron resonance (ECR) CVD method, a hot filament CVD method, etc.), a combustion flame method, a sputtering method, or an ion beam evaporation method. It can be formed by laser vapor deposition. The reaction gas used for film formation was hydrogen gas and a hydrocarbon-based gas (for example, CH ₄ , C ₂ H ₂ , C ₆ H _6, etc.), ionized by glow discharge, and negative self-bias was applied. Films are formed by accelerated collision of ions with the cathode. The CN film may be formed using C ₂ H ₄ gas and N ₂ gas as reaction gases. The DLC film has a high blocking effect against oxygen and can suppress oxidation of the electroluminescent layer 188. Therefore, the problem that the electroluminescent layer 188 is oxidized during the subsequent sealing process can be prevented.

    A top view of a pixel region of the display device manufactured in this embodiment mode is shown in FIG. In FIG. 11, the pixel includes a thin film transistor 51, a thin film transistor 52, a light emitting element 190, a gate wiring layer 53, a source / drain wiring layer 54, and a power supply line 55.

    The substrate 100 over which the light-emitting element 190 is formed in this manner and the sealing substrate 195 are fixed with a sealant 192 to seal the light-emitting element (see FIG. 7). In the display device of the present invention, the sealing material 192 and the insulating layer 186 are formed so as not to contact each other. When the sealing material and the insulating layer 186 are separated from each other in this manner, moisture does not easily enter even when an insulating material using a highly hygroscopic organic material is used for the insulating layer 186, and deterioration of the light-emitting element can be prevented. This improves the reliability of the display device. As the sealant 192, it is typically preferable to use a visible light curable resin, an ultraviolet curable resin, or a thermosetting resin. For example, bisphenol A type liquid resin, bisphenol A type solid resin, bromine-containing epoxy resin, bisphenol F type resin, bisphenol AD type resin, phenol type resin, cresol type resin, novolac type resin, cyclic aliphatic epoxy resin, epibis type epoxy Epoxy resins such as resins, glycidyl ester resins, glycidyl amine resins, heterocyclic epoxy resins, and modified epoxy resins can be used. Note that a region surrounded by the sealant may be filled with a filler 193, or nitrogen or the like may be sealed by sealing in a nitrogen atmosphere. Since this embodiment mode is a bottom emission type, the filler 193 does not need to have translucency, but in the case of a structure in which light is extracted through the filler 193, the filler 193 needs to have translucency. Typically, a visible light curable, ultraviolet curable, or thermosetting epoxy resin may be used. Through the above steps, a display device having a display function using a light-emitting element in this embodiment is completed. Further, the filler can be dropped in a liquid state and filled in the display device.

    A dropping injection method employing a dispenser method will be described with reference to FIG. In the dropping injection method of FIG. 26, the control device 40, the imaging means 42, the head 43, the filler 33, the marker 35, and the marker 45 include the barrier layer 34, the sealing material 32, the TFT substrate 30, and the counter substrate 20. A closed loop is formed by the sealing material 32, and the filler 33 is dropped from the head 43 once or a plurality of times. When the viscosity of the filler material is high, the filler material is discharged continuously and adheres to the formation region while being connected. On the other hand, when the viscosity of the filler material is low, the filler material is intermittently discharged and the filler is dropped as shown in FIG. At that time, a barrier layer 34 may be provided to prevent the sealing material 32 and the filler 33 from reacting. Then, a board | substrate is bonded together in a vacuum, and ultraviolet curing is performed after that, and it is set as the state with which the filler was filled. When a hygroscopic substance such as a desiccant is used as the filler, a further water absorption effect can be obtained and deterioration of the element can be prevented.

    A desiccant is installed in the EL display panel in order to prevent deterioration of the element due to moisture. In this embodiment mode, the desiccant is provided in a recess formed in the sealing substrate so as to surround the pixel region, and the thickness is not hindered. Moreover, since the desiccant is formed also in the area | region corresponding to a gate wiring layer and the water absorption area is taken wide, the water absorption effect is high. Further, since the desiccant is formed on the gate wiring layer that does not emit light directly, the light extraction efficiency is not lowered.

    Note that in this embodiment mode, a case where a light-emitting element is sealed with a glass substrate is shown; however, the sealing process is a process for protecting the light-emitting element from moisture and is mechanically sealed with a cover material. Either a method, a method of encapsulating with a thermosetting resin or an ultraviolet light curable resin, or a method of encapsulating with a thin film having a high barrier ability such as a metal oxide or a nitride is used. As the cover material, glass, ceramics, plastic, or metal can be used. However, when light is emitted to the cover material side, it must be translucent. In addition, the cover material and the substrate on which the light emitting element is formed are bonded together using a sealing material such as a thermosetting resin or an ultraviolet light curable resin, and the resin is cured by heat treatment or ultraviolet light irradiation treatment to form a sealed space. Form. It is also effective to provide a hygroscopic material typified by barium oxide in this sealed space. This hygroscopic material may be provided in contact with the sealing material, or may be provided on the partition wall or in the peripheral portion so as not to block light from the light emitting element. Further, the space between the cover material and the substrate on which the light emitting element is formed can be filled with a thermosetting resin or an ultraviolet light curable resin. In this case, it is effective to add a moisture absorbing material typified by barium oxide in the thermosetting resin or the ultraviolet light curable resin.

    In the display device of FIG. 1 manufactured in this embodiment mode in FIG. 12, the source electrode layer or the drain electrode layer and the first electrode layer are not in direct contact with each other and are not electrically connected, but through the wiring layer. An example of connection is shown. In the display device in FIG. 12, the source electrode layer or the drain electrode layer of the thin film transistor for driving the light emitting element and the first electrode layer 395 are electrically connected to each other through the wiring layer 199. In FIG. 12, the first electrode layer 395 is connected to the wiring layer 199 so as to be partially stacked. However, the first electrode layer 395 is formed first, and the first electrode layer 395 is formed. The wiring layer 199 may be formed so as to be in contact with the top.

    In this embodiment mode, the FPC 194 is connected to the terminal electrode layer 178 with the anisotropic conductive layer 196 in the external terminal connection region 202 so as to be electrically connected to the outside. As shown in FIG. 7A, which is a top view of the display device, the display device manufactured in this embodiment includes a peripheral driver circuit region 204 and a peripheral driver circuit region 209 each including a signal line driver circuit. A peripheral driving circuit region 207 having a scanning line driving circuit and a peripheral driving circuit region 208 are provided.

    In this embodiment mode, the circuit is formed as described above. However, the present invention is not limited to this, and an IC chip may be mounted as a peripheral driver circuit by the above-described COG method or TAB method. Further, the gate line driver circuit and the source line driver circuit may be plural or singular.

    In the display device of the present invention, the screen display driving method is not particularly limited. For example, a dot sequential driving method, a line sequential driving method, a surface sequential driving method, or the like may be used. Typically, a line sequential driving method is used, and a time-division gray scale driving method or an area gray scale driving method may be used as appropriate. The video signal input to the source line of the display device may be an analog signal or a digital signal, and a drive circuit or the like may be designed in accordance with the video signal as appropriate.

    Furthermore, in a display device in which a video signal is digital, there are a video signal input to a pixel having a constant voltage (CV) and a constant current (CC). A video signal having a constant voltage (CV) includes a constant voltage (CVCV) applied to the light emitting element and a constant current (CVCC) applied to the light emitting element. In addition, a video signal having a constant current (CC) includes a constant voltage (CCCV) applied to the light emitting element and a constant current (CCCC) applied to the light emitting element.

    By using the present invention, a highly reliable display device can be manufactured. Therefore, a display device with high definition and high image quality can be manufactured with high yield.

(Embodiment 3)
An embodiment of the present invention will be described with reference to FIGS. This embodiment shows an example in which the second interlayer insulating layer is not formed in the display device manufactured in Embodiment 1. Therefore, repetitive description of the same portion or a portion having a similar function is omitted.

    As shown in Embodiment Mode 1, a p-channel thin film transistor 173, an n-channel thin film transistor 174, an n-channel thin film transistor 175, and a p-channel thin film transistor 176 are formed over the substrate 100, and an insulating film 168 is formed. Each thin film transistor is provided with a source electrode layer or a drain electrode layer connected to a source region or a drain region of the semiconductor layer. A first electrode layer 395 is formed in contact with the source or drain electrode layer 172b in the p-channel thin film transistor 176 provided in the pixel region 206 (see FIG. 8A).

    The first electrode layer 395 functions as a pixel electrode and may be formed using a material and a process similar to those of the first electrode layer 396 in Embodiment 2. In this embodiment mode, in the same manner as in Embodiment Mode 1, an Al (Mo) film is used as the reflective electrode for the s first electrode layer 395 in order to allow light to pass through the second electrode layer and be extracted in a desired shape. Processed to form.

    An insulating layer 186 is formed so as to cover the end portion of the first electrode layer 395 and the thin film transistor (see FIG. 8B). In this embodiment mode, acrylic is used for the insulating layer 186. The electroluminescent layer 188 is formed over the first electrode layer, and the second electrode layer 189 is stacked, whereby the light emitting element 190 is formed. In the external terminal connection region 202, the terminal electrode layer 178 is bonded to the FPC 194 through the anisotropic conductive layer 196. The substrate 100 is bonded to the sealing substrate 195 with a sealant 192, and the display device is filled with a filler 193 (see FIG. 9). In the display device of the present invention, the sealing material 192 and the insulating layer 186 are formed so as not to contact each other. When the sealing material and the insulating layer 186 are separated from each other in this manner, moisture does not easily enter even when an insulating material using a highly hygroscopic organic material is used for the insulating layer 186, and deterioration of the light-emitting element can be prevented. This improves the reliability of the display device.

    In the display device in FIG. 10, the first electrode layer 395 is selectively formed over the insulating film 168 before the source electrode layer or the drain electrode layer 172 b connected to the p-channel thin film transistor 176 is formed. . In this case, the connection structure of the source or drain electrode layer 172b and the first electrode layer 395 is different from that in this embodiment, and the source or drain electrode layer 172b is stacked over the first electrode layer 395. It becomes a structure. When the first electrode layer 395 is formed before the source electrode layer or the drain electrode layer 172b, the first electrode layer 395 can be formed in a flat formation region. Therefore, the first electrode layer 395 can be formed in a flat formation region. There are advantages.

    By using the present invention, a highly reliable display device can be manufactured. Therefore, a display device with high definition and high image quality can be manufactured with high yield.

(Embodiment 4)
An embodiment of the present invention will be described with reference to FIG. This embodiment shows an example in which the structure of the gate electrode layer of the thin film transistor is different in the display device manufactured in Embodiment 1. Therefore, repetitive description of the same portion or a portion having a similar function is omitted.

    13A to 13C illustrate a display device in a manufacturing process, which corresponds to the display device in FIG. 4B described in Embodiment 1.

    In FIG. 13A, a thin film transistor 273 and a thin film transistor 274 are provided in the peripheral driver circuit region 214, and a thin film transistor 275 and a thin film transistor 276 are provided in the pixel region 216. The gate electrode layer of the thin film transistor in FIG. 13A includes a stack of two conductive films, and the upper gate electrode layer is processed to be narrower than the lower gate electrode layer. The lower gate electrode layer has a tapered shape, but the upper gate electrode layer does not have a tapered shape. As described above, the gate electrode layer may have a tapered shape, or may have a shape in which the angle of the side surface does not have a tapered shape close to vertical.

    In FIG. 13B, a thin film transistor 373 and a thin film transistor 374 are provided in the peripheral driver circuit region 214, and a thin film transistor 375 and a thin film transistor 376 are provided in the pixel region 216. Although the gate electrode layer of the thin film transistor in FIG. 13B is also formed of a stack of two conductive films, the upper gate electrode layer and the lower gate electrode layer have a continuous taper shape.

    In FIG. 13C, a thin film transistor 473 and a thin film transistor 474 are provided in the peripheral driver circuit region 214, and a thin film transistor 475 and a thin film transistor 476 are provided in the pixel region 216. The gate electrode layer of the thin film transistor in FIG. 13C has a single-layer structure and has a tapered shape. Thus, the gate electrode layer may have a single layer structure.

    In the display device in FIG. 13C, a gate insulating layer includes a gate insulating layer 477 and a gate insulating layer 478 which is selectively provided over the gate insulating layer. As described above, the gate insulating layer 478 may be selectively provided below the gate electrode layer, and an end portion thereof may have a tapered shape. In FIG. 13C, the end portion of the gate insulating layer 478 and the end portion of the gate electrode layer formed thereover are both tapered and formed continuously, but have a step. Thus, it may be formed discontinuously. In this embodiment, a silicon oxynitride film is used for the gate insulating layer 477 and a silicon nitride film is used for the gate insulating layer 478.

    As described above, the gate electrode layer can have various structures depending on its configuration and shape. Therefore, display devices manufactured also have various structures. When the impurity region in the semiconductor layer is formed in a self-aligned manner using the gate electrode layer as a mask, the structure and concentration distribution of the impurity region vary depending on the structure of the gate electrode layer. When designing is performed in consideration of the above, a thin film transistor having a desired function can be manufactured.

    This embodiment mode can be used in combination with each of Embodiment Modes 1 to 3.

(Embodiment 5)
One mode in which protective diodes are provided in the scanning line side input terminal portion and the signal line side input terminal portion will be described with reference to FIG. In FIG. 15, a pixel 2702 is provided with a TFT 501, a TFT 502, a capacitor 504, and a light emitting element 503. This TFT has a configuration similar to that of the first embodiment.

    A protection diode 561 and a protection diode 562 are provided in the signal line side input terminal portion. This protection diode is manufactured in the same process as the TFT 501 or the TFT 502, and is operated as a diode by connecting the gate and one of the drain or the source. An equivalent circuit diagram of the top view shown in FIG. 15 is shown in FIG.

    The protection diode 561 includes a gate electrode layer, a semiconductor layer, and a wiring layer. The protective diode 562 has a similar structure. The common potential line 554 and the common potential line 555 connected to the protection diode are formed in the same layer as the gate electrode layer. Therefore, in order to electrically connect with the wiring layer, it is necessary to form a contact hole in the insulating layer.

    The contact hole to the insulating layer may be etched by forming a mask layer. In this case, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

    The signal wiring layer is formed of the same layer as the source and drain wiring layer 505 in the TFT 501, and has a structure in which the signal wiring layer connected thereto and the source or drain side are connected.

    The input terminal portion on the scanning signal line side has the same configuration. The protective diode 563 includes a gate electrode layer, a semiconductor layer, and a wiring layer. The protective diode 564 has a similar structure. The common potential line 556 and the common potential line 557 connected to the protection diode are formed of the same layer as the source electrode layer and the drain electrode layer. A protection diode provided in the input stage can be formed at the same time. Note that the position at which the protective diode is inserted is not limited to this embodiment mode, and can be provided between the driver circuit and the pixel.

(Embodiment 6)
A television device can be completed with the display device formed according to the present invention. FIG. 27 is a block diagram showing a main structure of a television device (in this embodiment mode, an EL television device). In the display panel, only the pixel portion 701 is formed as shown in FIG. 16A, and the scan line side driver circuit 703 and the signal line side driver circuit 702 are combined with a TAB method as shown in FIG. In the case of mounting by the COG method as shown in FIG. 17A, the TFT is formed as shown in FIG. 16B, and the pixel portion 701 and the scanning line side driver circuit 703 are formed on the substrate. In the case where the signal line side driver circuit 702 is separately formed as a driver IC and is integrally formed thereon, the pixel portion 701, the signal line side driver circuit 702, and the scan line side driver circuit 703 are formed over the substrate as shown in FIG. Although it may be integrally formed, any form may be used.

    As other external circuit configurations, on the input side of the video signal, among the signals received by the tuner 704, the video signal amplification circuit 705 that amplifies the video signal, and the signals output from the video signal amplification circuit 705 are red, green, and blue colors. And a control circuit 707 for converting the video signal into the input specifications of the driver IC. The control circuit 707 outputs signals to the scanning line side and the signal line side, respectively. In the case of digital driving, a signal dividing circuit 708 may be provided on the signal line side and an input digital signal may be divided into m pieces and supplied.

    Of the signals received by the tuner 704, the audio signal is sent to the audio signal amplification circuit 709, and the output is supplied to the speaker 713 via the audio signal processing circuit 710. The control circuit 711 receives the receiving station (reception frequency) and volume control information from the input unit 712, and sends a signal to the tuner 704 and the audio signal processing circuit 710.

    As shown in FIGS. 20A and 20B, the display module can be incorporated into a housing to complete the television device. The display panel as shown in FIG. 1 attached up to the FPC is generally also referred to as an EL display module. Therefore, when an EL display module as shown in FIG. 1 is used, an EL television device can be completed. A main screen 2003 is formed by the display module, and a speaker portion 2009, operation switches, and the like are provided as other accessory equipment. Thus, a television device can be completed according to the present invention.

    Moreover, you may make it cut off the reflected light of the light which injects from the outside using a phase difference plate or a polarizing plate. In the case of a top emission display device, an insulating layer serving as a partition may be colored and used as a black matrix. This partition wall can also be formed by a droplet discharge method or the like. Carbon black or the like may be mixed with a pigment-based black resin or a resin material such as polyimide, or may be laminated. A different material may be discharged to the same region a plurality of times by a droplet discharge method to form a partition wall. As the phase difference plate and the phase difference plate, a λ / 4 plate and a λ / 2 plate may be used and designed so as to control light. As a configuration, it becomes a configuration of a light emitting element, a sealing substrate (sealing material), a retardation plate, a retardation plate (λ / 4 plate, λ / 2 plate), a polarizing plate, purely from the TFT element substrate side. The light emitted from the light emitting element passes through these and is emitted to the outside from the polarizing plate side. The retardation plate and the polarizing plate may be installed on the side from which light is emitted, and may be installed on both sides as long as the display is a double-sided emission type that emits light on both sides. Further, an antireflection film may be provided outside the polarizing plate. This makes it possible to display a higher-definition and precise image.

    As shown in FIG. 20A, a display panel 2002 using a display element is incorporated in a housing 2001, and reception of general television broadcasting is started by a receiver 2005, and a wired or wireless connection is made via a modem 2004. By connecting to a communication network, information communication in one direction (from the sender to the receiver) or in both directions (between the sender and the receiver or between the receivers) can be performed. The operation of the television device can be performed by a switch incorporated in the housing or a separate remote controller 2006, and this remote controller is also provided with a display unit 2007 for displaying information to be output. Also good.

    In addition, the television device may have a configuration in which a sub screen 2008 is formed using the second display panel in addition to the main screen 2003 to display channels, volume, and the like. In this configuration, the main screen 2003 may be formed using an EL display panel with an excellent viewing angle, and the sub screen may be formed using a liquid crystal display panel that can display with low power consumption. In order to prioritize the reduction in power consumption, the main screen 2003 may be formed using a liquid crystal display panel, the sub screen may be formed using an EL display panel, and the sub screen may blink. Of course, both the main screen and the sub screen may be formed by an EL display panel to which the present invention is applied. When the present invention is used, a highly reliable display device can be obtained even when such a large substrate is used and a large number of TFTs and electronic components are used.

    FIG. 20B illustrates a television device having a large display portion of 20 to 80 inches, for example, which includes a housing 2010, a keyboard portion 2012 that is an operation portion, a display portion 2011, a speaker portion 2013, and the like. The present invention is applied to manufacture of the display portion 2011. Since the display portion in FIG. 20B uses a bendable substance, the television set has a curved display portion. Since the shape of the display portion can be freely designed as described above, a television device having a desired shape can be manufactured.

    According to the present invention, since a display device can be formed through a simple process, cost reduction can be achieved. Therefore, a television device using the present invention can be formed at low cost even if it has a large screen display portion. Therefore, a high-performance and highly reliable television device can be manufactured with high yield.

    Of course, the present invention is not limited to a television device, but can be applied to various applications such as personal computer monitors, information display boards at railway stations and airports, and advertisement display boards on streets. can do.

(Embodiment 7)

    This embodiment will be described with reference to FIG. In this embodiment, an example of a module using a panel including the display device manufactured in Embodiments 1 to 6 will be described.

    21A includes a controller 901, a central processing unit (CPU) 902, a memory 911, a power supply circuit 903, an audio processing circuit 929, a transmission / reception circuit 904, and other resistors. Elements such as a buffer and a capacitive element are mounted. Further, the panel 900 is connected to a printed wiring board 946 through a flexible wiring board (FPC) 908.

  The panel 900 includes a pixel portion 905 in which a light-emitting element is provided in each pixel, a first scanning line driver circuit 906 a that selects a pixel included in the pixel portion 905, and a second scanning line driver circuit 906 b. A signal line driver circuit 907 for supplying a video signal to the pixels is provided.

  Various control signals are input / output via an interface (I / F) 909 provided on the printed wiring board 946. An antenna port 910 for transmitting and receiving signals to and from the antenna is provided on the printed wiring board 946.

  Note that although the printed wiring board 946 is connected to the panel 900 through the FPC 908 in this embodiment mode, the present invention is not necessarily limited to this structure. The controller 901, the audio processing circuit 929, the memory 911, the CPU 902, or the power supply circuit 903 may be directly mounted on the panel 900 by using a COG (Chip on Glass) method. In addition, the printed wiring board 946 is provided with various elements such as a capacitor element and a buffer to prevent noise from being applied to the power supply voltage and the signal and the rise of the signal from being slowed down.

  FIG. 21B shows a block diagram of the module shown in FIG. The module 999 includes a VRAM 932, a DRAM 925, a flash memory 926, and the like as the memory 911. The VRAM 932 stores image data to be displayed on the panel, the DRAM 925 stores image data or audio data, and the flash memory stores various programs.

  In the power supply circuit 903, a power supply voltage to be supplied to the panel 900, the controller 901, the CPU 902, the sound processing circuit 929, the memory 911, and the transmission / reception circuit 931 is generated. Depending on the specifications of the panel, the power supply circuit 903 may be provided with a current source.

  The CPU 902 includes a control signal generation circuit 920, a decoder 921, a register 922, an arithmetic circuit 923, a RAM 924, an interface 935 for the CPU, and the like. Various signals input to the CPU 902 via the interface 935 are once held in the register 922 and then input to the arithmetic circuit 923, the decoder 921, and the like. The arithmetic circuit 923 performs an operation based on the input signal and designates a place to send various commands. On the other hand, the signal input to the decoder 921 is decoded and input to the control signal generation circuit 920. The control signal generation circuit 920 generates a signal including various instructions based on the input signal, and a location designated by the arithmetic circuit 923, specifically, a memory 911, a transmission / reception circuit 931, an audio processing circuit 929, a controller 901, and the like. Send to.

  The memory 911, the transmission / reception circuit 931, the sound processing circuit 929, and the controller 901 operate according to the received commands. The operation will be briefly described below.

  A signal input from the input unit 930 is sent to the CPU 902 mounted on the printed wiring board 946 via the interface 909. The control signal generation circuit 920 converts the image data stored in the VRAM 932 into a predetermined format according to a signal sent from the input unit 930 such as a pointing device or a keyboard, and sends the image data to the controller 901.

  The controller 901 performs data processing on a signal including image data sent from the CPU 902 in accordance with the panel specifications, and supplies the processed signal to the panel 900. Further, the controller 901 generates an Hsync signal, a Vsync signal, a clock signal CLK, an AC voltage (AC Cont), and a switching signal L / R based on the power supply voltage input from the power supply circuit 903 and various signals input from the CPU 902. Generated and supplied to the panel 900.

  In the transmission / reception circuit 904, signals transmitted / received as radio waves in the antenna 933 are processed. Specifically, high-frequency signals such as an isolator, a band-pass filter, a VCO (Voltage Controlled Oscillator), an LPF (Low Pass Filter), a coupler, and a balun are used. Includes circuitry. A signal including audio information among signals transmitted and received in the transmission / reception circuit 904 is sent to the audio processing circuit 929 in accordance with a command from the CPU 902.

  A signal including audio information sent in accordance with a command from the CPU 902 is demodulated into an audio signal by the audio processing circuit 929 and sent to the speaker 928. The audio signal sent from the microphone 927 is modulated by the audio processing circuit 929 and sent to the transmission / reception circuit 904 in accordance with a command from the CPU 902.

  The controller 901, the CPU 902, the power supply circuit 903, the sound processing circuit 929, and the memory 911 can be mounted as a package of this embodiment mode. This embodiment can be applied to any circuit other than a high-frequency circuit such as an isolator, a band-pass filter, a VCO (Voltage Controlled Oscillator), an LPF (Low Pass Filter), a coupler, and a balun.

(Embodiment 8)
This embodiment will be described with reference to FIGS. FIG. 22 shows one mode of a portable small telephone (mobile phone) using radio including the module manufactured in the tenth embodiment. The panel 900 is detachably incorporated in the housing 1001 so that it can be easily integrated with the module 999. The shape and size of the housing 1001 can be changed as appropriate in accordance with an electronic device to be incorporated.

  The housing 1001 to which the panel 900 is fixed is fitted to the printed wiring board 946 and assembled as a module. On the printed wiring board 946, a controller, a CPU, a memory, a power supply circuit, a resistor, a buffer, a capacitor, and the like are mounted. Further, a signal processing circuit 993 such as an audio processing circuit including a microphone 994 and a speaker 995 and a transmission / reception circuit is provided. Panel 900 is connected to printed circuit board 946 through FPC 908.

  Such a module 999, input means 998, and battery 997 are housed in a housing 996. The pixel portion of the panel 900 is arranged so as to be visible from an opening window formed in the housing 996.

  A housing 996 illustrated in FIG. 22 illustrates an external shape of a telephone as an example. However, the electronic device according to this embodiment can be transformed into various modes depending on the function and application. An example of the aspect will be described in the embodiment described below.

(Embodiment 9)
Various display devices can be manufactured by applying the present invention. That is, the present invention can be applied to various electronic devices in which these display devices are incorporated in a display portion.

    Such electronic devices include cameras such as video cameras and digital cameras, projectors, head mounted displays (goggles type displays), car navigation systems, car stereos, personal computers, game machines, personal digital assistants (mobile computers, mobile phones or And an image reproducing apparatus (specifically, an apparatus having a display capable of reproducing a recording medium such as Digital Versatile Disc (DVD) and displaying the image). Examples thereof are shown in FIG.

    FIG. 19A illustrates a computer, which includes a main body 2101, a housing 2102, a display portion 2103, a keyboard 2104, an external connection port 2105, a pointing mouse 2106, and the like. By using the present invention, a computer that displays a high-quality image with high reliability even when the size is reduced and the pixels are miniaturized can be completed.

    FIG. 19B shows an image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2201, a housing 2202, a display portion A 2203, a display portion B 2204, and a recording medium (DVD etc.) reading portion 2205. , An operation key 2206, a speaker portion 2207, and the like. The display portion A2203 mainly displays image information, and the display portion B2204 mainly displays character information. By using the present invention, an image reproducing device that displays a high-quality image with high reliability even when the size is reduced and the pixel is miniaturized can be completed.

    FIG. 19C illustrates a mobile phone, which includes a main body 2301, an audio output portion 2302, an audio input portion 2303, a display portion 2304, operation switches 2305, an antenna 2306, and the like. By using the present invention, a mobile phone that displays a high-quality image with high reliability can be completed even if the device is downsized and pixels are miniaturized.

    FIG. 19D illustrates a video camera, which includes a main body 2401, a display portion 2402, a housing 2403, an external connection port 2404, a remote control reception portion 2405, an image receiving portion 2406, a battery 2407, an audio input portion 2408, an eyepiece portion 2409, and an operation. Key 2410 and the like. By using the present invention, a video camera that can display a high-quality image with high reliability even when the size is reduced and the pixel is miniaturized can be completed. This embodiment mode can be freely combined with the above embodiment modes.

    In this example, the result of measuring the characteristics of a film containing an aluminum alloy having at least one or a plurality of molybdenum, titanium, and carbon used as an electrode layer in the present invention is shown.

    A film containing an aluminum alloy containing molybdenum (Al (Mo)), a film containing an aluminum alloy containing titanium (Al (Ti)), and a film containing an aluminum alloy containing carbon (Al (C)) are formed on an aluminum target. Then, a chip-like molybdenum, titanium, or carbon was placed thereon to form a film by sputtering. The film forming conditions were an electric power of 1.5 to 2 kW, a pressure of 0.4 Pa, and an argon gas flow rate of 50 sccm. Samples were examined for the characteristics of each sample by changing the molybdenum content in the Al (Mo) film, the titanium content in the Al (Ti) film, and the carbon content in the Al (C) film. It was.

    First, the reflectance of a film containing an aluminum alloy having at least one or more of molybdenum, titanium, and carbon was measured. Samples are five types of films in which the content of molybdenum in the Al (Mo) film is 18.3 atoms%, 22.2 atoms%, 30.0 atoms%, 45.3 atoms%, and 56.6 atoms%. (Ti) Five types of films in which the titanium content in the film is 8.7 atoms%, 10.3 atoms%, 14.9 atoms%, 30.6 atoms%, 38.9 atoms%, in the Al (C) film There are two types of films in which the carbon content is less than 1 atom%, 1.7 types, and 3.5 atoms%, and four types of pure aluminum films (denoted as pure-Al in the legend of FIG. 23). The sample was heated at 300 ° C. for 1 hour after film formation. This is because the heating process may be performed after the reflective electrode is formed assuming an actual process. FIG. 23A shows the reflectance for each wavelength of the Al (Mo) sample, FIG. 23B shows the reflectance for each wavelength of the Al (Ti) sample, and FIG. 23C shows the Al (C) sample. The reflectance for each wavelength is shown.

    In FIG. 23A, the dots in the figure are round for the pure aluminum film, the measured value of the molybdenum content in the Al (Mo) film is 18.3 atoms%, the triangle is the measured value, and the molybdenum content in the Al (Mo) film is The measured value when the content is 22.2 atoms% is square, the measured value when the molybdenum content in the Al (Mo) film is 30.0 atoms% is rhombus, and the molybdenum content in the Al (Mo) film is 45.3 atoms. The measured value of% is a cross mark, and the measured value of the molybdenum content in the Al (Mo) film is 56.6 atoms% is a cross mark. Similarly, in FIG. 23B, the dots in the figure are round in the pure aluminum film, the measured value when the content of titanium in the Al (Ti) film is 8.7 atoms% is triangular, and in the Al (Ti) film. The measured value when the titanium content is 10.3 atoms% is a square, the measured value when the titanium content in the Al (Ti) film is 14.9 atoms% is the rhombus, and the titanium content in the Al (Ti) film is The measured value of 30.6 atoms% is a cross mark, and the measured value of the content of titanium in the Al (Ti) film is 38.9 atoms% is a cross mark. In FIG. 23C, the dots in the figure are round for the pure aluminum film, the measured values for the carbon content in the Al (C) film being less than 1 atom% are triangles and squares, and the carbon in the Al (C) film. The measured value with a 1.7 atom% content of diamond is a rhombus, and the measured value with a carbon content of 3.5 atoms% in the Al (C) film is marked as a mess, and in the same Al (C) film Even if the carbon content is less than 1 atom%, the triangular dot film contains a smaller amount of carbon in the Al (C) film than the square dot film. Moreover, the film thickness of the sample whose reflectance was measured was 200 nm.

    As shown in FIGS. 23A, 23B, and 23C, in the pure aluminum film, the reflectance is reduced at a wavelength smaller than around 450 nm, but at least one of molybdenum, titanium, and carbon, Alternatively, in many of the films containing an aluminum alloy having a plurality of types, the reflectance is almost constant at a wavelength in the vicinity of the visible light region of 300 nm to 800 nm, and no reduction in reflectance is observed. Therefore, a film containing an aluminum alloy having at least one or more of molybdenum, titanium, and carbon does not depend on the wavelength of reflectance, and thus can maintain a constant reflectance in the visible light region, so that it is efficient as a reflective electrode. The light emitted from the light emitting element can be reflected well. In addition, since it is difficult to absorb light, it is difficult to accumulate heat, and deterioration of the light-emitting element due to heat can be prevented, so that the reliability of the display device is improved. Therefore, even when used under strong light such as outdoors, it can be fully utilized without degrading performance. Moreover, the reflectance decreased as the content of molybdenum, titanium, and carbon in the film was increased. Considering the light reflection efficiency as the reflective electrode, the Al (Mo) film preferably has a molybdenum content of 22.2 atoms% or less, and the Al (Ti) film has a titanium content of 14.9 atoms% or less. Preferably, in an Al (C) film, 1.7 atoms% or less is preferable.

    Next, the maximum height difference (Peak-Valley value (PV value): valley value) of the unevenness on the film surface of each sample was measured. The measurement was performed using an atomic force microscope (AFM) and the measurement range was 2 μm × 2 μm. FIG. 24A shows a change in the PV value with respect to the molybdenum content of the Al (Mo) film, and FIG. 24B shows a change in the PV value with respect to the titanium content of the Al (Ti) film. Note that in FIG. 24B, a dot with a circle is a film containing an aluminum alloy containing titanium and carbon, and the content of titanium in the film containing the aluminum alloy containing titanium and carbon is 2.7 atoms%, carbon The content of is 1 atoms% or less. FIGS. 24A and 24B show the results of measuring the surfaces of the Al (Mo) film and the Al (Ti) film, and silicon oxide is formed on each of the Al (Mo) film and the Al (Ti) film. 25 (A) and 25 (B) show the results of laminating indium tin oxide (ITSO) films containing Cu and measuring the PV value on the surface of each upper ITSO film. The film thickness of each sample for which the PV value was measured was 35 nm.

    The measured PV value of each sample shown in FIG. 24A is 17.51 nm for the pure aluminum film, and 4.421 nm for the molybdenum content in the Al (Mo) film is 18.3 atoms%. The measured value when the molybdenum content in the Al (Mo) film is 22.2 atoms% is 3.711 nm, the measured value when the molybdenum content in the Al (Mo) film is 30.0 atoms% is 1.738 nm, Al The measured value when the molybdenum content in the (Mo) film was 45.3 atoms% was 0.9358 nm, and the measured value when the molybdenum content in the Al (Mo) film was 56.6 atoms% was 0.8159 nm. The measured PV value of each sample shown in FIG. 24B is 17.51 nm for a pure aluminum film, and 8.239 nm when the titanium content in the Al (Ti) film is 8.7 atoms%. The measured value when the titanium content in the Al (Ti) film is 10.3 atoms% is 5.887 nm, the measured value when the titanium content in the Al (Ti) film is 14.9 atoms% is 5.75 nm, and Al The measured value when the content of titanium in the (Ti) film is 30.6 atoms% is 1.981 nm, the measured value when the content of titanium in the Al (Ti) film is 38.9 atoms% is 2.493 nm, titanium and carbon The measured value of the film containing the aluminum alloy having 1. was 1.46 nm.

    The measured value of the PV value on the surface of the upper ITSO film shown in FIG. 25A is 1.143 nm when the molybdenum content in the Al (Mo) film is 18.3 atoms%. The measured value when the molybdenum content in the (Mo) film is 22.2 atoms% is 2.32 nm, the measured value when the molybdenum content in the Al (Mo) film is 30.0 atoms% is 2.144 nm, and Al (Mo ) The measured value when the molybdenum content in the film was 45.3 atoms% was 2.109 nm, and the measured value when the molybdenum content in the Al (Mo) film was 56.6 atoms% was 1.603 nm. The measured value of the PV value of the upper ITSO film surface of each sample shown in FIG. 25B is the measured value when the content of titanium in the Al (Ti) film is 8.7 atoms% is 8.137 nm. The measured value when the titanium content in the (Ti) film is 10.3 atoms% is 6.407 nm, the measured value when the titanium content in the Al (Ti) film is 14.9 atoms% is 6.005 nm, and Al (Ti ) The measured value when the titanium content in the film was 30.6 atoms% was 5.178 nm, and the measured value when the titanium content in the Al (Ti) film was 38.9 atoms% was 2.635 nm.

    The PV value of the surface of the pure aluminum film is more than double the PV value of the surface of the Al (Mo) film, the A (Ti) film, and the film containing an aluminum alloy containing titanium and carbon. The surface has poor flatness. On the other hand, an Al (Mo) film, an A (Ti) film, and a film containing an aluminum alloy containing titanium and carbon have a low PV value, which indicates that the film surface has good flatness. In addition, molybdenum or titanium contained in a film containing an aluminum alloy having at least one or more of molybdenum, titanium, and carbon tends to have a lower PV value as the content increases. It was. Further, the PV value of the film containing an aluminum alloy containing titanium and carbon is as small as 1.46 nm even though the Ti content is 2.7 atoms%, and the surface flatness is obtained when carbon is added. It was confirmed that there is an effect of improving.

    Further, an X-ray diffractometer (XRD: X) is used to examine the surface state of a film obtained by forming a pure aluminum film and an Al (C) film (the carbon content in the film is less than 1 atom%) and firing at 300 degrees. The crystallinity was measured by -ray diffractometer. The peak intensity of the (111) diffraction peak was 4341 CPS for the pure aluminum film, but about 1/7 that of 684 CPS for the Al (C) film. From this, it can be seen that crystallization progresses and the crystallinity increases in the pure aluminum film, but the crystallization is suppressed in the Al (C) film and the crystallinity is low. Therefore, since the crystallinity is low, the surface flatness of the Al (C) film is considered good.

    From the above measurement results, it was confirmed that the flatness of the film surface can be improved while having high reflectance by adding at least one or more of molybdenum, titanium, and carbon to aluminum. When such a film is used for a reflective electrode of a display device, a highly reliable display device in which light extraction efficiency of the light-emitting element is favorable and defects due to surface roughness of the electrode are suppressed can be manufactured.

6A and 6B illustrate a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 6A and 6B illustrate a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 6A and 6B illustrate a display device of the present invention. 6A and 6B illustrate a display device of the present invention. FIG. 6 is a top view illustrating a display device of the present invention. 6A and 6B illustrate a display device of the present invention. 6A and 6B illustrate a display device of the present invention. FIG. 16 is an equivalent circuit diagram of the display device described in FIG. 15. FIG. 6 is a top view illustrating a display device of the present invention. The top view of the display apparatus of this invention. The top view of the display apparatus of this invention. 3A and 3B each illustrate a structure of a light-emitting element that can be applied to the present invention. FIG. 11 illustrates an electronic device to which the present invention is applied. FIG. 11 illustrates an electronic device to which the present invention is applied. FIG. 11 illustrates an electronic device to which the present invention is applied. FIG. 11 illustrates an electronic device to which the present invention is applied. FIG. 4 is a diagram showing experimental data of a sample in Example 1. FIG. 4 is a diagram showing experimental data of a sample in Example 1. FIG. 4 is a diagram showing experimental data of a sample in Example 1. The figure explaining the dripping injection method which can be applied to this invention. 1 is a block diagram illustrating a main configuration of an electronic device to which the present invention is applied.

Claims (12)

Having an electroluminescent layer on the reflective first electrode layer;
A translucent second electrode layer on the electroluminescent layer;
The electroluminescent layer has a layer containing an organic compound and an inorganic compound in contact with the first electrode layer,
The display device is characterized in that the first electrode layer includes an aluminum alloy having at least one of molybdenum, titanium, and carbon, or a plurality of them. A light-transmitting conductive film on the reflective first electrode layer;
Having an electroluminescent layer on the conductive film;
A translucent second electrode layer on the electroluminescent layer;
The electroluminescent layer has a layer containing an organic compound and an inorganic compound in contact with the conductive film,
The display device is characterized in that the first electrode layer includes an aluminum alloy having at least one of molybdenum, titanium, and carbon, or a plurality of them. A thin film transistor having a semiconductor layer, a gate insulating layer, a gate electrode layer, a source electrode layer and a drain electrode layer;
An insulating layer on the thin film transistor;
An interlayer film on the insulating layer;
A reflective first electrode layer on the interlayer film;
An electroluminescent layer on the first electrode layer;
A translucent second electrode layer on the electroluminescent layer;
The electroluminescent layer has a layer containing an organic compound and an inorganic compound in contact with the first electrode layer,
The interlayer film has only under the first electrode layer,
The display device is characterized in that the first electrode layer includes an aluminum alloy having at least one of molybdenum, titanium, and carbon, or a plurality of them. A thin film transistor having a semiconductor layer, a gate insulating layer, a gate electrode layer, a source electrode layer and a drain electrode layer;
An insulating layer on the thin film transistor;
An interlayer film on the insulating layer;
A reflective first electrode layer on the interlayer film;
A translucent conductive film on the first electrode layer;
Having an electroluminescent layer on the conductive film;
A translucent second electrode layer on the electroluminescent layer;
The electroluminescent layer has a layer containing an organic compound and an inorganic compound in contact with the conductive film,
The interlayer film has only under the first electrode layer,
The display device is characterized in that the first electrode layer includes an aluminum alloy having at least one of molybdenum, titanium, and carbon, or a plurality of them.     5. The display device according to claim 1, wherein the content of molybdenum or titanium in the first electrode layer is higher than 7.0 atoms%.     6. The display device according to claim 5, wherein the content of molybdenum or titanium in the first electrode layer is less than 20 atoms%. Forming a reflective first electrode layer including an aluminum alloy having at least one or more of molybdenum, titanium, and carbon;
Forming an electroluminescent layer on the first electrode layer;
Forming a translucent second electrode layer on the electroluminescent layer;
The method for manufacturing a display device is characterized in that the electroluminescent layer includes a layer containing an organic compound and an inorganic compound in contact with the first electrode layer. Forming a reflective first electrode layer including an aluminum alloy having at least one or more of molybdenum, titanium, and carbon;
Forming a light-transmitting conductive film on the first electrode layer;
Forming an electroluminescent layer on the conductive film;
Forming a translucent second electrode layer on the electroluminescent layer;
The method for manufacturing a display device is characterized in that the electroluminescent layer includes a layer containing an organic compound and an inorganic compound in contact with the conductive film. Forming a thin film transistor having a semiconductor layer, a gate insulating layer, a gate electrode layer, a source electrode layer and a drain electrode layer;
Forming an insulating layer on the thin film transistor;
Forming an interlayer film on the insulating layer;
Forming an opening reaching the source electrode layer or the drain electrode layer in the insulating layer and the interlayer film;
On the opening and the interlayer film, in contact with the source electrode layer or the drain electrode layer, a conductive film containing an aluminum alloy having at least one of molybdenum, titanium, and carbon, or a plurality of types is formed.
Processing the conductive film and the interlayer film to form a reflective first electrode layer;
Forming an electroluminescent layer on the first electrode layer;
Forming a translucent second electrode layer on the electroluminescent layer;
The method for manufacturing a display device is characterized in that the electroluminescent layer includes a layer containing an organic compound and an inorganic compound in contact with the first electrode layer. Forming a thin film transistor having a semiconductor layer, a gate insulating layer, a gate electrode layer, a source electrode layer and a drain electrode layer;
Forming an insulating layer on the thin film transistor;
Forming an interlayer film on the insulating layer;
Forming an opening reaching the source electrode layer or the drain electrode layer in the insulating layer and the interlayer film;
A first conductive film is formed on the opening and the interlayer film so as to be in contact with the source electrode layer or the drain electrode layer and containing an aluminum alloy having at least one or more of molybdenum, titanium, and carbon. And
Forming a second conductive film on the first conductive film;
Processing the first conductive film, the second conductive film, and the interlayer film to form a reflective first electrode layer;
Forming an electroluminescent layer on the first electrode layer;
Forming a translucent second electrode layer on the electroluminescent layer;
The method for manufacturing a display device is characterized in that the electroluminescent layer includes a layer containing an organic compound and an inorganic compound in contact with the first electrode layer.     The method for manufacturing a display device according to claim 7, wherein a content of molybdenum or titanium in the first electrode layer is more than 7.0 atoms%. 12. The method for manufacturing a display device according to claim 11, wherein the content of molybdenum or titanium in the first electrode layer is less than 20 atoms%.

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