JP2006153721A - Clock device - Google Patents

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JP2006153721A
JP2006153721A JP2004346428A JP2004346428A JP2006153721A JP 2006153721 A JP2006153721 A JP 2006153721A JP 2004346428 A JP2004346428 A JP 2004346428A JP 2004346428 A JP2004346428 A JP 2004346428A JP 2006153721 A JP2006153721 A JP 2006153721A
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time
signal
driving
clock time
receiving
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Yoshikazu Murayama
佳和 村山
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Nippon Seiki Co Ltd
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Nippon Seiki Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a clock device capable of suppressing delays due to arithmetic operations and correcting its clock time. <P>SOLUTION: The clock device 100 is equipped with an indicator 105 for indicating the clock time; a drive means 104 for driving the indicator 105; a reception means 103 for receiving a standard wave having clock time information; and a control means 101 which counts a reference clock signal to obtain the clock time, outputs a clock time signal to the drive means 104 at a prescribed period, corrects the clock time based on the clock time information received through the reception means 103 and outputs the clock time signal to the drive means 104. After correcting the clock time based on the clock time information, the control means 101 detects a position marker PO in a time code carried by the standard wave and outputs the clock time signal to the drive means 104 at a period shorter than the prescribed period by a prescribed time, such that the clock time signal is output in approximate synchronism with a marker M transmitted after the position marker PO. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、利用者に時刻を知らせる時計装置に関し、特に時刻情報を含む標準電波を受信して時刻を合わせる時計装置に関するものである。   The present invention relates to a timepiece device that informs a user of a time, and more particularly to a timepiece device that receives a standard radio wave including time information and adjusts the time.

現在、独立行政法人情報通信研究機構が長波(40と60kHz)標準電波でタイムコードを送信している。そして、タイムコードと呼ばれる時刻情報を含んだ標準電波を受信し時刻を合わせる時計装置が存在している。標準電波のタイムコードは、分、時、1月1日からの通算日、年、曜日、うるう秒の時刻情報を含む60ビットのタイムコードを1周期60秒のタイミングで送信している。   Currently, the National Institute of Information and Communications Technology transmits time codes using long wave (40 and 60 kHz) standard radio waves. There is a clock device that receives a standard radio wave including time information called a time code and adjusts the time. As the time code of the standard radio wave, a 60-bit time code including time information of minute, hour, day of total from January 1, year, day of the week, and leap second is transmitted at a timing of 60 seconds per cycle.

時計装置は、受信した前記標準電波を復調して矩形パルスを得て、この矩形パルスから時刻情報を検出する演算処理を行い、この演算にて得た時刻情報に応じて時刻を修正している。
特開平10−82873号公報
The timepiece device demodulates the received standard radio wave to obtain a rectangular pulse, performs a calculation process for detecting time information from the rectangular pulse, and corrects the time according to the time information obtained by the calculation. .
Japanese Patent Laid-Open No. 10-82873

前述した標準電波の復調などの演算処理を行うためには、20ミリ秒から100ミリ秒、平均して40ミリ秒ほどの処理時間が必要であり、時刻修正に遅延が生じ、標準電波に対して、時計装置の演算処理が遅れ、ひいては、表示が遅れるという問題点があった。   In order to perform the arithmetic processing such as the demodulation of the standard radio wave described above, a processing time of 20 milliseconds to 100 milliseconds and an average of about 40 milliseconds is required. Thus, there has been a problem that the arithmetic processing of the timepiece device is delayed and consequently the display is delayed.

そこで、本発明は前述した問題点に着目し、演算処理にともなう遅延を抑えて時刻修正することが可能な時計装置を提案することを目的とするものである。   Accordingly, the present invention aims at proposing a timepiece device capable of correcting the time while suppressing the delay caused by the arithmetic processing, paying attention to the above-mentioned problems.

本発明は、前記課題を解決するため、請求項1に記載した時計装置のように、時刻を知らせる表示器と、この表示器を駆動する駆動手段と、時刻情報を含む標準電波を受信する受信手段と、基準クロック信号を計数して時刻を求め所定周期で前記駆動手段に時刻信号を出力するとともに前記受信手段を介して受信する時刻情報に基づいて時刻を修正処理して前記駆動手段に時刻信号を出力する制御手段とを備える時計装置であって、前記制御手段が時刻情報に基づいて時刻を修正処理した後に、前記所定周期に対して所定時間分短い周期で前記駆動手段に時刻信号を出力するものである。   In order to solve the above-mentioned problem, the present invention, like the timepiece device according to claim 1, is a display for notifying time, a driving means for driving the display, and reception for receiving a standard radio wave including time information. A time signal is obtained by counting a reference clock signal and outputting a time signal to the driving means at a predetermined period, and correcting the time based on time information received via the receiving means And a control device for outputting a signal, wherein after the control device corrects the time based on the time information, a time signal is sent to the drive device at a cycle shorter by a predetermined time than the predetermined cycle. Output.

また、請求項2に記載した時計装置のように、時刻を知らせる表示器と、この表示器を駆動する駆動手段と、時刻情報を含む標準電波を受信する受信手段と、基準クロック信号を計数して時刻を求め所定周期で前記駆動手段に時刻信号を出力するとともに前記受信手段を介して受信する時刻情報に基づいて時刻を修正処理して前記駆動手段に時刻信号を出力する制御手段とを備える時計装置であって、前記制御手段が時刻情報に基づいて時刻を修正処理した後に、前記標準電波のタイムコード中のポジションマーカーP0を検出し、前記ポジションマーカーP0の後に送信されるマーカーMとほぼ同時となるように、前記所定周期に対して所定時間分短い周期で前記駆動手段に時刻信号を出力するものである。   Further, as in the timepiece device described in claim 2, the display device for notifying the time, the driving means for driving the display device, the receiving means for receiving the standard radio wave including the time information, and the reference clock signal are counted. And a control unit that outputs a time signal to the driving unit at a predetermined cycle and corrects the time based on time information received through the receiving unit and outputs the time signal to the driving unit. In the timepiece device, after the control means corrects the time based on the time information, the position marker P0 in the time code of the standard radio wave is detected, and almost the same as the marker M transmitted after the position marker P0. A time signal is output to the drive means at a cycle shorter by a predetermined time than the predetermined cycle so as to be simultaneously.

また、請求項3に記載した時計装置のように、時刻を知らせる表示器と、この表示器を駆動する駆動手段と、時刻情報を含む標準電波を受信する受信手段と、基準クロック信号を計数して時刻を求め所定周期で前記駆動手段に時刻信号を出力するとともに前記受信手段を介して受信する時刻情報に基づいて時刻を修正処理して前記駆動手段に時刻信号を出力する制御手段とを備える時計装置であって、前記制御手段が時刻情報に基づいて時刻を修正処理した後に、前記制御手段が前記標準電波のタイムコード中のマーカーMを検出し、前記マーカーMの後に送信される1秒周期の信号とほぼ同時となるように、前記所定周期に対して所定時間分短い周期で前記駆動手段に時刻信号を出力するものである。   In addition, as in the timepiece device described in claim 3, the display for notifying the time, the driving means for driving the display, the receiving means for receiving the standard radio wave including the time information, and the reference clock signal are counted. And a control unit that outputs a time signal to the driving unit at a predetermined cycle and corrects the time based on time information received through the receiving unit and outputs the time signal to the driving unit. A timepiece device in which the control unit detects a marker M in the time code of the standard radio wave after the control unit corrects the time based on time information, and is transmitted after the marker M. A time signal is output to the drive means at a cycle shorter by a predetermined time than the predetermined cycle so as to be substantially the same as the cycle signal.

本発明は、演算処理にともなう遅延を抑えて時刻修正することが可能な時計装置を提供することができる。   The present invention can provide a timepiece device capable of correcting the time while suppressing a delay associated with the arithmetic processing.

以下、本発明の実施形態を添付図面に基づいて説明する。   Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

図1は、時計装置100のブロック図であり、ここでは、車両用の計器装置に時計装置を集約したものを例に挙げる。時計装置100は、時計装置100の制御を行う(後述する処理動作をなす)マイクロコンピュータからなる制御手段101と、標準電波を受信するためのアンテナ102と、受信手段103と、車両インターフェース端子109a〜109eと、車両インターフェース手段108と、時刻,積算距離(オド,トリップ)等の表示を行う液晶表示素子や有機EL表示素子等からなるデジタル式の表示器105と、速度計(SP)、エンジン回転計(TA)などの各種計器106と、表示器105及び各種アナログ計器106の駆動手段104と、制御手段101及び標準電波を受信する各時刻等を記憶する記憶手段107と、制御手段101の基準クロック信号を生成する水晶振動子112とから主に構成される。   FIG. 1 is a block diagram of a timepiece device 100. Here, an example in which a timepiece device is integrated into an instrument device for a vehicle will be described. The timepiece device 100 includes control means 101 composed of a microcomputer that controls the timepiece device 100 (performs processing operations described later), an antenna 102 for receiving standard radio waves, a reception means 103, and vehicle interface terminals 109a to 109a. 109e, vehicle interface means 108, digital display 105 including a liquid crystal display element or an organic EL display element for displaying time, accumulated distance (odd, trip), etc., speedometer (SP), engine rotation Various measuring instruments 106 such as a meter (TA), driving means 104 for the display 105 and various analog measuring instruments 106, the storage means 107 for storing the control means 101, each time of receiving the standard radio wave, etc., and the reference of the control means 101 It is mainly composed of a crystal resonator 112 that generates a clock signal.

車両インターフェース端子109a〜109cには、イグニッションキーのオン信号(投入信号)、操作手段から指示信号、その他の車両情報(複数本)がそれぞれ入出力されるべく、それぞれの信号線路が接続される。車両インターフェース端子109d及び109eには、バッテリ及びGNDが接続される。尚、バッテリ109dとGND109eは、電源手段110に接続され、時計装置100内へ所定の電圧供給を行い、リセット手段111は、バッテリ109dが非接触状態から接触状態に移行した際にリセット信号を発生する。   The vehicle interface terminals 109a to 109c are connected to respective signal lines so that an ignition key ON signal (injection signal), an instruction signal from the operation means, and other vehicle information (a plurality of pieces) are input and output. A battery and GND are connected to the vehicle interface terminals 109d and 109e. The battery 109d and the GND 109e are connected to the power supply means 110 and supply a predetermined voltage into the timepiece device 100. The reset means 111 generates a reset signal when the battery 109d shifts from the non-contact state to the contact state. To do.

時計装置100の制御手段101の処理動作について詳述する。制御手段101は、水晶振動子112から発せられる基準クロック信号を計数して時刻を求めて、駆動手段104を介して表示器105に計数処理によって得られた時刻を表示する。そして制御手段101は、所定の時刻(ここでは午前2時、午前4時、午後2時、午後4時の4回)毎に、アンテナ102及び受信手段103を介して時刻情報を含む標準電波を受信する。   The processing operation of the control means 101 of the timepiece device 100 will be described in detail. The control means 101 counts the reference clock signal emitted from the crystal oscillator 112 to obtain the time, and displays the time obtained by the counting process on the display unit 105 via the driving means 104. Then, the control means 101 transmits a standard radio wave including time information via the antenna 102 and the receiving means 103 every predetermined time (here, 2 am, 4 am, 2 pm, 4 pm). Receive.

次に、図2、3を用いて、時刻の修正方法について説明する。制御手段101は、所定の時刻に時刻修正処理を開始する(S1)。少なくとも2分間(2サイクル)分受信した時刻データ(電波)が正常が否かを判定(S2)し、正常であればS3に進み、正常でなければS4に進む。ここでS4に進んだ場合を説明すると、受信時間はバッテリの消耗を抑えるためにある決められた時間となっており、この時間が経過した場合は、受信を終了(S7)し、時刻修正処理が終了する(S9)。また、時間が経過していない場合は、受信を継続(S8)し、S2に戻る。   Next, a time correction method will be described with reference to FIGS. The control means 101 starts time correction processing at a predetermined time (S1). It is determined whether the time data (radio wave) received for at least 2 minutes (2 cycles) is normal (S2). If normal, the process proceeds to S3, and if not normal, the process proceeds to S4. Here, the case of proceeding to S4 will be described. The reception time is a predetermined time for suppressing battery consumption. When this time has elapsed, the reception is terminated (S7), and the time correction processing is performed. Is finished (S9). If the time has not elapsed, the reception is continued (S8), and the process returns to S2.

ここで、S2からS3に進んだ場合の説明に戻る。S2で受信した時刻データが正常であった場合、制御手段101で標準電波のタイムコード中のポジションマーカーP0(通常は、タイムコードの59秒の立ち上がりに対応、閏秒によって、前後1秒変化)を検出したかどうかを判定する(S3)。ここでポジションマーカーP0が検出できた場合、S4に進み制御手段101の内部時計を修正する。ここまでの時計修正の演算処理には、図3で示すように、(A)の標準電波のポジションマーカーP0の立ち上がりに対して、時刻修正処理は、(C)で示すように、時間経過してしまっている。ここで、制御手段101は、通常であれば、図3の動作のタイミングを説明する図の特に(E)で示すように、所定の周期で表示器105を駆動する駆動手段104に信号を出力するものである。   Here, the description returns to the case of proceeding from S2 to S3. If the time data received at S2 is normal, the control means 101 uses the position marker P0 in the time code of the standard radio wave (usually corresponding to the rise of 59 seconds of the time code, changing 1 second before and after by leap seconds) Is detected (S3). If the position marker P0 can be detected, the process proceeds to S4 and the internal clock of the control means 101 is corrected. As shown in FIG. 3, the clock correction calculation processing up to this point is that the time correction processing elapses as shown in (C) with respect to the rising edge of the standard radio wave position marker P <b> 0 in (A). It has been. Here, the control means 101 normally outputs a signal to the drive means 104 that drives the display 105 at a predetermined cycle, as shown in FIG. To do.

この所定の周期は1秒で、デューティー比が50%の矩形波信号で、この信号の立ち上がりを検出すると、駆動手段104に制御手段101が時刻信号を出力していた。このため、制御手段101で標準電波のP0を検出し時刻を修正しても、通常の周期で、駆動手段104に時刻信号を出力していては、標準電波のマーカーM(タイムコードの毎分0秒の立ち上がりに対応)受信時には、表示器105での表示にズレが生じることとなる。   The predetermined period is 1 second, and a rectangular wave signal with a duty ratio of 50%. When the rising of this signal is detected, the control means 101 outputs a time signal to the drive means 104. For this reason, even if the control means 101 detects P0 of the standard radio wave and corrects the time, if the time signal is output to the drive means 104 at a normal cycle, the standard radio wave marker M (time code every minute) Corresponding to the rise of 0 seconds) At the time of reception, the display on the display unit 105 is shifted.

そこで、本実施形態では、この駆動手段104への時刻信号を出力する所定の周期に対して、図3中の(D)で示すように、標準電波のポジションマーカーP0を受信してから、時刻修正処理までにかかる所定時間t分短い周期で、駆動手段104に時刻信号を1回だけ出力する(S5)。この所定時間tは、標準電波を演算処理する時間であり、図3中の標準電波の立ち上がりから、時刻修正処理の終了を示す立ち下がりまでであり、時間にすると、平均で40ミリ秒であり、本実施例では、この40ミリ秒を所定時間tと設定している。このようにすることで、演算処理にともなう遅延を抑えて、標準電波のマーカーM受信時に、表示器105の表示が遅延を抑え、時刻を合わせて表示することができる。そして、この時刻修正処理を終了する(S9)。   Therefore, in the present embodiment, as shown by (D) in FIG. 3, for the predetermined period for outputting the time signal to the driving means 104, the time is received after receiving the standard radio wave position marker P0. A time signal is output to the drive means 104 only once in a cycle shorter by a predetermined time t required for the correction process (S5). The predetermined time t is a time for calculating the standard radio wave, and is from the rise of the standard radio wave in FIG. 3 to the fall indicating the end of the time correction process. In terms of time, it is 40 milliseconds on average. In this embodiment, this 40 milliseconds is set as the predetermined time t. By doing so, it is possible to suppress the delay associated with the arithmetic processing, suppress the delay of the display on the display unit 105 when receiving the standard radio wave marker M, and display the time together. Then, the time correction process is terminated (S9).

なお、前記実施形態では、標準電波のタイムコード中のポジションマーカーP0の後に送信されるマーカーMとほぼ同時となるように、前記所定周期に対して所定時間分短い周期で駆動手段104に時刻信号を出力するものでしたが、前記実施形態に限定されるものではなく、標準電波のタイムコード中のマーカーMを検出し、マーカーMの後に1秒周期で送信される信号とほぼ同時となるように、前記所定周期に対して所定時間分短い周期で駆動手段104に時刻信号を出力してもよい。また、前記所定周期に対して所定時間分短い周期で駆動手段104に時刻信号を出力する時期も、マーカーMの直後の標準電波の信号に限定されるものではなく、例えば、数秒後に送信される信号に合わせても良いし、また、マーカーMの後に送信されるいくつかのポジションマーカーの一つに合わせてもよい。   In the embodiment, the time signal is sent to the driving means 104 at a cycle shorter by a predetermined time than the predetermined cycle so as to be almost the same as the marker M transmitted after the position marker P0 in the time code of the standard radio wave. However, the present invention is not limited to the above-described embodiment, and the marker M in the time code of the standard radio wave is detected, so that the signal transmitted at a period of 1 second after the marker M is almost simultaneous. In addition, a time signal may be output to the driving unit 104 at a cycle shorter by a predetermined time than the predetermined cycle. Also, the time when the time signal is output to the driving means 104 at a cycle shorter than the predetermined cycle by a predetermined time is not limited to the standard radio wave signal immediately after the marker M, and is transmitted, for example, after a few seconds. It may be adjusted to a signal or may be adjusted to one of several position markers transmitted after the marker M.

なお、前記実施形態では、計器装置100は、車両用の計器装置に集約したものであったが、前記実施例に限定されるものではなく、時計装置のみの構成であっても良い。   In the above-described embodiment, the instrument device 100 is integrated into the instrument device for a vehicle, but is not limited to the above-described example, and may be configured only with a timepiece device.

本発明の実施形態の時計装置を示すブロック図。The block diagram which shows the timepiece apparatus of embodiment of this invention. 同時計装置の時刻修正処理を説明する図。The figure explaining the time correction process of the timepiece device. 同時計装置の動作のタイミングを説明する図。The figure explaining the timing of operation | movement of the timepiece device.

符号の説明Explanation of symbols

100 時計装置
101 制御手段
102 アンテナ
103 受信手段
104 駆動手段
105 表示器
107 記憶手段
109a〜109e 車両インターフェース端子
112 水晶振動子
DESCRIPTION OF SYMBOLS 100 Clock apparatus 101 Control means 102 Antenna 103 Receiving means 104 Driving means 105 Display device 107 Storage means 109a-109e Vehicle interface terminal 112 Crystal oscillator

Claims (3)

時刻を知らせる表示器と、この表示器を駆動する駆動手段と、時刻情報を含む標準電波を受信する受信手段と、基準クロック信号を計数して時刻を求め所定周期で前記駆動手段に時刻信号を出力するとともに前記受信手段を介して受信する時刻情報に基づいて時刻を修正処理して前記駆動手段に時刻信号を出力する制御手段とを備える時計装置であって、前記制御手段が時刻情報に基づいて時刻を修正処理した後に、前記所定周期に対して所定時間分短い周期で前記駆動手段に時刻信号を出力することを特徴とする時計装置。 A display for notifying the time, a driving means for driving the display, a receiving means for receiving a standard radio wave including time information, a reference clock signal is counted to determine the time, and a time signal is sent to the driving means at a predetermined cycle. And a control unit that outputs a time signal to the driving unit by correcting the time based on the time information received and received via the receiving unit, the control unit based on the time information Then, after correcting the time, a time signal is output to the driving means at a cycle shorter by a predetermined time than the predetermined cycle. 時刻を知らせる表示器と、この表示器を駆動する駆動手段と、時刻情報を含む標準電波を受信する受信手段と、基準クロック信号を計数して時刻を求め所定周期で前記駆動手段に時刻信号を出力するとともに前記受信手段を介して受信する時刻情報に基づいて時刻を修正処理して前記駆動手段に時刻信号を出力する制御手段とを備える時計装置であって、前記制御手段が時刻情報に基づいて時刻を修正処理した後に、前記標準電波のタイムコード中のポジションマーカーP0を検出し、前記ポジションマーカーP0の後に送信されるマーカーMとほぼ同時となるように、前記所定周期に対して所定時間分短い周期で前記駆動手段に時刻信号を出力することを特徴とする時計装置。 A display for notifying the time, a driving means for driving the display, a receiving means for receiving a standard radio wave including time information, a reference clock signal is counted to determine the time, and a time signal is sent to the driving means at a predetermined cycle. And a control unit that outputs a time signal to the driving unit by correcting the time based on the time information received and received via the receiving unit, the control unit based on the time information After correcting the time, a position marker P0 in the time code of the standard radio wave is detected, and a predetermined time with respect to the predetermined period is set to be almost the same as the marker M transmitted after the position marker P0. A timepiece device that outputs a time signal to the driving means at a short cycle. 時刻を知らせる表示器と、この表示器を駆動する駆動手段と、時刻情報を含む標準電波を受信する受信手段と、基準クロック信号を計数して時刻を求め所定周期で前記駆動手段に時刻信号を出力するとともに前記受信手段を介して受信する時刻情報に基づいて時刻を修正処理して前記駆動手段に時刻信号を出力する制御手段とを備える時計装置であって、前記制御手段が時刻情報に基づいて時刻を修正処理した後に、前記制御手段が前記標準電波のタイムコード中のマーカーMを検出し、前記マーカーMの後に送信される1秒周期の信号とほぼ同時となるように、前記所定周期に対して所定時間分短い周期で前記駆動手段に時刻信号を出力することを特徴とする時計装置。 A display for notifying the time, a driving means for driving the display, a receiving means for receiving a standard radio wave including time information, a reference clock signal is counted to determine the time, and a time signal is sent to the driving means at a predetermined cycle. And a control unit that outputs a time signal to the driving unit by correcting the time based on the time information received and received via the receiving unit, the control unit based on the time information After the time is corrected, the control means detects the marker M in the time code of the standard radio wave, and the predetermined period is set to be substantially the same as the signal of the one-second period transmitted after the marker M. The timepiece device outputs a time signal to the driving means at a cycle shorter than a predetermined time.
JP2004346428A 2004-11-30 2004-11-30 Clock device Pending JP2006153721A (en)

Priority Applications (1)

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JP2004346428A JP2006153721A (en) 2004-11-30 2004-11-30 Clock device

Applications Claiming Priority (1)

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JP2004346428A JP2006153721A (en) 2004-11-30 2004-11-30 Clock device

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JP2006153721A true JP2006153721A (en) 2006-06-15

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Family Applications (1)

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JP2004346428A Pending JP2006153721A (en) 2004-11-30 2004-11-30 Clock device

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Country Link
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