JP2006129627A - Switched capacitor type charge-reusing power supply circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To increase the degree of designing freedom of a switched capacitor type charge-reusing power supply circuit. <P>SOLUTION: In the switched capacitor type charge-reusing power supply circuit wherein four-step staircase waveform voltage having an equal voltage difference is applied to load capacity C<SB>L</SB>by a switched capacitor circuit utilizing three tank capacitors C<SB>1</SB>, C<SB>2</SB>, C<SB>3</SB>, the capacitor values of the three tank capacitors C<SB>1</SB>, C<SB>2</SB>, C<SB>3</SB>are made at least ten or more times larger than the capacitor value of the load capacity C<SB>L</SB>as well as making them different from each other. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a switched-capacitor-type charge recycling power supply circuit in which the degree of freedom of a design capacitance value of a tank capacitor of a switched-capacitor circuit is increased and the degree of freedom of design is increased.

  The operation of a conventionally known switched capacitor type charge recycling power supply circuit will be described. This circuit was invented in 1994 by Svensson et al. (For example, see Patent Document 1)

9, as a conventional example, generates a staircase waveform voltage in four steps shows a circuit of C _L V ^2/4 this by energy consumption of charging and discharging of the load capacitance C _L. As a tank capacitor, C ₁ = C ₂ = C ₃ = C is set. At this time, in the pulse signals T0, T1, T2, T3, and T4, the pulse signal is changed from Low to High in the order of T0, T1, T2, T3, T4, T3, T2, T1, and T0. The tank capacitors C ₁ , C ₂ , C ₃ and the transistors G ₀ , G ₁ , G ₂ , G ₃ , G ₄ switched by the pulse signals T0, T1, T2, T3, T4 constitute a switched capacitor circuit. is doing. FIG. 10 shows a timing chart of the circuit of FIG.
US Pat. No. 5,473,526

In this case, it has been known that a staircase waveform voltage is generated spontaneously. However, this proof was not performed mathematically strictly and was a phenomenon that was empirically known through simulations and experiments. An example of the simulation result is shown in FIG. V indicates a power supply voltage value. Further, when the value of the tank capacitor was changed from C ₁ = C ₂ = C ₃ = C, the behavior and stability of the output waveform were not clarified at all.

  An object of the present invention is to clarify the behavior and stability of an output waveform when the values of at least one tank capacitor among a plurality of tank capacitors are different, and to increase the degree of freedom in designing a switched capacitor type charge recycling power supply circuit. Is to increase.

  According to a first aspect of the present invention, there is provided a switched capacitor type charge recycling power supply circuit which converts an applied voltage into an N-step staircase waveform voltage into a load capacitance by a switched capacitor circuit using N-1 tank capacitors. In the switched capacitor type charge recycling power supply circuit to be applied, the capacitance value of each of the (N−1) tank capacitors is at least 10 times larger than the capacitance value of the load capacitance, and at least one of them is another It is characterized by being set differently.

According to the present invention, it is possible to configure a charge recycling power supply circuit that has a high degree of design freedom with respect to the value of the tank capacitor. For example, when realizing a circuit configuration in which a 6-step staircase power supply circuit and a 3-step staircase power supply circuit having a capacitance of 100 pF in all of the switched capacitor circuits are realized, as shown in FIG. 8, tank capacitors C ₂ and C ₁ It is possible to connect 'and connect C ₄ and C ₂ '. At this time, the values of the tank capacitors C _{1 to} C ₅ of the 6-step staircase power supply circuit (left circuit) are 100, 200, 100, 200, and 100 pF. On the other hand, the values of the tank capacitors C ₁ ′ and C ₂ ′ of the three-step staircase power supply circuit (right circuit) are 200 and 200 pF. As a result, the value of the capacitor can be increased from the value 100 pF of the tank capacitor before wiring, and a switched capacitor type charge recycling power supply circuit with improved noise resistance can be configured. Also, according to the October 2004 issue of EDN Japan, it is pointed out that the tolerance of electric field capacitors should be estimated to be about three times. According to the present invention, the tolerance of such an electric field capacitor can be ignored.

Next, if the value of the tank capacitor C _i is sufficiently larger than the value of the load capacitance C _L (at least 10 times or more), even if the tank capacitor C _i takes an arbitrary value, the step waveform voltage of N steps is initial. A description will be given of convergence to i / N · V (i = 0, 1, 2,..., N) regardless of the state. For this purpose, the potential of the tank capacitor C _i is defined as V _Ci , V _i is defined as the differential voltage between V _Ci and the convergence voltage i / N · V (FIG. 5), and the voltage V _i converges to 0. It is proved that V _Ci converges to i / N · V.

Ｃ_i＞＞Ｃ_Lの条件において、次式が得られる。

ここで、Ｖ_C０＝０と定義した（図５）。 Assuming that the charge amount transferred from the tank capacitor C _i to the load capacitor C _L is Q _ti , the following equation is approximately established from the equipotential condition when C _i >> C _L (FIG. 6 (a)).

In conditions of C _i >> C _L, the following equation is obtained.

Here, V _C0 = 0 was defined (FIG. 5).

Ｃ_i＞＞Ｃ_Lの条件において、次式が得られる。

ここで、Ｖ_cN＝Ｖと定義した（図５）。 Then, the load from the capacitance C _L, in the case of collecting the charge in the tank capacitor C _i, when the amount of charge collected and Q _ri, C _i >> C _L has the formula than the condition of equipotential follows at approximately (Fig. 6 (b)).

In conditions of C _i >> C _L, the following equation is obtained.

Here, it was defined as V _cN = V (FIG. 5).

ここで、定義より

となり、式（６）を式（５）に代入すると

と書ける。また、Ｖ_iの変化量をΔＶ_iと定義すると、

と書ける。Ｖ_i’を充電回収の１サイクルの後のＶ_ciとi/N・Ｖとの差分と定義すると、式（７），式（８）より次式が成立する。

ここで、Ｋ_iはＣ_L／Ｃ_iである。Ｃ_i＞＞Ｃ_Lより、０＜Ｋ_i＜＜１である。式（９）を用いると、次の関係式が得られる。

（10）
ここで、Ｖ_i(k)は、ｋ回目の充放電の後のＶ_ciとi/N・Ｖとの差分である。 In the tank capacitor C _i , the charge change amount ΔQ _i in one cycle of charge recovery can be written as follows.

Here, from the definition

And substituting equation (6) into equation (5)

Can be written. Further, when the amount of change V _i is defined as [Delta] V _i,

Can be written. If V _i ′ is defined as the difference between V _ci and i / N · V after one cycle of charge recovery, the following equation is established from equations (7) and (8).

Here, K _i is C _L / C _i . From C _i >> C _L , 0 <K _i << 1. Using equation (9), the following relational expression is obtained.

(Ten)
Here, V _i (k) is the difference between V _ci and i / N · V after the kth charge / discharge.

ここで、公式det（ａ₁,・・・,ｃａ_j,・・・,ａ_n）＝ｃ・det（ａ₁,・・・,ａ_j,・・・,ａ_n）を用いると、次式が得られる。

Next, the magnitude of the eigenvalue of the matrix A is examined. The characteristic polynomial of A can be written as

Here, using the formula det (a ₁ ,..., Ca _j ,..., _An ) = c · det (a ₁ ,..., A _j ,..., _An ), The formula is obtained.

この場合、|λ｜≧１のときに、ｎ≧１において、Ｅ_n≧２が成り立つ。 Next we prove the following theorem.
[Theorem 1]

In this case, when | λ | ≧ 1, E _n ≧ 2 holds when n ≧ 1.

と書ける。これより

であり、Iを展開すると次式が成立する。

[Proof]
λ = r cos θ + rsin θ · i. Then

Can be written. Than this

When I is expanded, the following equation is established.

となる。ｒ≧１のとき、ｒ／（１−２Ｋ_i）＞１より、∂Ｉ／∂ｒ＞０が成立する。 If I is partially differentiated by r,

It becomes. When r ≧ 1, r / (1-2K _i )> 1 holds, so that ∂I / ∂r> 0.

となる。∂Ｉ／∂θ＝０より、θ＝０で最小、θ＝πで最大が得られる。以上の結果より、Ｉはｒ、θの関数としたときに、ｒ＝１、θ＝０において、最小値４Ｋ_i ²をとる。この場合、|ａ_i｜＝２である。したがって、｜ａ_i｜≧２が成立する。 If I is partially differentiated by θ,

It becomes. From ∂I / ∂θ = 0, the minimum is obtained when θ = 0 and the maximum is obtained when θ = π. From the above results, when I is a function of r and θ, the minimum value 4K _i ² is obtained at r = 1 and θ = 0. In this case, | a _i | = 2. Therefore, | a _i | ≧ 2 holds.

となる。 Now, if E _n is expanded with respect to the nth row,

It becomes.

となる。 When the second term on the right side is expanded with respect to the (n-1) th column,

It becomes.

と書ける。ここでＥ₁＝ａ₁、Ｅ₀＝１と定義すると、Ｅ₂＝ａ₂ａ₁−１、Ｅ₃＝ａ₃ａ₂ａ₁−ａ₃−ａ₁となり、Ｅ_nの展開式と一致する。 Therefore,

Can be written. Now E ₁ = a _1, defined E ₀ = 1 and, consistent with _{E 2 = a 2 a 1 -1} , E 3 = a 3 a 2 a 1 -a 3 -a 1 , and the foldout of E _n To do.

であり、よって、｜Ｅ₁｜＞｜Ｅ₀｜＝１が示される。次に、｜Ｅ_k｜＞｜Ｅ_k-1｜を仮定して、｜Ｅ_k+1｜＞｜Ｅ_k｜を証明する。

よって、|Ｅ_k+1|＞|Ｅ_k|が示された。|Ｅ₁|＝|ａ₁|≧２より、ｎ≧１において|Ｅ_n|≧２が成立する。 Now, from the definition,

Therefore, | E ₁ |> | E ₀ | = 1 is indicated. Next, assuming | E _k |> | E _k−1 |, we prove | E _{k + 1} |> | E _k |.

Therefore, | E _{k + 1} |> | E _k | was shown. From | E ₁ | = | a ₁ | ≧ 2, | E _n | ≧ 2 holds when n ≧ 1.

とする。 [Theorem 2]

And

と定義する。Ｏ（Ｋ_i）はランダウの記号と呼ばれており、

が有界であることを示す。このとき、

が成り立つ。 here,

It is defined as O (K _i ) is called Landau's symbol,

Indicates that is bounded. At this time,

Holds.

である。この場合、｜λ｜≧１のときに、ｎ≧１において

が成立する。 Therefore,

It is. In this case, when | λ | ≧ 1, n ≧ 1

Is established.

いま、Ｆ_n−Ｅ_nの挙動について調べる。Ｆ_nにおいて、Ｋを含まない項は、Ｅ_nのいずれかの項と一致する。 [Proof]
For simplicity, let O (K) = K, and even in this case, the generality of the following proof is not lost. Then, F _n is expressed by the following equation.

Now, the behavior of F _n −E _n is examined. In F _n , a term that does not include K matches any term in E _n .

このとき、定理１より、｜Ｅ_n｜≧２が成立するので、

となる。ここで、Ｋ＜δとして、｜Ｆ_n−Ｅ_n｜／｜Ｅ_n｜＜εとすることができる。 Therefore, the F _n -E _n, because it is erased, in the F _n -E _n, each term always includes a K. Therefore, the following equation is established.

At this time, according to Theorem 1, | E _n | ≧ 2 holds, so

It becomes. Here, it is possible to satisfy | F _n −E _n | / | E _n | <ε, where K <δ.

と変形できる。 At this time,

And can be transformed.

が成り立つ。定義から、Ｆ₁＝ａ₁＋Ｋより、

が示される。これより、ｎ≧１において、次式が成立する。

[証明終] Therefore,

Holds. From the definition, F ₁ = a ₁ + K

Is shown. Thus, the following formula is established when n ≧ 1.

[End of proof]

Now, the matrix A, as can be seen in equation (10), considering only the first order term of K _i, is an equation which ignores the K _i ² higher order terms. The characteristic equation agrees with E _n = 0. In addition, the specific equation agrees with F _n = 0 in consideration of higher-order terms of K _i ² or higher that were ignored in the equation (10). According to Theorem 1 and 2, when | λ | ≧ 1, | E _n | and | F _n | are values of 2 or more and do not become 0, which contradicts E _n = 0 and F _n = 0. Therefore, in either case, | λ | <1.

ここでＪはJordan標準行列である。

Ｊ（λ_i，ｋ_i）はｋ_i×ｋ_iの行列であり、固有値λ_iを持ち次式で書ける。

ここで、ｎを無限大にしたときに｜λ_i｜＜１の場合に、Ｊⁿ →０となる（参考文献：杉浦光夫、横沼健雄 著、ジョルダン標準形・テンソル代数、岩波基礎数学選書、１９９０年、岩波書店）。 In general, A can be converted to the Jordan standard form using the regular matrix P.

Where J is the Jordan standard matrix.

J (λ _i , k _i ) is a matrix of k _i × k _i and has an eigenvalue λ _{i and} can be written as

Here, when n is infinite, when | λ _i | <1, J ⁿ → 0 (reference: Mitsuo Sugiura, Takeo Yokonuma, Jordan standard form, tensor algebra, Iwanami basic mathematics book, 1990, Iwanami Shoten).

を用いると

となる。これより、ステップ電圧i/N・Ｖからの変位量Ｖ_iは０に収束し、タンクキャパシタの電位Ｖ_ciは、i/N・Ｖに収束することが証明された。 Therefore,

With

It becomes. From this, it was proved that the displacement amount V _i from the step voltage i / N · V converges to 0, and the potential V _{ci of the} tank capacitor converges to i / N · V.

A specific embodiment 1 of the present invention is shown in FIG. In the charge recycling power supply circuit of FIG. 1, tank capacitors C ₁ , C ₂ , C ₃ and transistors G ₀ , G ₁ , G ₂ , G ₃ , switched by pulse signals T0, T1, T2, T3, T4, G ₄ constitutes a switched capacitor circuit. The values of the tank capacitor C _i are set as C ₁ = 100 pF, C ₂ = 50 pF, and C ₃ = 400 pF. Since the value of the load capacity C _L is C _L = 2pF, the condition of C _i >> C _L is satisfied. Regarding the condition of C _i >> C _L , specifically, the value of the tank capacitor C _i is preferably at least 10 times the value of the load capacity C _L. The timing chart of the input pulse signal of this circuit is the same as FIG.

A specific example 2 of the present invention is shown in FIG. In the charge recycling power supply circuit of FIG. 2, the values of the charge recovery tank capacitor C _i are set as C ₁ = 50 pF, C ₂ = 400 pF, and C ₃ = 100 pF. Since the value of the load capacity C _L is C _L = 2pF, the condition of C _i >> C _L is satisfied.

Simulation operations of the circuits of FIGS. 1 and 2 are shown in FIGS. 7 (a) and 7 (b), respectively. Here, the ON resistance and OFF resistance of the switching transistor are 1 kΩ and 1 TΩ, respectively. Further, the period of the 4-step staircase waveform voltage is 1 μs, and therefore, simulation was performed with an operation of 1 MHz. The power supply voltage V was 5 V, and the initial state of V _Ci (i = 1, 2, 3) was 2.5 V. When 400 μs elapses, it can be seen that in both FIGS. 7A and 7B, V _C1 = 1/4 · V, V _C2 = _2/4 · V, and V _C3 = 3/4 · V.

FIG. 3 shows a circuit configuration of an N-step charge recycling power supply circuit according to the present invention. Here, N-1 tank capacitors are used. The value of the tank capacitor C _{i is, C 1 = 400pF, C 2} = 50pF, a C _N-1 = 800pF, the values of the other tank capacitor C _i, if they meet the conditions of C _i >> C _L , Any value. FIG. 4 shows a timing chart of the input pulse signal of FIG.

1 is a circuit diagram of a charge reuse power supply circuit according to Embodiment 1. FIG. 6 is a circuit diagram of a charge reuse power supply circuit according to Embodiment 2. FIG. FIG. 6 is a circuit diagram of a charge recycling power supply circuit according to a third embodiment. 4 is a timing chart of the charge recycling power supply circuit of FIG. 3. FIG. 6 is an explanatory diagram of a differential voltage V _i between a potential V _Ci of a tank capacitor C _i and a potential i / N · V that converges with the potential V _Ci . It is explanatory drawing of the charge transfer (a) from the tank capacitor C _i to the load capacity C _L and vice versa. (A) is a waveform diagram of a simulation result of the operation of the charge recycling power supply circuit of FIG. 1, and (b) is a waveform diagram of a simulation result of the operation of the charge recycling power supply circuit of FIG. FIG. 6 is a circuit diagram in which a 6-step staircase charge recycle power supply circuit and a 3-step staircase charge recycle power supply circuit are realized by using a partly common tank capacitor. It is a circuit diagram of a conventional charge recycling power supply circuit. 10 is a timing chart of the charge recycling power supply circuit of FIG. 9. FIG. 10 is a waveform diagram of a simulation result of the operation of the charge recycling power supply circuit of FIG. 9.

Explanation of symbols

_{C i, C 1 ~C N-} 1, C 1 '~C 2': tank capacitor C _L, C _L ': load capacitance _{G 0 ~G N, G 0'} ~G 3 ': transistors T0 to Tn: Pulse signal

Claims (1)

In a switched capacitor type charge recycling power supply circuit that converts an applied voltage into a stepped waveform voltage of N steps and applies it to a load capacitor by a switched capacitor circuit using N-1 tank capacitors.
A switched capacitor characterized in that the capacitance value of each of the N-1 tank capacitors is set to be at least 10 times larger than the capacitance value of the load capacitance, and at least one of them is different from the others. Type charge recycling power supply circuit.

Images