JP2006129402A - Amplifier circuit and transmitter - Google Patents

Amplifier circuit and transmitter Download PDF

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JP2006129402A
JP2006129402A JP2004318602A JP2004318602A JP2006129402A JP 2006129402 A JP2006129402 A JP 2006129402A JP 2004318602 A JP2004318602 A JP 2004318602A JP 2004318602 A JP2004318602 A JP 2004318602A JP 2006129402 A JP2006129402 A JP 2006129402A
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phase
constant envelope
signal
amplifier circuit
input signal
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Takashi Izumi
貴志 泉
Kazuhiko Ikeda
和彦 池田
Akira Sasaki
亮 佐々木
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0294Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using vector summing of two or more constant amplitude phase-modulated signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages

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  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To perform amplification while maintaining high efficiency even if a peak factor of an input signal inputted to an amplifier circuit is great. <P>SOLUTION: If an input signal S is inputted to an amplifier circuit 100 of a LINC system, a predetermined envelope signal generating unit 101 generates two predetermined envelope signals S1, S2 and phase shifters 102a, 102b change phases to reduce a phase difference between the predetermined envelope signals S1, S2. Phase changed two predetermined envelope signals S1a, S2a are amplified by amplifiers 103a, 103b, respectively. Furthermore, amplified two predetermined envelope signals S1ag, S2ag are synthesized by a synthesizer circuit 104 and outputted as a synthetic signal Sag. At such a time, the phase shifters 102a, 102b change the phases to reduce the phase difference between the predetermined envelope signals S1, S2, thereby enlarging a minimum value of the synthetic signal Sag and also enlarging average output power. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、通信装置などに用いられる増幅回路等に関し、特に、放送分野や無線通信分野などで用いられる送信装置の送信信号を増幅する終段の増幅回路、及びこの増幅回路を備えた送信機に関する。   The present invention relates to an amplifier circuit used in a communication device and the like, and in particular, a final-stage amplifier circuit that amplifies a transmission signal of a transmission device used in a broadcasting field, a wireless communication field, and the like, and a transmitter including the amplifier circuit About.

近年、放送分野や無線通信分野などで用いられている送信装置は、ディジタル変調された信号を送信するケースが多くなっている。これらの送信信号の多くは多値化が進み、信号の振幅方向に情報が載せられるために送信装置に用いられる増幅回路は線形性が求められている。また、一方では、送信装置に消費される電力を削減するために増幅回路には高い電力効率も求められている。このように、増幅回路の線形性と電力効率の高効率化を両立させるために、歪み補償や電力効率の改善を図るための様々な手法が提案されている。例えば、LINC(Linear Amplification with Nonlinear Components:非線形装置を用いた線形増幅)方式と呼ばれている従来の増幅回路は、送信信号を2つの定包絡線信号に分岐して、電力効率の高い非線形増幅器で増幅した後に合成することによって線形性と電力効率向上の両立を図っている(例えば、特許文献1参照)。また、非線形で高効率な送信増幅器を用いて送信信号を増幅した後に直交変調を行って線形性を求めることによって線形性と電力効率の向上化を図る技術も開示されている(例えば、特許文献2参照)。   In recent years, transmission apparatuses used in the broadcast field, the wireless communication field, and the like are increasingly transmitting digitally modulated signals. Many of these transmission signals have been multi-valued, and information is placed in the amplitude direction of the signal, so that an amplifier circuit used in the transmission apparatus is required to have linearity. On the other hand, in order to reduce the power consumed by the transmission device, the amplifier circuit is also required to have high power efficiency. As described above, in order to achieve both the linearity of the amplifier circuit and the improvement of the power efficiency, various techniques for improving the distortion compensation and the power efficiency have been proposed. For example, a conventional amplifying circuit called a LINC (Linear Amplification with Nonlinear Components) system splits a transmission signal into two constant envelope signals, and has a high power efficiency. The linearity and the power efficiency are improved by synthesizing after amplification in (see, for example, Patent Document 1). Also disclosed is a technique for improving linearity and power efficiency by amplifying a transmission signal using a nonlinear high-efficiency transmission amplifier and performing quadrature modulation to obtain linearity (for example, Patent Documents) 2).

図12は、従来のLINC方式による増幅回路の一例を示すブロック図である。図12に示す増幅回路800において、定包絡線信号生成部801は、入力信号S(t)から、2つの定包絡線信号S1(t)、S2(t)を生成する。以下、入力信号S(t)から2つの定包絡線信号S1(t)、S2(t)を生成する過程を数式により説明する。入力信号S(t)及び2つの定包絡線信号S1(t)、S2(t)は、それぞれ次の式(1)、式(2)、及び式(3)で求められる。   FIG. 12 is a block diagram showing an example of a conventional LINC amplifier circuit. In the amplifier circuit 800 shown in FIG. 12, the constant envelope signal generation unit 801 generates two constant envelope signals S1 (t) and S2 (t) from the input signal S (t). Hereinafter, a process of generating two constant envelope signals S1 (t) and S2 (t) from the input signal S (t) will be described with mathematical expressions. The input signal S (t) and the two constant envelope signals S1 (t) and S2 (t) are obtained by the following equations (1), (2), and (3), respectively.

S(t)=V(t)・cos{ωct+φ(t)} (1)
S1(t)=Vmax/2・cos{ωct+ψ(t)} (2)
S2(t)=Vmax/2・cos{ωct+θ(t)} (3)
但し、
ψ(t)=φ(t)+α(t)
θ(t)=φ(t)−α(t)
α(t)=cos−1{V(t)/Vmax}
尚、V(t)は入力信号の電圧、VmaxはV(t)の最大値、ωcは入力信号の搬送波の角周波数である。
S (t) = V (t) · cos {ωct + φ (t)} (1)
S1 (t) = Vmax / 2 · cos {ωct + ψ (t)} (2)
S2 (t) = Vmax / 2 · cos {ωct + θ (t)} (3)
However,
ψ (t) = φ (t) + α (t)
θ (t) = φ (t) −α (t)
α (t) = cos −1 {V (t) / Vmax}
V (t) is the voltage of the input signal, Vmax is the maximum value of V (t), and ωc is the angular frequency of the carrier wave of the input signal.

S(t)が上記の式(1)で表されたとき、S1(t)、S2(t)を式(2)、(3)とすれば、S1(t)、S2(t)は振幅方向が定数の定包絡線信号となる。   When S (t) is expressed by the above equation (1), if S1 (t) and S2 (t) are expressed by equations (2) and (3), S1 (t) and S2 (t) are amplitudes. A constant envelope signal with a constant direction.

図13は、図12に示すLINC方式増幅回路における各信号の直交平面座標のベクトル図である。すなわち、この図は、図12の定包絡線信号生成部801の動作を直交変面座標上で信号ベクトルを用いて表したものである。図13に示すように、入力信号S(t)は、振幅がVmax/2の2つの定包絡線信号S1(t)、S2(t)のベクトル和で表される。2つの定包絡線信号S1(t)、S2(t)をそれぞれ第1の増幅器802a及び第2の増幅器802bで増幅する。このとき、第1の増幅器802a及び第2の増幅器802bの利得をそれぞれGとすると、第1の増幅器802a及び第2の増幅器802bの出力信号は、それぞれ、G×S1(t)及びG×S2(t)となる。これらの出力信号を合成回路803によってベクトル合成すると、出力信号G×S(t)を得ることができる。このようにして、第1の増幅器802a及び第2の増幅器802bはそれぞれ個別に定包絡線信号S1(t)、S2(t)を増幅するので、第1の増幅器802a及び第2の増幅器802bの非線形領域すなわち飽和領域で増幅することが可能となる。したがって、第1の増幅器802a及び第2の増幅器802bの電力効率を高くして使用することができる。
特公平6−22302号公報 特開平8−163189号公報
FIG. 13 is a vector diagram of orthogonal plane coordinates of each signal in the LINC amplifier circuit shown in FIG. That is, this figure shows the operation of the constant envelope signal generation unit 801 in FIG. 12 using signal vectors on the orthogonal plane coordinates. As shown in FIG. 13, the input signal S (t) is represented by a vector sum of two constant envelope signals S1 (t) and S2 (t) having an amplitude of Vmax / 2. The two constant envelope signals S1 (t) and S2 (t) are amplified by the first amplifier 802a and the second amplifier 802b, respectively. At this time, if the gains of the first amplifier 802a and the second amplifier 802b are G, the output signals of the first amplifier 802a and the second amplifier 802b are G × S1 (t) and G × S2, respectively. (T). When these output signals are vector-synthesized by the synthesis circuit 803, an output signal G × S (t) can be obtained. In this way, the first amplifier 802a and the second amplifier 802b individually amplify the constant envelope signals S1 (t) and S2 (t), respectively, so that the first amplifier 802a and the second amplifier 802b Amplification can be performed in a non-linear region, that is, a saturation region. Therefore, the first amplifier 802a and the second amplifier 802b can be used with high power efficiency.
Japanese Patent Publication No. 6-22302 JP-A-8-163189

しかしながら、上記従来の増幅回路では、元の信号である入力信号S(t)のピークファクタが大きくなり、かつ平均振幅が小さくなると、増幅回路における電力効率が低下してしまう。また、入力信号S(t)の変調条件の変化によってピークファクタの値が大きくなったり最大出力電力が小さくなったりすると、増幅回路の電力効率が低下してしまうなどの不具合がある。   However, in the conventional amplifier circuit, when the peak factor of the input signal S (t), which is the original signal, increases and the average amplitude decreases, the power efficiency in the amplifier circuit decreases. Further, when the peak factor value increases or the maximum output power decreases due to a change in the modulation condition of the input signal S (t), there is a problem that the power efficiency of the amplifier circuit decreases.

本発明はかかる点に鑑みてなされたものであり、増幅回路に入力される入力信号のピークファクタが大きくても、高効率を維持して増幅器を使用することができ、かつ、線形性を保ちながら入力信号を所望のレベルに増幅することができる増幅回路を提供することを目的とする。   The present invention has been made in view of the above points, and even if the peak factor of the input signal input to the amplifier circuit is large, the amplifier can be used while maintaining high efficiency, and the linearity can be maintained. An object of the present invention is to provide an amplifier circuit capable of amplifying an input signal to a desired level.

本発明の増幅回路は、入力信号から位相の異なる二つの定包絡線信号を生成する定包絡線信号生成手段と、二つの定包絡線信号のそれぞれの位相を個別に変化させる二つの移相手段と、二つの移相手段の出力信号を個別に増幅する二つの増幅手段と、二つの増幅手段の出力信号を合成する合成手段とを備え、定包絡線信号生成手段は、入力信号に対してプラス方向の位相にある第1の定包絡線信号と、入力信号に対してマイナス方向の位相にある第2の定包絡線信号とを生成し、二つの移相手段のうち少なくとも一方は、第1の定包絡線信号と第2の定包絡線信号との位相差を小さくする方向へ位相を変化させる構成を採る。   The amplifier circuit of the present invention includes a constant envelope signal generating means for generating two constant envelope signals having different phases from an input signal, and two phase shifting means for individually changing the phases of the two constant envelope signals. And two amplifying means for individually amplifying the output signals of the two phase shifting means, and a synthesizing means for synthesizing the output signals of the two amplifying means, and the constant envelope signal generating means A first constant envelope signal having a positive phase and a second constant envelope signal having a negative phase with respect to the input signal are generated, and at least one of the two phase shifting means has a first A configuration is adopted in which the phase is changed in a direction to reduce the phase difference between the first constant envelope signal and the second constant envelope signal.

また、本発明の増幅回路は、前記発明の構成において、二つの移相手段は第1の移相手段と第2の移相手段とから成り、第1の移相手段は第1の定包絡線信号の位相をマイナス方向へ変化させ、第2の移相手段は第2の定包絡線信号の位相をプラス方向へ変化させる構成を採る。   In the amplifier circuit of the present invention, in the configuration of the invention, the two phase shift means are composed of a first phase shift means and a second phase shift means, and the first phase shift means is a first constant envelope. The phase of the line signal is changed in the minus direction, and the second phase shift means adopts a configuration in which the phase of the second constant envelope signal is changed in the plus direction.

また、本発明の増幅回路は、前記発明の構成に加えて、さらに、入力信号の平均振幅値を算出する平均振幅値もしくは平均電力値を算出する手段と、平均振幅値もしくは平均電力値に応じて前記位相手段の位相変化量を制御する位相制御手段とを備える構成を採る。   The amplifier circuit according to the present invention further includes means for calculating an average amplitude value or an average power value for calculating an average amplitude value of the input signal, and an average amplitude value or an average power value in addition to the configuration of the above invention. And a phase control means for controlling the phase change amount of the phase means.

また、本発明の増幅回路は、前記発明の構成に加えて、さらに、入力信号の最大振幅値を算出する手段もしくは最大電力値を算出する手段と、平均振幅値と最大振幅値の比を算出する手段もしくは平均電力値と最大電力値の比を算出する手段とを備える構成を採る。   The amplifier circuit according to the present invention further includes means for calculating the maximum amplitude value of the input signal or means for calculating the maximum power value, and the ratio of the average amplitude value to the maximum amplitude value, in addition to the configuration of the above invention. Or a means for calculating a ratio between the average power value and the maximum power value.

また、本発明の増幅回路は、前記発明の構成に加えて、さらに、入力信号の振幅値を算出する振幅算出手段と、前記振幅算出手段が算出した振幅値が所定の閾値を超えたときに増幅手段のバイアス電圧を制御する電圧制御手段とを備える構成を採る。   In addition to the configuration of the present invention, the amplifier circuit of the present invention further includes an amplitude calculation unit that calculates an amplitude value of an input signal, and an amplitude value calculated by the amplitude calculation unit exceeds a predetermined threshold value. The voltage control means for controlling the bias voltage of the amplification means is adopted.

また、本発明の増幅回路は、前記発明の構成に加えて、さらに、前記振幅算出手段の前段に、前記入力信号の振幅ピーク値を抑圧するためのピーク抑圧手段を備える構成を採る。さらに、本発明は、前記各発明の増幅回路を備える送信機を提供することもできる。   In addition to the configuration of the invention, the amplifier circuit of the present invention further employs a configuration in which a peak suppression unit for suppressing the amplitude peak value of the input signal is provided upstream of the amplitude calculation unit. Furthermore, the present invention can provide a transmitter including the amplifier circuit of each of the above inventions.

本発明の増幅回路によれば、入力信号から二つの定包絡線信号を生成し、それぞれの定包絡線信号の位相を個別に変化させて増幅してから合成信号を生成している。このとき、二つの移相手段のうちの一方の移相手段(第1の移相手段)が、プラス方向の位相にある第一の定包絡線信号の位相をマイナス方向に変化させ、他方の移相手段(第2の移相手段)が、マイナス方向の位相にある第二の定包絡線信号の位相をプラス方向に変化させている。これによって、二つの定包絡線信号は、第1の移相手段と第2の移相手段とによって位相差を小さくするように位相がシフトされるので、合成信号の最小値を大きくすることができ、かつ、出力信号の平均電力を大きくすることができる。したがって、LINC方式による増幅回路の電力効率を向上させることができる。   According to the amplifier circuit of the present invention, two constant envelope signals are generated from an input signal, and the phase of each constant envelope signal is individually changed and amplified to generate a combined signal. At this time, one of the two phase shifting means (first phase shifting means) changes the phase of the first constant envelope signal in the positive direction to the negative direction, The phase shift means (second phase shift means) changes the phase of the second constant envelope signal in the minus direction in the plus direction. As a result, the phase of the two constant envelope signals is shifted by the first phase shift means and the second phase shift means so as to reduce the phase difference, so that the minimum value of the combined signal can be increased. And the average power of the output signal can be increased. Therefore, it is possible to improve the power efficiency of the amplifier circuit using the LINC method.

また、本発明の増幅回路によれば、さらに、定包絡線信号を生成する前段に入力信号の平均振幅もしくは平均電力を算出する機能を備え、平均振幅または平均電力の大きさに応じて二つの定包絡線信号の位相変化量を制御している。これにより、入力信号の変調条件の変化によってピークファクタが大きくなって平均出力電力が小さくなった場合でも、平均出力電力が大きくなるように定包絡線信号の位相を変化させるので、増幅回路の効率低下を防止することができる。   In addition, according to the amplifier circuit of the present invention, a function for calculating the average amplitude or average power of the input signal is further provided in the previous stage for generating the constant envelope signal, and two functions are provided depending on the magnitude of the average amplitude or average power. The amount of phase change of the constant envelope signal is controlled. As a result, even when the peak factor increases due to changes in the modulation conditions of the input signal and the average output power decreases, the phase of the constant envelope signal is changed so that the average output power increases. A decrease can be prevented.

また、本発明の増幅回路によれば、さらに、定包絡線信号を生成する前段に入力信号の最大振幅値もしくは最大電力値を算出する機能と最大振幅値と平均振幅値の比もしくは最大電力値と平均電力値の比を算出する機能とを備え、振幅最大値または電力最大値に応じて二つの定包絡線信号の位相変化量を制御している。これにより、入力信号の変調条件の変化によって最大振幅値と平均振幅値の比もしくは、最大電力値と平均電力値の比が大きくなった場合でも、平均振幅が大きくなるように定包絡線信号の位相を変化させるので、増幅回路の効率低下を防止することができる。   Further, according to the amplifier circuit of the present invention, the function of calculating the maximum amplitude value or the maximum power value of the input signal and the ratio of the maximum amplitude value and the average amplitude value or the maximum power value before the generation of the constant envelope signal And the function of calculating the ratio of the average power value, and the phase change amount of the two constant envelope signals is controlled according to the maximum amplitude value or the maximum power value. As a result, even if the ratio between the maximum amplitude value and the average amplitude value or the ratio between the maximum power value and the average power value increases due to a change in the modulation condition of the input signal, the constant envelope signal is increased so that the average amplitude is increased. Since the phase is changed, it is possible to prevent a reduction in efficiency of the amplifier circuit.

また、本発明の増幅回路によれば、さらに、定包絡線信号を生成する前段に入力信号の振幅値を算出する機能を備え、振幅値の大きさに応じて増幅手段のバイアス電圧を制御している。これにより、位相制御によって入力信号の波形のピーク部分が小さくなっても、増幅手段のバイアス電圧を大きくすることによって定包絡線信号の振幅を大きくし、かつ合成信号の歪みを補正することができるので、増幅回路の線形性を向上し、通信品質の劣化を防ぐことが可能となる。   In addition, according to the amplifier circuit of the present invention, the function of calculating the amplitude value of the input signal is further provided before the generation of the constant envelope signal, and the bias voltage of the amplification means is controlled according to the magnitude of the amplitude value. ing. As a result, even if the peak portion of the waveform of the input signal is reduced by phase control, the amplitude of the constant envelope signal can be increased and the distortion of the composite signal can be corrected by increasing the bias voltage of the amplification means. Therefore, it is possible to improve the linearity of the amplifier circuit and prevent the communication quality from deteriorating.

また、本発明の増幅回路によれば、さらに、入力信号の振幅値を算出する機能の前段に信号の振幅ピーク値を抑圧する機能を付加したので、入力信号の振幅ピーク値を抑圧することによって増幅手段のバイアス電圧の変化量を小さくすることができるので、電源効率を向上させることが可能となる。   In addition, according to the amplifier circuit of the present invention, since the function for suppressing the amplitude peak value of the signal is further added to the preceding stage of the function for calculating the amplitude value of the input signal, the amplitude peak value of the input signal is suppressed. Since the amount of change in the bias voltage of the amplifying means can be reduced, the power supply efficiency can be improved.

すなわち、本発明によれば、高い線形性の維持と電力効率の向上化の両方を満足させる増幅回路を実現することができる。このため、LINC方式増幅回路において、入力信号Sのピークファクタが大きくなったり平均振幅が小さくなったりしても、増幅回路における電力効率が低下するおそれもなくなるので、放送分野や無線通信分野などに好適な無線送受信装置を構築することができる。   That is, according to the present invention, it is possible to realize an amplifier circuit that satisfies both the maintenance of high linearity and the improvement of power efficiency. For this reason, in the LINC system amplifier circuit, even if the peak factor of the input signal S increases or the average amplitude decreases, there is no possibility that the power efficiency in the amplifier circuit decreases. A suitable wireless transmission / reception apparatus can be constructed.

本発明の増幅回路は、元の信号である入力信号から2つの定包絡線信号を生成し、それぞれの定包絡線信号を2つの増幅器で個別に増幅した後に合成することによって所望の送信信号を得るLINC方式の増幅回路である。すなわち、2つの定包絡線信号のうち、少なくとも一方の定包絡線信号の位相を移相手段によって変化させる。望ましくは、2つの定包絡線信号の位相をそれぞれ反対方向の位相(つまり、プラス方向の位相とマイナス方向の位相)にシフトさせる。そして、位相がシフトされた2つの定包絡線信号を個別に増幅した後に合成する。これにより、出力信号の平均電力を大きくすることができると共に、増幅回路における電力損失を低下させて電力効率を向上させることができる。   The amplifier circuit of the present invention generates two constant envelope signals from an input signal which is an original signal, and amplifies each constant envelope signal with two amplifiers and then combines them to synthesize a desired transmission signal. This is a LINC-type amplifier circuit to be obtained. That is, the phase of at least one of the two constant envelope signals is changed by the phase shift means. Preferably, the phases of the two constant envelope signals are shifted to opposite phases (that is, a positive phase and a negative phase). Then, the two constant envelope signals whose phases are shifted are individually amplified and synthesized. As a result, the average power of the output signal can be increased and the power loss in the amplifier circuit can be reduced to improve the power efficiency.

以下、図面を参照して、本発明における増幅回路の実施の形態の幾つかを詳細に説明する。尚、以下に述べる各実施の形態に用いる図面において、同一の構成要素は同一の符号を付し、かつ重複する説明は可能な限り省略する。   Hereinafter, some embodiments of an amplifier circuit according to the present invention will be described in detail with reference to the drawings. In the drawings used in the embodiments described below, the same components are denoted by the same reference numerals, and redundant description will be omitted as much as possible.

<実施の形態1>
図1は、本発明の実施の形態1に係る増幅回路の構成を示すブロック図である。増幅回路100は、入力信号Sから2つの定包絡線信号S1、S2を生成する定包絡線信号生成部101と、定包絡線信号生成部101から出力された2つの定包絡線信号S1、S2の各々の位相を個別に変化させる移相器102a及び移相器102bと、移相器102a及び移相器102bの各々から出力された位相変化後の定包絡線信号S1a、S2aをそれぞれ個別に増幅する終段の増幅器103a及び増幅器103bと、増幅器103a及び増幅器103bから出力された増幅後の定包絡線信号S1ag、S2agを合成して合成信号Sagを生成して出力する合成回路104とを備えた構成となっている。
<Embodiment 1>
FIG. 1 is a block diagram showing a configuration of an amplifier circuit according to Embodiment 1 of the present invention. The amplifier circuit 100 includes a constant envelope signal generation unit 101 that generates two constant envelope signals S1 and S2 from an input signal S, and two constant envelope signals S1 and S2 output from the constant envelope signal generation unit 101. The phase shifters 102a and 102b that individually change the phases of the phase shifters, and the constant envelope signals S1a and S2a after the phase change output from each of the phase shifters 102a and 102b are individually received. A final stage amplifier 103a and amplifier 103b to be amplified, and a synthesis circuit 104 that synthesizes the constant envelope signals S1ag and S2ag after amplification output from the amplifier 103a and amplifier 103b to generate and output a synthesized signal Sag. It becomes the composition.

定包絡線信号生成部101は、例えば、ASIC(Application Specific Integrate Circuit:特定用途向けIC)やFPGA(Field Programmable Gate Array:プログラミング可能なLSI)などのディジタル信号処理回路とD/A変換器と直交変調器とによって実現することができる。また、移相器102a及び移相器102bは、例えば、マイクロストリップラインによるハイブリッド移相器によって実現することができる。さらに、増幅器103a及び増幅器103bは、例えば、FETやトランジスタによって実現することができる。また、合成回路104は、例えば、マイクロストリップラインでできたウィルキンソン型合成回路や抵抗合成回路によって実現することができる。   The constant envelope signal generation unit 101 is orthogonal to a digital signal processing circuit such as an ASIC (Application Specific Integrate Circuit) or an FPGA (Field Programmable Gate Array) and a D / A converter. It can be realized with a modulator. The phase shifter 102a and the phase shifter 102b can be realized by a hybrid phase shifter using a microstrip line, for example. Furthermore, the amplifier 103a and the amplifier 103b can be realized by, for example, FETs or transistors. The synthesis circuit 104 can be realized by, for example, a Wilkinson type synthesis circuit or a resistance synthesis circuit made of a microstrip line.

次に、図1のように構成された増幅回路100の動作について説明する。まず、定包絡線信号生成部101は、元の信号である入力信号Sから定包絡線信号S1、S2を生成し、それぞれ個別に移相器102aと移相器102bへ送信する。以下、入力信号Sから2つの定包絡線信号S1、S2を生成する過程について、時間関数(t)を用いて数式により説明する。すなわち、入力信号S(t)及び2つの定包絡線信号S1(t)、S2(t)は、それぞれ次の式(4)、式(5)、及び式(6)によって求められる。   Next, the operation of the amplifier circuit 100 configured as shown in FIG. 1 will be described. First, the constant envelope signal generation unit 101 generates the constant envelope signals S1 and S2 from the input signal S that is the original signal, and individually transmits them to the phase shifter 102a and the phase shifter 102b. Hereinafter, the process of generating the two constant envelope signals S1 and S2 from the input signal S will be described using mathematical expressions using the time function (t). That is, the input signal S (t) and the two constant envelope signals S1 (t) and S2 (t) are obtained by the following equations (4), (5), and (6), respectively.

S(t)=V(t)・cos{ωct+φ(t)} (4)
S1(t)=Vmax/2・cos{ωct+ψ(t)} (5)
S2(t)=Vmax/2・cos{ωct+θ(t)} (6)
但し、
ψ(t)=φ(t)+α(t)
θ(t)=φ(t)−α(t)
α(t)=cos−1{V(t)/Vmax}
ここで、V(t):入力信号の電圧、Vmax:V(t)の最大値、ωc:入力信号の搬送波の角周波数である。
S (t) = V (t) · cos {ωct + φ (t)} (4)
S1 (t) = Vmax / 2 · cos {ωct + ψ (t)} (5)
S2 (t) = Vmax / 2 · cos {ωct + θ (t)} (6)
However,
ψ (t) = φ (t) + α (t)
θ (t) = φ (t) −α (t)
α (t) = cos −1 {V (t) / Vmax}
Here, V (t) is the voltage of the input signal, Vmax is the maximum value of V (t), and ωc is the angular frequency of the carrier wave of the input signal.

以下の説明では時間関数(t)を省略して、入力信号をS、2つの定包絡線信号をそれぞれS1、S2と表わしてベクトル関係を説明する。図2は、図1に示す実施の形態1の増幅回路における入力信号と2つの定包絡線信号との関係を示すベクトル図である。つまり、図2(a)は、入力信号Sを2つの定包絡線信号S1、S2に分離したベクトル図、図2(b)は、定包絡線信号S1の位相を−β°移相して増幅した定包絡線信号S1agと定包絡線信号S2の位相を+β°移相して増幅した定包絡線信号S2agを合成したベクトル図、図2(c)は、位相を変化しない場合の定包絡線信号S1と定包絡線信号S2の存在する範囲を示すベクトル図、図2(d)は位相を変化した場合の定包絡線信号S1agと定包絡線信号S2agの存在する範囲を示すベクトル図である。   In the following description, the time function (t) is omitted, and the vector relationship is described by representing the input signal as S and the two constant envelope signals as S1 and S2, respectively. FIG. 2 is a vector diagram showing the relationship between the input signal and two constant envelope signals in the amplifier circuit of the first embodiment shown in FIG. 2A is a vector diagram in which the input signal S is separated into two constant envelope signals S1 and S2, and FIG. 2B is a phase shift of the constant envelope signal S1 by −β °. FIG. 2C is a vector diagram in which the constant envelope signal S2ag amplified by shifting the phase of the amplified constant envelope signal S1ag and the constant envelope signal S2 by + β °, and FIG. 2C shows the constant envelope when the phase is not changed. FIG. 2D is a vector diagram showing a range where the constant envelope signal S1ag and the constant envelope signal S2ag are present when the phase is changed. is there.

図2(a)のベクトル図は上記の式(4)、式(5)、及び式(6)をベクトルで表したものである。ここで、2つの定包絡線信号S1、S2について、第1の定包絡線信号をS1、第2の定包絡線信号S2とすると、第1の定包絡線信号S1が入力される移相器102aは、第1の定包絡線信号S1の位相をマイナス方向へβ°変化させ、第2の定包絡線信号S2が入力される移相器102bは、第2の定包絡線信号S2の位相をプラス方向へβ°変化させる。それぞれ変化させた第1の定包絡線信号S1aと第2の定包絡線信号S2aを終段の増幅器103a、103bへ入力する。そのときの位相変化後の第1の定包絡線信号S1a及び第2の定包絡線信号S2aは次の式(7)及び式(8)で示すことができる。   The vector diagram of FIG. 2A represents the above equations (4), (5), and (6) as vectors. Here, regarding the two constant envelope signals S1 and S2, when the first constant envelope signal is S1 and the second constant envelope signal S2, the phase shifter to which the first constant envelope signal S1 is input. 102a changes the phase of the first constant envelope signal S1 by β ° in the minus direction, and the phase shifter 102b to which the second constant envelope signal S2 is input is the phase of the second constant envelope signal S2. Is changed by β ° in the positive direction. The first constant envelope signal S1a and the second constant envelope signal S2a that have been changed are input to the amplifiers 103a and 103b at the final stage. The first constant envelope signal S1a and the second constant envelope signal S2a after the phase change at that time can be expressed by the following equations (7) and (8).

S1a=Vmax/2・cos(ωift+ψ(t)−β) (7)
S2a=Vmax/2・cos(ωift+θ(t)+β) (8)
但し、ωiftは移相器102a、102bへの入力信号の搬送波の角周波数である。
S1a = Vmax / 2 · cos (ωift + ψ (t) −β) (7)
S2a = Vmax / 2 · cos (ωift + θ (t) + β) (8)
However, ωift is the angular frequency of the carrier wave of the input signal to the phase shifters 102a and 102b.

さらに、位相変化後の第1の定包絡線信号S1a及び第2の定包絡線信号S2aを終段の増幅器103a、103bで増幅した後に合成回路104によって合成して出力する。このとき、増幅器103aで増幅した第1の定包絡線信号S1ag、増幅器103bで増幅した第2の定包絡線信号S2ag、及び合成回路104によって合成された合成信号Sagは、それぞれ次の式(9)、式(10)、式(11)で示される。   Further, the first constant envelope signal S1a and the second constant envelope signal S2a after the phase change are amplified by the amplifiers 103a and 103b at the final stage, and then synthesized by the synthesis circuit 104 and output. At this time, the first constant envelope signal S1ag amplified by the amplifier 103a, the second constant envelope signal S2ag amplified by the amplifier 103b, and the synthesized signal Sag synthesized by the synthesis circuit 104 are respectively expressed by the following equations (9): ), Formula (10), and formula (11).

S1ag=G・Vmax/2・cos((ωrft+ψ(t)−β)) (9)
S2ag=G・Vmax/2・cos((ωrft+θ(t)+β)) (10)
Sag=G・V(t)cos{ωrft+φ’(t)} (11)
S1ag = G · Vmax / 2 · cos ((ωrft + ψ (t) −β)) (9)
S2ag = G · Vmax / 2 · cos ((ωrft + θ (t) + β)) (10)
Sag = G · V (t) cos {ωrft + φ ′ (t)} (11)

このときの終段の増幅器103a、103bにおける効率の改善をベクトル図と時間軸波形を用いて説明する。図2(b)は、上記の式(9)、(10)、(11)をベクトル図で表したものである。図2(b)のようにそれぞれの定包絡線信号の位相が−βと+βに変化した場合は、位相を変化させて増幅した後の第1の定包絡線信号S1ag及び第2の定包絡線信号S2agのベクトルの存在範囲は、図2(d)で示したような範囲になる。そして、それぞれの位相を−βと+βに変化させて増幅した後の第1の定包絡線信号S1agと第2の定包絡線信号S2agを合成した合成信号Sagの最小値Sagminと最大値Sagmaxは、次の式(12)及び式(13)のようになる。   The improvement in efficiency in the final stage amplifiers 103a and 103b at this time will be described using a vector diagram and a time axis waveform. FIG. 2B represents the above equations (9), (10), and (11) as a vector diagram. When the phase of each constant envelope signal changes to -β and + β as shown in FIG. 2B, the first constant envelope signal S1ag and the second constant envelope after amplification by changing the phase. The existence range of the vector of the line signal S2ag is as shown in FIG. Then, the minimum value Sagmin and the maximum value Sagmax of the synthesized signal Sag obtained by synthesizing the first constant envelope signal S1ag and the second constant envelope signal S2ag after amplification by changing the respective phases to -β and + β are: The following equations (12) and (13) are obtained.

Sagmin=Vmax・cos{π/2−β} (12)
Sagmax=Vmax (13)
Sagmin = Vmax · cos {π / 2−β} (12)
Sagmax = Vmax (13)

上記の式(12)及び式(13)から分るように、合成信号Sagの最大値Sagmaxは元の入力信号Sの最大値Smaxと変わらないが、合成信号Sagの最小値Sagminは元の入力信号Sの最小値Sminより常に大きいことが分かる。尚、第1の定包絡線信号S1及び第2の定包絡線信号S2の位相を変化しないときのベクトルの存在範囲は図1(c)に示す通りである。   As can be seen from the above equations (12) and (13), the maximum value Sagmax of the combined signal Sag is not different from the maximum value Smax of the original input signal S, but the minimum value Sagmin of the combined signal Sag is the original input. It can be seen that the signal S is always larger than the minimum value Smin. The vector existence range when the phases of the first constant envelope signal S1 and the second constant envelope signal S2 are not changed is as shown in FIG.

図3は、本発明の実施の形態1において、定包絡線信号の位相を変化させない場合と変化させた場合の時間軸における信号波形を示す図である。すなわち、図3の左側の図は、図2(c)のように定包絡線信号の位相を変化させない場合の第1の定包絡線信号S1と第2の定包絡線信号S2の存在する範囲内の合成信号Sの波形を時間軸上で示し、図3の右側の図は、図2(d)のように定包絡線信号の位相を変化させた場合の第1の定包絡線信号S1agと第2の定包絡線信号S2agの存在する範囲内の合成信号Sagの波形を時間軸上で示している。   FIG. 3 is a diagram showing signal waveforms on the time axis when the phase of the constant envelope signal is not changed and when the phase is changed in Embodiment 1 of the present invention. That is, the diagram on the left side of FIG. 3 shows a range in which the first constant envelope signal S1 and the second constant envelope signal S2 exist when the phase of the constant envelope signal is not changed as shown in FIG. 3 shows the waveform of the synthesized signal S on the time axis, and the diagram on the right side of FIG. 3 shows the first constant envelope signal S1ag when the phase of the constant envelope signal is changed as shown in FIG. The waveform of the combined signal Sag within the range where the second constant envelope signal S2ag exists is shown on the time axis.

言い換えれば、図3の左側に示す波形は、定包絡線信号S1及び定包絡線信号S2の位相を変化させない場合におけるベクトル合成後の合成信号Sの波形であり、図3の右側に示す波形は定包絡線信号S1及び定包絡線信号S2の位相を変化させた場合におけるベクトル合成後の合成信号Sagの波形である。   In other words, the waveform shown on the left side of FIG. 3 is the waveform of the synthesized signal S after vector synthesis when the phases of the constant envelope signal S1 and the constant envelope signal S2 are not changed, and the waveform shown on the right side of FIG. It is a waveform of the synthesized signal Sag after vector synthesis when the phases of the constant envelope signal S1 and the constant envelope signal S2 are changed.

図3の右側の波形図に示すように、定包絡線信号の位相を変化させた場合は、信号の最大値は変化しないものの、平均振幅は定包絡線信号の位相を変化させない場合の波形(左側の波形図)に比べて大きくなっている。このようにして、定包絡線信号の位相を変化させて合成後の信号の平均電力が大きくなれば、結果的に増幅回路としての電力効率は向上する。   As shown in the waveform diagram on the right side of FIG. 3, when the phase of the constant envelope signal is changed, the maximum value of the signal does not change, but the average amplitude is the waveform when the phase of the constant envelope signal is not changed ( It is larger than the waveform on the left. In this way, if the average power of the combined signal is increased by changing the phase of the constant envelope signal, the power efficiency of the amplifier circuit is improved as a result.

以上説明したように、本発明における実施の形態1の増幅回路によれば、二つの定包絡線信号の位相を位相差が小さくなる方向へ変化させることによって、出力信号の平均電力を大きくすることができ、その結果、増幅回路としての電力効率を向上させることができる。   As described above, according to the amplifier circuit of the first embodiment of the present invention, the average power of the output signal is increased by changing the phase of the two constant envelope signals in the direction of decreasing the phase difference. As a result, the power efficiency of the amplifier circuit can be improved.

尚、上記の説明では、図1に示すような基本的な増幅回路のブロック図を用いて説明をしたが、直交変調器とミキサを用いて増幅回路を構成することもできる。図4は、本発明の実施の形態1に係る増幅回路の具体的な構成を示すブロック図である。図4では直交変調器とミキサを用いて増幅回路を実現している。   In the above description, the basic amplifier circuit block diagram as shown in FIG. 1 has been described. However, an amplifier circuit may be configured using a quadrature modulator and a mixer. FIG. 4 is a block diagram showing a specific configuration of the amplifier circuit according to Embodiment 1 of the present invention. In FIG. 4, an amplifier circuit is realized using a quadrature modulator and a mixer.

図4において、増幅回路100は、ベースバンドIQ信号を入力信号S、Sとし、直交変調することによって定包絡線信号となるS1のIQ信号(S1I、S1Q)及びS2のIQ信号(S2I、S2Q)を生成する定包絡線信号IQ生成部201と、定包絡線信号IQ生成部201からの出力信号に対して直交変調処理を行う直交変調器202a、202bと、直交変調した後に定包絡線信号の位相を変化させる移相器102a、102bと、位相を変化させた後の2つの定包絡線信号を合成するミキサ203a、203bと、無線周波数へアップコンバートして終段の増幅を行う増幅器103a、103bと、増幅後の定包絡線信号を合成する合成回路104と、局部発振器204、206とを備えた構成となっている。 In FIG. 4, an amplifier circuit 100 uses baseband IQ signals as input signals S I and S Q, and performs quadrature modulation to generate S1 IQ signals (S 1I and S 1Q ) and S2 IQ signals that become constant envelope signals. A constant envelope signal IQ generation unit 201 that generates (S 2I , S 2Q ), quadrature modulators 202 a and 202 b that perform orthogonal modulation processing on an output signal from the constant envelope signal IQ generation unit 201, and quadrature modulation After that, the phase shifters 102a and 102b for changing the phase of the constant envelope signal, the mixers 203a and 203b for synthesizing the two constant envelope signals after changing the phase, and up-converting to the radio frequency, the final stage Amplifiers 103a and 103b for amplifying the signal, a synthesis circuit 104 for synthesizing the constant envelope signal after amplification, and local oscillators 204 and 206.

このように構成された増幅回路100において、定包絡線信号IQ生成部201が、入力信号SのベースバンドIQ信号より、直交変調すると定包絡線信号となるS1のIQ信号(S1I、S1Q)とS2のIQ信号(S2I、S2Q)を生成し、これらの信号を直交変調器202a、202bで直交変調した後に、移相器102a、102bで定包絡線信号の位相を変化させる。さらに、ミキサ203a、203bで無線周波数へアップコンバートして、終段の増幅器103a、103bで増幅した後に合成回路104で合成して出力信号SRFを出力する。 In the amplification circuit 100 configured as described above, the constant envelope signal IQ generation unit 201 performs the S1 IQ signal (S 1I , S 1Q) that becomes a constant envelope signal when orthogonally modulated from the baseband IQ signal of the input signal S. ) And S2 IQ signals (S 2I , S 2Q ), and quadrature modulation of these signals by the quadrature modulators 202a and 202b, the phase shifters 102a and 102b change the phase of the constant envelope signal. Further, the signals are up-converted to the radio frequency by the mixers 203a and 203b, amplified by the amplifiers 103a and 103b at the final stage, and then synthesized by the synthesis circuit 104 to output the output signal SRF .

この増幅回路の場合は、移相器102a、102bは直交変調器202a、202bとミキサ203a、203bの間に設けているが、これに限ることはなく、直交変調器202a、202bと局部発信器204の間に移相器205a、205bを設けてもよいし、図には示されていないが、ミキサ203a、203bと局部発信器206の間に移相器を設けても同様の効果を得られる。   In the case of this amplifier circuit, the phase shifters 102a and 102b are provided between the quadrature modulators 202a and 202b and the mixers 203a and 203b. However, the present invention is not limited to this, and the quadrature modulators 202a and 202b and the local oscillator are not limited thereto. The phase shifters 205a and 205b may be provided between 204, and although not shown in the figure, the same effect can be obtained by providing a phase shifter between the mixers 203a and 203b and the local oscillator 206. It is done.

また、図1では定包絡線信号生成部101、図4では定包絡線信号IQ生成部201において、定包絡線信号S1、S2の位相制御を行っても前述と同様の効果を呈することができる。さらに、前述の説明では、位相変化量を定包絡線信号S1で−βとし、定包絡線信号S2で+βとして、位相変化量の絶対値を定包絡線信号S1と定包絡線信号S2とで同じとしたが、定包絡線信号S1と定包絡線信号S2で位相変化量に差をつけても前述と同様の効果を呈することができる。   Further, the same effect as described above can be obtained even if the constant envelope signal S1 and S2 are phase-controlled in the constant envelope signal generator 101 in FIG. 1 and the constant envelope signal IQ generator 201 in FIG. . Further, in the above description, the phase change amount is set to −β in the constant envelope signal S1, the constant envelope signal S2 is set to + β, and the absolute value of the phase change amount is set to the constant envelope signal S1 and the constant envelope signal S2. Although the same, the same effect as described above can be obtained even if the phase change amount is different between the constant envelope signal S1 and the constant envelope signal S2.

<実施の形態2>
図5は、本発明の実施の形態2に係る増幅回路の構成を示すブロック図である。図5に示す実施の形態2は、図1に示す実施の形態1の増幅回路100に対して、入力信号Sの平均振幅値を算出する平均振幅算出部301と、平均振幅値に応じて移相器102a及び移相器102bにおける位相変化量を制御する位相制御部302とが、定包絡線信号生成部101の前段に付加された構成となっている。
<Embodiment 2>
FIG. 5 is a block diagram showing a configuration of an amplifier circuit according to Embodiment 2 of the present invention. The second embodiment shown in FIG. 5 is different from the amplifier circuit 100 of the first embodiment shown in FIG. 1 in terms of an average amplitude calculation unit 301 that calculates an average amplitude value of the input signal S, and the average amplitude value. A phase control unit 302 that controls the amount of phase change in the phase shifter 102 a and the phase shifter 102 b is added to the preceding stage of the constant envelope signal generation unit 101.

図5における平均振幅算出部301及び位相制御部302は、例えば、ASICやFPGAなどのディジタル信号処理回路によって実現される。図5において、まず、入力信号Sが平均振幅算出部301に入力されると、その入力信号Sの平均振幅が平均振幅算出部301によって計算される。そして、その平均振幅値情報は平均振幅算出部301から位相制御部302へ送信され、その平均振幅値の大きさに応じて位相変化量βが決定されて移相器102a、102bへ送信される。   The average amplitude calculation unit 301 and the phase control unit 302 in FIG. 5 are realized by a digital signal processing circuit such as an ASIC or FPGA, for example. In FIG. 5, first, when the input signal S is input to the average amplitude calculation unit 301, the average amplitude of the input signal S is calculated by the average amplitude calculation unit 301. The average amplitude value information is transmitted from the average amplitude calculation unit 301 to the phase control unit 302, and the phase change amount β is determined according to the magnitude of the average amplitude value and transmitted to the phase shifters 102a and 102b. .

一方、元の信号である入力信号Sは増幅回路100の定包絡線信号生成部101へ入力され、前述の実施の形態1と同様の動作が行われる。ここで、平均振幅算出部301は、ある一定時間の入力信号Sの平均振幅値を定期的に算出するかまたは常時算出する。そして、入力信号Sの平均振幅値が小さくなった場合は、平均振幅算出部301から位相制御部302へ平均振幅値が小さくなった旨の情報を送信する。これによって、位相制御部302は位相変化量βを大きくするような動作を行う。   On the other hand, the input signal S, which is the original signal, is input to the constant envelope signal generation unit 101 of the amplifier circuit 100, and the same operation as in the first embodiment is performed. Here, the average amplitude calculation unit 301 periodically or always calculates the average amplitude value of the input signal S for a certain period of time. When the average amplitude value of the input signal S becomes small, information indicating that the average amplitude value has decreased is transmitted from the average amplitude calculation unit 301 to the phase control unit 302. Thereby, the phase control unit 302 performs an operation to increase the phase change amount β.

以上のように、本発明の実施の形態2によれば、図5において増幅回路100の前段の平均振幅算出部301にて、入力信号Sの平均振幅値を算出し、その情報から、位相制御部302が増幅回路100内の移相器102の位相変化量を制御する。これによって、元の入力信号Sの平均振幅値が小さくなった場合は、位相変化量βを大きくすることによって電力効率の低下を防ぐことができる。   As described above, according to the second embodiment of the present invention, the average amplitude calculation unit 301 in the previous stage of the amplifier circuit 100 in FIG. 5 calculates the average amplitude value of the input signal S, and the phase control is performed from the information. The unit 302 controls the phase change amount of the phase shifter 102 in the amplifier circuit 100. As a result, when the average amplitude value of the original input signal S becomes small, a decrease in power efficiency can be prevented by increasing the phase change amount β.

<実施の形態3>
図6は、本発明の実施の形態3に係る増幅回路の構成を示すブロック図である。図6に示す実施の形態3は、図5に示す実施の形態2の増幅回路100及び平均振幅算出部301と、位相制御部302に対して、入力信号Sの最大振幅値を算出する最大振幅算出部401と、平均振幅対最大振幅比算出部402とが、定包絡線信号生成部101の前段に付加された構成となっている。
<Embodiment 3>
FIG. 6 is a block diagram showing a configuration of an amplifier circuit according to Embodiment 3 of the present invention. The third embodiment shown in FIG. 6 is the maximum amplitude for calculating the maximum amplitude value of the input signal S for the amplifier circuit 100 and the average amplitude calculation unit 301 and the phase control unit 302 of the second embodiment shown in FIG. A calculation unit 401 and an average amplitude-to-maximum amplitude ratio calculation unit 402 are configured to be added to the previous stage of the constant envelope signal generation unit 101.

図6における最大振幅算出部401及び平均振幅対最大振幅比算出部402は、例えば、ASICやFPGAなどのディジタル信号処理回路で実現される。図6において、まず、入力信号Sが平均振幅算出部301に入力されると、その入力信号Sの平均振幅が平均振幅算出部301によって計算される。次に入力信号Sが最大振幅算出部401に入力されると、最大振幅算出部401は入力信号Sの最大振幅値を計算する。そして、その平均振幅情報と最大振幅値情報がそれぞれ平均振幅対最大振幅比算出部402へ送信され、平均振幅と最大振幅の比を計算し、その値を位相制御部302へ送信する。位相制御部302ではその比の大きさに応じて位相変化量βを決定して移相器102a、102bへ送信する。これによって、位相制御部302は位相変化量βを最適にするような動作を行う。このとき、平均振幅算出部301及び最大振幅算出部401は、ある一定時間における入力信号Sの平均振幅値と最大振幅値を定期的に算出するか、または常時算出し、元の入力信号Sの最大振幅値に対する平均振幅値が小さくなった場合は位相変化量βを大きくするような動作を行う。   The maximum amplitude calculation unit 401 and the average amplitude-to-maximum amplitude ratio calculation unit 402 in FIG. 6 are realized by digital signal processing circuits such as ASIC and FPGA, for example. In FIG. 6, first, when the input signal S is input to the average amplitude calculation unit 301, the average amplitude of the input signal S is calculated by the average amplitude calculation unit 301. Next, when the input signal S is input to the maximum amplitude calculation unit 401, the maximum amplitude calculation unit 401 calculates the maximum amplitude value of the input signal S. Then, the average amplitude information and the maximum amplitude value information are respectively transmitted to the average amplitude-to-maximum amplitude ratio calculation unit 402, the ratio between the average amplitude and the maximum amplitude is calculated, and the value is transmitted to the phase control unit 302. The phase control unit 302 determines the phase change amount β according to the magnitude of the ratio and transmits it to the phase shifters 102a and 102b. Thereby, the phase control unit 302 performs an operation to optimize the phase change amount β. At this time, the average amplitude calculation unit 301 and the maximum amplitude calculation unit 401 regularly calculate the average amplitude value and the maximum amplitude value of the input signal S in a certain time period, or always calculate the average amplitude value and the maximum amplitude value of the original input signal S. When the average amplitude value with respect to the maximum amplitude value decreases, an operation is performed to increase the phase change amount β.

以上のように、本発明の実施の形態3によれば、図6において増幅回路100の前段の最大振幅算出部401が元の入力信号Sの最大振幅値を算出し、平均振幅対最大振幅比算出部402が平均振幅と最大振幅の比を計算し、位相制御部302がその情報から増幅回路100内の移相器102の位相変化量を制御する。そして、入力信号Sの最大振幅値に対する平均振幅値が小さくなった場合には位相変化量βを大きくすることにより、電力効率の低下を防ぐことができる。   As described above, according to the third embodiment of the present invention, the maximum amplitude calculation unit 401 in the previous stage of the amplifier circuit 100 in FIG. 6 calculates the maximum amplitude value of the original input signal S, and the average amplitude to maximum amplitude ratio is calculated. The calculation unit 402 calculates the ratio between the average amplitude and the maximum amplitude, and the phase control unit 302 controls the phase change amount of the phase shifter 102 in the amplifier circuit 100 from the information. And when the average amplitude value with respect to the maximum amplitude value of the input signal S becomes small, a decrease in power efficiency can be prevented by increasing the phase change amount β.

<実施の形態4>
図7は、本発明の実施の形態4に係る増幅回路の構成を示すブロック図である。図7に示す実施の形態4は、図1に示す実施の形態1の増幅回路100に対して、入力信号Sの振幅値を算出する振幅算出部501と、振幅値の大きさに応じて増幅器103a、103bのバイアス電圧を制御する電圧制御部502とが、定包絡線信号生成部101の前段に付加された構成となっている。つまり、電圧制御部502は、振幅算出部501が算出した振幅値が所定の閾値を超えたときに増幅器103a、103bのバイアス電圧を制御するように構成されている。尚、図7における振幅算出部501及び電圧制御部502は、例えば、ASICやFPGAなどのディジタル信号処理回路によって実現される。
<Embodiment 4>
FIG. 7 is a block diagram showing a configuration of an amplifier circuit according to Embodiment 4 of the present invention. The fourth embodiment shown in FIG. 7 is different from the amplifier circuit 100 of the first embodiment shown in FIG. 1 in that the amplitude calculation unit 501 calculates the amplitude value of the input signal S and an amplifier according to the magnitude of the amplitude value. A voltage control unit 502 that controls the bias voltages of 103a and 103b is added to the preceding stage of the constant envelope signal generation unit 101. That is, the voltage control unit 502 is configured to control the bias voltages of the amplifiers 103a and 103b when the amplitude value calculated by the amplitude calculation unit 501 exceeds a predetermined threshold value. 7 is realized by a digital signal processing circuit such as ASIC or FPGA, for example.

図8は、本発明の実施の形態4に係る変調信号の時間軸における波形とバイアス電源の波形を示す図であり、図8(a)は元の信号波形を示し、図8(b)は位相制御した増幅回路におけるバイアス電圧及び変調信号の波形を示し、図8(c)は図7の増幅回路におけるバイアス電圧及び変調信号の波形を示している。すなわち、前述の実施の形態1における増幅回路100では、図8(a)に示すような元の信号が入力された場合、出力される信号は、図8(b)に示すように、ある振幅値以上において振幅が抑圧されて歪みが生じている。このような振幅の閾値は位相制御量βによって決まる。尚、このときの増幅器103a、103bのバイアス電圧は一定である。   FIG. 8 is a diagram showing a waveform of the modulation signal on the time axis and the waveform of the bias power supply according to Embodiment 4 of the present invention, FIG. 8A shows the original signal waveform, and FIG. FIG. 8C shows the waveform of the bias voltage and the modulation signal in the amplifier circuit of FIG. 7. FIG. 8C shows the waveform of the bias voltage and the modulation signal in the phase-controlled amplifier circuit. That is, in the amplifier circuit 100 according to the first embodiment described above, when the original signal as shown in FIG. 8A is input, the output signal has a certain amplitude as shown in FIG. Above the value, the amplitude is suppressed and distortion occurs. Such an amplitude threshold is determined by the phase control amount β. At this time, the bias voltages of the amplifiers 103a and 103b are constant.

一方、図7に示す実施の形態4の増幅回路では、入力された信号Sの振幅値が振幅算出部501で計算される。そして、計算結果の振幅情報から、位相制御量βで決定される閾値を超えた場合には、電圧制御部502が、増幅器103a、103bのバイアス電圧を図8(c)に示すように振幅値に応じて高くする。これにより、出力される信号の波形は、図8(c)に示すように、ピーク値における信号波形が元の信号(つまり、入力信号)に近似した波形となる。   On the other hand, in the amplifier circuit according to the fourth embodiment shown in FIG. 7, the amplitude value of the input signal S is calculated by the amplitude calculation unit 501. Then, when the threshold value determined by the phase control amount β is exceeded from the amplitude information of the calculation result, the voltage control unit 502 sets the bias voltage of the amplifiers 103a and 103b to the amplitude value as shown in FIG. Increase according to. As a result, the waveform of the output signal is a waveform in which the signal waveform at the peak value approximates the original signal (that is, the input signal), as shown in FIG.

以上のように、本発明の実施の形態4によれば、図7に示すように、増幅回路100の前段の振幅算出部501が元の信号の振幅値を算出してその情報を電圧制御部502へ送信する。これによって、電圧制御部502がその振幅情報から増幅器103a、103bのバイアス電圧を制御するので、出力信号の歪みを小さくすることができ、線形性を向上することができるため、通信品質の劣化を小さくすることが可能となる。尚、実施の形態4では、位相制御量βに応じた閾値を設けてバイアス制御を行ったが、特に閾値を設けないで振幅に応じて電圧制御を行っても同様の効果が得られる。   As described above, according to the fourth embodiment of the present invention, as shown in FIG. 7, the amplitude calculation unit 501 in the previous stage of the amplifier circuit 100 calculates the amplitude value of the original signal and uses the information as the voltage control unit. To 502. As a result, the voltage control unit 502 controls the bias voltage of the amplifiers 103a and 103b from the amplitude information, so that the distortion of the output signal can be reduced and the linearity can be improved. It can be made smaller. In the fourth embodiment, bias control is performed by providing a threshold value corresponding to the phase control amount β. However, the same effect can be obtained by performing voltage control according to amplitude without providing a threshold value.

<実施の形態5>
図9は、本発明の実施の形態5に係る増幅回路の構成を示すブロック図である。図9に示す実施の形態5は、図7に示す実施の形態4の構成に対して、振幅算出部501の前段に入力信号の振幅ピーク値を抑圧するためのピーク抑圧部601を付加したものである。
<Embodiment 5>
FIG. 9 is a block diagram showing a configuration of an amplifier circuit according to Embodiment 5 of the present invention. In the fifth embodiment shown in FIG. 9, a peak suppression unit 601 for suppressing the amplitude peak value of the input signal is added to the previous stage of the amplitude calculation unit 501 with respect to the configuration of the fourth embodiment shown in FIG. It is.

図10は、本発明の実施の形態5に係る変調信号の時間軸における波形とバイアス電源の波形を示す図であり、図10(a)は位相制御した増幅回路におけるバイアス電圧及び変調信号の波形を示し、図10(b)はピーク抑圧部601を通した変調信号の波形を示し、図10(c)は図9の増幅回路におけるバイアス電圧及び変調信号の波形を示している。   FIG. 10 is a diagram showing the waveform of the modulation signal on the time axis and the waveform of the bias power supply according to the fifth embodiment of the present invention, and FIG. 10A shows the waveform of the bias voltage and the modulation signal in the phase-controlled amplifier circuit. FIG. 10B shows the waveform of the modulation signal that has passed through the peak suppression unit 601, and FIG. 10C shows the waveform of the bias voltage and the modulation signal in the amplifier circuit of FIG.

すなわち、前述の実施の形態1における増幅回路100では、図8(a)に示すような元の信号が入力された場合、出力される信号は、図10(a)に示すように、ある振幅値以上において振幅が折り返して出力される。また、元の信号のピークの振幅が大きい程、その折り返された部分の出力振幅は小さくなる。そのため、図7に示す実施の形態4における増幅回路では、元の信号の振幅情報から、位相制御量βで決定される閾値を超えた場合には、電圧制御部502において増幅器103a、103bのバイアス電圧を大きくするが、歪み部分の振幅が小さい程そのバイアス電圧を大きくする必要があるので、結果的に電源効率が低下してしまう。   That is, in the amplifier circuit 100 according to the first embodiment, when an original signal as shown in FIG. 8A is input, the output signal has a certain amplitude as shown in FIG. When the value exceeds the value, the amplitude is returned and output. Further, the larger the peak amplitude of the original signal, the smaller the output amplitude of the folded portion. Therefore, in the amplifier circuit according to the fourth embodiment shown in FIG. 7, when the threshold value determined by the phase control amount β is exceeded from the amplitude information of the original signal, the voltage control unit 502 causes the bias of the amplifiers 103a and 103b to be biased. Although the voltage is increased, it is necessary to increase the bias voltage as the amplitude of the distorted portion is smaller. As a result, the power supply efficiency is lowered.

そこで、図9に示す実施の形態5の増幅回路では、図10(b)に示すように、入力信号Sのピークの振幅値を、ピーク抑圧部601によって、位相制御量βによって決まる折り返しの振幅値以下に抑圧して振幅算出部501へ出力する。その後の動作は実施の形態4と同じ動作をするので、位相制御量βで決定される閾値を超えた場合には、電圧制御部502が、増幅器103a、103bのバイアス電圧を図10(c)に示すように振幅値に応じて高くする。これにより、出力される信号の波形は、図10(c)に示すように、ピーク値における信号波形が元の信号(つまり、入力信号)に近似した波形となる。このとき、電圧制御部502におけるバイアス電圧の変化量は、実施の形態4の変化量に比べて小さくなるために電源効率を向上させることができる。   Therefore, in the amplifier circuit of the fifth embodiment shown in FIG. 9, as shown in FIG. 10B, the amplitude value of the peak of the input signal S is converted into a return amplitude determined by the phase control amount β by the peak suppression unit 601. Suppressed below the value and output to the amplitude calculator 501. Since the subsequent operation is the same as that of the fourth embodiment, when the threshold value determined by the phase control amount β is exceeded, the voltage control unit 502 sets the bias voltages of the amplifiers 103a and 103b in FIG. As shown in FIG. 4, the value is increased according to the amplitude value. Thereby, as shown in FIG. 10C, the waveform of the output signal becomes a waveform in which the signal waveform at the peak value approximates the original signal (that is, the input signal). At this time, the change amount of the bias voltage in the voltage control unit 502 is smaller than the change amount of the fourth embodiment, so that the power supply efficiency can be improved.

以上のように、本発明の実施の形態5によれば、図9に示すような回路構成により、ピーク抑圧部601が元の信号(入力信号)のピークの振幅値を抑圧することにより、増幅器103a、103bにおけるバイアス電圧の変化量を小さくすることができるので、電源効率の向上化を図ることが可能となる。   As described above, according to the fifth embodiment of the present invention, the peak suppression unit 601 suppresses the peak amplitude value of the original signal (input signal) with the circuit configuration shown in FIG. Since the amount of change in the bias voltage at 103a and 103b can be reduced, the power supply efficiency can be improved.

<実施の形態6>
図11は、本発明の実施の形態6に係る無線送受信装置の構成を示すブロック図である。すなわち、本発明は、上記各発明の増幅回路100を用いて無線送受信装置700を構築することもできる。実施の形態6に係る無線送受信装置700は、増幅回路100、アンテナ701、アンテナ共用器702、無線受信回路703、及び変復調部704を含んだ構成となっている。
<Embodiment 6>
FIG. 11 is a block diagram showing a configuration of a radio transmission / reception apparatus according to Embodiment 6 of the present invention. That is, according to the present invention, the wireless transmission / reception device 700 can be constructed using the amplifier circuit 100 of each of the above inventions. A wireless transmission / reception apparatus 700 according to Embodiment 6 includes an amplifier circuit 100, an antenna 701, an antenna duplexer 702, a wireless reception circuit 703, and a modem unit 704.

アンテナ701は無線信号を送信または受信するアンテナに相当する。また、アンテナ共用器702は1つのアンテナを送信と受信で共用するアンテナ共用手段であり、増幅回路100の出力する信号をアンテナ701へ出力すると共に、アンテナ701で受信した信号を無線受信回路703へ出力する。無線受信回路703は、アンテナ共用器702の出力した信号から所望の受信信号を取り出す無線受信回路であり、例えば、低雑音増幅器、周波数変換を行うミキサ、フィルタ、可変利得増幅器、及びA/D変換器などによって構成されている。   The antenna 701 corresponds to an antenna that transmits or receives a radio signal. The antenna duplexer 702 is an antenna sharing unit that shares one antenna for transmission and reception. The antenna duplexer 702 outputs a signal output from the amplifier circuit 100 to the antenna 701 and also a signal received by the antenna 701 to the radio reception circuit 703. Output. The wireless reception circuit 703 is a wireless reception circuit that extracts a desired reception signal from the signal output from the antenna duplexer 702. For example, a low noise amplifier, a mixer that performs frequency conversion, a filter, a variable gain amplifier, and an A / D conversion It is composed of a container.

変復調部704は、音声、映像、またはデータなどの信号を無線で送信するために信号変調を行う。また、無線で受信した信号から、音声、映像、またはデータなどの信号に復調するための変復調手段を備えている。増幅回路100は前述の実施の形態1乃至実施の形態5で示した増幅回路である。実施の形態6の無線受信装置700は、送信信号の増幅を行うために前述の各実施の形態で示した増幅回路を使用する構成として、増幅回路における電力効率を向上させることができる。このようにして、実施の形態6によれば無線送受信装置に搭載されたLINC方式の増幅回路の電力効率を向上させることができるので、実施の形態6に記載の無線送受信装置は、基地局装置や通信端末装置などに適用することが可能である。   The modem unit 704 performs signal modulation in order to wirelessly transmit a signal such as audio, video, or data. In addition, modulation / demodulation means for demodulating a signal received wirelessly into a signal such as audio, video, or data is provided. The amplifier circuit 100 is the amplifier circuit shown in the first to fifth embodiments. The radio receiving apparatus 700 according to the sixth embodiment can improve power efficiency in the amplifier circuit as a configuration using the amplifier circuit described in each of the above-described embodiments in order to amplify the transmission signal. Thus, according to the sixth embodiment, the power efficiency of the LINC-type amplifier circuit mounted on the wireless transmission / reception device can be improved. Therefore, the wireless transmission / reception device according to the sixth embodiment is a base station device. And can be applied to communication terminal devices.

以上説明したように、本発明における増幅回路は高い線形性と高効率化を実現することができるので、放送分野や無線通信分野などで用いられる無線送受信装置に利用することができると共に、基地局装置や通信端末装置にも適用することができる。   As described above, since the amplifier circuit according to the present invention can achieve high linearity and high efficiency, the amplifier circuit can be used for a wireless transmission / reception apparatus used in the broadcasting field, the wireless communication field, and the like. The present invention can also be applied to a device and a communication terminal device.

本発明の実施の形態1に係る増幅回路の構成を示すブロック図The block diagram which shows the structure of the amplifier circuit which concerns on Embodiment 1 of this invention. 図1に示す増幅回路における入力信号と2つの定包絡線信号との関係を示すベクトル図The vector diagram which shows the relationship between the input signal and two constant envelope signals in the amplifier circuit shown in FIG. 本発明の実施の形態1において、定包絡線信号の位相を変化させない場合と変化させた場合の時間軸における信号波形を示す図In Embodiment 1 of this invention, the figure which shows the signal waveform in the time-axis when not changing the phase of a constant envelope signal, and changing it 本発明の実施の形態1に係る増幅回路の具体的な構成を示すブロック図The block diagram which shows the concrete structure of the amplifier circuit which concerns on Embodiment 1 of this invention. 本発明の実施の形態2に係る増幅回路の構成を示すブロック図The block diagram which shows the structure of the amplifier circuit which concerns on Embodiment 2 of this invention. 本発明の実施の形態3に係る増幅回路の構成を示すブロック図The block diagram which shows the structure of the amplifier circuit which concerns on Embodiment 3 of this invention. 本発明の実施の形態4に係る増幅回路の構成を示すブロック図The block diagram which shows the structure of the amplifier circuit which concerns on Embodiment 4 of this invention. 本発明の実施の形態4に係る変調信号の時間軸における波形とバイアス電源の波形Waveform of modulation signal on time axis and waveform of bias power supply according to embodiment 4 of the present invention 本発明の実施の形態5に係る増幅回路の構成を示すブロック図Block diagram showing a configuration of an amplifier circuit according to a fifth embodiment of the present invention 本発明の実施の形態5に係る変調信号の時間軸における波形とバイアス電源の波形Waveform of modulation signal on time axis and waveform of bias power supply according to embodiment 5 of the present invention 本発明の実施の形態6に係る無線送受信装置の構成を示すブロック図The block diagram which shows the structure of the radio | wireless transmitter / receiver which concerns on Embodiment 6 of this invention. 従来のLINC方式増幅回路の構成を示すブロック図The block diagram which shows the structure of the conventional LINC system amplifier circuit 従来のLINC方式増幅回路における各信号の直交平面座標のベクトルを示す図The figure which shows the vector of the orthogonal plane coordinate of each signal in the conventional LINC system amplifier circuit

符号の説明Explanation of symbols

100、800 増幅回路
101、801 定包絡線信号生成部
102a、102b 移相器
103a、103b、802a、802b 増幅器
104、803 合成回路
201 定包絡線信号IQ生成部
202a、202b 直交変調器
203a、203b ミキサ
204、206 局部発振器
205a、205b 移相器
301 平均振幅算出部
302 位相制御部
401 最大振幅算出部
402 平均振幅対最大振幅比算出部
501 振幅算出部
502 電圧制御部
601 ピーク抑圧部
700 無線送受信装置
701 アンテナ
702 アンテナ共用器
703 無線受信回路
704 変復調部
100, 800 Amplifier circuit 101, 801 Constant envelope signal generator 102a, 102b Phase shifter 103a, 103b, 802a, 802b Amplifier 104, 803 Synthesizer circuit 201 Constant envelope signal IQ generator 202a, 202b Quadrature modulator 203a, 203b Mixer 204, 206 Local oscillator 205a, 205b Phase shifter 301 Average amplitude calculator 302 Phase controller 401 Maximum amplitude calculator 402 Average amplitude to maximum amplitude ratio calculator 501 Amplitude calculator 502 Voltage controller 601 Peak suppressor 700 Wireless transmission / reception Device 701 Antenna 702 Antenna duplexer 703 Radio reception circuit 704 Modulator / Demodulator

Claims (7)

入力信号から位相の異なる二つの定包絡線信号を生成する定包絡線信号生成手段と、
前記二つの定包絡線信号のそれぞれの位相を個別に変化させる二つの移相手段と、
前記二つの移相手段の出力信号を個別に増幅する二つの増幅手段と、
前記二つの増幅手段の出力信号を合成する合成手段とを備え、
前記定包絡線信号生成手段は、前記入力信号に対してプラス方向の位相にある第1の定包絡線信号と、前記入力信号に対してマイナス方向の位相にある第2の定包絡線信号とを生成し、
前記二つの移相手段のうち少なくとも一方は、前記第1の定包絡線信号と前記第2の定包絡線信号との位相差を小さくする方向へ位相を変化させることを特徴とする増幅回路。
Constant envelope signal generating means for generating two constant envelope signals having different phases from the input signal;
Two phase shifting means for individually changing the phase of each of the two constant envelope signals;
Two amplifying means for individually amplifying the output signals of the two phase shifting means;
Combining means for combining the output signals of the two amplifying means,
The constant envelope signal generation means includes a first constant envelope signal that is in a positive phase with respect to the input signal, and a second constant envelope signal that is in a negative direction with respect to the input signal. Produces
At least one of the two phase shifting means changes the phase in a direction to reduce the phase difference between the first constant envelope signal and the second constant envelope signal.
前記二つの移相手段は第1の移相手段と第2の移相手段とから成り、
前記第1の移相手段は、前記第1の定包絡線信号の位相をマイナス方向へ変化させ、
前記第2の移相手段は、前記第2の定包絡線信号の位相をプラス方向へ変化させる
ことを特徴とする請求項1に記載の増幅回路。
The two phase shifting means comprises a first phase shifting means and a second phase shifting means,
The first phase shifting means changes the phase of the first constant envelope signal in the negative direction,
2. The amplifier circuit according to claim 1, wherein the second phase shift unit changes the phase of the second constant envelope signal in a plus direction.
前記入力信号の平均振幅値もしくは平均電力値を算出する手段と、
前記平均振幅値もしくは平均電力値に応じて前記位相手段の位相変化量を制御する位相制御手段と
を備えることを特徴とする請求項1または請求項2に記載の増幅回路。
Means for calculating an average amplitude value or average power value of the input signal;
The amplifier circuit according to claim 1, further comprising: a phase control unit that controls a phase change amount of the phase unit according to the average amplitude value or the average power value.
前記入力信号の最大振幅値もしくは最大電力値を算出する手段と、
前記平均電力値と最大振幅値の比、もしくは平均電力値と最大電力値の比を算出する手段と
を備えることを特徴とする請求項3に記載の増幅回路。
Means for calculating a maximum amplitude value or a maximum power value of the input signal;
4. The amplifier circuit according to claim 3, further comprising means for calculating a ratio between the average power value and the maximum amplitude value or a ratio between the average power value and the maximum power value.
前記入力信号の振幅値を算出する振幅算出手段と、
前記振幅算出手段が算出した振幅値が所定の閾値を超えたときに前記増幅手段のバイアス電圧を制御する電圧制御手段と
を備えることを特徴とする請求項1または請求項2に記載の増幅回路。
Amplitude calculating means for calculating an amplitude value of the input signal;
3. The amplifier circuit according to claim 1, further comprising a voltage control unit configured to control a bias voltage of the amplification unit when the amplitude value calculated by the amplitude calculation unit exceeds a predetermined threshold value. .
前記振幅算出手段の前段に、前記入力信号の振幅ピーク値を抑圧するためのピーク抑圧手段を備えることを特徴とする請求項5に記載の増幅回路。   6. The amplifier circuit according to claim 5, further comprising peak suppression means for suppressing an amplitude peak value of the input signal before the amplitude calculation means. 請求項1乃至請求項6の何れかに記載の増幅回路を備える送信機。   A transmitter comprising the amplifier circuit according to any one of claims 1 to 6.
JP2004318602A 2004-11-01 2004-11-01 Amplifier circuit and transmitter Withdrawn JP2006129402A (en)

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Cited By (9)

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JP2007325163A (en) * 2006-06-05 2007-12-13 Japan Radio Co Ltd Signal decomposing apparatus and signal amplifying system
JP2008028509A (en) * 2006-07-19 2008-02-07 Matsushita Electric Ind Co Ltd Transmission power amplifier, its control method and wireless communication apparatus
WO2008099506A1 (en) * 2007-02-16 2008-08-21 Panasonic Corporation Transmitter circuit, radio base station apparatus, and wireless terminal apparatus
JP2010530657A (en) * 2007-05-25 2010-09-09 ラムバス・インコーポレーテッド Multi-antenna beamforming system for transmitting constant envelope signals decomposed from variable envelope signals
JP2011087086A (en) * 2009-10-14 2011-04-28 Advantest Corp Modulation apparatus and test apparatus
JP2011199772A (en) * 2010-03-23 2011-10-06 Advantest Corp Modulator, setting method, and testing device
US8482462B2 (en) 2007-05-25 2013-07-09 Rambus Inc. Multi-antenna beam-forming system for transmitting constant envelope signals decomposed from a variable envelope signal
JP2015156602A (en) * 2014-02-21 2015-08-27 株式会社モバイルテクノ Complex digital signal compression device and program, complex digital signal expansion device and program, and communication device
JP2017527191A (en) * 2015-06-26 2017-09-14 株式会社東芝 Amplifier circuit and method for amplifying a signal using said amplifier circuit

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007325163A (en) * 2006-06-05 2007-12-13 Japan Radio Co Ltd Signal decomposing apparatus and signal amplifying system
JP2008028509A (en) * 2006-07-19 2008-02-07 Matsushita Electric Ind Co Ltd Transmission power amplifier, its control method and wireless communication apparatus
WO2008099506A1 (en) * 2007-02-16 2008-08-21 Panasonic Corporation Transmitter circuit, radio base station apparatus, and wireless terminal apparatus
JP2010530657A (en) * 2007-05-25 2010-09-09 ラムバス・インコーポレーテッド Multi-antenna beamforming system for transmitting constant envelope signals decomposed from variable envelope signals
US8482462B2 (en) 2007-05-25 2013-07-09 Rambus Inc. Multi-antenna beam-forming system for transmitting constant envelope signals decomposed from a variable envelope signal
JP2011087086A (en) * 2009-10-14 2011-04-28 Advantest Corp Modulation apparatus and test apparatus
JP2011199772A (en) * 2010-03-23 2011-10-06 Advantest Corp Modulator, setting method, and testing device
JP2015156602A (en) * 2014-02-21 2015-08-27 株式会社モバイルテクノ Complex digital signal compression device and program, complex digital signal expansion device and program, and communication device
JP2017527191A (en) * 2015-06-26 2017-09-14 株式会社東芝 Amplifier circuit and method for amplifying a signal using said amplifier circuit
US10404225B2 (en) 2015-06-26 2019-09-03 Kabushiki Kaisha Toshiba Amplifier circuitry and method for amplifying a signal using said amplifier circuitry

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