JP2006120992A - Method for manufacturing silicon nitride film, and its manufacturing apparatus - Google Patents

Method for manufacturing silicon nitride film, and its manufacturing apparatus Download PDF

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JP2006120992A
JP2006120992A JP2004309694A JP2004309694A JP2006120992A JP 2006120992 A JP2006120992 A JP 2006120992A JP 2004309694 A JP2004309694 A JP 2004309694A JP 2004309694 A JP2004309694 A JP 2004309694A JP 2006120992 A JP2006120992 A JP 2006120992A
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silicon nitride
nitride film
organic compound
compressive strain
silicon
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Mamoru Ota
守 太田
Tetsuya Komoto
徹哉 幸本
Hiroshi Kawaura
廣 川浦
Shinichi Hasegawa
新一 長谷川
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C Bui Res Kk
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<P>PROBLEM TO BE SOLVED: To improve electrical characteristics (increase in saturation current I<SB>DS</SB>) of a field-effect MOS transistor using a very simplified technique, and to provide a method and an apparatus for manufacturing a silicon nitride film containing super-compressive strain of at least 1 GPa. <P>SOLUTION: In this manufacturing method, high-density plasma (>5x10E(10)/cm<SP>3</SP>) is generated in a vessel. Organic compound containing silicon and nitrogen is supplied into the atmosphere the degree of vacuum (pressure) of which is at most 100 mTorr, desirably at most 10 mTorr. In a range in which the depositing temperature is 200-700°C and the film thickness is 20-300 nm, the silicon nitride film containing super compressive strain is manufactured wherein super compressive strain contained in a film is at least 1 GPa (1 GPa is included). <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、例えば、半導体集積回路や単体半導体電子素子（デバイス）を製造する際、超圧縮型歪み応力〔１ＧＰａ（ギガパスカル）以上〕を合有するシリコン窒化膜
（ＳｉＮ）を半導体電子素子（デバイス）上に構成して、半導体電子素子の電気的特性を著しく向上させるシリコン窒化膜（ＳｉＮ）の製造方法及びその製造装置に関する。 In the present invention, for example, when a semiconductor integrated circuit or a single semiconductor electronic element (device) is manufactured, a silicon nitride film (SiN) having a super compressive strain stress [1 GPa (gigapascal) or more] is added to the semiconductor electronic element (device). The present invention relates to a method for manufacturing a silicon nitride film (SiN) and a manufacturing apparatus for the same, which significantly improve the electrical characteristics of a semiconductor electronic device.

元素周期律表の第４族系半導体電子素子（デバイス）であるシリコン（Ｓｉ）電子素子（トランジスタ）に焦点を当てて、以下説明を行う。シリコン半導体集積回路は、そこに内在するシリコン（Ｓｉ）電子素子群に対し、微細化に次ぐ微細化を実施し、発展を図ってきている。しかしながら、今やその微細化は、コストの急増や技術的壁に直面しているのが現状である。そこで、微細化に頼らず、上記シリコン（Ｓｉ）電子素子群の中で中心的役割を果たすトランジスタの電気的特性を向上させ得る技術が求められている。微細化に頼らず、トランジスタの電気的特性を向上させ得る重要な製造技術の一つが、トランジスタの導通部（電界効果型トランジスタの場合、チャンネルと呼ばれる部分）に歪み応力（Ｓｔｒａｉｎ）を与える技術である（非特許文献１,２,３,４）。
「Fabrication and Analysis of Deep Submicron Strained-Si N-MOSFETS」、ケー・リム他著、IEEE・トランザクション・エレクトロン・デバイシズ、2000年7月、 Vol.47、 No.7 ケー・リム他著、 2002 シンポジウム・オン・VLSI・テクノロジー、p.98 「激動の時代を迎える半導体プロセスのパラダイムシフト」、長谷川新一著、工業調査会誌「Ｍ＆Ｅ」、2003年5月号、p.140 「A 90nm High Volume Manufacturing Logic Technology Featuring Novel 45nm Gate Length Strained Silicon CMOS Transistors」、 ティー・ガーニ他著（インテル）、IEEE・インターナショナル・エレクトロン・デバイシズ・ミーティング、2003年12月 The following description will focus on a silicon (Si) electronic element (transistor) that is a Group 4 semiconductor electronic element (device) in the periodic table. Silicon semiconductor integrated circuits have been developed by miniaturization subsequent to miniaturization of silicon (Si) electronic element groups contained therein. However, the miniaturization is now facing a rapid increase in costs and technical barriers. Therefore, there is a need for a technique that can improve the electrical characteristics of a transistor that plays a central role in the silicon (Si) electronic element group without depending on miniaturization. One important manufacturing technique that can improve the electrical characteristics of a transistor without depending on miniaturization is a technique that applies strain stress to the conduction part of the transistor (in the case of a field effect transistor, a part called a channel). (Non-Patent Documents 1, 2, 3, and 4).
"Fabrication and Analysis of Deep Submicron Strained-Si N-MOSFETS", K. Lim et al., IEEE Transactions Electron Devices, July 2000, Vol. 47, No. 7 K. Lim et al., 2002 Symposium on VLSI Technology, p.98 “The Paradigm Shift in Semiconductor Processes Entering a Severe Era”, Shinichi Hasegawa, Industrial Research Magazine “M & E”, May 2003, p.140 "A 90nm High Volume Manufacturing Logic Technology Featuring Novel 45nm Gate Length Strained Silicon CMOS Transistors", T. Garni et al. (Intel), IEEE International Electron Devices Meeting, December 2003

非特許文献１,２,３,４に示される従来の技術では、極めて複雑な手法が用いられている。すなわち、シリコン（Ｓｉ）に対して、結晶の格子定数が約４％程度大きいゲルマニウウム（Ｇｅ）を１０％〜２０％程度混合したＳｉｘＧｅ１−ｘ（ｘ＝０.１〜０.２）層を電界効果型ＭＯＳトランジスタの導通部（チャンネル部）の直下に挿入することにより、電界効果型ＭＯＳトランジスタの導通部（チャンネル部）に引っ張り歪み応力
（Ｔｅｎｓｉｌｅ Ｓｔｒａｉｎ）を印加し、電界効果型ＭＯＳトランジスタの電気的特性（飽和電流ＩＤＳの増大）の向上を図る複雑な手法である（非特許文献１,２,３）。あるいは、電界効果型ＭＯＳトランジスタを、ｎ型（ｎｅｇａｔｉｖｅ ｔｙｐｅ）とｐ型（ｐｏｓｉｔｉｖｅ ｔｙｐｅ）とに細分する（非特許文献４参照）。細分されたｎ型電界効果型ＭＯＳトランジスタに対しては、多くの場合、ＡＬＤ（Ａｔｏｍｉｃ
Ｌａｙｅｒ Ｄｅｐｏｓｉｔｉｏｎ）法やＬＰＣＶＤ（Ｌｏｗ Ｐｒｅｓｓｕｒｅ
Ｃｈｅｍｉｃａｌ Ｖａｐｏｒ Ｄｅｐｏｓｉｔｉｏｎ）法を用いて得られる引っ張り歪み応力（Ｔｅｎｓｉｌｅ Ｓｔｒａｉｎ）を有するシリコン窒化膜（ＳｉＮ）で、そのトランジスタの上部を被覆する。細分されたｐ型電界効果型ＭＯＳトランジスタに対しては、そのソース部（Ｓｏｕｒｃｅ）とドレイン部（Ｄｒａｉｎ）をエッチング
（Ｅｔｃｈｉｎｇ）し、エッチングによって形成された空洞部を選択エキタキシャル成長技術を用いてＳｉｘＧｅ１−ｘ層で埋め戻し、その結果、電界効果型ＭＯＳトランジスタの導通部（チャンネル部）に、圧縮型歪み応力（Ｃｏｍｐｒｅｓｓｉｖｅ
Ｓｔｒａｉｎ）を印加し、電界効果型ＭＯＳトランジスタの電気的特性（飽和電流ＩＤＳの増大）の向上を図る極めて複雑な手法である（非特許文献４）。 In the conventional techniques shown in Non-Patent Documents 1, 2, 3, and 4, extremely complicated methods are used. That is, a SixGe1-x (x = 0.1 to 0.2) layer in which germanium (Ge) having a crystal lattice constant of about 4% larger than silicon (Si) is mixed by about 10% to 20%. By inserting the conductive portion (channel portion) of the field effect MOS transistor directly below the conductive portion (channel portion) of the field effect MOS transistor, a tensile strain is applied to the conductive portion (channel portion) of the field effect MOS transistor. it is a complex technique to improve the electrical characteristics (increase in saturation current I DS) (non-Patent documents 1, 2 and 3). Alternatively, the field effect MOS transistor is subdivided into an n-type (negative type) and a p-type (positive type) (see Non-Patent Document 4). For subdivided n-type field effect MOS transistors, ALD (Atomic) is often used.
Layer deposition (LPD) method and LPCVD (Low Pressure)
The upper portion of the transistor is covered with a silicon nitride film (SiN) having a tensile strain obtained by using a Chemical Vapor Deposition method. For the subdivided p-type field effect MOS transistor, the source portion and the drain portion are etched, and the cavity formed by the etching is selected using a selective epitaxial growth technique. As a result, the compressive strain stress (Compressive) is applied to the conduction portion (channel portion) of the field effect MOS transistor.
Strain) was applied to a very complex approach to improve the electrical characteristics of the field effect type MOS transistor (increase in saturation current I DS) (Non-Patent Document 4).

本発明は、それら従来の技術には見られない手法であり、しかも、極めて単純簡素化された手法で電界効果型ＭＯＳトランジスタの電気的特性（飽和電流ＩＤＳの増大）の向上を図ることを目的とし、１ＧＰａ以上の圧縮型歪み応力（Ｃｏｍｐｒｅｓｓｉｖｅ
Ｓｔｒａｉｎ）を特徴とする超圧縮型歪み応力（Ｓｕｐｅｒ Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）を合有するシリコン窒化膜（ＳｉＮ）を製造する方法及び製造装置を提供することを目的とする。 The present invention are those methods not found in the prior art, moreover, is to improve the electrical characteristics of the field effect type MOS transistor (increase in saturation current I DS) with very simple simplified approach Compressive strain stress of 1 GPa or more (Compressive)
It is an object of the present invention to provide a method and an apparatus for manufacturing a silicon nitride film (SiN) having a super compressive strain (Super Compressive Strain) characterized by a strain.

上記目的を達成するため、請求項１に係る発明は、容器内に高密度プラズマを発生させ、１００ｍＴｏｒｒ以下の真空度の雰囲気中にシリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物を供給し、成膜温度が２００℃〜７００℃、膜厚が２０ｎｍ〜３００ｎｍの範囲で膜の合有する圧縮型歪み応力が１ＧＰａ以上であるシリコン窒化膜の製造方法である。   In order to achieve the above object, the invention according to claim 1 generates a high-density plasma in a container and supplies an organic compound containing silicon (Si) and nitrogen (N) in an atmosphere of a vacuum degree of 100 mTorr or less. And a silicon nitride film manufacturing method in which the compressive strain stress of the film is 1 GPa or more when the film forming temperature is 200 ° C. to 700 ° C. and the film thickness is 20 nm to 300 nm.

請求項２に係る発明は、請求項１において、シリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物は、トリメチル・シラン〔（ＣＨ３）３ＳｉＨ〕などの３ＭＳ系有機化合物であるシリコン窒化膜の製造方法である。 The invention according to claim 2 is the silicon nitride according to claim 1, wherein the organic compound containing silicon (Si) and nitrogen (N) is a 3MS organic compound such as trimethylsilane [(CH 3 ) 3 SiH]. It is a manufacturing method of a film | membrane.

請求項３に係る発明は、請求項１において、シリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物は、テトラメチル・シラン〔（ＣＨ３）４Ｓｉ〕などの４ＭＳ系有機化合物であるシリコン窒化膜の製造方法である。 The invention according to claim 3 is the silicon according to claim 1, wherein the organic compound containing silicon (Si) and nitrogen (N) is a 4MS organic compound such as tetramethylsilane [(CH 3 ) 4 Si]. This is a method for manufacturing a nitride film.

請求項４に係る発明は、請求項１において、シリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物は、トリデイメチル・アミノシラン〔ＨＳｉ〔Ｎ（ＣＨ３）２〕３〕などのＴＤＭＡＳ系有機化合物であるシリコン窒化膜の製造方法である。 The invention according to claim 4 is the invention as set forth in claim 1, wherein the organic compound containing silicon (Si) and nitrogen (N) is a TDMAS organic compound such as tridaymethylaminosilane [HSi [N (CH 3 ) 2 ] 3 ]. This is a method for manufacturing a silicon nitride film.

請求項５に係る発明は、前記シリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物は、前記３ＭＳ系有機化合物、前記４ＭＳ有機化合物、前記ＴＤＭＡＳ系有機化合物の何れか２種類又は３種類の混合物である請求項１乃至４の何れか１項に記載のシリコン窒化膜の製造方法である。   According to a fifth aspect of the present invention, the organic compound comprising silicon (Si) and nitrogen (N) is one of two or three of the 3MS organic compound, the 4MS organic compound, and the TDMAS organic compound. 5. The method for producing a silicon nitride film according to claim 1, wherein the silicon nitride film is a mixture.

請求項６に係る発明は、容器内に発生させる高密度プラズマ発生源と、１０ｍＴｏｒｒ以下の真空度の雰囲気中にシリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物を供給する供給手段とから成り、成膜温度が２００℃〜７００℃、膜厚が２０ｎｍ〜３００ｎｍの範囲で膜の合有する圧縮型歪み応力が１ＧＰａ以上である超圧縮型歪み応力を合有するシリコン窒化膜の製造装置である。   According to a sixth aspect of the present invention, there is provided a high-density plasma generation source generated in a container and a supply means for supplying an organic compound having a combination of silicon (Si) and nitrogen (N) in an atmosphere of a vacuum degree of 10 mTorr or less. It is an apparatus for manufacturing a silicon nitride film having a super compressive strain stress that has a compressive strain stress of 1 GPa or more with a film forming temperature of 200 ° C. to 700 ° C. and a film thickness of 20 nm to 300 nm. .

請求項７に係る発明は、請求項６において、超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）の製造される際の基板が、元素周期律表の第４族系半導体電子素子であるシリコン窒化膜の製造装置である。   The invention according to claim 7 is the semiconductor device according to claim 6, wherein the substrate when the silicon nitride film (SiN) having the super compressive strain stress is manufactured is a group 4 semiconductor electronic device having an element periodic table. This is a silicon nitride film manufacturing apparatus.

請求項８に係る発明は、請求項６において、超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）の製造される際の基板が、元素周期律表の第III-V族系化合物半導体電子素子であるシリコン窒化膜の製造装置である。   The invention according to claim 8 is the group III-V compound semiconductor electron according to claim 6, wherein the substrate when the silicon nitride film (SiN) having supercompressive strain stress is manufactured is a group III-V compound semiconductor electron of the periodic table This is a device for manufacturing a silicon nitride film as an element.

請求項９に係る発明は、請求項６において、超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）の製造される際の基板が、元素周期律表の第II-VI族系化合物半導体電子素子であるシリコン窒化膜の製造装置である。   The invention according to claim 9 is the semiconductor device according to claim 6, wherein the silicon nitride film (SiN) having supercompressive strain stress is manufactured in the group II-VI group compound semiconductor electron of the periodic table of elements. This is a device for manufacturing a silicon nitride film as an element.

本発明によると、極めて単純簡素化された手法で電界効果型ＭＯＳトランジスタの電気的特性（飽和電流ＩＤＳの増大）の向上を図ることができる。 According to the present invention, it is possible to improve the electrical characteristics of the field effect type MOS transistor (increase in saturation current I DS) with very simple simplified approach.

本発明におけるシリコン窒化膜の製造方法及びその製造装置における最良の形態について説明する。
本発明は、容器内に高密度プラズマ（＞５ｘ１０Ｅ（１０）／ｃｍ３）を発生させ、１００ｍＴｏｒｒ以下、望ましくは１０ｍＴｏｒｒ以下の真空度（圧力）の雰囲気中にシリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物を供給し、成膜温度が２００℃〜７００℃の範囲で、膜厚が２０ｎｍ〜３００ｎｍの範囲で膜の合有する圧縮型歪み応力
（Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）が１ＧＰａ（ギガパスカル）以上（１ＧＰａを含む）である超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）の製造方法である。
このシリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物は、トリメチル・シラン
〔（ＣＨ３）３ＳｉＨ〕などの３ＭＳ系有機化合物であり、または、テトラメチル・シラン〔（ＣＨ３）４Ｓｉ〕などの４ＭＳ系有機化合物であり、または、トリデイメチル・アミノシラン〔ＨＳｉ〔Ｎ（ＣＨ３）２〕３〕などのＴＤＭＡＳ系有機化合物であり、または、３ＭＳ系有機化合物、４ＭＳ系有機化合物、ＴＤＭＡＳ系有機化合物の２種類、または３種類の混合物である。
他の各発明は、容器内に高密度プラズマ（＞５x１０Ｅ（１０）／ｃｍ３）を発生させ、<１０ｍＴｏｒｒの真空度（圧力）の雰囲気中にシリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物を供給し、成膜温度が２００℃〜７００℃の範囲で、膜厚が２０ｎｍ〜３００ｎｍの範囲で膜の合有する圧縮型歪み応力（Ｃｏｍｐｒｅｓｓｉｖｅ
Ｓｔｒａｉｎ）が１ＧＰａ（ギガパスカル）以上（１ＧＰａを含む）であること特徴とする超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）の製造装置である。
この超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）の製造される際の基板体が、元素周期律表の第４族系半導体電子素子（デバイス）であり、または、超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）の製造される際の基板体が、元素周期律表の第
III-V族系化合物半導体電子素子（デバイス）であり、または、超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）の製造される際の基板体が、元素周期律表の第II-VI族系化合物半導体電子素子（デバイス）である。 The best mode of the silicon nitride film manufacturing method and manufacturing apparatus according to the present invention will be described.
The present invention generates high-density plasma (> 5 × 10E (10) / cm 3) in a container and supplies silicon (Si) and nitrogen (N) in an atmosphere having a vacuum (pressure) of 100 mTorr or less, preferably 10 mTorr or less. The compression strain stress (Compressive Strain) of the film is 1 GPa (gigapascal) or more when the film formation temperature is in the range of 200 ° C. to 700 ° C. and the film thickness is in the range of 20 nm to 300 nm. This is a method for manufacturing a silicon nitride film (SiN) having a super compressive strain stress (including 1 GPa).
The organic compound containing silicon (Si) and nitrogen (N) is a 3MS organic compound such as trimethyl silane [(CH 3 ) 3 SiH], or tetramethyl silane [(CH 3 ) 4 Si. Or a TDMAS organic compound such as tridaymethylaminosilane [HSi [N (CH 3 ) 2 ] 3 ], or a 3MS organic compound, 4MS organic compound, or TDMAS Two or three kinds of organic compounds.
Each of the other inventions generates high-density plasma (> 5 × 10E (10) / cm 3) in the container, and combines silicon (Si) and nitrogen (N) in an atmosphere of vacuum degree (pressure) of <10 mTorr. Compressive strain stress (Compressive) that the compound has supplied, the film formation temperature is in the range of 200 ° C. to 700 ° C., and the film thickness is in the range of 20 nm to 300 nm.
This is an apparatus for manufacturing a silicon nitride film (SiN) having a super compressive strain stress characterized by a strain of 1 GPa (gigapascal) or more (including 1 GPa).
The substrate body when the silicon nitride film (SiN) having the super compressive strain stress is manufactured is a group 4 semiconductor electronic element (device) of the periodic table, or the super compressive strain stress. The substrate body when the silicon nitride film (SiN) containing
The substrate body when a silicon nitride film (SiN) that is a III-V compound semiconductor electronic element (device) or has a super-compressive strain stress is manufactured is II-VI in the periodic table of elements. It is a group compound semiconductor electronic device (device).

以下に、本発明におけるシリコン窒化膜の製造方法及びその製造装置における各実施例について詳述する。
（実施例１）
図１は、本発明を具現化するＣＶＤ（Ｃｈｅｍｉｃａｌ Ｖａｐｏｒ
Ｄｅｐｏｓｉｔｉｏｎ）装置の一例である。真空容器１内に高密度プラズマ（＞５x１０Ｅ（１０）／ｃｍ３）を発生させる１３.５６ＭＨｚの高周波を用いたヘリコン
（Ｈｅｌｉｃｏｎ）型プラズマ発生源２が装着されている。真空容器１内に高密度プラズマを発生させガス種である窒素ガス（Ｎ２）及びアンモニヤガス（ＮＨ３）を供給する供給口３が設けられている。さらに、真空容器１内に、本発明の特徴である超圧縮型歪み応力（Ｓｕｐｅｒ Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）を合有するシリコン窒化膜
（ＳｉＮ）の原料ガスの供給口４が設けられている。超圧縮型歪み応力（Ｓｕｐｅｒ
Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）を合有するシリコン窒化膜（ＳｉＮ）が成膜する半導体基板（ウエハ）５を加熱保持するステージ（Ｓｔａｇｅ）６が設けられている。真空容器１は真空排気口７により、排気されたり、あるいは、所望の真空容器１内圧力に保持されたりしている。 The embodiments of the silicon nitride film manufacturing method and manufacturing apparatus according to the present invention will be described in detail below.
Example 1
FIG. 1 shows a CVD (Chemical Vapor) embodying the present invention.
It is an example of a (deposition) apparatus. A helicon type plasma generation source 2 using a high frequency of 13.56 MHz for generating high-density plasma (> 5 × 10E (10) / cm 3) is mounted in the vacuum vessel 1. A supply port 3 for generating high-density plasma in the vacuum vessel 1 and supplying nitrogen gas (N 2 ) and ammonia gas (NH 3 ) as gas species is provided. Further, a supply port 4 for a source gas of a silicon nitride film (SiN) having super compressive strain (Super Compressive Strain), which is a feature of the present invention, is provided in the vacuum vessel 1. Super compressive strain stress (Super
A stage (Stage) 6 is provided for heating and holding a semiconductor substrate (wafer) 5 on which a silicon nitride film (SiN) including Compressive Strain is formed. The vacuum vessel 1 is evacuated through the vacuum exhaust port 7 or is maintained at a desired pressure inside the vacuum vessel 1.

図２は、既に９０ｎｍ−ｎｏｄｅ（Ｌｏｇｉｃ−ｎｏｄｅ）のロジック用ｐ型電界効果型ＭＯＳトランジスタ（８,９,１０,１１,１２,１３,１４,１５）が形成された、直径２００ｍｍのシリコン・ウエハ１７を示す。同図において、トランジスタ８,９,１０,１１,１２,１３,１４は、それぞれ、電界効果型ＭＯＳトランジスタのソース部８、ソース・エクテンシン部（Ｓｏｕｒｃｅ Ｅｘｔｅｎｓｉｏｎ部）９、ドレイン部１０、ドレイン・エクテンシン部（Ｄｒａｉｎ Ｅｘｔｅｎｓｉｏｎ部）１１、導通部（チャンネル部）１２、膜厚５ｎｍのゲート（Ｇａｔｅ）・シリコン酸化膜１３、多結晶シリコン・ゲート電極１４、そして、サイド・ウォール部（Ｓｉｄｅ Ｗａｌｌ部）１５である。   FIG. 2 shows a silicon-type 200 mm diameter in which p-type field effect MOS transistors (8, 9, 10, 11, 12, 13, 14, 15) for logic of 90 nm-node (Logic-node) have already been formed. The wafer 17 is shown. In the figure, transistors 8, 9, 10, 11, 12, 13, and 14 are a field effect MOS transistor source section 8, source extension section (source extension section) 9, drain section 10, and drain extension array, respectively. Part (Drain Extension part) 11, conducting part (channel part) 12, 5 nm-thick gate (Gate) silicon oxide film 13, polycrystalline silicon gate electrode 14, and side wall part (Side Wall part) 15 It is.

次に本発明である超圧縮型歪み応力（Ｓｕｐｅｒ Ｃｏｍｐｒｅｓｓｉｖｅ
Ｓｔｒａｉｎ）を合有するシリコン窒化膜（ＳｉＮ）１６の製造方法を述べる。上記電界効果型ＭＯＳトランジスタが既に形成された直径２００ｍｍのシリコン・ウエハ１７を真空容器１内の加熱ステージ６に設置した。次に真空容器１内を１０のマイナス６乗
［１０Ｅ（−６）］を排気、窒素ガス（Ｎ２）を１００ｃｍ３／ｍｉｎの供給レートで供給口３から真空容器１内に導入し、真空容器１内圧力を９５mＴｏｒｒにした。ヘリコン（Ｈｅｌｉｃｏｎ）型プラズマ発生源２をＲＦ出力２.５ＫＷで通電開始し、窒素ガス供給レートを３０ｃｍ３／ｍｉｎに調整し、５ｘ１０Ｅ（１０）／ｃｍ３以上の高密度プラズマを３秒間発生させ、アンモニヤガス（ＮＨ３）を３１ｃｍ３／ｍｉｎ供給レートで供給口３から導入した。その際の真空容器力を２mＴｏｒｒに調整され、続いて、供給口４より、超圧縮型歪み応力（Ｓｕｐｅｒ Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）を合有するシリコン窒化膜（ＳｉＮ）１５の原料ガス、３ＭＳ系有機化合物であるトリメチル・シラン〔（ＣＨ３）３ＳｉＨ〕を２,０ｃｍ３／ｍｉｎの供給レートで、計４分３０秒間導入した。その結果、加熱ステージ６により４５０℃で加熱保持されたシリコン・ウエハ１６上に、図２に示すシリコン窒化膜（ＳｉＮ）１６が成膜された。成膜シリコン窒素膜
（ＳｉＮ）１６の膜厚は９５ｎｍであり、１.７ＧＰａの超圧縮型歪み応力（Ｓｕｐｅｒ Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）を合有するシリコン窒化膜（ＳｉＮ）が製造されていることが確認された。 Next, the super compressive strain stress (Super Compressive) of the present invention.
A method of manufacturing a silicon nitride film (SiN) 16 having a strain will be described. A silicon wafer 17 having a diameter of 200 mm, on which the field effect MOS transistor had already been formed, was placed on the heating stage 6 in the vacuum vessel 1. Next, the inside of the vacuum vessel 1 is exhausted to the negative sixth power [10E (−6)] and nitrogen gas (N 2 ) is introduced into the vacuum vessel 1 from the supply port 3 at a supply rate of 100 cm 3 / min. The internal pressure was set to 95 mTorr. The helicon type plasma generation source 2 is energized with an RF output of 2.5 KW, the nitrogen gas supply rate is adjusted to 30 cm3 / min, high density plasma of 5 × 10E (10) / cm3 or more is generated for 3 seconds, and the ammonia is generated. Gas (NH 3 ) was introduced from the supply port 3 at a supply rate of 31 cm 3 / min. The vacuum vessel force at that time is adjusted to 2 mTorr, and subsequently, a raw material gas of a silicon nitride film (SiN) 15 having super compressive strain (Super Compressive Strain) from the supply port 4, and a 3MS organic compound. Trimethyl silane [(CH 3 ) 3 SiH] was introduced at a supply rate of 2.0 cm 3 / min for a total of 4 minutes and 30 seconds. As a result, a silicon nitride film (SiN) 16 shown in FIG. 2 was formed on the silicon wafer 16 heated and held at 450 ° C. by the heating stage 6. The film thickness of the deposited silicon nitrogen film (SiN) 16 was 95 nm, and it was confirmed that a silicon nitride film (SiN) having a super compressive strain of 1.7 GPa (Super Compressive Strain) was produced. .

次に、この１.７ＧＰａの超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）が成膜したｐ型電界効果型ＭＯＳトランジスタの電気的特性を、シリコン窒化膜（ＳｉＮ）が成膜される以前の電気的特性と比較した。その結果、ｐ型電界効果型ＭＯＳトランジスタの飽和電流ＩＤＳが１３％も増大・向上していることが確認された。 Next, the silicon nitride film (SiN) is formed in accordance with the electrical characteristics of the p-type field effect MOS transistor formed with the silicon nitride film (SiN) having a super compressive strain stress of 1.7 GPa. Compared with previous electrical characteristics. As a result, it was confirmed that the saturation current I DS of p-type field-effect MOS transistor is also increased and increase of 13%.

図３は、上記と同様のシリコン・ウエハを複数枚用意し、上記と同様の成膜実験を繰り返し、シリコン窒化膜の成膜温度（加熱ステージ６上のリコン・ウエハの温度）に対するシリコン窒化膜の合有圧縮型歪み応力の依存性を測定した結果を示したものである。２００℃〜７００℃の広い成膜温度領域で１.５ＧＰａ以上の超圧縮型歪み応力を合有するシリコン窒化膜が製造されていることが確認された。なお、同図に示される２.１ＧＰａの超圧縮型歪み応力を合有するシリコン窒化膜が成膜したｐ型電界効果型ＭＯＳトランジスタの電気的特性を測定した結果、成膜される以前の電気的特性と比較し、飽和電流ＩＤＳが実に２２％も増大・向上していることが確認された。 FIG. 3 shows a case where a plurality of silicon wafers similar to the above are prepared, and a film formation experiment similar to the above is repeated, and the silicon nitride film with respect to the film formation temperature of the silicon nitride film (the temperature of the recon wafer on the heating stage 6). It shows the result of measuring the dependence of the combined compressive strain stress. It was confirmed that a silicon nitride film having a super compressive strain stress of 1.5 GPa or more was produced in a wide film forming temperature range of 200 ° C. to 700 ° C. In addition, as a result of measuring the electrical characteristics of the p-type field effect MOS transistor formed with the silicon nitride film having the super compressive strain stress of 2.1 GPa shown in FIG. Compared with the characteristics, it was confirmed that the saturation current IDS was actually increased and improved by 22%.

（実施例２）
本実施例では、シリコン窒化膜（ＳｉＮ）（図２の１６）の原料ガスとして、４ＭＳ系有機化合物であるテトラメチル・シラン〔（ＣＨ３）４Ｓｉ〕を用いた。又、シリコン・ウエハ（図２の１７）としては直径３００ｍｍのシリコン・ウエハを用いた。既に当該シリコン・ウエハに形成された電界効果型ＭＯＳトランジスタの上部を超圧縮型歪み応力
（Ｓｕｐｅｒ Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）を合有するシリコン窒化膜
（ＳｉＮ）（図２の１６）で成膜・皮膜をすることを行った。電界効果型ＭＯＳトランジスタが既に形成された直径２００ｍｍのシリコン・ウエハ１７を真空容器１内の加熱ステージ６に設置した。 (Example 2)
In this example, tetramethyl silane [(CH 3 ) 4 Si], which is a 4MS organic compound, was used as a source gas for the silicon nitride film (SiN) (16 in FIG. 2). A silicon wafer having a diameter of 300 mm was used as the silicon wafer (17 in FIG. 2). The upper part of the field effect MOS transistor already formed on the silicon wafer is formed and coated with a silicon nitride film (SiN) (16 in FIG. 2) having a super compressive strain (Super Compressive Strain). Went. A silicon wafer 17 having a diameter of 200 mm on which a field effect MOS transistor was already formed was placed on the heating stage 6 in the vacuum vessel 1.

次に、真空容器１内を１０のマイナス６乗［１０Ｅ（−６）］を排気、窒素ガス
（Ｎ２）を１００ｃｍ３／ｍｉｎの供給レートで供給口３から真空容器１内に導入し、真空容器１内圧力を９７ｍＴｏｒｒにした。ヘリコン（Ｈｅｌｉｃｏｎ）型プラズマ発生源２をＲＦ出力２.８ＫＷで通電開始し、窒素ガス供給レートを３７ｃｍ３／ｍｉｎに調整し、６ｘ１０Ｅ（１０）／ｃｍ３以上の高密度プラズマを約４秒間発生させ、アンモニヤガス（ＮＨ３）を３３ｃｍ３／ｍｉｎ供給レートで供給口３から導入した。その際の真空容器力を１ｍＴｏｒｒに調整され、続いて、供給口４より、超圧縮型歪み応力
（Ｓｕｐｅｒ Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）を合有するシリコン窒化膜
（ＳｉＮ）１６の原料ガス、３ＭＳ系有機化合物であるテトラメチル・シラン
〔（ＣＨ３）４Ｓｉ〕を２.５ｃｍ３／ｍｉｎの供給レートで、計３分５０秒間導入した。 Next, the inside of the vacuum vessel 1 is exhausted to the negative sixth power [10E (−6)], and nitrogen gas (N 2 ) is introduced into the vacuum vessel 1 from the supply port 3 at a supply rate of 100 cm 3 / min. The internal pressure of the container 1 was set to 97 mTorr. The Helicon type plasma generation source 2 is energized with an RF output of 2.8 KW, the nitrogen gas supply rate is adjusted to 37 cm3 / min, and high-density plasma of 6 × 10E (10) / cm3 or more is generated for about 4 seconds. Ammonia gas (NH 3 ) was introduced from the supply port 3 at a supply rate of 33 cm 3 / min. The vacuum vessel force at that time is adjusted to 1 mTorr, and subsequently, a material gas of a silicon nitride film (SiN) 16 having a super compressive strain (Super Compressive Strain) is supplied from the supply port 4 and is a 3MS organic compound. Tetramethyl silane [(CH 3 ) 4 Si] was introduced at a supply rate of 2.5 cm 3 / min for a total of 3 minutes and 50 seconds.

その結果、加熱ステージ６により４３０℃で加熱保持されたシリコン・ウエハ１６上に、図２の１６に示すシリコン窒化膜（ＳｉＮ）が成膜された。成膜シリコン窒素膜
（ＳｉＮ）の膜厚は９９ｎｍであり、１.８ＧＰａの超圧縮型歪み応力（Ｓｕｐｅｒ
Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）を合有するシリコン窒化膜（ＳｉＮ）が製造されていることが確認された。次に、この１.８ＧＰａの超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）が成膜したｐ型電界効果型ＭＯＳトランジスタの電気的特性を、シリコン窒化膜（ＳｉＮ）が成膜される以前の電気的特性と比較した。その結果、ｐ型電界効果型ＭＯＳトランジスタの飽和電流ＩＤＳが１６％も増大・向上していることが確認された。 As a result, a silicon nitride film (SiN) indicated by 16 in FIG. 2 was formed on the silicon wafer 16 heated and held at 430 ° C. by the heating stage 6. The film thickness of the deposited silicon nitrogen film (SiN) is 99 nm, and the super compressive strain stress (Super) of 1.8 GPa
It was confirmed that a silicon nitride film (SiN) including Compressive Strain was manufactured. Next, the silicon nitride film (SiN) is formed in accordance with the electrical characteristics of the p-type field effect MOS transistor formed with the silicon nitride film (SiN) having a super compressive strain stress of 1.8 GPa. Compared with previous electrical characteristics. As a result, it was confirmed that the saturation current I DS of the p-type field-effect MOS transistor is also increased and improvement by 16%.

（実施例３）
本実施例では、シリコン窒化膜（ＳｉＮ）（図２の１６）の原料ガスとして、ＴＤＭＡＳ系有機化合物であるトリデイメチル・アミノシラン〔ＨＳｉ〔Ｎ（ＣＨ３）２〕３〕を用いた。又、シリコン・ウエハ（図２の１７）としては直径２００ｍｍのシリコン・ウエハを用いた。既に当該シリコン・ウエハに形成された電界効果型ＭＯＳトランジスタの上部を超圧縮型歪み応力（Ｓｕｐｅｒ Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）を合有するシリコン窒化膜（ＳｉＮ）（図２の１６）で成膜・皮膜をすることを行った。電界効果型ＭＯＳトランジスタが既に形成された直径２００ｍｍのシリコン・ウエハ１７を真空容器１内の加熱ステージ６に設置した。 (Example 3)
In this embodiment, tridaymethyl-aminosilane [HSi [N (CH 3 ) 2 ] 3 ], which is a TDMAS organic compound, was used as a source gas for the silicon nitride film (SiN) (16 in FIG. 2). A silicon wafer having a diameter of 200 mm was used as the silicon wafer (17 in FIG. 2). The upper part of the field effect MOS transistor already formed on the silicon wafer is formed and coated with a silicon nitride film (SiN) (16 in FIG. 2) having a super compressive strain (Super Compressive Strain). Went. A silicon wafer 17 having a diameter of 200 mm on which a field effect MOS transistor was already formed was placed on the heating stage 6 in the vacuum vessel 1.

次に真空容器１内を１０のマイナス６乗［１０Ｅ（−６）］を排気、窒素ガス（Ｎ２）を１００ｃｍ３／ｍｉｎの供給レートで供給口３から真空容器１内に導入し、真空容器１内圧力を９５mＴｏｒｒにした。ヘリコン（Ｈｅｌｉｃｏｎ）型プラズマ発生源２をＲＦ出力２.８ＫＷで通電開始し、窒素ガス供給レートを３７ｃｍ３／ｍｉｎに調整し、６x１０Ｅ（１０）／ｃｍ３以上の高密度プラズマを約４秒間発生させ、アンモニヤガス
（ＮＨ３）を３９ｃｍ３／ｍｉｎ供給レートで供給口３から導入した。その際の真空容器力を１５ｍＴｏｒｒに調整され、続いて、供給口４より、超圧縮型歪み応力（Ｓｕｐｅｒ Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）を合有するシリコン窒化膜（ＳｉＮ）１６の原料ガス、ＴＤＭＡＳ系系有機化合物であるトリデイメチル・アミノシランを３.５ｃｍ３／ｍｉｎの供給レートで、計４分２０秒間導入した。 Next, the inside of the vacuum vessel 1 is exhausted to the negative sixth power [10E (−6)] and nitrogen gas (N 2 ) is introduced into the vacuum vessel 1 from the supply port 3 at a supply rate of 100 cm 3 / min. The internal pressure was set to 95 mTorr. The helicon type plasma generation source 2 is energized with an RF output of 2.8 KW, the nitrogen gas supply rate is adjusted to 37 cm3 / min, and high-density plasma of 6 × 10E (10) / cm3 or more is generated for about 4 seconds. Ammonia gas (NH 3 ) was introduced from the supply port 3 at a supply rate of 39 cm 3 / min. The vacuum vessel force at that time was adjusted to 15 mTorr, and subsequently, from the supply port 4, a raw material gas of a silicon nitride film (SiN) 16 having a super compressive strain (Super Compressive Strain), a TDMAS organic compound A certain tridaymethyl aminosilane was introduced at a feeding rate of 3.5 cm 3 / min for a total of 4 minutes and 20 seconds.

その結果、加熱ステージ６により４５０℃で加熱保持されたシリコン・ウエハ１６上に、図２の１６に示すシリコン窒化膜（ＳｉＮ）が成膜された。成膜シリコン窒素膜
（ＳｉＮ）の膜厚は９９ｎｍであり、１.６ＧＰａの超圧縮型歪み応力（Ｓｕｐｅｒ
Ｃｏｍｐｒｅｓｓｉｖｅ Ｓｔｒａｉｎ）を合有するシリコン窒化膜（ＳｉＮ）が製造されていることが確認された。次に、この１.６ＧＰａの超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）が成膜したｐ型電界効果型ＭＯＳトランジスタの電気的特性を、シリコン窒化膜（ＳｉＮ）が成膜される以前の電気的特性と比較した。その結果、ｐ型電界効果型ＭＯＳトランジスタの飽和電流ＩＤＳが１３％も増大・向上していることが確認された。 As a result, a silicon nitride film (SiN) indicated by 16 in FIG. 2 was formed on the silicon wafer 16 heated and held at 450 ° C. by the heating stage 6. The film thickness of the deposited silicon nitrogen film (SiN) is 99 nm, and the super compressive strain stress (Super) of 1.6 GPa
It was confirmed that a silicon nitride film (SiN) including Compressive Strain was manufactured. Next, the silicon nitride film (SiN) is formed in accordance with the electrical characteristics of the p-type field effect MOS transistor in which the silicon nitride film (SiN) having the super compressive strain stress of 1.6 GPa is formed. Compared with previous electrical characteristics. As a result, it was confirmed that the saturation current I DS of the p-type field-effect MOS transistor is also increased and increase of 13%.

以上実施例１,２,３では、直径２００ｍｍのシリコン・ウエハを用いた実施例であったが、他の口径のウエハ、たとえば直径３００ｍｍのシリコン・ウエハを用いても、本発明を実施することは明白であり、本発明の特許請求範囲に包括されるべきである。   In the first, second, and third embodiments, the silicon wafer having a diameter of 200 mm is used. However, the present invention can be carried out using a wafer having another diameter, for example, a silicon wafer having a diameter of 300 mm. Is obvious and should be covered by the claims of the present invention.

本発明は、半導体製造工程における半導体ウエハ基板の例について説明したが、その他、ＴＦＴ（Ｔｈｉｎ Ｆｉｌｍ Ｔｒａｎｓｉｓｔｏｒ）を用いた液晶ディスプレイ
(ＴＦＴ型ＬＣＤ)の製造工程における液晶用基板、或いはＴＦＴを用いた有機ＥＬディスプレイ(ＴＦＴ型ＯＬＥＤ)の製造工程における有機ＥＬ用基板、その他の処理基板にも広く適用することができる。 Although the present invention has been described with reference to an example of a semiconductor wafer substrate in a semiconductor manufacturing process, a liquid crystal display using a TFT (Thin Film Transistor) is also available.
It can be widely applied to a liquid crystal substrate in the manufacturing process of (TFT type LCD), an organic EL substrate in the manufacturing process of an organic EL display using TFT (TFT type OLED), and other processing substrates.

本発明におけるＣＶＤ装置の一例を示した概略図である。It is the schematic which showed an example of the CVD apparatus in this invention. 本発明におけるロジック用ｐ型電界効果型ＭＯＳトランジスタの一例を示した概略図である。It is the schematic which showed an example of the p-type field effect type MOS transistor for logics in this invention. 成膜温度に対するシリコン窒化膜の含有圧縮型歪み応力の依存性を測定した結果を示すグラフである。It is a graph which shows the result of having measured the dependence of the compression-type distortion stress of the silicon nitride film with respect to film-forming temperature.

符号の説明Explanation of symbols

１ 真空容器
２ プラズマ発生源
３ ガス供給口
４ 原料ガス供給口
５ 半導体基板
６ ステージ
１６ シリコン窒化膜
１７ シリコン・ウエハ DESCRIPTION OF SYMBOLS 1 Vacuum container 2 Plasma generation source 3 Gas supply port 4 Raw material gas supply port 5 Semiconductor substrate 6 Stage 16 Silicon nitride film 17 Silicon wafer

Claims (9)

容器内に高密度プラズマを発生させ、１００ｍＴｏｒｒ以下の真空度の雰囲気中にシリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物を供給し、成膜温度が２００℃〜７００℃、膜厚が２０ｎｍ〜３００ｎｍの範囲で膜の合有する圧縮型歪み応力が１ＧＰａ以上であること特徴とするシリコン窒化膜の製造方法。   A high-density plasma is generated in the container, an organic compound containing silicon (Si) and nitrogen (N) is supplied in an atmosphere of a vacuum degree of 100 mTorr or less, a film formation temperature is 200 ° C. to 700 ° C., and a film thickness is A method for producing a silicon nitride film, wherein the compressive strain stress of the film in the range of 20 nm to 300 nm is 1 GPa or more. 請求項１において、シリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物は、トリメチル・シラン〔（ＣＨ３）３ＳｉＨ〕などの３ＭＳ系有機化合物であるシリコン窒化膜の製造方法。 2. The method for producing a silicon nitride film according to claim 1, wherein the organic compound containing silicon (Si) and nitrogen (N) is a 3MS organic compound such as trimethylsilane [(CH 3 ) 3 SiH]. 請求項１において、シリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物は、テトラメチル・シラン〔（ＣＨ３）４Ｓｉ〕などの４ＭＳ系有機化合物であるシリコン窒化膜の製造方法。 2. The method for producing a silicon nitride film according to claim 1, wherein the organic compound containing silicon (Si) and nitrogen (N) is a 4MS organic compound such as tetramethylsilane [(CH 3 ) 4 Si]. 請求項１において、シリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物は、トリデイメチル・アミノシラン〔ＨＳｉ〔Ｎ（ＣＨ３）２〕３〕などのＴＤＭＡＳ系有機化合物であるシリコン窒化膜の製造方法。 2. The method for producing a silicon nitride film according to claim 1, wherein the organic compound containing silicon (Si) and nitrogen (N) is a TDMS organic compound such as tridaymethylaminosilane [HSi [N (CH 3 ) 2 ] 3 ]. . 前記シリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物は、前記３ＭＳ系有機化合物、前記４ＭＳ有機化合物、前記ＴＤＭＡＳ系有機化合物の何れか２種類又は３種類の混合物である請求項１乃至４の何れか１項に記載のシリコン窒化膜の製造方法。   5. The organic compound containing silicon (Si) and nitrogen (N) is any one of the 3MS organic compound, the 4MS organic compound, and the TDMAS organic compound, or a mixture of the three. The method for producing a silicon nitride film according to any one of the above. 容器内に発生させる高密度プラズマ発生源と、１０ｍＴｏｒｒ以下の真空度の雰囲気中にシリコン（Ｓｉ）及び窒素（Ｎ）を合有する有機化合物を供給する供給手段とから成り、成膜温度が２００℃〜７００℃、膜厚が２０ｎｍ〜３００ｎｍの範囲で膜の合有する圧縮型歪み応力が１ＧＰａ以上であること特徴とする超圧縮型歪み応力を合有するシリコン窒化膜の製造装置。   A high-density plasma generation source generated in the container and a supply means for supplying an organic compound containing silicon (Si) and nitrogen (N) in an atmosphere of a vacuum degree of 10 mTorr or less and a film forming temperature of 200 ° C. An apparatus for producing a silicon nitride film having a super compressive strain stress, wherein the compressive strain stress of the film is 1 GPa or more in a range of ˜700 ° C. and a film thickness of 20 nm to 300 nm. 請求項６において、超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）の製造される際の基板が、元素周期律表の第４族系半導体電子素子であるシリコン窒化膜の製造装置。   7. The apparatus for manufacturing a silicon nitride film according to claim 6, wherein the substrate when the silicon nitride film (SiN) having super compressive strain stress is manufactured is a group 4 semiconductor electronic element of the periodic table. 請求項６において、超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）の製造される際の基板が、元素周期律表の第III-V族系化合物半導体電子素子であるシリコン窒化膜の製造装置。   8. The manufacture of a silicon nitride film according to claim 6, wherein the substrate when the silicon nitride film (SiN) having super compressive strain stress is manufactured is a group III-V compound semiconductor electronic device of the periodic table of elements. apparatus. 請求項６において、超圧縮型歪み応力を合有するシリコン窒化膜（ＳｉＮ）の製造される際の基板が、元素周期律表の第II-VI族系化合物半導体電子素子であるシリコン窒化膜の製造装置。   7. The manufacture of a silicon nitride film according to claim 6, wherein the substrate when the silicon nitride film (SiN) having super compressive strain stress is manufactured is a group II-VI group compound semiconductor electronic device of the periodic table of elements. apparatus.
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JP2006165369A (en) * 2004-12-09 2006-06-22 Fujitsu Ltd Method of manufacturing stress accumulation insulating film, and semiconductor device
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