JP2006106145A - Display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a device and a method for display that can reduce disorder of display nearby spacers. <P>SOLUTION: Pixels at the positions closest to the spacers decrease in luminance, so the voltage of a scanning line signal is set higher than a standard voltage correspondingly to the decrease, but pixels at positions adjacent to the positions closest to the spacers increase in luminance to the contrary, so the voltage of the scanning line signal is set lower than the standard voltage correspondingly to the increase. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a display device in which spacers and pixels are arranged between substrates such as a field emission display.

  Development of a field emission display in which an electron-emitting device and a phosphor are arranged between two substrates and display is performed by causing the phosphor to emit light by electrons emitted from the electron-emitting device (Patent Document 1). reference).

In order to operate the field emission display, it is necessary to reduce the pressure between the substrates. For this reason, spacers are arranged between the substrates to counter atmospheric pressure, and the distance between the substrates is maintained.
JP 2000-311607 A

  However, the display may be disturbed in the vicinity of the spacer due to charging of the spacer or the like.

  In view of the above, an object of the present invention is to provide a display device that can reduce display disturbance in the vicinity of a spacer.

  In order to achieve the above object, a display device according to the present invention includes a plurality of first and second substrates arranged to face each other, and a plurality of substrates arranged to cross each other between the first and second substrates. And a plurality of scanning lines, a plurality of pixels provided corresponding to intersections of the signal lines and the scanning lines, and a plurality of spacers arranged along the scanning lines; And scanning line signal applying means for applying a scanning line signal of a level selected corresponding to the arrangement of the spacers on the display unit to a plurality of scanning lines.

  In the present invention, the level of the scanning line signal of the scanning line arranged at the position corresponding to the spacer is set higher than the level of the reference scanning line signal. Further, the scanning line signal level of the scanning line adjacent to the scanning line arranged at the position corresponding to the spacer is set lower than the reference scanning line signal level.

  ADVANTAGE OF THE INVENTION According to this invention, the display apparatus which can reduce the disorder of the display in the spacer vicinity can be provided.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a diagram illustrating a display device D according to an embodiment of the present invention.

  The display device D according to the present invention includes a display panel 10, a signal line driver 20, a scanning line driver 30, a video signal processing circuit 40, and a timing generation circuit 60.

  The input circuit 50 receives the video signal and the synchronization signal, separates the video signal to the video signal processing circuit 40, and outputs the synchronization signal to the timing generation circuit 60. The video signal processing circuit 40 converts the video signal input from the input circuit 50 into the voltage pulse system of the signal line drive signal and outputs it to the signal line driver 20. The timing generation circuit 60 outputs the operation timing based on the synchronization signal input from the input circuit 50 to the scanning line driver 30, the video signal processing circuit 40, and the signal line driver 20, respectively.

  The signal line driver 20 converts the video signal input from the video signal processing circuit 40 into a drive signal and outputs it to the display panel 10. The scanning line driver 30 converts the operation timing input from the timing generation circuit 60 into a scanning line signal and outputs it to the display panel 10. The display panel 10 displays an image based on the drive signal and the scan line signal input from the signal line driver 20 and the scan line driver 30.

  FIG. 2 is a top view schematically showing a state in which the display panel 10 is viewed from above. FIG. 3 is a side view illustrating a state in which the display panel 10 is viewed from the lateral direction.

  The display panel 10 includes a face plate FP, a rear plate RP, side walls W, spacers SP, scanning lines Y, signal lines X, and display pixels Px. 2 and 3, the scanning lines Y and the signal lines X are not shown in consideration of easy understanding of the arrangement relationship between the display pixels Px and the spacers SP.

  The face plate FP and the rear plate RP function as first and second substrates, respectively, and form a vacuum container together with the side wall W. That is, the space (inside the vacuum vessel) formed by the face plate FP, the rear plate RP, and the side wall W is reduced in pressure for the operation of the display panel 10 and is in a high vacuum state.

  The spacer SP is used to keep the space between the face plate FP and the rear plate RP. Since the pressure between the face plate FP and the rear plate RP is reduced, a force due to atmospheric pressure is applied, and there is a possibility that the distance between these centers is smaller than the vicinity of the side wall W. Here, the spacer SP has a columnar shape having a substantially rectangular bottom surface elongated in the horizontal direction, and is arranged in the vertical direction, that is, along the scanning line Y at a predetermined interval.

  Scan lines Y and signal lines X are arranged on the rear plate RP. m (= 720) scanning lines Y (Y1 to Ym) extend in the horizontal (horizontal) direction. n (= 1280 × 3) signal lines X (X1 to Xn) extend in the vertical (vertical) direction across the scanning lines Y1 to Ym. m × n (= about 2.76 million) display pixels Px are arranged in the vicinity of the intersection of the scanning lines Y1 to Ym and the signal lines X1 to Xn.

  The display pixel Px includes an electron-emitting device 11 and a phosphor 12. The electron-emitting device 11 is disposed on the rear plate RP and is driven by the corresponding scanning line Y and signal line X to emit electrons. The phosphor 12 is disposed on the face plate FP and emits light by an electron beam emitted from the electron emitter 11. The phosphor 2 emits light in one of red (R), green (G), and blue (B) display colors. That is, the display pixel Px corresponds to one of the display colors of red (R), green (G), and blue (B).

  The red (R), green (G), and blue (B) display pixels Px are each arranged in the vertical direction. Here, the red (R), green (G), and blue (B) three display pixels Px arranged adjacent to each other in the horizontal direction can be collectively considered as one color pixel. By controlling these red (R), green (G), and blue (B) display pixels Px, full color display is possible.

  The display pixels Px are arranged between the spacers SP as shown in FIG. In FIG. 2, for the sake of clarity, five display pixels Px are arranged between the spacers SP arranged in the vertical direction, but this is not absolute. A larger number of display pixels Px may be arranged between the spacers SP. Further, the number of display pixels Px arranged between the spacers SP may not be constant.

  Here, the display on the display panel 10 is disturbed in the vicinity of the spacer SP. FIG. 4 is a graph showing the relationship of the relative luminance between the position of the scanning line Y and the display pixel Px. The horizontal axis is the scanning line number Yi, and the vertical axis is the relative luminance RL. The relative luminance RL is obtained by standardizing the luminance L of each display pixel Px with the reference luminance CL, and the relative luminance RL = luminance L / reference luminance CL.

  As can be seen from this graph, the display pixel Px closest to the spacer SP (reproximity display pixel) Px, in FIG. 2, the display pixel Px corresponding to the scanning lines Y48, Y49, etc. tends to be darker than the original luminance. Further, the display pixels (proximity display pixels) Px farther from the spacer SP than the near-neighbor display pixels Px, and the display pixels Px corresponding to the scanning lines Y47 and Y50 in FIG. 2 tend to be brighter than the original luminance. The display pixel Px further away from the spacer SP emits light with the original luminance.

  That is, when the region on the display panel 10 is divided into the closest region, the adjacent region, and the normal region according to the distance from the spacer SP, the luminance becomes low luminance, high luminance, and normal luminance, and bright and dark stripes are formed in the vicinity of the spacer SP. Will be formed. Such stripes are not preferable because the display on the display panel 10 is disturbed.

  The occurrence of light and dark in the vicinity of the spacer SP can be explained by the charging of the spacer SP.

  When a part of the electrons emitted from the electron-emitting device 11 in the vicinity of the spacer SP collides with the spacer SP, or when ions such as gas ionized by the action of the emitted electrons adhere to the spacer SP, the spacer SP May be charged. Furthermore, there is a possibility that the electrons that have reached the face plate FP are partially reflected and scattered, and a part of the electrons collides with the spacer SP, thereby charging the spacer SP.

  When the spacer SP is charged, the trajectory of electrons traveling from the electron emitting element 11 to the phosphor 12 is affected. For example, when the spacer SP is negatively charged, electrons flying near the spacer SP are separated from the spacer. As a result, the number of electrons reaching the phosphor 12 nearest to the spacer SP decreases, and the number of electrons reaching the phosphor 12 farther from the spacer SP than the nearest phosphor 12 increases. As a result, the display pixel Px in the nearest region has a low luminance and the display pixel Px in the vicinity region has a high luminance with respect to the spacer SP.

  In order to suppress the charging of the spacer SP, it is conceivable to impart conductivity to the surface of the spacer SP and remove the charged charge. However, it is difficult to completely eliminate the luminance disturbance in the vicinity of the spacer SP, and it is preferable to correct the luminance by some means.

  Next, a display driving operation including luminance correction in the display device D of this embodiment will be described.

(Driving operation of signal line X)
In the video signal processing circuit 40, the AD conversion circuit 41 converts the analog RGB video signal supplied from the input circuit 50 into a digital format in synchronization with the horizontal synchronization signal and supplies it to the conversion unit 45. The conversion unit 45 refers to the conversion table 46 to convert the video signal supplied from the AD conversion circuit 41 into a value suitable for the voltage pulse system of the signal line drive signal.

  The conversion table 46 is a table storing 1024 11-bit conversion data assigned to all the gradation values of the video signal (gradation data) given from the AD conversion circuit 41. Specifically, gradations 0-256 are 0-256, gradations 257-512 are 512-769, gradations 513-768 are 1024-1280, gradations 769-1024 are 1536-1792, respectively. Convert. In the converted gradation data, the upper 2 bits and the lower 9 bits correspond to the pulse amplitude (element voltages V1 to V4) and pulse width (time length of 0 to 256) of the signal line drive signal, respectively.

  The signal line driver 20 includes line memories 21, 22 and a drive signal generator 23. The line memory 21 samples the video signal for one horizontal line in synchronization with the clock CK1 supplied from the timing generation circuit 60 in each horizontal scanning period, and these video signals, that is, n pieces of gradation data are parallelly sampled. Output.

  The line memory 22 latches the gradation data in response to the latch pulse DL supplied from the timing generation circuit 60 in a state where all the gradation data is output from the line memory 21, and the line memory 21 performs the sampling operation again. The gradation data is held in the subsequent one horizontal scanning period.

  The drive signal generator 23 generates n voltage pulses having pulse amplitudes and pulse widths respectively corresponding to the gradation data output in parallel from the line memory 22 as signal line drive signals to generate signal lines X1 to Xn. To supply. The drive signal generation unit 23 includes a counter 24, n pulse width modulation circuits 25, and n output buffers 26.

  The counter 24 has a 10-bit configuration, and is initialized in response to a reset signal RST supplied from the timing generation circuit 60 with the start of each horizontal scanning period. The counter 24 is counted up by the clock CK2 supplied from the timing generation circuit 60 following the reset signal RST. Thereafter, the counter 24 outputs 10-bit count data representing the effective video period in each horizontal scanning period by a time length of 1024 stages.

  Each pulse width modulation circuit 25 is composed of, for example, a comparator, and compares the corresponding gradation data supplied from the line memory 22 with the count data supplied from the counter 24 until the count data reaches the gradation data. A voltage pulse having a pulse width equal to the period is output.

  Each output buffer 26 selects and outputs positive element voltages V1, V2, V3, and V4 supplied from the outside based on the upper 2 bits of the gradation data supplied to the corresponding pulse width modulation circuit 25. . Therefore, the voltage pulse from the pulse width modulation circuit 25 is amplified to a pulse amplitude equal to any one of these element voltages V1, V2, V3, and V4. At this time, the selection element voltage is output from the output buffer 26 for a period equal to the pulse width of the pulse voltage from the pulse width modulation circuit 25. That is, the output buffer 26 outputs a signal line drive signal having a pulse amplitude and a pulse width depending on the gradation value of the gradation data.

  FIG. 5 is a graph showing an example of a signal waveform of the signal line drive signal.

  The signal line drive signal is divided into four areas (A) to (D) according to the magnitude of the video signal, and has different amplitude values V1 to V4 for each area. These areas (A) to (D) are respectively gradation values 0 to 256, 257 to 512, 513 to 768, 769 to 1024 before being converted by the conversion unit 45 and gradation data after being converted by the conversion unit 45. Correspond to the upper 2 bits “00”, “01”, “10”, and “11”.

  The amplitude values V1 to V4 of the drive signal are increased step by step in each region, and the pulse width is varied in each region in accordance with the value of the video signal, thereby enabling fine gradation expression. Yes.

  As shown in FIG. 5A, when the gradation value is 0 to 256, the signal line driving signal is a pulse having a pulse length of the element voltage V1 and a pulse width of 0 to 256. As shown in FIG. 5B, when the gradation value is 257 to 512, the signal line drive signal has a pulse amplitude of the element voltage V2 and a pulse length of 0 to 256, and a pulse amplitude of 0 to 256. This is a combination with a pulse having the remaining time length (˜256) at the element voltage V1. As shown in FIG. 5C, when the gradation value is 513 to 768, the signal line drive signal includes a pulse having a pulse length of the element voltage V3 and a pulse length of 0 to 256, and a pulse amplitude of The pulse width is a combination with the remaining time length (˜256) at the element voltage V2. As shown in FIG. 5D, when the gradation value is 769 to 1024, the signal line drive signal includes a pulse having a pulse amplitude of the element voltage V4 and a pulse length of 0 to 256, and a pulse amplitude of The pulse width is a combination with the remaining time length (˜256) at the element voltage V3.

  The above is the driving operation of the signal line X. Next, the driving operation of the scanning line Y will be described. In the display device D of this embodiment, luminance correction corresponding to the position of the spacer SP is employed in driving the scanning line Y.

(Driving operation of scanning line Y)
The scanning line driver 30 includes a shift register 31 and an output buffer 32. The shift register 31 shifts the vertical synchronization signal every one horizontal scanning period and outputs it from one of the m output terminals. The output buffer 32 outputs scanning line signals to the scanning lines Y1 to Ym in response to pulses from the m output terminals of the shift register 31, respectively. The scanning line signal output from the output buffer 32 is a negative voltage supplied from the scanning voltage terminal, and is output only for one horizontal scanning period.

  Here, three or more values Vc1, Vc2, Vc3 are prepared for the voltage of the scanning line signal output from the output buffer 32, and among the three voltages Vc1, Vc2, Vc3 for each scanning line signal. One of these is pre-selected. For example, as shown in FIG. 6, the relationship between these voltages Vc1, Vc2, and Vc3 is corrected with respect to the standard, with the absolute value of the voltage of Vc2 being the standard R so far, Vc1 being R-n and Vc3 being R + m. The value is added. However, m and n may be equal values.

  FIG. 7 is a diagram showing the voltage of the scanning line signal of each scanning line Y (Y44-Y53) in relation to the position of the spacer SP. As described above, the scanning line signal voltage of the scanning lines Y48 and Y49 corresponding to the nearest position of the spacer SP is set to the highest Vc3, and the scanning line signals of the scanning lines Y47 and Y50 adjacent to both sides of the scanning lines Y48 and Y49. Is set to the lowest Vc1, and the voltage of the scanning line signals such as the scanning lines Y44, Y45, Y46, Y51, Y52, Y53 disposed therebetween is set to the intermediate (standard) Vc2. That is, since the brightness decreases at the nearest position of the spacer SP, the voltage of the scanning line signal is increased in anticipation of the reduction, and conversely, the brightness increases at a position adjacent to the nearest position of the spacer SP. In anticipation of the increase, the voltage of the scanning line signal is lowered.

  However, this is only an example, and the voltages of the scanning line signals of the scanning lines Y47 and Y50 adjacent to both sides of the nearest position of the spacer SP need not necessarily be lower than the standard. Further, the number of scanning lines for setting the voltage of Vc3 and the number of scanning lines for setting the voltage of Vc1 are also matters to be appropriately selected for each spacer portion.

  In each electron-emitting device 11, the luminance of the display pixel Px varies depending on the pulse width and pulse voltage of the signal line drive signal and the drive current Ie flowing through the electron-emitting device 11 depending on the pulse voltage of the scanning line signal. As described above, by appropriately selecting the voltage of the scanning line signal of each scanning line corresponding to the position of the spacer SP, the uneven luminance in the vicinity of the spacer SP is corrected and displayed on the display panel 10. The image becomes clearer.

  Embodiments of the present invention are not limited to the above-described embodiments, and can be expanded and modified. The expanded and modified embodiments are also included in the technical scope of the present invention.

  In the above-described embodiment, the voltage of the scanning line signal for each scanning line Y is optimally selected according to the position of the spacer SP, but each voltage Vc1, used as the voltage of the scanning line signal is selected. It is desirable that Vc2 and Vc3 can be finely adjusted individually by a manual or the like. In the above-described embodiment, the voltage of each scanning line signal is selected from the three voltages Vc1, Vc2, and Vc3. Needless to say, it may be selected from.

  Further, the voltage of the scanning line signal for each scanning line Y may be variably set by a microcomputer or the like.

It is a figure showing the display device concerning one embodiment of the present invention. FIG. 2 is a top view schematically illustrating a state in which the display panel of FIG. 1 is viewed from above. It is a side view showing the state which looked at the display panel of FIG. 1 from the horizontal direction. It is a graph showing the correspondence between the position of a scanning line and the relative luminance of display pixels. It is a graph showing an example of the signal waveform of a signal line drive signal. It is a figure which shows the voltage waveform of a scanning line signal. It is the figure which showed the voltage of the scanning line signal by the relationship with a spacer position.

Explanation of symbols

  D ... Display device, 10 ... Display panel, FP ... Face plate, RP ... Rear plate, W ... Side wall, SP ... Spacer, Px ... Display pixel, X (X1-Xn) ... Signal line, Y (Y1-Ym) ... Scanning line, 11... Electron emitting element, 12... Phosphor, 20... Signal line driver, 21, 22... Line memory, 23. 30... Scanning line driver, 31... Shift register, 32.

Claims (5)

First and second substrates arranged opposite to each other, a plurality of signal lines and a plurality of scanning lines arranged to cross each other between the first and second substrates, the signal lines and the A display unit having a plurality of pixels provided corresponding to intersections with the scanning line, and a plurality of spacers arranged along the scanning line;
And a scanning line signal applying means for applying a scanning line signal of a level selected corresponding to the arrangement of the spacers on the display section to the plurality of scanning lines.   The display device according to claim 1, wherein the pixel includes an electron-emitting device and a phosphor that emits light by electrons emitted from the electron-emitting device.   2. The display device according to claim 1, wherein a level of a scanning line signal of the scanning line arranged at a position corresponding to the spacer is set higher than a level of a reference scanning line signal.   2. The display according to claim 1, wherein a level of a scanning line signal of a scanning line adjacent to the scanning line arranged at a position corresponding to the spacer is set lower than a level of a reference scanning line signal. apparatus.   The level of the scanning line signal of the scanning line arranged at the position corresponding to the spacer is higher than the level of the reference scanning line signal, and the scanning line adjacent to the scanning line arranged at the position corresponding to the spacer 2. The display device according to claim 1, wherein the level of the scanning line signal is set lower than the level of the reference scanning line signal.

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