JP2006067568A - Data processor, program, and recording medium - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a data processor where a time stamp synchronized with the clock of an encoder can be added to a TS (Transport Stream)packet at low costs, and to provide a program and a recording medium. <P>SOLUTION: A PCR extraction means 34 extracts a PCR (Program Clock Reference) from the TS packet containing the PCR. A time stamp shaping means 38 shapes the PCR into a prescribed shape and loads the PCR to a counter 16 to correct a counted value, and sends the PCR to a time stamp adding means 40. The time stamp adding means 40 adds the PCR to the TS packet containing the PCR as a time stamp, and adds the counted value of the counter 16 to the TS packet which does not contain the PCR as the time stamp. By correcting the counted value of the counter 16 by the PCR, the time stamp synchronized with the clock of an encoder can be added to the TS packet. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a data processing apparatus, a program, and a recording medium, and more particularly to an encoding apparatus and a decoding apparatus that reduce jitter in a system that transmits data according to MPEG (Moving Picture Experts Group) 2-TS (Transport Stream) format. The present invention relates to a data processing device, a program, and a recording medium for synchronizing the clock with

  In home networks, a technique for transmitting data such as video and audio encoded according to MPEG (Moving Picture Experts Group) 2-TS (Transport Stream) format according to IP (Internet Protocol) is spreading.

  In an MPEG2 system for generating a stream in accordance with the MPEG2 standard, which is an international standard for image compression coding, MPEG2-, which constitutes one program with one stream, is assumed to be transmitted from a storage medium with few transmission bit errors. PS (Program Stream) format and two formats of MPEG2-TS format that can configure a plurality of programs with one stream assuming transmission using a communication line in which transmission bit errors are expected to occur. It prescribes.

  In the MPEG2-TS transmission system, when the clock in the encoder (encoding device) and the clock in the decoder (decoding device) are not synchronized, there is a difference between the amount of data transmitted per unit time and the amount of data reproduced. Therefore, there arises a problem that the video and audio are disturbed. In order to synchronize the clock between the encoder and the decoder, reference clock information called PCR (Program Clock Reference) is transmitted from the encoder. According to the MPEG2 system standard, at least one PCR is sent within 100 milliseconds.

  The PCR is inserted into a packet encoded in accordance with the MPEG2-TS format (hereinafter referred to as a TS packet) and transmitted. PCR is a value obtained by counting the clock of the encoder with a counter. In the MPEG2 system, the clock frequency is defined as 27 MHz ± 810 Hz.

  The decoder has a PLL (Phase Locked Loop) circuit to synchronize the clock with the encoder. The PLL circuit refers to the PCR value and the time interval at which the TS packet including the PCR arrives, and changes the clock frequency so that the decoder clock frequency matches the encoder clock frequency.

  In order to stabilize the operation of the PLL circuit, each TS packet needs to be transmitted to the decoder so that transmission fluctuation (jitter) does not occur as much as possible, that is, while maintaining the time interval output from the encoder. When jitter occurs, for example, when a high network load occurs temporarily and data transmission is delayed, or when a packet is lost on the network, the receiving device retransmits the packet to the transmitting device. May be required.

  An IP network basically has no function for correcting jitter. Therefore, when a TS packet is encapsulated in an IP packet and transmitted to a decoder in the home network, an error in the PCR arrival interval with respect to the PCR value in the decoder may increase due to jitter generated on the IP network. Encapsulation means that data belonging to an upper layer in a network protocol is processed by lower layer information.

  In this case, since the operation of the PLL circuit does not converge, the clock is not synchronized between the encoder and the decoder. As a result, the reproduced video and audio are disturbed.

FIG. 20 is a diagram illustrating a configuration example of a conventional transmission system.
Referring to FIG. 20, a TS packet is generated by encoding means 101A in content creator 101. The TS packet is sent from the encoding means 101A to the home system 102.

  The home system 102 includes a tuner 103, a transmission controller 104, a network 105, a reception controller 106, and a playback device 107. Hereinafter, an outline of operations of the transmission controller 104 and the reception controller 106 will be described.

  Before the transmission controller 104 encapsulates the TS packet into the IP packet, every time the TS packet is received by the fixed clock 111 having the same frequency (27 MHz) as the clock of the encoding unit 101A and the counter 116, the count value of the counter 116 is changed to the TS packet. Append to This count value is information for correcting jitter and is called a time stamp. Since the time stamp is added as header information of the TS packet, hereinafter, this header will be referred to as a time stamp header.

  The TS packet to which the time stamp header is added is encapsulated in the communication packet forming means 112 by adding a header according to each protocol such as HTTP (HyperText Transfer Protocol), TCP (Transmission Control Protocol), or IP. . The encapsulated packet (IP packet) is sent to the reception controller 106 via the network 105.

  The reception controller 106 performs protocol processing of the received IP packet by the communication controller 120 and the communication packet separation unit 121, and extracts the TS packet. The TS packet to which the time stamp header is added is sent to the jitter correction unit 122. The jitter correction unit 122 includes a buffer (not shown). The jitter correction unit 122 outputs the TS packet from the buffer to the decoding unit 125 in synchronization with the transmission timing of the TS packet. That is, the jitter correction unit 122 outputs a TS packet whose time stamp value matches the count value of the counter 124.

  Therefore, the jitter correction unit 122 can transmit the TS packet to the decoding unit 125 in synchronization with the timing at which the transmission controller 104 receives the TS packet. The time stamp header is removed by the jitter correcting unit 122 before the TS packet is output to the decoding unit 125.

As an example of a method for correcting jitter, for example, Japanese Patent Laid-Open No. 2000-156838 (Patent Document 1) uses a PLL circuit to generate a reference clock from time information recorded in advance in an AV bit stream, and An example of a time stamp assigning system that assigns a time stamp conforming to each TS packet is disclosed.
JP 2000-156838 A

  As shown in FIG. 20, the clock frequency (the frequency of the fixed clock 111 and the frequency of the clock 123) in the home system 102 is set to 27 MHz defined in the MPEG2 standard in order to correct jitter. However, since the clock of the encoding unit 101A and the clock of the home system 102 are not synchronized, the frequency of each clock is strictly different. Therefore, as the TS packet is transmitted from the encoding unit 101A, the error in the time stamp value with respect to the transmission timing of the encoding unit 101A gradually increases, and finally the decoding unit 125 corrects the jitter. Cannot be produced and the video and audio are distorted.

  From the above, it is necessary that the time stamp value is synchronized with the TS packet transmission timing of the encoder. However, if the transmission controller is provided with a PLL circuit in order to synchronize the transmission timing of the TS packet by the encoder and the time stamp addition timing of the transmission controller, a cost increases because a VCO (voltage controlled oscillator), a low-pass filter, and the like are required.

  The present invention solves the above-described problems, and an object thereof is to provide a data processing device, a program, and a recording medium capable of adding a time stamp synchronized with an encoder clock at a low cost to a TS packet. Is.

  In summary, the present invention is a data processing device including data input means for inputting a packet in which encoded data is packetized, and transmission time information of the packets input to the data input means Extraction means for extracting and outputting the transmission time information from the first packet and outputting the first packet, and first generation for receiving the transmission time information and generating the first time information according to the transmission time information Means and a clock signal corresponding to the clock signal is corrected in accordance with the input of the first time information, and a second time indicating a reference time of the second packet that does not include the transmission time information is to be reproduced A second generating unit configured to generate time information; and an adding unit configured to add the first time information to the first packet and add the second time information to the second packet.

  Preferably, it is determined whether the packet input by the data input means is the first packet or the second packet, and the adding means adds either the first time information or the second time information to the packet. Packet analysis means for determining whether to do so is further provided.

  More preferably, the packet analysis means collates packet identification information indicating the attribute of the packet with a preset value, and determines whether the packet is the first packet or the second packet.

  More preferably, the packet analysis means collates packet identification information indicating a packet attribute with a preset value, and determines whether or not to discard an unnecessary packet.

  More preferably, any of the input packets includes packet configuration information in which an attribute of the packet identification information is described, and the packet analysis means analyzes the packet configuration information to identify the packet Set the information value.

  More preferably, any of the input packets includes packet configuration information in which an attribute of packet identification information is described, and the packet analysis means includes first time information. For comparison with packet identification information indicating this, an analysis result transferred from a device that analyzes packet configuration information is set as a preset value.

  More preferably, the packet identification information is PID (Packet Identifier), and the packet configuration information is PAT (Packet Association Table) and PMT (Packet Map Table).

  More preferably, the adding means adds the second time information to the packet when the packet analyzing means cannot determine which of the first time information and the second time information is added to the packet.

  More preferably, when the second packet is input subsequent to the first packet, the second generation means completes the input of the first time information, and further, the input time of the first packet and the first packet Second time information reflecting the time difference is output after a time difference corresponding to the difference between the input time of the second packet and the time elapsed.

  More preferably, the first generation means includes the elapsed time from the start of the input of the first packet until the correction of the clock information is completed, and the second time information from the start of the input of the second packet. The first time information is generated by adding a value corresponding to the difference from the elapsed time until the transmission to the transmission time information.

  Preferably, the adding means analyzes the packet after adding the second time information to the packet, and replaces the second time information with the first time information when the packet is the first packet.

  More preferably, a 1st production | generation means produces | generates the 1st time information which converted transmission time information so that it may become the same as the data format of clock information.

  According to another aspect of the present invention, there is provided a data processing device including data input means for inputting a packet in which encoded data is packetized, and transmission time information in the packet input to the data input means. Extraction means for extracting transmission time information from each of the first and second packets, and outputting the first and second packets. The extraction means calculates an error between the difference between the transmission time information extracted from the first and second packets and the difference between the clock information generated according to the input interval of the first and second packets. The data processing apparatus corrects the clock information according to the error, generates reproduction reference time information indicating a time that is a reference of the time at which the packet should be reproduced based on the corrected clock information, and reproduces the packet And an adding means for adding the reference time information.

  Preferably, the extraction unit determines whether or not the values of the transmission time information extracted from each of the first and second packets are continuous, and does not output an error if they are discontinuous.

  More preferably, the extraction unit determines that the value of the transmission time information is discontinuous when the second packet is not input for a certain period from the input of the first packet.

  More preferably, the extracting means includes a value indicating that the value of the transmission time information is discontinuous when at least one of the first and second packets includes information indicating that the value of the transmission time information is discontinuous. It is determined that

  More preferably, the encoded data is data according to the MPEG (Moving Picture Experts Group) 2-transport stream format, and the transmission time information is a program time reference reference value.

  More preferably, the encoded data is data according to MPEG (Moving Picture Experts Group) 2-program stream format, and the transmission time information is a system time reference reference value.

  According to still another aspect of the present invention, there is provided a first program including a step for inputting a packet in which encoded data is packetized, and transmission time information in the packet input to the data input means. Extracting and outputting the transmission time information from the packet and outputting the first packet; receiving the transmission time information; generating the first time information according to the transmission time information; and according to the clock signal Correcting the clock information according to the input of the first time information, and generating second time information indicating a time that is a reference of the time at which the second packet not including the transmission time information is to be reproduced; , Adding the first time information to the first packet and adding the second time information to the second packet.

  Preferably, it is determined whether the packet input in the step of inputting a packet is a first packet or a second packet, and in the adding step, the first time information and the second time information are added to the packet. Further causing the computer to execute a step of determining which to add.

  More preferably, the determining step compares packet identification information indicating a packet attribute with a preset value to determine whether the packet is a first packet or a second packet.

  More preferably, in the determining step, packet identification information indicating a packet attribute is compared with a preset value to determine whether or not to discard an unnecessary packet.

  More preferably, any of the input packets includes packet configuration information in which an attribute of the packet identification information is described, and the determining step analyzes the packet configuration information to identify the packet Set the information value.

  More preferably, any of the input packets includes packet configuration information in which attributes of packet identification information are described, and the determining step includes first time information. In order to collate with packet identification information indicating this, the analysis result of the packet configuration information obtained using a device that analyzes the packet configuration information is set as a preset value.

  More preferably, the packet identification information is PID (Packet Identifier), and the packet configuration information is PAT (Packet Association Table) and PMT (Packet Map Table).

  More preferably, the adding step adds the second time information to the packet when the determining step cannot determine which of the first time information and the second time information is added to the packet. .

  More preferably, in the step of generating the second time information, when the second packet is input subsequent to the first packet, the input of the first time information is completed. Second time information reflecting the time difference is output after a time difference corresponding to the difference between the input time and the input time of the second packet has elapsed.

  More preferably, the step of generating the first time information includes the elapsed time from the start of the input of the first packet until the correction of the clock information is completed and the input of the second packet from the start of the input of the second packet. The first time information is generated by adding a value corresponding to the difference from the elapsed time until the second time information is transmitted to the transmission time information.

  Preferably, the adding step analyzes the packet after adding the second time information to the packet, and replaces the second time information with the first time information when the packet is the first packet.

  More preferably, the step of generating the first time information generates the first time information obtained by converting the transmission time information so as to be the same as the data format of the clock information.

  According to still another aspect of the present invention, there is provided a program that includes a step for inputting a packet in which encoded data is packetized, and first and second steps including transmission time information in the input packet. The transmission time information is extracted from each of the packets, the first and second packets are output, the difference between the transmission time information extracted from the first and second packets, and the input interval of the first and second packets A step of calculating an error from a difference in clock information generated according to the time, and a reproduction that indicates a time that is a reference of a time at which a packet is to be reproduced based on the corrected clock information by correcting the clock information according to the error The computer is caused to execute a step of generating reference time information and a step of adding reproduction reference time information to the packet.

  Preferably, the step of calculating determines whether or not the value of the transmission time information extracted from each of the first and second packets is continuous, and if the value of the transmission time information is discontinuous, an error is calculated. 0.

  More preferably, the calculating step determines that the value of the transmission time information is discontinuous when the second packet is not input for a certain period from the input of the first packet.

  More preferably, in the calculating step, when information indicating that the value of the transmission time information is discontinuous is included in at least one of the first and second packets, the value of the transmission time information is Judged to be discontinuous.

  More preferably, the encoded data is data according to the MPEG (Moving Picture Experts Group) 2-transport stream format, and the transmission time information is a program time reference reference value.

  More preferably, the encoded data is data according to MPEG (Moving Picture Experts Group) 2-program stream format, and the transmission time information is a system time reference reference value.

  According to still another aspect of the present invention, a computer-readable recording medium recording the above program.

  According to the data processing device, program, and recording medium of the present invention, it is possible to add a time stamp synchronized with the time of the encoder to the TS packet at a low cost.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, the same code | symbol in a figure shows the same or an equivalent part.

[Embodiment 1]
FIG. 1 is a diagram showing a configuration example of a system including a data processing apparatus of the present invention.

  Referring to FIG. 1, content creator 1 is, for example, a broadcasting station for digital television broadcasting. The content creator 1 includes encoding means 1A. The encoding means 1A encodes information such as video and music according to an encoding rule defined in the MPEG2 standard, and outputs the encoded data as a TS packet. The encoding means 1A transmits at least one PCR within 100 milliseconds. As will be described later, the PCR is inserted into the TS packet.

  The home system 2 receives the TS packet from the encoding means 1A. The home system 2 includes a tuner 3, a transmission controller 4, a network 5, a reception controller 6, and a playback device 7.

  The tuner 3 receives TS packets at the same time interval as the transmission interval when the encoding means 1A transmits TS packets. The TS packet received by the tuner 3 is sent to the transmission controller 4.

  The transmission controller 4 selects a TS packet including program data reproduced by the reproduction device 7 from the received TS packets, encapsulates the TS packet into an IP packet, and transmits the packet to the network 5. The transmission controller 4 is included in a digital video recorder having a communication function, for example.

  The transmission controller 4 includes a data processing unit 10, a fixed clock 11, a communication packet forming unit 12, and a communication controller 13.

  The data processing means 10 adds a time stamp header to the TS packet. The data processing means 10 adds the PCR as a time stamp header to the TS packet including the PCR and corrects the time stamp value using the PCR value. The data processing means 10 adds the count value of the clock of the transmission controller 4 to the TS packet as a time stamp for the TS packet not including the PCR. The processing in the data processing means 10 will be described later.

  The data processing means 10 includes a separating means 14 for separating only necessary TS packets from TS packets received from the tuner 3, a header adding means 15 for adding a time stamp header, and a counter 16 for counting clocks. The clock count value is used as a time stamp as described later.

  The separation unit 14 analyzes the TS packet by a method described later, and extracts (reads) the PCR from the TS packet including the PCR. When the header adding means 15 receives the TS packet from the separating means 14, it sends a signal to the counter 16 to acquire the count value, and adds the acquired count value to the TS packet. The counter 16 is a 32-bit counter, for example.

  The fixed clock 11 is a crystal oscillator or an oscillator, for example, and does not have a function of changing the frequency depending on a voltage applied like a VCO. The frequency of the fixed clock 11 is 27 MHz defined by the MPEG2 standard.

  The communication packet forming unit 12 encapsulates the TS packet output from the data processing unit 10 to form an IP packet. The communication packet forming means 12 collects, for example, a plurality of TS packets and adds each header of an RTP header, a UDP (User Datagram Protocol) header, and an IP header.

  RTP is a protocol (communication protocol) for transmitting and receiving voice and moving images in real time in an IP network, and is used for correcting jitter in the network by correcting the order of packets on the data receiving side. UDP is a type of transport protocol and is used when moving images and audio are transmitted in real time. IP is used to define a method for assigning addresses (addressing) of devices participating in a network and selecting communication routes (routing) in a plurality of interconnected networks.

  Each protocol is a lower protocol in the order of RTP, UDP, and IP. In other words, the encapsulation means that a plurality of TS packets are collected, an RTP header is added first, a UDP header is added next, and an IP header is finally added. Hereinafter, the RTP header, UDP header, and IP header are collectively referred to as “TCP / IP header”. The above description is an example. For example, a plurality of TS packets may be encapsulated and transferred by HTTP, TCP, and IP protocols. In this case, each protocol is a lower protocol in the order of HTTP, TCP, and IP.

  The communication controller 13 outputs the IP packet generated by the communication packet forming unit 12 to the network 5. The communication controller 13 is, for example, an Ethernet (registered trademark) card. The network 5 is, for example, a wireless LAN (Local Area Network), but may be a wired LAN.

  The reception controller 6 receives an IP packet from the network 5. The reception controller 6 performs protocol processing and jitter correction processing on the received IP packet, and sends the TS packet to the playback device 7. The reception controller 6 is included in a television having a communication function, for example.

  The reception controller 6 includes a communication controller 20, a communication packet separation unit 21, a jitter correction unit 22, a clock 23, and a counter 24.

  The communication controller 20 receives an IP packet from the network 5. Similar to the communication controller 13, the communication controller 20 is, for example, an Ethernet (registered trademark) card.

  The communication packet separator 21 removes the TCP / IP header from the IP packet and takes out the TS packet. Further, the communication packet separation unit 21 reads a time stamp from the TS packet, and sends the TS packet and the time stamp to the jitter correction unit 22.

  The jitter correction unit 22 synchronizes the transmission timing of the TS packet with the clock 23 and outputs the TS packet to the decoding unit 25. That is, the jitter correction unit 22 outputs a TS packet whose time stamp value matches the count value of the counter 24.

  Therefore, the jitter correcting unit 22 can transmit the TS packet to the decoding unit 25 in synchronization with the timing at which the transmission controller 4 receives the TS packet. The time stamp header is removed by the jitter correcting unit 22 before the TS packet is output to the decoding unit 25.

  Further, it is desirable that the clock 23 is synchronized with the encoding means 1A. However, if any means for finally synchronizing the clock 26 of the reproducing apparatus 7 with the encoding means 1A exists in the jitter correction means 22, Similarly to the fixed clock 11, for example, a crystal resonator or an oscillator, and the clock frequency may be a fixed clock of 27 MHz.

  The playback device 7 is a television, for example. The playback device 7 includes a decoding unit 25 and a clock 26. The decoding unit 25 decodes the data output from the jitter correction unit 22. The clock 26 refers to the PCR and the input timing of the TS packet, generates a clock signal synchronized with the encoding means 1A, and sends the clock signal to the decoding means 25. The clock 26 is composed of a PLL circuit.

FIG. 2 is a diagram illustrating an example of a configuration of a packet including a PCR among TS packets.
Referring to FIG. 2, TS packet P0 is data of a fixed length (188 bytes). The TS packet P0 includes a fixed length (4 bytes) packet header, a variable length adaptation field, and a payload.

  The packet header includes a 13-bit PID (Packet Identification) indicating the individual stream attribute of the packet. The adaptation field is provided with a 6-byte area for storing the PCR. As will be described later, the PID is referred to in determining whether the TS packet includes the PCR. Note that the TS packet has a different configuration depending on whether the PCR is included or not. In addition, there is a case where only a part other than the packet header of the TS packet is either an adaptation field or a payload.

FIG. 3 is a schematic diagram showing an outline of processing performed by the transmission controller 4 of FIG.
Referring to FIG. 3, in order from the top of the figure, the TS packet output from encoding means 1A, the data area in which the count value (time stamp) of counter 16 is stored, and the TS packet output from header addition means 15 IP packets output from the communication packet forming means 12 are shown.

  The encoding means 1A sends out TS packets P1 to Pn. TS packets P2 and Pn include PCR. The region PCR1 is a region where the PCR is stored in the TS packet P2. Similarly, the region PCRn is a region where the PCR is stored in the TS packet Pn.

  The counter 16 counts the clock. The count value of the counter 16 when the TS packets P1 to Pn are input to the data processing means 10 is a time stamp. The count value is 32-bit (4 bytes) data.

  In FIG. 3, it is assumed that the count values corresponding to the TS packets P1 to Pn are stored in the areas CT1 to CTn in the header adding means 15 for temporarily storing the acquired count values. When the TS packet P2 is input to the data processing means 10, the counter 16 is loaded with the PCR value. That is, the count value stored in the area CT2 is replaced with the PCR value, and the counter 16 is reset. Similarly, when the TS packet Pn is input, the count value stored in the region CTn is replaced with the PCR value.

  The header adding means 15 adds a time stamp to the TS packet. For example, a count value when a signal is sent to the counter 16 is added as a time stamp to a TS packet that does not include PCR, such as the TS packet TP1. That is, the count value stored in the area CT1 is stored in the header HD1 by the header adding means 15. On the other hand, the PCR stored in the region PCR1 is stored in the header HD2 in the TS packet including the PCR like the TS packet TP2, for example.

  The communication packet forming means 12 combines the TS packets TP1 to TP4 and 0 to 1 or more TS packets, adds a TCP / IP header (RTP header, UDP header and IP header), and outputs an IP packet I0. .

FIG. 4 is a block diagram showing the configuration of the data processing means 10 of FIG.
Referring to FIG. 4, separation means 14 includes data input means 30, packet analysis means 32, and PCR extraction means 34.

  The data input means 30 transfers the TS packet received from the tuner 3 to the packet analysis means 32. The packet analysis unit 32 analyzes the input TS packet and determines whether or not the TS packet includes a PCR by a method described later. The packet analyzing unit 32 transfers the TS packet to the PCR extracting unit 34 when determining that the TS packet includes PCR, and when determining that the TS packet does not include PCR, the packet analyzing unit 32 transfers the TS packet. Transfer to the header adding means 15. That is, the packet analysis means 32 determines whether the time stamp added to the TS packet is a PCR or a count value of the counter 16.

  The PCR extracting means 34 receives the TS packet including the PCR, and extracts the data described in the defined area of the TS packet shown in FIG. 2 as the PCR. The PCR extracting unit 34 transfers the extracted PCR and TS packets to the header adding unit 15.

  The header adding unit 15 includes a buffer 36, a time stamp shaping unit 38, a time stamp adding unit 40, and a data output unit 42.

  The buffer 36 temporarily stores TS packets that do not include PCR. Each time a TS packet is stored, the buffer 36 outputs a latch signal to the counter 16. Further, the buffer 36 sequentially transfers the TS packets to the time stamp adding means 40.

  The time stamp shaping means 38 shapes the PCR received from the PCR extracting means 34 into a time stamp format, and transfers the shaped PCR (time stamp) to the time stamp adding means 40 and also to the counter 16. When the counter 16 detects the latch signal sent from the buffer, it transfers the count value at that time to the time stamp adding means 40 as a time stamp. The counter 16 loads the time stamp value received from the time stamp shaping means 38 and updates the count value to the time stamp value.

  The time stamp adding means 40 sequentially adds time stamps to be added to the TS packet, and transfers the TS packet to the data output means 42. The data output means 42 sequentially outputs the TS packets to which the time stamp is added, input from the time stamp adding means 40. The output destination of the TS packet is the communication packet forming means 12 in FIG.

  The processing in the data processing means 10 in FIG. 4 is summarized as follows. The PCR extracting unit 34 extracts the PCR from the TS packet including the PCR. The time stamp shaping means 38 shapes the PCR into a predetermined format, loads the PCR into the counter 16 to correct the count value, and sends the PCR to the time stamp adding means 40. The time stamp adding means 40 adds the PCR as a time stamp to a TS packet including PCR, and adds the count value of the counter 16 as a time stamp to a TS packet not including PCR. When the count value of the counter 16 is corrected by PCR, a time stamp synchronized with the encoder clock can be added to the TS packet.

  Next, the operations of the packet analysis unit 32 and the time stamp shaping unit 38 in FIG. 4 will be described more specifically.

  The packet analysis means 32 determines whether PCR is included in the TS by a predetermined method. Here, the “predetermined method” is, for example, a preset value indicating that the PID described in the header portion of the TS packet (packet header in FIG. 2) includes PCR in the TS packet. In this method, it is determined whether or not they match, and if they match, it is determined that PCR is included in the corresponding TS packet.

  The PID value indicating that the PCR is included is analyzed by the packet analysis means 32 using a PAT (Program Association Table) and a PMT (Program Map Table), which are packet configuration information included in any TS packet. Can be obtained. Here, the PID corresponds to packet identification information indicating a packet attribute. The packet configuration information describes the attributes of packet identification information.

  When a plurality of programs are transferred by TS packets, it is unknown on the transmission side which program the viewer has selected on the reception side. Therefore, the transmitting side cannot determine which PID indicates that it includes the PCR of the selected program. However, the packet analysis unit 32 extracts the PID value including the PCR of the selected program by transferring the data from the data receiving device (for example, the reception controller 6) and setting the value in the packet analysis unit 32 in advance. Power PCR can be obtained. In this case, the device that receives the data analyzes the packet configuration information, and transmits the analysis result (PID value) to the packet analysis means 32.

  Furthermore, by transferring the PID of an unnecessary program from the receiving side and setting the value of the PID in the packet analysis unit 32, a time stamp is not added to a packet that the packet analysis unit 32 determines to be unnecessary. It may be discarded.

  If the PID value indicating that the PCR is included is not set, the packet analysis unit 32 cannot determine which of the PCR and the count value is added to the TS packet as a time stamp. In this case, the time stamp adding means 40 may perform processing so that the count value of the counter 16 is provisionally added to the TS packet as a time stamp.

  The time stamp shaping means 38 shapes the extracted PCR into a time stamp format to be added to the TS packet.

  The PCR area provided in the TS packet is 6 bytes (48 bits), but the actual data is a total of 42 bits including the upper 33 bits and the lower 9 bits. Further, of the 42 bits, the lower 9 bits are a time stamp that counts up at a frequency of 27 MHz, and the upper 33 bits are a time stamp that counts up at a frequency of 90 kHz. When the counter 16 is a 32-bit counter, the time stamp shaping means 38 shapes the PCR value according to the following calculation formula (1).

Time stamp = ((upper 33 bits) × 300 + (lower 9 bits)) MOD 2 ³² (1)
Here, MOD is a function for calculating the remainder of division.

Hereinafter, effects obtained by the first embodiment will be described.
FIG. 5 is a diagram for explaining an error between the PCR and the time stamp when the counter 16 of FIG. 1 is not corrected.

  Referring to FIG. 5, in order from the top of the figure, TS packet output from encoding means 1A, TS packet output from header addition means 15, TS packet output from communication packet separation means 21, and jitter correction A TS packet output from the means 22 is shown. Each TS packet is output at a time interval corresponding to the clock count value.

  The number of TS packets and the clock count value shown in FIG. 5 are examples for explaining the present invention.

  Each of the TS packets P1 to P5 is sent from the encoding means 1A every time the clock count value increases by 1000. In FIG. 5, PCR is stored in TS packets P1 and P4. If the PCR value stored in the region PCR1 of the TS packet P1 is 0, the PCR value stored in the region PCR2 of the TS packet P4 is 3000.

  Next, when each of the TS packets P1 to P5 is input, the header adding means 15 transmits a latch signal to the counter 16, and adds the acquired count value (time stamp) to the packet as a header. The time stamp headers of the TS packets TP1 to TP5 are set as headers HD1 to HD5.

  In FIG. 5, the clock frequency of the encoding means 1A and the clock frequency of the header addition means 15 (the frequency of the fixed clock 11 in FIG. 1) do not match, and the counter 16 increases while the count value increases by 1000 in the encoding means 1A. Then, it is assumed that the count value increases by 999. Therefore, when TS packets P1 to P5 are input to the header adding unit 15 while the transmission interval of TS packets in the encoding unit 1A is maintained, the time stamp stored in each header of the TS packets TP1 to TP5 is 999. Increase by increments. When the time stamp stored in the header HD1 is 0, the time stamps stored in the headers HD2, HD3, HD4, and HD5 are 999, 1998, 2997, and 3996, respectively.

  Next, the TS packets TP1 to TP5 are sent to the network 5 separately. When jitter occurs in the network 5, the clock count value indicating the reception interval differs for the time stamp of each TS packet. The transmission interval of the TS packets TP1 to TP5 output from the communication packet separation unit 21 is represented by the count value of the counter 24 when the clock 23 of the reception controller 6 is synchronized with the clock of the encoding unit 1A. For example, 1000, 1010, 990, 1000.

  The jitter correction unit 22 outputs a TS packet whose time stamp matches the count value of the counter 24. Therefore, the jitter correction unit 22 outputs a TS packet every time the count value of the counter 24 increases by 999. For convenience of explanation, it is assumed that the time stamp header is still added to the TS packet output from the jitter correction unit 22.

  The difference in value between the PCR stored in the region PCR1 and the PCR stored in the region PCR2 is 3000. On the other hand, when the time from when the jitter correction unit 22 starts outputting the TS packet TP1 to when the output of the TS packet TP4 is started is indicated by the count value of the counter 24, 999 + 999 + 999 = 2997. That is, the timing at which TS packets are output from the jitter correction means 22 is shifted with respect to the PCR transmission interval. If such a state continues for a long time, the operation of the PLL circuit does not converge in the playback apparatus 7, and the video and audio are disturbed.

  FIG. 6 is a diagram for explaining an error between the PCR and the time stamp when the counter 16 of FIG. 1 is corrected.

  Referring to FIGS. 5 and 6, each means for outputting a TS packet is the same as in FIG. 5, and the clock condition is also the same as in FIG.

  In the following, portions different from FIG. 5 will be described in particular. However, as in FIG. 5, the number of TS packets and the clock count value are examples for explaining the present invention.

  The count value of the clock corresponding to the transmission interval of the TS packets P1 to P5 in the encoding means 1A is 1000. The header adding means 15 adds the PCR value as a time stamp to the TS packet and outputs the TS packet TP1. Therefore, 0 is stored in the header HD1. The counter 16 (not shown) is loaded with PCR. The count value of the counter 16 increases with the PCR value as an initial value. Therefore, the time stamp stored in the header HD2 is 999. The time stamp stored in the header HD3 is 1998. However, the time stamps of HD1 to HD3 are the same as those in FIG.

  Next, the header adding means 15 adds a header to the TS packet P4 to generate a TS packet TP4. In this case, 3000, which is a PCR value, is stored in the header HD4. In FIG. 5, the time stamp stored in the header HD4 is 2997. Also, 3999 (= 3000 + 999), which is the count value of the counter 16 after correction, is stored in the header HD5 of FIG. In FIG. 5, the time stamp stored in the header HD5 is 3996.

  In the case where it is assumed that the clock 23 of the reception controller 6 is synchronized with the clock of the encoding means 1A from the time when the output of the TS packet TP1 is started in the jitter correction means 22 until the output of the TS packet TP4 is started. The count value of the counter 24 is 3000, which is the same as the difference in PCR value. Therefore, the time required for the reproduction apparatus 7 to receive all the TS packets TP1 to TP4 is the same as the time required for the encoding means 1A to transmit the TS packets P1 to P4.

  In FIG. 6, for example, the interval between the TS packets TP2 and TP3 is 999 counts for the transmission interval of each TS packet output from the jitter correction means 22. On the other hand, the interval between TP3 and TP4 is 1002 counts. That is, the transmission intervals of the TS packets do not match. However, the PLL circuit included in the reproducing apparatus 7 evaluates only the PCR in order to synchronize the clock with the clock of the encoding means 1A. Therefore, in the case of a TS packet that does not include PCR, even if the interval at which the playback device 7 receives the TS packet and the interval at which the encoding unit 1A transmits the TS packet do not exactly match, the encoding unit 1A and the decoding unit It is possible to synchronize the clock with the means 25.

  Therefore, the data processing means 10 can transfer the TS packet after adding a time stamp that is completely synchronized with the PCR to the TS packet including the PCR. Data transfer can be performed after adding a time stamp with an error that does not occur.

  In order to synchronize the time stamp with the clock of the encoder, there is a method of providing a PLL circuit in the system. In this case, a VCO, a differential circuit, a low-pass filter, etc. are required to configure the PLL circuit, and the system cost is reduced. To rise. On the other hand, in the first embodiment, the time stamp can be synchronized with the encoder clock without using a PLL circuit, and the cost of the system can be reduced.

  Furthermore, when the number of input sources is 2 or more (for example, when receiving satellite digital broadcast or terrestrial digital television broadcast), the encoder clocks of the broadcast stations are not synchronized with each other. Therefore, in the case of a system including a PLL circuit for synchronizing the encoder clock and the time stamp as described above, the number of PLL circuits corresponding to the number of input sources is necessary. However, according to the first embodiment, it is possible to provide one fixed clock (such as a crystal resonator) that is cheaper than the VCO and a counter corresponding to each input source. Thus, according to the first embodiment, the cost of the system can be reduced as the number of input sources increases.

  When a TS packet including PCR and a TS packet not including PCR are sequentially input to the data processing means 10 at short intervals, the time stamp is loaded from the time stamp shaping means 38 to the counter 16 before completion. There is a possibility that a latch signal is sent from the buffer 36. In this case, it is assumed that the count value for the TS packet not including the PCR is smaller than the PCR value, and the magnitude relationship of the time stamp values is reversed with respect to the TS packet input order. The following can be considered as a method for avoiding such a phenomenon.

  For example, there is a method of delaying the latch signal sent to the counter 16 until the loading of the time stamp value is completed. As a specific method for delaying the transmission of the latch signal, as shown in FIG. 4, the time stamp shaping means 38 allows the counter 16 to send a latch signal after the time stamp has been loaded. There is a method of sending a start instruction to the buffer 36. The buffer 36 receives a latch start instruction and transmits a latch signal. Note that the buffer 36 may transmit the latch signal after a predetermined time has elapsed after receiving the latch start instruction.

  Even if the latch signal is not sent, if the buffer 36 receives a TS packet that does not include PCR, the buffer 36 can send the latch signal after a delay time corresponding to the time until loading of the time stamp has elapsed. That's fine.

  In addition, an elapsed time (hereinafter referred to as a first elapsed time) from when a TS packet including a PCR is input to the data input means 30 until the time stamp is loaded into the counter 16 is a TS that does not include the PCR. There are cases where the elapsed time from when the packet is input to the data input means 30 until the counter 16 transmits the time stamp (hereinafter referred to as the second elapsed time) is longer. In this case, a particular problem occurs when the time stamp is acquired from the counter 16 before and after the time stamp is completely loaded.

  This will be specifically described below. For example, the count value indicating the first elapsed time is 100 counts, and the count value indicating the second elapsed time is 20 counts. It is assumed that the PCR value is 3000, and the first TS packet including the PCR and the second and third TS packets not including the PCR are input when the count values of the counter 16 are 3000, 3050, and 3090, respectively. When correction processing is not performed, the time stamp value of the second TS packet is 3070 (= 3050 + 20), and the time stamp value of the third TS packet is 3010 (when the count value reaches 3100) Time stamp is loaded, and the count value is corrected to 3000). That is, the third TS packet is input before the second TS packet.

  In this case, the time stamp shaping means 38 performs a correction process for generating a time stamp in which a time corresponding to the difference between the first elapsed time and the second elapsed time is added to the PCR, and causes the counter 16 to perform the corrected time stamp. Just load it. That is, if the value of the time stamp to be loaded is 3080 (= 3000 + 100−20), the time stamp of the third TS packet is 3090. Therefore, a time stamp indicating that it has been input later is added to the second TS packet. At this time, since the correction value is always constant, synchronization between the time stamp and the PCR is maintained.

  As a result, even for TS packets whose order may be reversed due to the difference in time for loading the time stamp into the counter 16, it is possible to add a time stamp synchronized with the PCR more accurately.

  As described above, according to the data processing apparatus of the first embodiment, it is possible to synchronize clocks between the encoder and the decoder at a low cost.

[Modification of Embodiment 1]
FIG. 7 is a diagram illustrating a configuration example of a system according to a modification of the first embodiment.

  Referring to FIG. 7, home system 2A is different from home system 2 of FIG. 1 in that it includes transmission controller 4A, but the other parts are the same. Therefore, the subsequent description regarding other parts will not be repeated.

  The transmission controller 4A differs from the transmission controller 4 of FIG. 1 in that it includes a CPU (Central Processing Unit) 10A and a ROM (Read Only Memory) 18, but the other parts are the same. Therefore, the subsequent description regarding other parts will not be repeated.

  The CPU 10A adds a time stamp header to the TS packet received from the tuner 3 in accordance with steps to be described later. The functions of the separating unit 14, the header adding unit 15 and the counter 16 in FIG. 1 are realized by causing the CPU 10A to execute a program in FIG. The ROM 18 stores a program for causing the computer (CPU 10A) to execute each step for the CPU 10A to add a time stamp to the TS packet. That is, the ROM 18 is a computer-readable recording medium.

  In FIG. 7, the ROM 18 is shown as a computer-readable recording medium, but the recording medium is not limited to the ROM. For example, a flash memory, a hard disk, a DVD (Digital Versatile Disc), a floppy (registered trademark) disk, a magnetic tape, and the like are assumed.

  The ROM 18 is not limited to a semiconductor device, and may be a CD (Compact Disc) -ROM, for example. Further, the ROM 18 may be included in the CPU 10A.

FIG. 8 is a diagram illustrating an external appearance example of an apparatus including the transmission controller 4A of FIG.
Referring to FIG. 8, the communication device 50 includes a computer main body 51 including the transmission controller 4 </ b> A, a display device 52, an FD drive 53 in which an FD (Flexible Disk) 54 is mounted, a keyboard 55, and a mouse 56. A CD-ROM device 57 to which the CD-ROM 58 is mounted and a cable 59 for connecting to the network 5 are provided. A program for realizing the data processing of the present invention (which may be a program for realizing the functions of the communication device 50 including the data processing of the present invention) is built in the FD 54, the CD-ROM 58, or the computer main body 51. Supplied by a recording medium such as a ROM (not shown). When the program is executed by the computer main body 51, data processing described later is performed.

  The program may be supplied to the computer main body 51 from another computer in the home via the cable 59 and the network 5. Further, the program may be supplied from the external server to the computer main body 51 via the external network, the network 5 and the cable 59.

FIG. 9 is a flowchart showing processing by the CPU 10A of FIG.
Referring to FIG. 9, when the process is started, a TS packet is first input in step S1. Next, in step S2, it is determined whether PCR is included in the TS packet. As described above, the determination method is a method for determining that a PCR is included in the corresponding TS packet if, for example, the PID included in the TS packet matches a preset value.

  If it is determined in step S2 that the PCR is not included in the TS packet, the process proceeds to step S3. On the other hand, when it is determined in step S2 that the PCR is included in the TS packet, the process proceeds to step S6 described later.

  In step S3, the TS packet not including the PCR is once transferred to a buffer (not shown) built in the CPU 10A. Next, in step S4, the count value is stored in an array on a memory (not shown), for example. Subsequently, in step S5, the count value stored in the aforementioned array is added to the TS packet as a time stamp.

  On the other hand, in step S6, the PCR value is extracted from the TS packet. Next, in step S7, the extracted PCR is shaped so as to match the format of the time stamp according to the above-described calculation formula (1).

  Subsequent to step S7, in step S8, as in step S5, the time stamp (shaped PCR) obtained in step S7 is added to the TS packet. In step S8, the counter is loaded with the value of the time stamp (shaped PCR) obtained in step S7 and the count value of the counter is corrected.

  Following the processing in step S5 or step S8, in step S9, a TS packet with a time stamp added is output.

  The effect of the modification of the first embodiment is the same as that of the first embodiment. That is, a time stamp that is completely synchronized with the PCR is added to the TS packet including the PCR. Therefore, the time can be synchronized between the encoding unit 1A and the decoding unit 25.

  Further, in the modification of the first embodiment, since the separating unit 14, the counter 16, and the header adding unit 15 in FIG. 1 are implemented by a program that operates on the CPU 10A, the effect of cost reduction is further exhibited.

  As described above, according to the modification of the first embodiment, as in the first embodiment, it is possible to synchronize the clock between the encoder and the decoder at a lower cost than in the past.

[Embodiment 2]
FIG. 10 is a diagram illustrating a configuration example of a system including the data processing apparatus according to the second embodiment.

  Referring to FIG. 10, home system 2B is different from home system 2 of FIG. 1 in that it includes transmission controller 4B, but the other parts are the same. Therefore, description of other parts will not be repeated hereinafter.

  The transmission controller 4B is different from the transmission controller 4 of FIG. 1 in that it includes the data processing means 10B, but the other parts are the same. Therefore, description of other parts will not be repeated hereinafter.

  The data processing means 10B is different from the data processing means 10 of FIG. 1 in that it includes a separating means 14B and a header adding means 15B, but the other parts are the same. Therefore, description of other parts will not be repeated hereinafter.

  The separating means 14B receives TS packets from the tuner 3 and separates only necessary TS packets and sends a signal to the counter 16 to obtain a count value. The header adding means 15B receives the TS packet from the separating means 14B, and adds the count value of the counter 16 to the TS packet as a time stamp header. The header adding unit 15B analyzes the TS packet after adding the time stamp header, extracts the PCR from the TS packet when the TS packet includes the PCR, and rewrites the time stamp of the TS packet. Further, the header adding means 15B loads the PCR to the counter 16 and changes the count value to the PCR value. That is, the data processing means 10B differs from the data processing means 10 in FIG. 1 in that the count value of the counter 16 is first added to the TS packet regardless of whether or not the TS packet includes PCR.

  FIG. 11 is a schematic diagram showing an outline of processing performed by the transmission controller 4B of FIG.

  Referring to FIG. 11, in order from the top of the figure, the TS packet output from encoding means 1A, the data area in which the count value (time stamp) of counter 16 is stored, and the TS packet processed in header addition means 15B IP packets output from the communication packet forming means 12 are shown.

  The encoding means 1A sends out TS packets P1A to PnA as in FIG. TS packets P2A and PnA include PCR. Area PCR1A is an area in which PCR is stored in TS packet P2A. Similarly, the region PCRnA is a region where PCR is stored in the TS packet PnA.

  The counter 16 counts the clock. The count values corresponding to the input times of the TS packets P1A to PnA are stored in areas CT1A to CTnA in the header adding means 15 for temporarily storing the acquired count values.

  The header adding means 15B adds the count values stored in the areas CT1A to CTnA to the TS packets P1A to PnA, respectively. TS packets TP1A to TPnA are TS packets to which a time stamp header is added. Next, the header adding means 15B analyzes the TS packet, and if the TS packet includes a PCR, the time stamp is replaced with the PCR value. In FIG. 11, PCR is included in TS packets TP2A and TPnA. Therefore, the time stamps stored in the headers HD2A and HDnA are replaced with the PCR values included in the TS packets TP2A and TPnA, respectively.

  As in FIG. 3, the communication packet forming means 12 combines the TS packets TP1A to TP4A and 0 to 1 or more TS packets, adds a TCP / IP header, and outputs an IP packet I1.

  If the PCR stored in the region PCR1 and the PCR stored in the region PCR1A have the same value, the time stamp stored in the TS packet TP2A and the time stamp stored in the TS packet TP2 are the same. . That is, in the second embodiment, the clock can be synchronized between the encoder and the decoder as in the first embodiment.

FIG. 12 is a diagram showing the configuration of the data processing means 10B of FIG.
Referring to FIG. 12, separation means 14B includes data input means 30B. The data input means 30B outputs the received TS packet to the header addition means 15B and outputs a latch signal to the counter 16.

  The header addition means 15B includes a time stamp addition means 40B and a packet analysis means 32B. The time stamp adding means 40B acquires the count value from the counter 16, and adds the count value as a time stamp header to the TS packet received from the data input means 30B. The packet analysis unit 32B analyzes the TS packet by, for example, the same method as the packet analysis unit 32 of FIG. 4, and determines whether or not the TS packet includes a PCR. The packet analysis means 32B may be included in the time stamp addition means 40B.

  The header adding unit 15B further includes a PCR extracting unit 34B, a time stamp shaping unit 38, and a time stamp correcting unit 60. The PCR extracting unit 34B extracts the data described in the defined place of the TS packet as the PCR, like the PCR extracting unit 34 of FIG. The PCR extracting unit 34B transfers the PCR to the time stamp shaping unit 38 and outputs the TS packet to the time stamp correcting unit 60.

  The time stamp shaping means 38 shapes the PCR and generates a time stamp when the counter length of the counter 16 is shorter than the PCR. The time stamp shaping means 38 outputs the time stamp to the counter 16 and sends it to the time stamp correction means 60.

  The time stamp correcting means 60 receives the time stamp from the time stamp shaping means 38 and the TS packet from the PCR extracting means 34B, and the time stamp value added to the TS packet is received from the time stamp shaping means 38. Replace with a value. That is, the time stamp correction unit 60 has a function of adding a time stamp to the TS packet, similar to the time stamp addition unit 40B.

  The data output means 42 outputs the TS packet received from the packet analysis means 32B or the time stamp correction means 60.

  As described above, according to the data processing apparatus of the second embodiment, it is possible to synchronize the clocks between the encoder and the decoder at a low cost as in the first embodiment.

[Modification of Embodiment 2]
FIG. 13 is a diagram illustrating a configuration example of a system according to a modification of the second embodiment.

  Referring to FIG. 13, home system 2C is different from home system 2B of FIG. 10 in that it includes transmission controller 4C, but the other parts are the same. Therefore, the subsequent description regarding other parts will not be repeated.

  The transmission controller 4C is different from the transmission controller 4B of FIG. 10 in that it includes a CPU 10A and a ROM 18C, but the other parts are the same. Therefore, the subsequent description regarding other parts will not be repeated.

  The functions of the separating unit 14B, the header adding unit 15B, and the counter 16 in FIG. 10 are realized by causing the CPU 10A to execute a program in FIG. The ROM 18C stores a program for causing the computer to execute each step for adding a time stamp to the TS packet by the CPU 10A, like the ROM 18. That is, the ROM 18C is a computer-readable recording medium.

  As in the modification of the first embodiment, the recording medium is not limited to the ROM, and for example, a flash memory, a hard disk, a DVD, a floppy (registered trademark) disk, a magnetic tape, and the like are assumed. Further, like the ROM 18 in FIG. 7, the ROM 18C is not limited to a semiconductor device, and may be a CD-ROM, for example. Furthermore, the ROM 18C may be included in the CPU 10A.

  Moreover, in the modification of Embodiment 2, the external appearance of the communication apparatus including the transmission controller 4C is the same as that of the communication apparatus 50 in FIG. 8, for example. Therefore, description of the appearance of the communication device will not be repeated hereinafter. In this case, in the modified example of the second embodiment, as in the modified example of the first embodiment, the program can be supplied to the communication device by the recording medium.

FIG. 14 is a flowchart showing processing by the CPU 10A of FIG.
Referring to FIG. 14, when the process is started, a TS packet is input in step S11. In step S12, the count value of the counter is stored in an array on the memory in order to record the time when the TS packet is input. Subsequently, in step S13, the counter values stored in the array are added to the TS packet as a time stamp.

  Subsequently, in step S14, it is determined whether PCR is included in the TS packet as in step S2 in the flowchart shown in FIG. If no PCR is included, the process proceeds to step S18. In step S18, the TS packet to which the time stamp is added is output as it is.

  On the other hand, if it is determined in step S14 that the TS packet includes PCR, the process proceeds to step S15. In step S15, the PCR is extracted from the TS packet. Subsequently, in step S16, the PCR is shaped into a format corresponding to the time stamp.

  Subsequently, in step S17, the time stamp value obtained in step S16 is loaded into the counter, and the counter value is rewritten. In step S17, correction is performed in which the time stamp added to the TS packet is replaced with the time stamp obtained in step S16. In step S18 following step S17, the TS packet with the time stamp replaced is output.

  As described above, according to the modification of the second embodiment, the clock between the encoder and the decoder can be synchronized as in the first embodiment.

[Embodiment 3]
FIG. 15 is a diagram illustrating a configuration example of a system including the data processing apparatus according to the third embodiment.

  Referring to FIG. 15, home system 2D is different from home system 2 in FIG. 1 in that it includes a transmission controller 4D having a function different from that of the transmission controller in FIG. 1, but the other parts are the same. Therefore, description of other parts will not be repeated hereinafter.

  The transmission controller 4D is different from the transmission controller 4 of FIG. 1 in that it includes the data processing means 10D, but the other parts are the same. Therefore, description of other parts will not be repeated hereinafter.

  The data processing means 10D is different from the data processing means 10 of FIG. 1 in that it includes a separating means 14D, a header adding means 15D, and a counter 10D, but the other parts are the same. Therefore, description of other parts will not be repeated hereinafter.

  The separation unit 14D receives the TS packet from the tuner 3 and extracts the PCR, calculates a difference value between the arrival time interval of the TS packet including the previously received PCR and the way the PCR proceeds, and counts the difference value 16 and the count value is corrected. The header adding means 15D receives the TS packet from the separating means 14D, and adds the count value of the counter 16 to all TS packets as a time stamp header. That is, the data processing means 10D differs from the data processing means 10 in FIG. 1 in that only the count value is corrected when the TS packet includes PCR, and the count value of the counter 16 is added to all TS packets.

  FIG. 16 is a schematic diagram showing an outline of processing performed by the transmission controller 4D of FIG.

  Referring to FIG. 16, in order from the top of the figure, the TS packet output from encoding means 1A, the data area in which the count value (time stamp) of counter 16 is stored, and the TS packet processed in header addition means 15D IP packets output from the communication packet forming means 12 are shown.

  The encoding means 1A sends out TS packets P1B to PnB as in FIG. TS packets P2B, P (na), and PnB include PCR. The region PCR1B is a region where the PCR is stored in the TS packet P2B, the region PCR (na) B is a region where the PCR is stored in the TS packet P (na) B, and the region PCRnB is a PCR in the TS packet PnB. Is an area in which is stored.

  The counter 16 counts the clock. The count values corresponding to the input times of the TS packets P1B to PnB are stored in areas CT1B to CTnB in the header adding means for temporarily storing the acquired count values. When the TS packet PnB is input to the data processing means 10D, the count value corresponding to the input time of the TS packet P (na) B including the previously arrived PCR is stored in CT (na) B. And a difference value between the difference between the value of CTnB and the difference between PCR (na) B and PCRnB is added to the count value stored in the region CTnB. Here, the TS packet P (na) B including the PCR arriving first is usually a TS packet including the PCR arriving immediately before, but the difference value is calculated by the TS packet including the PCR arriving before a plurality of times. May be.

  The header adding unit 15D adds a time stamp to the TS packet regardless of whether the TS packet includes a PCR packet or not. That is, the count values stored in CT1B to CTnB are stored in the headers HD1B to HDnB by the header adding means 15D.

  As in FIG. 3, the communication packet forming means 12 combines the TS packets TP1B to TP3B and 0 to 1 or more TS packets, adds a TCP / IP header, and outputs an IP packet I2.

FIG. 17 is a diagram showing the configuration of the data processing means 10D of FIG.
Referring to FIG. 17, separation means 14D includes data input means 30D, packet analysis means 32D, PCR extraction means 34D, and PCR difference calculation means 70. The PCR extracting means 34D and the PCR difference calculating means 70 constitute the “extracting means” in the present invention.

  The data input means 30D transfers the received TS packet to the packet analysis means 32D. The packet analysis unit 32D analyzes the input packet in the same manner as the packet analysis unit 32, and determines whether the TS packet includes a PCR. The packet analysis unit 32 transfers the TS packet to the PCR extraction unit 34D when determining that the TS packet includes the PCR, and the TS packet when determining that the TS packet does not include the PCR. Is transferred to the header adding means 15D.

  The PCR extracting unit 34D receives the TS packet including the PCR, similarly to the PCR extracting unit 34, transfers the extracted PCR to the PCR difference calculating unit 70, and transfers the TS packet to the header adding unit 15D.

  When the PCR difference calculation means 70 receives the PCR from the PCR extraction means 34D, it outputs a latch signal to the counter 16 and acquires the count value (clock information) from the counter 16. At this time, the PCR value and the count value are temporarily stored. When the next PCR is received, a count value corresponding to the reception of the current PCR is acquired by the same method. At this time, by comparing the PCR increment temporarily compared with the PCR value received this time and the increment of the corresponding count value, the progress of the counter and the progress of the PCR are compared. The error resulting from the difference is calculated as a difference value. The calculated difference value is transferred to the counter 16, and the counter 16 adds the difference value transferred from the PCR difference calculation means 70 to the count value.

  On the other hand, the header adding means 15D includes a buffer 36D, a time stamp adding means 40D, and a data output means 42D.

  The buffer 36D temporarily stores TS packets. Each time a TS packet is stored, the buffer 36D outputs a latch signal to the counter 16. Further, the buffer 36D sequentially transfers the TS packets to the time stamp adding means 40D. When the counter 16 detects the latch signal sent from the buffer 36D, it transfers the count value at that time to the time stamp adding means 40D.

  The time stamp adding means 40D sequentially adds the count value sent from the counter 16 as a time stamp to be added to the TS packet, and transfers the TS packet with the time stamp added to the data output means 42D. The data output means 42D sequentially outputs TS packets to which time stamps are input, which are input from the time stamp addition means 40D.

  Next, the operation of the PCR difference calculation means 70 in FIG. 17 will be supplemented. The PCR difference calculating means 70 determines whether or not the PCR values are continuous, and does not output an error if the value is discontinuous (the error is set to 0).

  The PCR difference calculation means 70 needs to receive two or more TS packets including the PCR in order to calculate the PCR difference. Indicates that a PCR that should be received at least once within a certain period of time (for example, 100 milliseconds) after receiving a PCR has not been received even after 100 milliseconds, or that the PCR has become discontinuous. When there is a case where the PCR increment cannot be correctly evaluated as an error, such as when the flag is detected from the header of the TS packet, the PCR difference calculation means 70 determines that the PCR value is discontinuous. In this case, the PCR difference calculation means 70 temporarily stops the transfer of the difference value to the counter, and deletes the PCR value temporarily stored as a comparison target and the count value at that time. Therefore, when the PCR value is discontinuous, no error is output from the PCR difference calculation means 70.

  As described above, according to the data processing apparatus of the third embodiment, it is possible to synchronize the clock between the encoder and the decoder at a low cost as in the first embodiment.

[Modification of Embodiment 3]
FIG. 18 is a diagram illustrating a configuration example of a system including a modification of the data processing device according to the third embodiment.

  Referring to FIG. 18, home system 2E is different from home system 2C in FIG. 15 in that it includes transmission controller 4E having a structure different from that in FIG. 15, but the other parts are the same. Therefore, the subsequent description regarding other parts will not be repeated.

  The transmission controller 4E is different from the transmission controller 4C of FIG. 15 in that it includes the CPU 10A and the ROM 18E, but the other parts are the same. Therefore, the subsequent description regarding other parts will not be repeated.

  The functions of the separating unit 14D, the header adding unit 15D, and the counter 16 in FIG. 15 are realized by causing the CPU 10A to execute a program in FIG. The ROM 18E stores a program for causing the computer to execute each step for adding a time stamp to the TS packet by the CPU 10A, like the ROM 18. That is, the ROM 18E is a computer-readable recording medium.

  As in the modification of the first embodiment, the recording medium is not limited to the ROM, and for example, a flash memory, a hard disk, a DVD, a floppy (registered trademark) disk, a magnetic tape, and the like are assumed. Further, like the ROM 18 in FIG. 7, the ROM 18E is not limited to a semiconductor device, and may be a CD-ROM, for example. Further, the ROM 18E may be included in the CPU 10A.

  Moreover, in the modification of Embodiment 3, the external appearance of the communication apparatus including the transmission controller 4E is the same as, for example, the communication apparatus 50 in FIG. Therefore, description of the appearance of the communication device will not be repeated hereinafter. In this case, in the modified example of the third embodiment, as in the modified example of the first embodiment, the program can be supplied to the communication device by the recording medium.

FIG. 19 is a flowchart showing processing by the CPU 10A of FIG.
Referring to FIG. 19, when the process is started, a TS packet is input in step S21. Subsequently, in step S22, it is determined whether PCR is included in the TS packet as in step S2 in the flowchart shown in FIG. If it is determined that the PCR is included, the process proceeds to step S23. On the other hand, if the PCR is not included in the TS packet, the process proceeds to step S27 described later.

  In step S23, the PCR value is extracted from the TS packet. In step S24, the extracted PCR value is stored together with the count value at that time, for example, in an array on a memory (not shown). At this time, it is stored so as not to overwrite the history of the PCR values and count values that have already been stored several times.

  In step S25, the difference between the PCR increment and the counter increment is calculated based on the PCR value and count value history stored in the array. Further, in step S26, the count value of the counter is corrected by adding the calculated difference value to the counter, and the process proceeds to step S27.

  In step S27, all TS packets are temporarily transferred to a buffer (not shown) built in the CPU 10A.

  In step S28 and step 29, a time stamp is added to the TS packet in the same manner as in step S4 and step S5 in the flowchart shown in FIG.

  Subsequent to the processing in step S29, a TS packet to which a time stamp is added is output in step S30.

  As described above, according to the modification of the third embodiment, the clock between the encoder and the decoder can be synchronized as in the first embodiment.

Other application examples of the present invention will be described below.
For example, the data processing device, the program, and the recording medium of the present invention can be applied when receiving TS packets directly from an encoder or when receiving TS packets stored in an external storage device (storage) such as a hard disk. In this case, the PCR is extracted from the TS packet including the PCR among the received TS packets, and the time stamp header synchronized with the PCR is added to the TS packet by performing the processing described in the first, second, or third embodiment. It is possible to add.

  The present invention can also be applied to a case where TS packets received from an encoder or tuner are temporarily stored in a storage. In this case, since the TS packet subjected to the time stamp addition processing according to the present invention is stored, the decoder can reproduce information normally.

  Furthermore, the transmitted data may be a packet in the MPEG-PS format. In this case, instead of PCR, SCR (System Clock Reference) is used as a time stamp. As an example of the use of MPEG-PS format packets, for example, there is an example of data transfer by a DVD recording apparatus having a communication function.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

It is a figure which shows the structural example of the system in which the data processor of this invention is included. It is a figure which shows an example of a structure of the packet containing PCR among TS packets. It is a schematic diagram which shows the outline | summary of the process performed by the transmission controller 4 of FIG. It is a block diagram which shows the structure of the data processing means 10 of FIG. It is a figure explaining the error of PCR and time stamp in case the correction of the counter 16 of FIG. 1 is not performed. It is a figure explaining the difference | error of PCR and a time stamp when the correction of the counter 16 of FIG. 1 is performed. 6 is a diagram illustrating a configuration example of a system according to a modification of the first embodiment. FIG. It is a figure which shows the example of an external appearance of the apparatus containing the transmission controller 4A of FIG. It is a flowchart which shows the process by CPU10A of FIG. It is a figure which shows the structural example of the system in which the data processor of Embodiment 2 is included. It is a schematic diagram which shows the outline | summary of the process performed by the transmission controller 4B of FIG. It is a figure which shows the structure of the data processing means 10B of FIG. FIG. 10 is a diagram illustrating a configuration example of a system according to a modified example of the second embodiment. It is a flowchart which shows the process by CPU10A of FIG. FIG. 10 is a diagram illustrating a configuration example of a system including a data processing device according to a third embodiment. It is a schematic diagram which shows the outline | summary of the process performed by transmission controller 4D of FIG. It is a figure which shows the structure of the data processing means 10D of FIG. FIG. 10 is a diagram illustrating a configuration example of a system including a modification of the data processing device according to the third embodiment. It is a flowchart which shows the process by CPU10A of FIG. It is a figure which shows the structural example of the conventional transmission system.

Explanation of symbols

  1,101 Content creation source, 1A, 101A encoding means, 2,2A-2E, 102 Home system, 3,103 tuner, 4,4A-4E, 104 Transmission controller, 5,105 network, 6,106 Reception controller 7, 107 Playback device, 10, 10B, 10D Data processing means, 10A CPU, 11, 111 fixed clock, 12, 112 communication packet forming means, 13 communication controller, 14, 14B, 14D separating means, 15, 15B, 15D Header addition means, 16, 116 counter, 18, 18C, 18E ROM, 20, 120 communication controller, 21, 121 communication packet separation means, 22, 122 jitter correction means, 23, 123, 26, 126 clock, 24, 124 counter , 25,125 Encoding means, 30, 30B, 30D data input means, 32, 32B, 32D packet analysis means, 34, 34B, 34D PCR extraction means, 36, 36D buffer, 38 time stamp shaping means, 40, 40B, 40D time stamp addition Means, 42 data output means, 50 communication device, 51 computer main body, 52 display device, 53 FD drive, 54 FD, 55 keyboard, 56 mouse, 57 CD-ROM device, 58 CD-ROM, 59 cable, 60 time stamp correction Means, 70 PCR difference calculation means, CT1-CTn, CT1A-CTnA area, HD1-HDn, HD1A-HDnA, HD1B-HDnB header, I0, I1, I2 IP packet, P0, P1-Pn, P1A-PnA, P1B- PnB, P1~TPn, TP1A~TPnA, TP1B~TPnB TS packet, PCR1, PCR1A, PCR1B, PCR2, PCRn, PCRnA, PCRnB region, S1～S30 step.

Claims (37)

Data input means for inputting a packet in which encoded data is packetized;
Extraction means for extracting and outputting the transmission time information from a first packet including transmission time information among the packets input to the data input means; and outputting the first packet;
First generation means for receiving the transmission time information and generating first time information according to the transmission time information;
A second time indicating a time serving as a reference of a time at which the second packet not including the transmission time information is corrected by correcting the clock information corresponding to the clock signal according to the input of the first time information. A second generating means for generating information;
A data processing apparatus comprising: adding means for adding the first time information to the first packet and adding the second time information to the second packet.   It is determined whether the packet input by the data input means is the first packet or the second packet, and the adding means adds the first time information and the second time information to the packet. The data processing apparatus according to claim 1, further comprising: a packet analysis unit that determines which one to add.   The packet analysis means collates packet identification information indicating an attribute of the packet with a preset value, and determines whether the packet is the first packet or the second packet. 2. A data processing apparatus according to 2.   The data processing apparatus according to claim 2, wherein the packet analysis unit collates packet identification information indicating an attribute of the packet with a preset value and determines whether to discard an unnecessary packet. Any of the input packets includes packet configuration information in which an attribute of the packet identification information is described,
The data processing apparatus according to claim 3 or 4, wherein the packet analysis means analyzes the packet configuration information and sets a value of the packet identification information. Any of the input packets includes packet configuration information in which an attribute of the packet identification information is described,
The packet analysis means sets the analysis result transferred from the device analyzing the packet configuration information in advance for collation with the packet identification information indicating that the first time information is included. The data processing apparatus according to claim 3 or 4, wherein the data processing apparatus is set as a value. The packet identification information is a PID (Packet Identifier),
7. The data processing apparatus according to claim 3, wherein the packet configuration information is a PAT (Packet Association Table) and a PMT (Packet Map Table).   If the packet analyzing unit cannot determine which of the first time information and the second time information is added to the packet, the adding unit adds the second time information to the packet. The data processing apparatus according to claim 2, which is added.   When the second packet is input following the first packet, the second generation means completes the input of the first time information, and further includes the input time of the first packet, The data processing apparatus according to claim 2, wherein the second time information reflecting the time difference is output after a time difference corresponding to a difference from an input time of the second packet has elapsed.   The first generation means includes an elapsed time from when the input of the first packet is started until the correction of the clock information is completed, and second time information after the input of the second packet is started. The data processing device according to claim 2, wherein the first time information is generated by adding a value corresponding to a difference from an elapsed time until the first time information is transmitted to the transmission time information.   The adding means analyzes the packet after adding the second time information to the packet, and if the packet is the first packet, the adding means converts the second time information to the first time information. The data processing apparatus according to claim 1, wherein   The said 1st production | generation means produces | generates the said 1st time information which converted the said transmission time information so that it may become the same as the data format of the said clock information, The statement of any one of Claim 1 to 11 Data processing device. Data input means for inputting a packet in which encoded data is packetized;
Extraction means for extracting the transmission time information from each of the first and second packets including the transmission time information among the packets input to the data input means, and outputting the first and second packets; With
The extraction means calculates an error between a difference between the transmission time information extracted from the first and second packets and a difference between clock information generated according to an input interval of the first and second packets;
Generating means for correcting the clock information according to the error, and generating reproduction reference time information indicating a time that is a reference of a time at which the packet is to be reproduced based on the corrected clock information;
A data processing apparatus, further comprising an adding unit that adds the reproduction reference time information to the packet.   The extraction means determines whether or not the value of the transmission time information extracted from each of the first and second packets is continuous, and does not output the error when discontinuous. The data processing apparatus described in 1.   The data according to claim 14, wherein the extraction means determines that the value of the transmission time information is discontinuous when the second packet is not input for a certain period from the input of the first packet. Processing equipment.   In the extraction means, when at least one of the first and second packets includes information indicating that the value of the transmission time information is discontinuous, the value of the transmission time information is discontinuous. The data processing device according to claim 14, wherein the data processing device is determined to be. The encoded data is data according to MPEG (Moving Picture Experts Group) 2-transport stream format,
The data processing apparatus according to claim 1, wherein the transmission time information is a program time reference reference value. The encoded data is data according to MPEG (Moving Picture Experts Group) 2-program stream format,
The data processing apparatus according to claim 1, wherein the transmission time information is a system time reference reference value. A step for inputting a packet in which encoded data is packetized;
Extracting and outputting the transmission time information from a first packet including transmission time information among packets input to the data input means, and outputting the first packet;
Receiving the transmission time information and generating first time information according to the transmission time information;
A second time indicating a time serving as a reference of a time at which the second packet not including the transmission time information is corrected by correcting the clock information corresponding to the clock signal according to the input of the first time information. Generating information;
A program for causing a computer to execute the step of adding the first time information to the first packet and adding the second time information to the second packet.   It is determined whether the packet input in the step of inputting the packet is the first packet or the second packet, and in the adding step, the first time information and the second packet are added to the packet. The program according to claim 19, further causing the computer to execute a step of determining which time information to add.   The step of determining includes comparing packet identification information indicating an attribute of the packet with a preset value to determine whether the packet is the first packet or the second packet. 20. The program according to 20.   21. The program according to claim 20, wherein the determining step compares packet identification information indicating an attribute of the packet with a preset value and determines whether to discard an unnecessary packet. Any of the input packets includes packet configuration information in which an attribute of the packet identification information is described,
The program according to claim 21 or 22, wherein the determining step analyzes the packet configuration information and sets a value of the packet identification information. Any of the input packets includes packet configuration information in which an attribute of the packet identification information is described,
The determining step includes analyzing the packet configuration information obtained by using a device that analyzes the packet configuration information for collation with the packet identification information indicating that the first time information is included. The program according to claim 21 or 22, wherein a result is set as the preset value. The packet identification information is a PID (Packet Identifier),
The program according to any one of claims 21 to 24, wherein the packet configuration information is a PAT (Packet Association Table) and a PMT (Packet Map Table).   In the adding step, when the determining step cannot determine which of the first time information and the second time information is added to the packet, the second time information is added to the packet. 21. The program according to claim 20, wherein:   In the step of generating the second time information, when the second packet is input subsequent to the first packet, the input of the first time information is completed, and the first packet is further generated. The program according to claim 20, wherein the second time information reflecting the time difference is output after a time difference corresponding to the difference between the input time of the second packet and the input time of the second packet has elapsed.   The step of generating the first time information includes an elapsed time from when the input of the first packet is started until the correction of the clock information is completed, and after the input of the second packet is started. 21. The program according to claim 20, wherein the first time information is generated by adding a value corresponding to a difference from an elapsed time until the second time information is transmitted to the transmission time information.   The adding step analyzes the packet after adding the second time information to the packet, and if the packet is the first packet, the second time information is added to the first time. The program according to claim 20, wherein the program is replaced with information.   The step of generating the first time information generates the first time information obtained by converting the transmission time information so as to be the same as the data format of the clock information. The program described in the section. A step for inputting a packet in which encoded data is packetized;
The transmission time information is extracted from each of the first and second packets including the transmission time information among the input packets, and the first and second packets are output. Calculating an error between a difference between the transmission time information extracted from the packet and a difference between clock information generated according to an input interval of the first and second packets;
Correcting the clock information according to the error, and generating reproduction reference time information indicating a time that is a reference of a time at which the packet is to be reproduced based on the corrected clock information;
A program for causing a computer to execute the step of adding the reproduction reference time information to the packet.   The calculating step determines whether or not the value of the transmission time information extracted from each of the first and second packets is continuous, and when the value of the transmission time information is discontinuous, 32. The program according to claim 31, wherein the error is zero.   33. The calculation according to claim 32, wherein the calculating step determines that the value of the transmission time information is discontinuous when the second packet is not input for a certain period from the input of the first packet. program.   In the calculating step, when at least one of the first and second packets includes information indicating that the value of the transmission time information is discontinuous, the value of the transmission time information is The program according to claim 32, wherein the program is determined to be discontinuous. The encoded data is data according to MPEG (Moving Picture Experts Group) 2-transport stream format,
The program according to any one of claims 19 to 33, wherein the transmission time information is a program time base reference value. The encoded data is data according to MPEG (Moving Picture Experts Group) 2-program stream format,
The program according to any one of claims 19 to 33, wherein the transmission time information is a system time base reference value.   A computer-readable recording medium on which the program according to any one of claims 19 to 36 is recorded.

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