JP2006059949A - Infrared light emitting element and its fabrication process - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an infrared light emitting element having a light emitting layer containing silicon. <P>SOLUTION: The infrared light emitting element 50 comprises a substrate 33 having an upper surface 23A and a lower surface 23B, a first window layer 25 provided on the upper surface 23A, a silicon dioxide layer 26 provided on the first window layer 25, a plurality of silicon nanometer crystals 24 distributed in the silicon dioxide layer 26, a second window layer 27 provided on the silicon dioxide layer 26, a transparent conductive layer 28 provided on the second window layer 27, a first ohmic contact electrode 65 provided on the transparent conductive layer 28, and a second ohmic contact electrode 30 fixed to the lower surface 23B. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an infrared light emitting device and a method for producing the same, and more particularly to an infrared light emitting device including a silicon-containing light emitting layer and a method for producing the same.

  Infrared light emitting diodes are mainly applied in the optical communication industry. However, with the maturation of semiconductor laser diode technology, the light source of light emitting diodes used in glass optical fiber (infrared light whose wavelength is between 1310 nm and 1550 nm) gradually uses laser diodes to increase its transmission distance Is changing. For the connection of multimedia such as a home network and digital video, a plastic optical fiber and an infrared light emitting diode having a wavelength of 650 to 670 nm are mainly used. Accordingly, the application range of infrared light emitting diodes is limited to a wavelength range of 850 to 950 nm in the market of sensing measuring devices and remote controllers, for example. At present, the production of photoelectric elements (especially light-emitting elements) is mainly based on crystal technology, and further uses elements such as III-V or II-VI groups that have direct band-gap as raw materials. is doing.

  After the electrocrystal was invented in 1947, silicon materials have played a much more important role in the integrated circuit industry. According to Moore's Law prediction, the size of an integrated circuit element shrinks to half of its original size about every 18 months. The main basis for Moore's Law is the result of deriving under conditions such as constant advancement of new technologies and potential application development, and silicon materials are an important basis for this rapid progress. As a result of many years of development, the process technology for applying silicon materials to integrated circuits is the most complete and the lowest cost. Therefore, if the silicon material can be further developed into a light emitting element, the light emitting element and the large scale integrated circuit (VLSI) can be specifically matched.

Silicon materials (Group IV elements) are illuminants with an ineffective rate at room temperature. The main causes are that the silicon material belongs to the indirect band-gap material, the light radiation polymerization rate is very low, and the light emission efficiency of the internal quantum (Internal quantum efficiency) is small. This is because it is only 10 ⁻⁶ to 10 ⁻⁷ , and is therefore always excluded from the role as a light source. Therefore, the application of silicon materials in the photoelectric industry is currently limited to use in detectors, array image sensing devices of charge coupled devices (CCDs) and light receiving elements such as solar cells.

  In 1990, British L.C. T.A. Canham discovered that a porous silicon material (Porous Si, PSi) formed using an anodic electrolytic silicon material in an argon fluoric acid solution can produce a highly efficient visible light source (non-patented). Reference 1). With this important discovery, research teams around the world have worked on the development of silicon light sources. Between 2000 and 2003, many academic institutions and researchers around the world all worked on the development of silicon-based light emitting diodes, and considerable progress was made (see Non-Patent Document 2). That said, commercial products such as light-emitting diodes in any form have yet to appear.

Since the porous silicon material has a spongy structure, it becomes a serious drawback when applied to a light emitting device. In terms of mechanical properties, porous silicon materials are fragile and are not suitable for matching with standard semiconductor manufacturing processes. In addition, the chemical properties of porous silicon materials tend to cause chemical action with oxygen atoms in the air due to their high activity, and degrading the photoelectric performance. Is difficult.
Canham L. T. T. et al. Appl. Phys. Lett. , 57, 1046 (1990) : Mykola Sopinsky and Viktoriya Khomchenko, Current Opinion in Solid State and Material Science 7 (2003) 97-109. )

  A main object of the present invention is to provide an infrared light emitting device having a light emitting layer containing silicon and a method for manufacturing the same.

  In order to achieve the above object, the present invention discloses an infrared light emitting device and a method for manufacturing the same. The infrared light emitting element includes a substrate having an upper surface and a lower surface, a first window layer provided on the upper surface, a silicon dioxide layer provided on the first window layer, and the silicon dioxide layer A plurality of silicon nanometer crystals distributed therein, a second window layer attached on the silicon dioxide layer, a transparent conductive layer provided on the second window layer, and provided on the transparent conductive layer A first ohmic contact electrode and a second ohmic contact electrode attached to the lower surface thereof. The substrate may be a p-type silicon substrate or an n-type silicon substrate, and the first window layer and the second window layer may be made of microcrystalline silicon, amorphous silicon, or gallium nitride. The transparent conductive layer may be composed of iridium tin oxide. The first ohmic contact electrode may be made of aluminum, nickel, or an alloy containing aluminum and nickel. The thickness of the silicon dioxide layer is between 1 and 10000 nm, and the size of the silicon nanometer crystal is between 5 and 10 nm.

  Another embodiment of the infrared light emitting device includes a substrate, a first window layer provided on the substrate, a silicon dioxide layer provided on a partial surface of the first window layer, and the silicon dioxide layer. A plurality of nanometer crystals distributed therein, a second window layer attached on the silicon dioxide layer, a transparent conductive layer provided on the second window layer, and a first ohmic contact electrode provided on the transparent conductive layer And a second ohmic contact electrode attached to a partial surface of the first window layer. The first window layer and the second window layer are made of amorphous silicon, microcrystalline silicon, or gallium nitride, and the substrate is a quartz substrate or an aluminum oxide substrate.

  In this method of manufacturing an infrared light emitting element, a silicon oxide layer having a deficient equivalent is first formed on a substrate. The ratio of the number of oxygen atoms and the number of silicon atoms in the insufficiently equivalent silicon oxide layer is less than 2. Next, at least by a heat treatment step, a part of silicon atom crystals in the silicon oxide layer of insufficient equivalent is formed into a plurality of silicon nanometer crystals. A sub-equivalent silicon oxide layer is formed on the substrate by an atmospheric pressure chemical vapor deposition process, the temperature of the atmospheric pressure chemical vapor deposition process is between 700-1100 ° C., and the deposition time is between 1-300 minutes. In the atmospheric pressure chemical vapor deposition process, dichlorodihydrosilicon and dinitrogen monoxide or silane and dinitrogen monoxide having a flow ratio of 10: 1 to 1:10 are used as reaction gases. In this atmospheric pressure chemical vapor deposition process, hydrogen, nitrogen or argon is used as a carrier gas, and the reaction gas is uniformly mixed and then fed into the reaction chamber.

  This heat treatment process includes a first treatment process and a second treatment process. The first treatment step is to grow silicon nanometer crystals in an environment of nitrogen or argon, the treatment temperature is between 800-1300 ° C., and the treatment time is between 1-300 minutes. The second treatment step involves surface passivation of silicon nanometer crystals in an argon environment, the treatment temperature being between 500-600 ° C., and the treatment time being between 1-120 minutes.

  Due to the quantum effect, the band gap spacing of the material becomes wider as the size decreases, so that nanometer-sized crystals have unique photoelectric properties that are different from general size materials. Therefore, in addition to the use of well-known porous silicon materials, researchers create silicon light sources by forming silicon nanocrystals (Si-NC) in a highly stable silicon dioxide layer. Also trying.

  A method of manufacturing a silicon nanometer crystal uses a chemical vapor deposition technique to form a sub-equivalent silicon oxide (SiOx) layer (Sub-stoichiometric silicon film) having an excess silicon atom component. The ratio (x) of the number of oxygen atoms to the number of silicon atoms is less than 2. Next, annealing at high temperature (Annealing) separates the two different metal phases (ie silicon and silicon dioxide) from each other, an ordered silicon nanometer crystal and an amorphous silicon dioxide Are formed simultaneously. Of these, the silicon dioxide layer is a matrix for depositing silicon nanometer crystals. Since the silicon dioxide material has a homogeneous structure, there is no strain between the silicon nanometer crystal and the silicon dioxide (Strain-free). The size and density of silicon nanometer crystals can be controlled by operating parameters such as layer deposition temperature and annealing temperature.

  Another method for producing silicon nanometer crystals is to employ an ion implantation technique. Ion implantation technology is a mature technology that has been developed for many years and has already been used in the manufacturing process of large-scale semiconductor integrated circuits. The ion implantation technique implants accelerated silicon ions directly into the silicon dioxide layer to form excess silicon atoms in some areas within the silicon dioxide layer. Next, the silicon nanometer crystal which deposits in the silicon dioxide layer (matrix structure) is formed by converting the excess silicon atoms into nucleus crystals by annealing treatment.

  The ion implantation technique implants necessary excess silicon atom concentration and distribution profile in a specific partial area and depth range by adjusting the energy amount and dose of ions to be implanted. In addition, many structural defects are formed in the ion implantation process, but these structural defects reduce the activation energy of atomic diffusion (activation energy of diffusion) and are necessary for the separation of the metal phase. The temperature of the annealing process also decreases with this. However, since the time required for forming the excess silicon atom concentration by the ion implantation technique is too long as compared with the chemical vapor deposition process, it is inappropriate to apply to the production of the light emitting layer of the light emitting diode.

  Chemical vapor deposition (CVD), which is widely used in semiconductor manufacturing processes, is based on atmospheric pressure chemical vapor deposition depending on the working temperature range (100-1000 ° C) and working pressure range (change from atmospheric pressure to 7 Pa, etc.). The method is divided into three types: APCVD, low pressure chemical vapor deposition (LPCVD), and plasma chemical vapor deposition (PECVD). Compared to ion implantation technology, chemical vapor deposition precisely controls the composition and structure of the deposited layer and has the advantages of uniform and fast deposition rate, high production volume and low manufacturing cost.

  The metal phase structure of the silicon-containing layer formed in the low-temperature deposition process such as low-pressure chemical vapor deposition and plasma chemical vapor deposition is relatively dissipated, and there are relatively many structural defects and impurities that inhibit crystal growth. The present invention selects a high temperature atmospheric pressure chemical vapor deposition process to produce a silicon-containing layer of a light emitting diode. Silicon-containing light-emitting layers manufactured in a high-temperature environment have relatively few structural defects and impurities, and complex silicon-nitrogen-oxygen (Si-N-O) compounds are highly dense and densely distributed silicon. Nanometer crystals can be formed. Thus, the luminescence spectrum of a silicon nanometer crystal has high brightness, high brightness, and a relatively narrow light spectrum half width.

  FIG. 1 is an explanatory view of an atmospheric pressure chemical vapor deposition apparatus 100. As shown in FIG. 1, the atmospheric pressure chemical vapor deposition apparatus 100 includes a reaction chamber 10, a high-frequency vibration power source 12 attached around the reaction chamber 10, a graphite block 14 in the reaction chamber 10, an inlet branch pipe 16, and an exhaust. A branch pipe 18 is included. The graphite block 14 is used to place a substrate 22 on which layer deposition is to be performed. The graphite block 4 itself is pre-deposited with a layer 15 composed of silicon carbide and silicon dioxide in order to prevent oxygen molecules from attacking the graphite block 14.

2-4 shows the manufacturing method of the infrared light emitting diode of this invention. In the present invention, when manufacturing the light emitting diode 50, the substrate 22 is first placed on the graphite block 14 in the reaction chamber 10, and then the high frequency power source 12 is used to heat the graphite block 14 until the deposition temperature T _D is reached. To do. The substrate 22 may be a p-type silicon substrate or an n-type silicon substrate, and further has an upper surface 23A and a lower surface 23B. The first window layer 25 is deposited on the upper surface 23A of the substrate 22. Next, the reaction gas 17 having a fixed number of moles or volume ratio is uniformly mixed through the inlet branch pipe 16 with a carrier gas (which may be selected from hydrogen, argon or nitrogen) 11 and then fed into the reaction chamber 10. . The reaction gas 17 may be a mixed gas of dichlorosilane dihydro silicon _(SiH 2 Cl ₂₎ and nitrous oxide _(N 2 O), both of the flow rate ratio of 10: 1 to 1: 10 is between. In addition, the reaction gas 17 may be silane (SiH ₄ ) and N ₂ O, and the flow rate ratio between them is between 10: 1 and 1:10.

The reaction chamber 10 is kept at the deposition temperature T _D -the scheduled time t _D , and a deficient equivalent silicon oxide (SiO _x ) layer 20 having excess silicon atoms is formed on the first window layer 25, and the number of oxygen atoms The ratio (x) of the number of silicon atoms is less than 2. Other reaction by-products 19 such as nitrogen (N ₂ ) and hydrogen chloride (HCl) are continuously discharged from the exhaust branch pipe 18. Then, nitrogen (or argon) to form a fed by nitrogen (or argon) environment in the reaction chamber 10 is raised further to a temperature treatment temperature T _P of the reaction chamber 10, keeping the further predetermined time t _P A heat treatment step is performed. The environment of the reaction chamber 10 drives the excess silicon atoms in the deficient equivalent silicon oxide layer 20 to perform reaction steps such as crystal growth and maturation, thereby converting the deficient equivalent silicon oxide layer 20 into the silicon nanometer crystal 24. Into a silicon dioxide layer 26 having

Next, hydrogen is passed through the reaction chamber 10, and the temperature of the reaction chamber 10 is further increased to the hydrogen passivation temperature _TPH , and the surface passivation process of the silicon nanometer crystal 24 is performed while maintaining the predetermined time _tPH . The heat treatment step and the surface passivation step convert this insufficient equivalent amount of the silicon oxide layer 20 into a silicon dioxide layer 26 having silicon nanometer crystals 24. The silicon dioxide layer 26 is used as a host structure for the deposition of the silicon nanometer crystal 24, and the thickness of the silicon dioxide layer 26 is between 1 and 10,000 nm, and the size of the silicon nanometer crystal 24 is 5 to 10 nm. between.

  Referring to FIG. 4, a second window layer 27, a transparent conductive layer 28, a first ohmic contact electrode 65 are formed on the silicon dioxide layer 26 in order, and a second ohmic contact is formed on the lower surface 23B of the substrate 22. The electrode 30 is formed, and the manufacture of the light emitting diode 50 is completed. The first window layer 25 and the second window layer 27 may be made of microcrystalline silicon (silicon carbide), amorphous silicon, or gallium nitride. The first window layer 25, the silicon dioxide layer 26, and the second window layer 27 include a PIN junction structure. The transparent conductive layer 28 may be made of indium tin oxide (ITO). The first ohmic contact electrode 65 may be made of aluminum (Al) or an alloy containing nickel (Ni) and aluminum. When a positive voltage is applied on the first ohmic contact electrode 65 and a negative voltage is applied on the second ohmic contact electrode 30, the light emitting diode 50 emits infrared light 40 by current excitation.

FIG. 5 shows the operating temperature and time of the deposition process, heat treatment process and surface passivation process of the present invention. As shown in FIG. 5, the deposition temperature T _D is between 700 ° C. and 1100 ° C., and the deposition time t _D is between 1 and 300 minutes. Temperature _{T P} of the heat treatment step is between 800 to 1300 ° C., more processing time _{t P} is between 1 to 300 minutes. The temperature T _PH of the surface passivation process is between 500 and 600 ° C. and the operating time t _PH is between 1 and 120 minutes.

  FIG. 6 is a photoluminescence (PL) spectrum diagram of the silicon nanometer crystal 24 of the silicon dioxide layer 26 of the present invention. This photoluminescence spectrum is obtained by directly irradiating the silicon dioxide layer 26 with an argon laser beam (wavelength: 488 nm) and measuring the photoluminescence emitted from the silicon nanometer crystal 24. As shown in FIG. 6, the photoluminescence wavelength emitted by the silicon nanometer crystal 24 of the silicon dioxide layer 26 is between 700 and 900 nm, and the peak wavelength is about 800 to 850 nm, that is, infrared light.

FIG. 7 shows a light emitting diode 70 of Example 2 of the present invention. As shown in FIG. 7, the light emitting diode 70 includes a substrate 33, a first window layer 25 provided on the substrate 33, a silicon dioxide layer 26 provided on the surface of the first window layer 25, and a silicon dioxide layer 26. A second window layer 27 provided above, a transparent conductive layer 28 provided on the second window layer 27, a first ohmic contact electrode 65 provided on the transparent conductive layer 28, and the first window layer 25 It includes a second ohmic contact electrode 64 attached to another surface. Since this silicon dioxide layer 26 is manufactured by the above method, it has a silicon nanometer crystal 24 that emits infrared light. The first window layer 25 is made of silicon, nickel, and gallium, and is an n ⁺ type, that is, an n ⁺ -GaNiSi layer. The second window layer 27 may also be made of amorphous silicon, microcrystalline silicon, or gallium nitride. The first window layer 25, the silicon dioxide layer 26, and the second window layer 27 include a PIN junction structure. The second ohmic contact electrode 64 may be composed of a titanium-aluminum alloy. Substrate 33 is quartz (Quatz) substrate or aluminum oxide _{(Al 2} O 3 Sapphire) may be a substrate.

  The present invention employs a high-temperature atmospheric pressure chemical vapor deposition process to produce a deficient equivalent amount of the silicon oxide layer 20, and the chemical reaction formula thereof is as follows.

SiH ₂ Cl ₂ + xN ₂ O → SiO _x + xN ₂ + 2HCl
In a high temperature environment where the deposition temperature (T _D ) is 700 to 1100 ° C., SiH ₂ Cl ₂ and N ₂ O gas in a predetermined mole number or volume ratio are uniformly mixed with the carrier gas, and then the reaction chamber 10 is mixed. Send it in. In the high temperature reaction chamber 10, the two gases of SiH ₂ Cl ₂ and N ₂ O are each dissociated into an atomic state by high temperature, and then reorganize to form a deficient equivalent amount of silicon oxide, which is further deposited on the substrate 22. To do. The silicon oxide deposited on the first window layer 25 contains an excess silicon atom component, and the amount of excess silicon atom component is determined by using a nondestructive measurement method to determine the number of oxygen atoms and the number of excess silicon atoms (O / Si). Can be measured. For example, if the magnitude of the photorefractive index relative to standard silicon dioxide (SiO ₂ ) is measured, the relative ratio between the number of oxygen atoms and the number of excess silicon atoms (O / Si) can be estimated.

Silicon has a melting point (T _M ) of about 1430 ° C. and a crystal nucleation temperature (T _N ) of about 0.6 × T _M ≈858 ° C. The deposition temperature T _D of this sub-equivalent silicon oxide layer 20 is between 700-1100 ° C. and clearly higher than the crystal nucleation temperature. Therefore, in the process of depositing the sub-equivalent silicon oxide layer 20, the high temperature in the reaction chamber 10 is simultaneously used to form most of the excess silicon atoms in the sub-equivalent silicon oxide layer 20 to form silicon nanometer crystal nuclei (Nucleus). In addition, an intermediate structure between the silicon nanometer crystal nucleus and the base (composed of silicon dioxide) is formed. The intermediate surface structure between the silicon nanometer crystal nucleus and the base is mainly composed of dangling bonds and nitrogen-oxygen bonds around the silicon nanometer crystal. For example, silicon - nitrogen bond (Si-N bonds), silicon - oxygen bond (Si-O bonds), and silicon - nitrogen - oxygen bond _{(Si-N x -O y)} . This intermediate plane structure is the main luminescence center.

Next, an annealing process such as growth and maturation of the silicon nanometer crystal 24 is performed in a carbon or argon environment. The main structural composition of the sub-equivalent silicon oxide layer 20 includes clusters formed by excessive silicon atoms and silicon oxide having a homogeneous structure (Amorphous). Among them, most of the excess silicon atom clusters have already formed silicon nanometer crystal nuclei. Place the substoichiometric silicon oxide film 20 to a high temperature environment of the heat treatment temperature (T _P), further by maintaining the predetermined time (t _P, completing the mature growth and intermediate surface structure of all silicon nanometer crystals This is also the conversion of a sub-equivalent silicon oxide layer 20 to a silicon dioxide layer 26 with silicon nanometer crystals 24.

In addition to this, if the excess silicon atoms in the deficient equivalent silicon oxide layer 20 did not form silicon crystal nuclei in the deposition step, the high temperature of the heat treatment step further increased the excess silicon atoms in the deficient equivalent silicon oxide layer 20. Drive to the adult nuclei. Next, the silicon dioxide layer 26 having the silicon nanometer crystal 24 is placed in a hydrogen environment, and the surface temperature passivation of the silicon nanometer crystal 24 (Hydrogen passivation) is further performed while maintaining the predetermined temperature T _PM and time (t _PH ). I do. When this surface passivation treatment is completed, the silicon dioxide layer 26 having the silicon nanometer crystal 24 forms a stable infrared light emitting thin film.

  Compared to known techniques, the present invention utilizes an infrared light emitting diode 50 having a silicon-containing light emitting layer (ie, silicon dioxide layer 26 with silicon nanometer crystals 24) utilizing high temperature atmospheric pressure chemical vapor deposition and heat treatment techniques. Is to be manufactured. This has the following advantages:

  1. The present invention does not require a complicated crystal production process and expensive production equipment, and only has a process for depositing a deficient equivalent amount of the silicon oxide thin film 20 and a heat treatment process, and has an advantage that the production process is simple and fast.

  2. The present invention uses an atmospheric pressure chemical vapor deposition process to produce this sub-equivalent silicon oxide layer 20, and the atmospheric pressure chemical vapor deposition process can be matched to a standardized semiconductor manufacturing process. Therefore, the present invention has an advantage of mass-producing light emitting diodes.

  3. The known technique produces a light-emitting layer of a light-emitting element using a III-V group compound, so that the production cost is high. In the present invention, since the silicon-containing light emitting layer of the light emitting diode 50 is manufactured using silicon oxide, the material and the manufacturing cost are relatively low.

  4). Group III-V compounds used by known techniques generate toxic chemicals. The present invention is an environmentally friendly manufacturing process for manufacturing a silicon-containing light-emitting layer of a light-emitting device using silicon oxide, and without the use and discharge problems of chemical and toxic heavy metals.

5. The present invention is by selecting a high temperature T _D conditions, excess silicon atoms to form a substoichiometric silicon oxide layer 20 containing, it is converted to silicon dioxide layer 26 having a silicon nanometer crystal 24 by further heat treatment. Therefore, the temperature stability is relatively high, and the manufactured light emitting layer has a narrow width infrared spectrum distribution.

6). It has a silicon nanometer crystal 24 having a higher density and a higher density distribution than the silicon dioxide layer 26 after the high temperature _TP treatment, and the impurities are relatively low. Therefore, when the silicon nanometer crystal 24 and its intermediate surface structure are excited, it produces a clear and bright spectrum.

  Although the technical contents and technical features of the present invention are as described above, those skilled in the art can make various substitutions and modifications based on the teaching and disclosure of the present invention without departing from the spirit of the present invention. It is. Accordingly, the scope of protection of the present invention should not be limited to that disclosed in the examples, but should include various alternatives and modifications that do not depart from the invention, and must be covered by the following claims. .

It is explanatory drawing of a normal pressure chemical vapor deposition apparatus. It is a figure which shows the manufacturing method of the light emitting diode of this invention. It is a figure which shows the manufacturing method of the light emitting diode of this invention. It is a figure which shows the manufacturing method of the light emitting diode of this invention. It is a graph which shows the operation temperature and time of the deposition process of this invention, a heat treatment process, and a surface passivation process. It is a graph showing the photoluminescence spectrum of the silicon nanometer crystal | crystallization of the silicon dioxide layer of this invention. It is a figure which shows the light emitting diode of Example 2 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Reaction chamber 11 Carrier gas 12 High frequency power supply 14 Graphite block 15 Layer 16 Inlet branch pipe 17 Reaction gas 18 Exhaust branch pipe 19 Reaction by-product 20 Insufficient silicon oxide layer 22 Substrate 23A Upper surface 23B Lower surface 24 Nanometer crystal 25 1 window layer 26 silicon dioxide layer 27 second window layer 28 transparent conductive layer 30 second ohmic contact electrode 33 substrate 40 infrared light 50 light emitting diode 65 first ohmic contact electrode 64 second ohmic contact electrode 70 light emitting diode 100 chemical vapor deposition apparatus

Claims (20)

An infrared light emitting device,
A substrate having an upper surface and a lower surface;
A first window layer provided on the upper surface;
A silicon dioxide layer provided on the first window layer;
A plurality of silicon nanometer crystals distributed within the silicon dioxide layer and having a size between 5 and 10 nm;
A second window layer provided on the silicon dioxide layer;
A transparent conductive layer provided on the second window layer;
A first ohmic contact electrode mounted on the transparent conductive layer;
An infrared light emitting device comprising: a second ohmic contact electrode attached to the lower surface.   The infrared light emitting device according to claim 1, wherein the silicon dioxide layer has a thickness of 1 to 10,000 nm.   2. The substrate according to claim 1, wherein the substrate is a p-type silicon substrate or an n-type silicon substrate, and the first window layer and the second window layer are made of microcrystalline silicon, amorphous silicon, or gallium nitride. The infrared light-emitting device described in 1.   2. The infrared light emitting device according to claim 1, wherein the transparent conductive layer is made of indium tin oxide, and the first ohmic contact electrode is made of aluminum, nickel, or an alloy thereof. An infrared light emitting device,
A substrate,
A first window layer provided on the substrate;
A silicon dioxide layer provided on the surface of the first window layer;
A plurality of silicon nanometer crystals distributed within the silicon dioxide layer and having a size between 5 and 10 nm;
A second window layer provided on the silicon dioxide layer;
A transparent conductive layer provided on the second window layer;
A first ohmic contact electrode mounted on the transparent conductive layer;
An infrared light emitting device comprising: a second ohmic contact electrode attached to a surface of the first window layer.   The infrared light emitting device according to claim 5, wherein the thickness of the silicon dioxide layer is between 1 and 10,000 nm.   6. The infrared light emitting device according to claim 5, wherein the first window layer and the second window layer are made of microcrystalline silicon, amorphous silicon, or gallium nitride.   6. The infrared light emitting device according to claim 5, wherein the transparent conductive layer is made of indium tin oxide, and the first ohmic contact electrode is made of aluminum, nickel, or an alloy thereof.   The infrared light-emitting element according to claim 5, wherein the substrate is a quartz substrate or an aluminum oxide substrate. A method for manufacturing an infrared light emitting device, comprising:
Providing the substrate,
Forming a deficient equivalent silicon oxide layer on the substrate, wherein the ratio of the number of oxygen atoms to the number of silicon atoms in the deficient equivalent silicon oxide layer is less than 2;
Converting the insufficient equivalent silicon oxide layer by at least a heat treatment step into a silicon dioxide layer having silicon nanometer crystals with a silicon nanometer crystal size between 5 and 10 nm;
A method for manufacturing an infrared light emitting device, comprising steps.   The low-equivalent silicon oxide layer is formed on the substrate by an atmospheric pressure chemical vapor deposition process, and the temperature of the atmospheric pressure chemical vapor deposition process is between 700 to 1100 ° C. Infrared light emitting device manufacturing method.   The method for manufacturing an infrared light emitting device according to claim 11, wherein the atmospheric pressure chemical vapor deposition step uses dichlorodihydrosilicon and dinitrogen monoxide as reaction gases.   The method for manufacturing an infrared light emitting device according to claim 12, wherein a flow rate ratio between the dichlorodihydrosilicon and dinitrogen monoxide is between 10: 1 and 1:10.   The method for manufacturing an infrared light emitting device according to claim 11, wherein the atmospheric pressure chemical vapor deposition step uses silane and dinitrogen monoxide as reaction gases.   The method for manufacturing an infrared light emitting device according to claim 14, wherein a flow rate ratio of the silane and dinitrogen monoxide is between 10: 1 and 1:10.   The method for manufacturing an infrared light emitting device according to claim 11, wherein the carrier gas in the atmospheric pressure chemical vapor deposition step is selected from the group consisting of hydrogen, nitrogen and argon.   The heat treatment step includes a first treatment step, the treatment temperature is between 800 and 1300 ° C, and the treatment time is between 1 and 300 minutes. Infrared light emitting device manufacturing method.   The method for manufacturing an infrared light emitting device according to claim 17, wherein the first treatment step is performed in a nitrogen or argon atmosphere.   The infrared light emission according to claim 17, further comprising a second treatment step, wherein the treatment temperature is between 500 and 600 ° C., and the treatment time is between 1 and 120 minutes. Device manufacturing method. The method for manufacturing an infrared light emitting device according to claim 19, wherein the second treatment step is performed in an argon atmosphere.

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