JP2006054593A - Oscillator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain an oscillator which can improve a manufacturing yield by widely taking a regulating range of an oscillation frequency. <P>SOLUTION: In the oscillator having a plurality of delay circuits connected annularly, each delay circuit has an inverter, a delay unit, and a delay fine regulator connected in series. The delay unit adds a delay according to the control voltage input from an external unit to an input signal. The delay fine regulator adds the delay according to the fine regulation signal input from the external unit to the input signal. Moreover, the delay fine regulator has a constant current circuit and a voltage control circuit. And, the voltage control circuit supplies a voltage according to a voltage control signal to the constant current circuit. Further, the constant current circuit supplies the current according to the voltage to each delay circuit. And, a plurality of delay circuits each adds the delay according to the current to the input signal. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an oscillator used for a phase-locked loop circuit or the like, and more particularly to an oscillator that can improve the manufacturing yield by widening the adjustment range of the oscillation frequency.

  In a phase locked loop (PLL) or the like, a voltage controlled oscillator (VCO) is used (for example, see Non-Patent Document 1).

FIG. 6 is a diagram showing a circuit configuration of a conventional voltage controlled oscillator. This oscillator is an oscillator that oscillates at a frequency corresponding to the control voltage V _CTRL and is a ring type oscillator in which an odd number of delay circuits 61 _{0 to} 61 _n−1 are connected in a ring shape.

Each delay circuit is connected to a power supply (power supply voltage V _dd ), and is connected to a ground point (ground voltage V _ss ) via a constant current circuit 62. Each delay circuit includes an inverter connected in series and one delay unit. A capacitive element such as a MOS varactor is used as the delay unit.

The oscillation frequency of this oscillator is determined by the delay amount of the delay circuit. Specifically, the frequency f of the oscillator, the delay amount t _pd per stage of the delay circuit, and the number N of stages of the delay circuit have the following relationship.
f = 1 / (2 × N × t _pd ) (Formula 1)
Therefore, unless the delay amount of each delay circuit is controlled with high accuracy, the frequency as specified cannot be obtained.

In the phase-locked loop circuit using this oscillator, when the oscillation frequency of the oscillator deviates due to fluctuations in power supply voltage, temperature, or manufacturing variation of each element, the oscillation frequency is detected and the control voltage V _CTRL is changed. Thus, the oscillation frequency of the oscillator is adjusted by adjusting the delay amount of the delay circuit by changing the capacitance of the capacitive element.

IEICE TRANS. ELECTRON, VOL. E82-C, NO. 7 JULY 1999 鄭 2V, 500MHz and 3V, 920MHz Low-Power Current-Mode 0.6um CMOS VCO Circuit

In the conventional oscillator, the like the oscillation frequency of the oscillator due to manufacturing variations of each element is largely deviated from the specification, when exceeds the adjustment range of the control voltage V _CTRL, only the oscillation frequency changes the control voltage V _CTRL There was a problem that it could not be adjusted.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain an oscillator capable of improving the manufacturing yield by widening the adjustment range of the oscillation frequency.

  The oscillator according to the present invention is an oscillator having a plurality of delay circuits connected in a ring shape, each delay circuit has an inverter, a delay unit and a delay fine adjustment unit connected in series, the delay unit, A delay according to the control voltage input from the outside is added to the input signal, and the delay fine adjustment unit adds a delay according to the fine adjustment signal input from the outside to the input signal. Other features of the present invention will become apparent below.

  According to the present invention, the production yield can be improved by widening the adjustment range of the oscillation frequency.

FIG. 1 is a diagram showing a circuit configuration of a voltage controlled oscillator according to an embodiment of the present invention. This oscillator is a ring type oscillator in which an odd number (n) of delay circuits 11 _{0 to} 11 _n−1 are connected in a ring shape, and oscillates at a frequency corresponding to the control voltage V _CTRL .

Each of the delay circuits 11 _{0 to} 11 _n−1 is connected to a power supply (power supply voltage V _dd ), and is connected to a ground point (ground voltage V _ss ) via the constant current circuit 12. Then, the control voltage _{V CTRL} input from the outside such as a counter (not shown), in accordance with the fine adjustment signal _{V TUNE} input from an external control circuit (not shown), each of the delay circuits ₁₁ 0 _{to 11 n- The} amount of delay ₁ adds to the input signal is adjusted.

The voltage control circuit 13 supplies a voltage corresponding to the voltage control signal _{VCS_SEL} input from the external control circuit to the constant current circuit 12. The constant current circuit 12 supplies a current corresponding to the voltage output from the voltage control circuit 13 to each delay circuit 11 _{0 to} 11 _n−1 . The delay added to the input signal by each delay circuit 11 _{0 to} 11 _n−1 is adjusted according to the current.

Here, assuming that the number of stages of the delay circuit is N = 7 and the delay amount per stage of the delay circuit is t _pd = 115 ps, from Equation 1, the frequency of the oscillator is f = 622 MHz. With this frequency as an initial set value, when the delay amount increases to 125 ps, the frequency becomes f = 571 MHz, and when the delay amount decreases to 105 ps, f = 680 MHz. Thus, the frequency can be adjusted by changing the delay amount.

FIG. 2 is a diagram illustrating a circuit configuration of each of the delay circuits 11 _{0 to} 11 _n−1 . Each delay circuit 11 _{0 to} 11 _n−1 includes an inverter 15, a delay unit 16, and a delay fine adjustment unit 17 connected in series.

A capacitive element such as a MOS varactor is used as the delay unit 16. Here, the delay unit 16 includes an n-type MOSFET 18. The MOSFET 18 has a gate connected to the output terminal of the inverter 15, a source and a drain connected in common, and a control voltage V _CTRL is input. Therefore, a capacitor having a gate insulating film as a capacitive insulating film is configured. Then, the load capacitance of the input signal is controlled by controlling the voltage at the connection between the drain and source of the MOSFET 18 by the control voltage V _CTRL . That is, the delay unit 16 adds a delay corresponding to the control voltage V _CTRL input from the outside to the input signal.

On the other hand, in the delay fine adjustment unit 17, m pairs are connected in series, with an n-type MOSFET whose initial setting is High and an n-type MOSFET whose initial setting is Low as one pair. The MOSFETs 19 _{0H to} 19 _{(m−1) H} whose initial setting of each pair is High have a gate connected to the output terminal of the inverter 15, and a source and a drain connected in common, and fine adjustment signals V _{TUNE0 H to} V _{TUNE (m -1) H} is input. Further, the MOSFETs 19 _{0L to} 19 _{(m−1) L} whose initial setting of each pair is Low have the gate connected to the output terminal of the inverter 15 and the source and the drain connected in common, and the fine adjustment signals V _{TUNE0L to} V _TUNE respectively. _{(M-1) L} is input. Then, the delay fine adjustment unit 17 inputs a delay according to a fine adjustment signal V _TUNE (V _{TUNE0H to} V _{TUNE (m−1) H} , V _{TUNE0L to} V _{TUNE (m−1) L} ) input from the outside. Append to signal.

The size of each pair of MOSFETs is determined so that the level of the fine adjustment signal V _TUNE can be switched between High (power supply voltage Vdd) and Low (ground voltage Vss) to adjust the delay amount and correct the frequency shift. Has been. Further, the number of pairs included in the fine delay adjustment unit 17 is determined in consideration of a margin of manufacturing variation.

Specifically, MOSFET 190H _{/ 0L} which is the first pair has a size (area) which changes the frequency of the oscillator by ± 10 MHz by switching the level of V _{TUNE0H / 0L} between High and Low. In this case, ₋₁₀ MHz is obtained by _changing V _TUNE0H from High to Low, and +10 MHz is obtained by _changing V _TUNE0L from Low to High. Similarly, the second pair MOSFET 19 _{1H / 1L} has a size that changes the frequency of the oscillator by ± 30 MHz by switching the level of V _{TUNE1H / 1L} , and the third pair MOSFET 19 _{2H / 2L} has a level of V _{TUNE2H / 2L} . Is set to a size that changes the frequency of the oscillator by ± 60 MHz. By combining these three pairs, frequency control of ± 100 MHz can be performed in increments of 10 MHz. Since the size of the transistor is proportional to the capacitance, in the above case, the size of the MOSFET 190H _{/ 0L} : the size of the MOSFET 19 _{1H / 1L} : the size of the MOSFET 19 _{2H / 2L} = 1: 3: 6. Thus, by changing the size of each pair of transistors, the number of transistors can be reduced as compared to making all pairs of transistors the same size.

  FIG. 3 is a diagram illustrating a circuit configuration of the voltage control circuit. The source of the n-type MOSFET 22 and one end of the resistor 23 are connected to the negative phase input terminal of the operational amplifier 21. The drain and gate of the n-type MOSFET 22 are connected to a power source, and the other end of the resistor 23 is connected to a ground point.

One end of resistors 24 _{0 to} 24 ₂ and the drain of n-type MOSFET 25 are connected to the positive phase input terminal of operational amplifier 21. The source of the MOSFET 25 is connected to the ground point. Further, the other end of the resistor ₂₄ 0 - 24 _2, and the MOSFET 26 ₀ ~ 26 ₂ of the drain of the p-type respectively, is n-type MOSFET 27 ₀ ~ 27 ₂ sources are connected. Then, the MOSFET 26 ₀ ~ 26 ₂ of the source, the drain of the MOSFET 27 ₀ ~ 27 ₂ is connected to a power source. Furthermore, through the MOSFET 26 ₀ ~ 26 _2, respectively inverters ₂₈ 0 to 28 ₂ to the gate, the MOSFET 27 ₀ ~ 27 ₂ gates directly to the respective voltage control signal _{V CS_SEL0} ~V _{CS_SEL2} inputted. That is, it has an analog switch configuration using a transfer gate. As a result, in the voltage control circuit, the amount of current flowing through the MOSFET 25 changes according to the setting of the voltage control signals V _{CS_SEL0 to} V _{CS_SEL2} , _causing a change in the output voltage of the operational amplifier 21.

  The output terminal of the operational amplifier 21 is connected to the gate of the MOSFET 25 and one end of the capacitor 29. The other end of the capacitor 29 is connected to the ground point.

  The voltage control circuit 13 having the above configuration can keep the output voltage constant by using feedback from the operational amplifier with respect to fluctuations in the power supply voltage and temperature. Thereby, the current supplied from the constant current circuit 12 to the delay circuit can be kept constant, and the oscillation frequency of the oscillator can be kept constant.

Further, the voltage supplied from the voltage control circuit 13 to the constant current circuit 12 can be adjusted by switching the voltage control signals V _{CS_SEL0 to} V _{CS_SEL2} . Thus, even when the oscillation frequency of the oscillator is greatly deviated from an ideal value due to large manufacturing variations, the voltage supplied from the voltage control circuit 13 to the constant current circuit 12 is adjusted, and the current supplied from the constant current circuit 12 to the delay circuit. Can be changed to bring the oscillation frequency of the oscillator closer to the ideal value.

For example, if a set _value, and the _{V CS_SEL0 High, Low} and _{V CS_SEL1,} Low and _{V CS_SEL2, 3100Ω} resistance value of the resistor 24 _0, 2200Omu the resistance value of the resistor 24 _1, the resistance value of the resistor 24 ₂ and 4800Ω The voltage supplied from the voltage setting circuit 13 to the constant current circuit 12 is 0.86 V, and the current supplied to the delay circuit is 1.06 mA.

From this state, when V _{CS_SEL0} is _changed from High to Low and V _{CS_SEL1} is _changed from Low to High, the voltage supplied to the constant current circuit is 1.01 V, and the current supplied to the delay circuit is 1.38 mA. As a result, the oscillation frequency of the oscillator can be increased by 110 MHz.

Further, when V _{CS_SEL0} is _changed from High to Low and V _{CS_SEL2} is _changed from Low to High, the voltage supplied to the constant current circuit is 0.72V and the current supplied to the delay circuit is 0.77 mA. As a result, the oscillation frequency of the oscillator can be lowered by 110 MHz.

  In this way, if the current supplied from the constant current circuit to the delay circuit is large, the delay amount decreases and the oscillation frequency increases. Conversely, if the current supplied from the constant current circuit to the delay circuit is small, the delay amount increases. As a result, the oscillation frequency decreases.

  FIG. 4 is a diagram showing the relationship between the control voltage and the oscillation frequency in the ideal state and the maximum variation state. In the ideal state, if the control voltage is adjusted to about 1.3 V, the oscillation frequency of the oscillator can oscillate at the specified oscillation frequency of 622 MHz. Further, even in the maximum fluctuation state in which the power supply voltage and the temperature fluctuate most with respect to the ideal state, the specified frequency of 622 MHz can be oscillated only by changing the control voltage.

FIG. 5 is a diagram showing the relationship of the oscillation frequency of the oscillator with respect to the control voltage in the ideal state, the high frequency state, and the adjusted state. In a high frequency state where the characteristics of the oscillator are shifted to the high frequency side due to manufacturing variations, even if the control voltage is adjusted, the oscillation frequency of the oscillator cannot be set to the specified oscillation frequency of 622 MHz. On the other hand, by setting the signal levels of V _TUNE and V _{CS_SEL} , the high frequency state can be adjusted to approach the ideal state. Further, the same adjustment can be performed even when the frequency shifts to a lower frequency side than the ideal state.

The signal levels of V _TUNE and V _{CS_SEL} may be set in advance when the IC is assembled. As a result, even if the oscillator is largely deviated from the ideal state due to manufacturing variations, it is adjusted to the ideal state when used by the user. Therefore, the frequency of the specification can be oscillated only by changing the control voltage without being conscious of the setting of the signal levels of V _TUNE and V _{CS_SEL} at the time of use by the user.

  As described above, the voltage controlled oscillator according to the embodiment of the present invention can improve the manufacturing yield by widening the adjustment range of the oscillation frequency.

Note that by using a CMOS with a process rule of 0.13 μm, this oscillator can be a very small oscillator with a low power consumption of 3 mA and 7 mW and a layout area of 260 × 290 μm = 75400 μm ² .

  In the above embodiment, the delay amount is adjusted by changing the voltage by changing the voltage. However, the present invention is not limited to this, and the delay is changed by changing the current and changing the capacitance, or by using a resistor. The amount may be adjusted.

It is a figure which shows the circuit structure of the voltage controlled oscillator which concerns on embodiment of this invention. It is a figure which shows the circuit structure of a delay circuit. It is a figure which shows the circuit structure of a voltage control circuit. It is a figure which shows the relationship between a control voltage and an oscillation frequency about an ideal state and the largest fluctuation | variation. It is a figure which shows the fluctuation characteristic of the oscillation frequency of an oscillator with respect to a control voltage about an ideal state, a high frequency state, and the state after adjustment. It is a figure which shows the circuit structure of the conventional voltage control type | mold oscillator.

Explanation of symbols

11 _{0 to} 11 _n−1 delay circuit 12 constant current circuit 13 voltage control circuit 15 inverter 16 delay unit 17 delay fine adjustment unit 18, 19 _{0L to} 19 _{(m−1) L} , _{190 H to} 19 _{(m−1) H} MOSFET

Claims (3)

In an oscillator having a plurality of delay circuits connected in a ring shape,
Each delay circuit has an inverter, a delay unit, and a delay fine adjustment unit connected in series,
The delay unit adds a delay according to a control voltage input from the outside to the input signal,
The delay fine adjustment unit adds a delay corresponding to a fine adjustment signal input from the outside to the input signal. A constant current circuit and a voltage control circuit;
The voltage control circuit supplies a voltage according to a voltage control signal input from the outside to the constant current circuit,
The constant current circuit supplies a current corresponding to the voltage to each delay circuit,
The oscillator according to claim 1, wherein a delay added to the input signal by each delay circuit is adjusted according to the current. A plurality of delay circuits connected in a ring;
A constant current circuit;
A voltage control circuit,
The voltage control circuit supplies a voltage according to a voltage control signal input from the outside to the constant current circuit,
The constant current circuit supplies a current corresponding to the voltage to each delay circuit,
The delay added to the input signal by each delay circuit is adjusted according to the current.

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