JP2006041710A - Signal delay device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a signal delay device for sufficiently delaying the received sound data, while suppressing the amount of stored sound data. <P>SOLUTION: The signal delay device receives sound data of a plurality of channels, delays the sound data and outputs the result, and is provided with a storage section 12 having storage areas to each of a plurality of the channels and storing the sound data of the corresponding channel to each of the storage areas, and a data control section 14. When it is required to delay the sound data of each of a plurality of the channels, the data control section 14 assigns an area of the storage section 12 with a size, in response to the delay time set to the channel, as the storage area of the channel. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a signal delay device that delays input audio data of a plurality of channels.

  In nature, sounds that humans hear are reflected on walls and ceilings in addition to those that reach the human ears directly from the source, and early reflections that reach the ears after a delay, and disappear while repeating complex reflections. There are rear reverberation and so on. By listening to these various sounds, humans can perceive the size and shape of the place. In recent years, in order to reproduce such a phenomenon, an audio system that provides a sense of reality by outputting sound from a plurality of speakers is becoming popular not only in theaters but also in general households.

  For example, “Dolby Digital,” a home cinema sound system adopted in the standard format of audio signals for DVDs (digital versatile discs), has a full range of 5 channels including 3 front channels and 2 rear channels, and a dedicated channel for bass. A total of 5.1 channels of audio with LFE (low frequency effect) can be reproduced independently. By arranging the speakers to which independent sounds are output at predetermined positions, it is possible to provide a sense of realism such that arrows fly from the left rear to the right front.

  However, since there are restrictions on the size of a car or a room where speakers are installed, there are cases where speakers cannot be placed at predetermined positions. In such a case, by delaying the input audio data of each channel by the time set for each channel, the audio output from each speaker is placed in an ideal position for each speaker. As with the case, it can reach the human ear. Then, natural and three-dimensional audio reproduction becomes possible.

  In general, the function of delaying audio data by a time set for each channel temporarily holds the audio data in a storage unit such as a memory, and stores the audio data held after the set delay time. This is realized by outputting. When delaying audio data of a plurality of channels, an area for temporarily storing audio data is required for each channel.

  For example, if the size of the audio data holding area for each channel is set to a fixed size, the holding area must have a size that can hold audio data for the maximum time required to be delayed (maximum delay time). is required. If a fixed-size area that can hold the audio data for the maximum delay time is secured, if the delay time is small, the audio data holding area may be small, so an extra area that is not used as a data holding area occurs in the storage unit Will do. Further, as the number of reproducible channels increases, the surplus area increases accordingly.

In order to eliminate such a surplus area and effectively use the storage unit, an audio data delay device has been proposed which aims to make the size of the holding area for each channel variable according to the delay time for each channel. (For example, refer to Patent Document 1).
JP 2004-32513 A

  However, when the input audio data is temporarily stored in the storage unit as in the above-described audio data delay device, the storage unit must always hold the audio data that does not need to be delayed. is there. In addition, since the input audio data is always stored as it is, a relatively large area is required as an audio data holding area.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a signal delay device that outputs an input audio data with a sufficient delay while suppressing the amount of audio data to be held.

  In order to solve the above-mentioned problems, the means of the invention of claim 1 is a signal delay device for inputting audio data of a plurality of channels, outputting the audio data with a delay, and outputting the audio data of the plurality of channels. When each of the holding areas has a storage area for storing audio data of a corresponding channel and each of the plurality of channels needs to be delayed, An area in the storage unit having a size corresponding to the delay time set for the channel is allocated as a holding area for the channel, and audio data of a channel corresponding to the holding area is written and written for each holding area. A point in time before the recorded audio data by the time corresponding to the delay time set for this channel In which and a data control unit that reads and outputs audio data of the channel.

  According to this, only for channels that need to delay audio data, an area of a size corresponding to the delay time set for each channel is allocated as a holding area for each channel, so the reserved area is not used. You can avoid being wasted. For this reason, a relatively long delay time can be set.

  According to a second aspect of the present invention, in the signal delay device according to the first aspect, the data control unit obtains a minimum delay time among delay times set for each of the plurality of channels, and For each of the plurality of channels, an area in the storage unit having a size corresponding to the difference between the delay time set for the channel and the minimum delay time is allocated as a holding area for the channel.

  According to this, the area allocated for each channel can be reduced while keeping the difference in delay time between the channels as set, so the capacity of the storage unit required for delaying the audio data is suppressed. be able to.

  According to a third aspect of the present invention, in the signal delay device according to the second aspect, the delay unit further outputs a delay corresponding to the minimum delay time with respect to the audio data read from the storage unit. It is to be prepared.

  According to this, since it is possible to give the audio data not the relative delay time between the channels but the absolute delay time as set, the audio and the It is possible to synchronize with the video to be supported.

  According to a fourth aspect of the invention, in the signal delay device according to the first aspect of the present invention, the data delay unit further includes a data conversion unit, and the data control unit may have a total size of areas allocated as the holding area exceeding a predetermined size. In a case where it is expected, a channel for data conversion is selected and notified to the data conversion unit, and the data conversion unit reduces the amount of audio data of the selected channel. When the audio data of the selected channel is read from the storage unit, the read audio data is converted so that the amount is restored. Output.

  According to this, since the size of the area allocated as the holding area can be suppressed, the delay time that can be set can be increased.

  According to a fifth aspect of the present invention, in the signal delay device according to the fourth aspect, when the conversion is performed so as to reduce the amount of audio data, the number of bits per sample of the audio data is reduced, and the amount of audio data is reduced. When converting back to the original, the data conversion unit is provided with a data accuracy adjustment unit that returns the number of bits per sample of the audio data.

  According to this, since the audio data is written to the storage unit after the number of bits for each sample is reduced, the capacity of the storage unit can be suppressed. Since only the number of bits for each sample is changed, data conversion can be easily performed.

  According to a sixth aspect of the present invention, in the signal delay device according to the fourth aspect, when the conversion is performed so as to reduce the amount of the audio data, the audio data is down-sampled so that the amount of the audio data is restored. At the time of conversion, a sampling rate conversion unit that upsamples the audio data is provided as the data conversion unit.

  According to this, since the audio data is written into the storage unit after the number of samples per unit time is reduced, the capacity of the storage unit can be suppressed.

  According to a seventh aspect of the present invention, in the signal delay device according to the fourth aspect, the data control unit selects a predetermined channel as a channel to which the data is to be converted.

  According to this, it is possible to avoid the deterioration of the voice quality of other channels by reducing the volume of the voice data only for the channel where the voice quality is not so required.

  According to the signal delay device of the present invention, an area having a size corresponding to a set delay time is allocated as a holding area for each channel, and audio data of a channel that is not delayed is not temporarily held. Therefore, the storage area is effectively used. be able to. In addition, since the amount of audio data to be stored can be reduced, a relatively wide range of delay time can be set even when the storage area that can be used for delay processing is limited.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a block diagram showing the configuration of the signal delay device according to the first embodiment of the present invention. The signal delay device in FIG. 1 includes a storage unit 12, a data control unit 14, and an internal memory unit 16. The internal memory unit 16 includes input / output data areas 16A, 16B,..., 16Z corresponding to channels 0 to N (N is a natural number). The input / output data areas 16A to 16Z all have the same capacity. Audio data ID0 to IDN of corresponding channels 0 to N are input to the input / output data areas 16A to 16Z, respectively.

  Data DL indicating the delay time to be given to the audio data of each channel is input to the data control unit 14. The delay time can be arbitrarily set by the user, such as 1 msec for channel 0 and 2 msec for channel 1.

  FIG. 2 is a memory map showing an arrangement example of the holding areas of the respective channels in the storage unit 12 of FIG. The data control unit 14 obtains the size and address of the holding area for temporarily holding the audio data for each channel according to the set delay time, and holds the area of the storage unit 12 for each channel. Allocate as space. However, the data control unit 14 sets a holding area for only a channel for which audio data needs to be delayed.

In the following, it is assumed that the delay time set for channel n (n is an integer equal to or greater than 0) is t _n , and the address that designates the holding area of channel _n is An. As an example, a case where the holding area of each channel secured in the storage unit 12 is used as a ring buffer will be described. Here, the delay time t ₂ for the channel 2 is 0.

In the case of channel 1, the size of the holding area needs to be a size that can store a certain amount of audio data stored in the input / output data area 16A and audio data for a delay time. That is, when the size of the audio data ID0 stored in the input / output data area 16A is S, the number of bytes of one sample of the audio data is d, and the sampling frequency is F, the size s ₀ of the holding area of the channel ₀ is s ₀ = S + d × F × t ₀ Data control unit 14 obtains the size s ₀ of the holding area of the channel 0, the address A ₀ of the holding region, among the storage unit 12, the start address of the area that can be used for delay processing.

Similarly, for the channels 1 to N, the data control unit 14 obtains the size _{n n} = S + d × F × t _n of the holding area of the channel n, and sets the address _An to A _n = A _n−1 + s _n−1 . Ask. Specifically, the address A ₁ of the holding area of channel ₁ is address A ₁ = A ₀ + s ₀ obtained by adding the size s ₀ of the holding area of channel 0 to the address A ₀ of the holding area of channel 0. Further, the delay time t ₂ for the channel 2 is 0, it is not necessary to ensure the holding area of the channel 2, the address A ₃ that specifies the storage area of the channel _{3, A 3 = A 2 = A} 1 + s 1 It becomes.

  As described above, the data control unit 14 secures the holding area only for the channel for delaying the audio data according to the delay time set for each channel, so that the storage unit 12 can be used effectively.

  FIG. 3A is an explanatory diagram showing the positions of the write pointer and the read pointer in one of the holding areas of the storage unit 12. FIG. 3B is an explanatory diagram showing a state after writing and reading are performed once each in FIG. FIG. 3C is an explanatory diagram showing a state after writing and reading are performed once in FIG. 3B. FIG. 3D is an explanatory diagram illustrating a state after writing and reading are performed once in FIG. 3C.

  With respect to each holding area used as a ring buffer, a write pointer indicating an address to which audio data is written and a read pointer indicating an address from which audio data is read will be described. As an example, channel 0 will be described.

The data control unit 14 sets the write pointer and the read pointer to the initial addresses WP1 and RP1, respectively. The address WP1 is the start address A ₀ of the holding area of the channel 0, and the address RP1 is at a position obtained by adding an address corresponding to the data size S from the address WP1. That is, the storage area of channel 0 of the storage unit 12 can store data of size S from address WP1 to address RP1. The remaining part of the holding area of channel 0 can store audio data of size dFt _{0 corresponding to} the delay time. It is assumed that 0 is written in each holding area.

  When the audio data ID0 of size S is stored in the input / output data area 16A, the data control unit 14 writes the data in the input / output data area 16A into the holding area of channel 0 in the storage unit 12.

  At this time, the data control unit 14 stores the input voice data A (size S) input from the input / output data area 16A in the address WP1 of the write pointer, and moves the write pointer to the address WP2. Address WP2 is the same as address RP1. Next, the data control unit 14 reads out audio data having the same size as the input audio data A from the position (RP1) of the read pointer, and stores it in the input / output data area 16A. At this time, the data control unit 14 moves the read pointer to the position of the address RP2. The address RP2 is at a position obtained by adding an address corresponding to the size S to the address RP1.

  Thereafter, when the audio data ID0 of size S is newly stored in the input / output data area 16A, the data control unit 14 writes the data in the input / output data area 16A in the holding area of the channel 0 in the storage unit 12.

The data control unit 14 stores the new input audio data B (size S) input from the input / output data area 16A at the address WP2, and moves the write pointer to the address WP3. The address WP3 is the same as the address RP2. Next, the data control unit 14 reads out audio data having the same size as the input audio data B from the position of the read pointer (RP2), and stores it in the input / output data area 16A. At this time, if the address corresponding to the size S of the input audio data B is added to the read pointer address RP2, the upper limit address of the holding area of the channel 0 is exceeded. Therefore, the data control unit 14, after adding the address only corresponding to the size S to the address RP2, move the read pointer to an address RP3 minus the address only corresponding to the size s ₀ of the holding area. Thereafter, the same operation is repeated.

  For the other channels 1, 3 to N, the same operation is performed in the holding region corresponding to each channel.

  The operation of the signal delay device shown in FIG. 1 will be described with reference to FIGS. When the audio data ID0 of size S is input and stored in the input / output data area 16A, the data control unit 14 writes the data in the input / output data area 16A in the holding area of channel 0 in the storage unit 12. Thereafter, the data control unit 14 reads the audio data of channel 0 from the holding area in the storage unit 12 by the size S and stores it in the input / output data area 16A.

The audio data read at this time is the audio data at the time point before the audio data of channel ₀ just written, by the delay time t ₀ . In other words, the data control unit 14 delays the audio data of this channel by the delay time t ₀ and outputs it. The internal memory unit 16 outputs the data in the input / output data area 16A as audio data OD0.

Similarly, when the audio data having the size S of the corresponding channel (referred to as channel n) is stored in any of the input / output data areas 16B to 16Z, the data control unit 14 stores the data in the input / output data area. Is written in the holding area of channel n in the storage unit 12. Thereafter, the data control unit 14 reads out the audio data of the channel n from the holding area in the storage unit 12 by the size S and stores it in the corresponding input / output data area. The audio data read at this time is the audio data at the time point before the data of channel _n just written by the delay time t _n . That is, the data control unit 14 delays the audio data of the channel n by the delay time t _n and outputs it. The internal memory unit 16 outputs the data in the input / output data area as audio data ODN.

  By repeating the above operation, a delay can be given to the audio data of each channel. However, for channels that do not need to be delayed, audio data is not written to and read from the storage unit 12.

In the case of reproducing only audio, only the difference in delay time between the channels is significant, and the following may be performed. First, the data control unit selects the minimum delay time from the delay times t _n of each channel based on the data DL indicating the delay time, and sets this as the reference delay time T. The data control unit 14 obtains a relative delay time t _n −T which is a difference between the delay time t _n of the channel n and the reference delay time T, and replaces this with the delay time of the channel n, and the signal delay device described above. It will be used in

  That is, the data control unit 14 obtains the size and address of the holding area for temporarily holding the audio data for each channel according to the obtained relative delay time, and sets the area of the storage unit 12 for each channel. Allocate as channel holding area.

In this case, a size that can store input audio data of size S and audio data for the relative delay time of channel n may be secured as the holding area of channel n. In other words, the size s _n of the holding area of the channel n is a _{s n = S + d × F} × (t n -T). Therefore, the data area for the reference delay time can be reduced, and the necessary holding area in the storage unit 12 can be reduced.

(Second Embodiment)
In the second embodiment, a signal delay device that is effective when sound is reproduced together with an image will be described. FIG. 4 is a block diagram showing a configuration of a signal delay device according to the second embodiment of the present invention. The signal delay device in FIG. 4 is the same as the signal delay device in FIG. 1 except that it includes a data control unit 214 instead of the data control unit 14 and further includes a delay unit 18. The other components are the same as those described with reference to FIG.

First, the data control unit 214, based on the data DL indicating the delay time, select the minimum delay time from the delay time t _n for each channel, and outputs to the delay unit 18 so as reference delay time T. Then, the relative delay time t _n −T, which is the difference between the delay time t _{n of} channel n and the reference delay time T, is used instead of the delay time of channel n.

  The internal memory unit 16 outputs the data in the input / output data areas 16A to 16Z to the delay unit 18. The delay unit 18 gives a delay of a reference delay time T to the data input from the input / output data areas 16A to 16Z, and outputs each as audio data OD0 to ODN. Other points are the same as those of the signal delay device of FIG.

According to the signal delay device of Figure 4, the size s _n of the holding area of the channel n is, s _n = S + since d × in F × (t _n -T) is sufficient, can reduce the data area of the reference delay time, A necessary holding area in the storage unit 12 can be reduced. Further, since the delay given to the audio data of each channel is the same as that of the signal delay device of FIG. 1, it can also be used when reproducing the audio together with the image.

(Third embodiment)
FIG. 5 is a block diagram showing a configuration of a signal delay device according to the third embodiment of the present invention. The signal delay device in FIG. 5 includes the data control unit 314 in place of the data control unit 14 in the signal delay device in FIG. 1, and further includes a data accuracy adjustment unit 22 as a data conversion unit. The other components are the same as those described with reference to FIG.

  Data DL indicating the delay time to be given to the audio data of each channel is input to the data control unit 314. The data control unit 314 obtains the holding area size and address of each channel to be set in the storage unit 12 according to the delay time of each channel.

  The data control unit 314 calculates the total size of the holding area, and converts the data if the total size of the area allocated as the holding area is expected to exceed the size of the available area in the storage unit 12. The channel to be selected is selected and notified to the data accuracy adjustment unit 22.

  When the total size of the obtained holding areas is larger than the size of the usable area in the storage unit 12, the data control unit 314 selects all the channels and obtains the obtained holding values for each channel, for example. An area that is half the size of the area is allocated as a holding area.

  When the data in the input / output data areas 16A to 16Z is written in the storage unit 12, the data control unit 314 outputs the data in the input / output data areas 16A to 16Z to the data accuracy adjustment unit 22. The data accuracy adjustment unit 22 converts the data in the input / output data areas 16A to 16Z so that the data accuracy (that is, the number of bits of each sample data) is ½ times for the selected channel, The channels not selected are written into the storage unit 12 without changing the data accuracy.

  When data is read from the storage unit 12, the data accuracy adjustment unit 22 restores the data accuracy of the converted data. That is, the data accuracy adjustment unit 22 reads the data from the storage unit 12, converts the selected channel so that the data accuracy (that is, the number of bits of each sample data) is doubled, and is not selected. The channel is output to the data control unit 314 without changing the data accuracy.

  According to the signal delay device of FIG. 5, it is possible to set a delay time that is twice as long, for example, as compared with the case where the process of reducing the data accuracy is not performed.

  Note that the channels that change the size of the holding area and the data accuracy may be all channels, or may be channels that have been determined in advance, for example, the rear channel or the LFE channel. When the rear channel or the LFE channel is selected, it is possible to set a relatively long delay time without degrading the data accuracy of a channel that has not been selected, for example, the front channel.

  Further, the data may be converted so that the number of bits of each sample data is reduced by a predetermined number of bits, and a holding area having a size corresponding to the data may be set.

(Fourth embodiment)
FIG. 6 is a block diagram showing a configuration of a signal delay device according to the fourth embodiment of the present invention. The signal delay device in FIG. 6 includes the data control unit 414 in place of the data control unit 314 in the signal delay device in FIG. 5, and further includes a sampling rate conversion unit 24 as a data conversion unit. The other components are the same as those described with reference to FIG.

  The data control unit 414 obtains the total size of the holding area, and converts the data when the total size of the area allocated as the holding area is expected to exceed the size of the available area in the storage unit 12. It is almost the same as the data control unit 314 except that a channel to be selected is selected and notified to the sampling rate conversion unit 24.

  When the total size of the obtained holding areas is larger than the size of the usable area in the storage unit 12, the data control unit 414 selects all the channels, for example, and obtains the obtained holding area for each channel. An area that is half the size of the area is allocated as a holding area.

When the data in the input / output data areas 16A to 16Z is written in the storage unit 12, the data control unit 414 outputs the data in the input / output data areas 16A to 16Z to the sampling rate conversion unit 24.
The sampling rate conversion unit 24 downsamples the data in the input / output data areas 16A to 16Z for the selected channel (that is, reduces the sampling rate), and changes the sampling rate for the channel that is not selected. Without writing to the storage unit 12. In downsampling, the sampling rate is halved, for example.

  When data is read from the storage unit 12, the sampling rate conversion unit 24 returns the sampling rate to the original channel for the channel whose sampling rate has been changed. That is, the sampling rate conversion unit 24 reads data from the storage unit 12, upsamples the selected channel (that is, increases the sampling rate), and changes the sampling rate for the unselected channel. And output to the data control unit 414.

  According to the signal delay device of FIG. 6, it is possible to set a delay time that is, for example, twice as long as the case of not performing the downsampling process.

  Note that the channels for changing the size of the holding area and the sampling rate may be all channels, or only predetermined channels, for example, the rear channel and the LFE channel. When the rear channel or the LFE channel is selected, a relatively long delay time can be set without reducing the sampling rate of a channel that has not been selected, for example, the front channel.

  Further, the sampling rate may be converted to another rate less than 1 time. In this case, a holding area having a size corresponding to the sampling rate may be set.

  As described above, the present invention can delay audio data of a plurality of channels, and thus is useful in an acoustic processing device that outputs audio data of a plurality of channels.

It is a block diagram which shows the structure of the signal delay apparatus which concerns on the 1st Embodiment of this invention. FIG. 2 is a memory map showing an example of arrangement of holding areas for each channel in the storage unit of FIG. 1. (A) is explanatory drawing which shows the position of the write pointer and read pointer in one of the holding | maintenance areas of a memory | storage part. (B) is explanatory drawing which shows the state after performing writing and reading once each in (a). (C) is explanatory drawing which shows the state after performing writing and reading once each in (b). (D) is explanatory drawing which shows the state after performing writing and reading once each in (c). It is a block diagram which shows the structure of the signal delay apparatus which concerns on the 2nd Embodiment of this invention. It is a block diagram which shows the structure of the signal delay apparatus which concerns on the 3rd Embodiment of this invention. It is a block diagram which shows the structure of the signal delay apparatus which concerns on the 4th Embodiment of this invention.

Explanation of symbols

12 storage units 14, 214, 314, 414 data control unit 16 internal memory units 16A to 16Z input / output data area 18 delay unit 22 data accuracy adjustment unit (data conversion unit)
24 Sampling rate converter (data converter)

Claims (7)

A signal delay device that receives audio data of a plurality of channels, outputs the audio data with a delay, and
A storage unit having a holding area for each of the plurality of channels, and storing the audio data of the corresponding channel in each of the holding areas;
For each of the plurality of channels, when it is necessary to delay the audio data of the channel, an area in the storage unit having a size corresponding to the delay time set for the channel is allocated as a holding area for the channel, For each holding area, the audio data of the channel corresponding to the holding area is written, and the audio data of this channel at the time point before the written audio data by the time corresponding to the delay time set for this channel And a data control unit that reads and outputs the signal delay unit. The signal delay device according to claim 1,
The data control unit
Of the delay times set for each of the plurality of channels, a minimum delay time is obtained, and for each of the plurality of channels, the delay time set for the channel and the minimum delay time are set. A signal delay device characterized in that an area in the storage unit having a size corresponding to the difference between the two is allocated as a holding area for the channel. The signal delay device according to claim 2, wherein
A signal delay device, further comprising: a delay unit that outputs the audio data read from the storage unit with a delay corresponding to the minimum delay time. The signal delay device according to claim 1,
A data conversion unit;
The data control unit
When the total size of the area allocated as the holding area is expected to exceed a predetermined size, the channel for data conversion is selected and notified to the data conversion unit,
The data converter is
The audio data of the selected channel is converted so that the amount thereof is reduced and output to the storage unit, and when the audio data of the selected channel is read from the storage unit, it is read. A signal delay device characterized in that the converted audio data is converted so as to return to the original amount and output. The signal delay device according to claim 4, wherein
When converting so that the amount of audio data is reduced, the number of bits per sample of the audio data is reduced, and when converting so that the amount of audio data returns to the original amount, A signal delay device comprising a data accuracy adjustment unit that restores the number of bits as the data conversion unit. The signal delay device according to claim 4, wherein
When converting so that the amount of audio data is reduced, the audio data is downsampled, and when converting so that the amount of audio data is restored, a sampling rate conversion unit for upsampling the audio data is provided. A signal delay device provided as the data converter. The signal delay device according to claim 4, wherein
The data control unit
A signal delaying device for selecting a predetermined channel as a channel for converting the data.

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