JP2006024801A - Resistance element, and semiconductor integrated device using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a resistance element capable of achieving a sufficiently precise resistance, and to provide a semiconductor integrated device that uses the same. <P>SOLUTION: The resistance element comprises a semiconductor substrate 11, a conductor 13 formed on the main surface of the semiconductor substrate 11 via an insulating film 12, a polysilicon resistance body 15 formed on the conductor 13 via an insulating film 14, a conductor 17 formed on the polysilicon resistance body 15 via an insulating film 16, and a means for applying a voltage across the conductors 13 and the conductor 17. The application of an electric field to the polysilicon resistance body 15 generates stress therein, and this, due to to piezoelectric effect, causes shifting in the direction of higher resistance or in the direction of lower resistance. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a resistance element and a semiconductor integrated device using the same, and more particularly to a resistance element capable of obtaining a sufficiently accurate resistance value and a semiconductor integrated device using the same.

  Polysilicon resistance elements are used in various semiconductor devices because they have higher insulation from a semiconductor substrate on which a semiconductor element is formed than diffused resistance elements, but have the disadvantage of poor resistance value accuracy. .

  Conventionally, in order to make up for this drawback, the resistance value of the manufactured polysilicon resistor is measured, and if the measured value is out of the design value, the polysilicon resistor is processed by trimming or the like to obtain the resistance value. Is corrected to match the design value.

  In addition, when the resistance value of the polysilicon resistor is measured and the measured value is higher than the design value, the impurity having the same conductivity type as the impurity doped in the polysilicon layer is used. A method is also known in which the resistance value of the polysilicon resistor is made to coincide with the design value by ion-implanting these impurities in an amount corresponding to the resistance value deviating from the design value.

  However, such a correction method has a problem that the manufacturing process of the polysilicon resistor becomes complicated and a long time is required for the correction, so that the throughput is poor.

  On the other hand, a polysilicon resistance element is known in which the resistance value can be changed according to an external bias condition after the polysilicon resistor is manufactured (see, for example, Patent Document 1 or Patent Document 2).

  In the polysilicon resistance element disclosed in Patent Document 1, a resistance value control electrode is provided on a polysilicon resistor via an insulating film, and a voltage is applied between the resistance value control electrode and the polysilicon resistor. Applied.

  Similarly, in the polysilicon resistance element disclosed in Patent Document 2, a resistance value control electrode is provided in the lateral direction of the polysilicon resistor via an insulating film, and the resistance value control electrode, the polysilicon resistor, A voltage is applied between the two.

  When a voltage is applied between the resistance control electrode and the polysilicon resistor, a charge inducing layer is formed near the interface between the insulating film and the polysilicon resistor depending on the polarity of the voltage, and a positive or negative charge is induced. Become so.

  When a charge of the conductivity type opposite to that of the polysilicon resistor is induced, a depletion layer is formed from the surface of the polysilicon resistor to the inside, so that the current path cross-sectional area of the polysilicon resistor is reduced. The polysilicon resistor can be set to various high resistance values.

However, the polysilicon resistance element disclosed in Patent Document 1 or Patent Document 2 has a problem that it is easy to change the resistance value in the high direction, but it is difficult to change it in the low direction.
Japanese Patent Application Laid-Open No. 63-211666 (2 pages, FIG. 1) Japanese Unexamined Patent Publication No. 2000-1507778 (page 3, FIG. 1)

  A resistance element capable of obtaining a resistance value with sufficient accuracy and a semiconductor integrated device using the resistance element are provided.

  The resistance element of one embodiment of the present invention includes a substrate, a first conductor formed on the main surface of the substrate via a first insulating film, and a second insulating film formed on the first conductor. And a second conductor formed on the resistor via a third insulating film, and means for applying a voltage to the first and second conductors.

  According to another aspect of the present invention, a resistive element surrounds the resistor in a direction parallel to the substrate, a resistor formed on the main surface of the substrate via an insulating film, and the main surface of the substrate. The coil-shaped conductors are spaced apart from each other, and means for passing a current through the coil-shaped conductor.

  According to the present invention, a sufficiently accurate polysilicon resistance element and a semiconductor integrated device using the same can be provided.

  Embodiments of the present invention will be described below with reference to the drawings.

  1A and 1B are diagrams showing a configuration of a polysilicon resistance element according to Embodiment 1 of the present invention. FIG. 1A is a plan view thereof, and FIG. 1B is taken along line AA in FIG. It is sectional drawing which cut | disconnected and looked at the arrow direction.

  As shown in FIG. 1, a polysilicon resistance element 10 is formed on a main surface of a semiconductor substrate 11 with an insulating film 12 interposed therebetween, and on the conductor 13 with an insulating film 14 interposed therebetween. It has a polysilicon resistor 15 doped with impurities, a conductor 17 formed on the polysilicon resistor 15 via an insulating film 16, and an insulating film 18 formed on the conductor 17. .

  Furthermore, one end portion of the polysilicon resistor 15 is electrically connected to the connection pad 20 via a via connection portion 19 formed in a predetermined portion of the insulating films 16 and 18, and the other end portion is connected via the via connection portion 21. The connection pad 22 is electrically connected. The polysilicon resistor 15 is connected to an external circuit (not shown) via connection pads 20 and 22.

  The conductors 13 and 17 are, for example, polysilicon layers, and one end of the conductor 13 is electrically connected to the connection pad 24 via the via connection portion 23 formed in a predetermined portion of the insulating films 14, 16 and 18. One end portion of the conductor 17 is electrically connected to the connection pad 26 via a via connection portion 25 formed in a predetermined portion of the insulating film 18. The conductors 13 and 17 are connected to an external power source (not shown) via connection pads 24 and 26.

  Since the polysilicon resistor 15 is formed on the semiconductor substrate 11 via the insulating films 12 and 14 for electrical insulation and is covered with the insulating films 16 and 18, the polysilicon resistor 15 and the insulating film 12 are covered. , 14, 16, 18 or the stress due to the difference in thermal expansion coefficient between the insulating films 12, 14, 16, 18 is inherent.

  Furthermore, since the semiconductor substrate 11 is placed on the lead frame and molded with resin, the polysilicon resistor 15 is also stressed by the resin.

  As a result, the resistance value of the polysilicon resistor 15 is shifted in a higher direction than the resistance value when there is no stress due to the piezoresistance effect.

That is, assuming that the resistance value of the polysilicon resistor 15 is R and the variation amount of the resistance value due to stress is ΔR, the rate of change ΔR / R of the resistance value is expressed by Equation 1.
ΔR / R = πl · Tl + πt · Tt (1)
Here, πl and Tl indicate the piezoresistance coefficient and stress in the direction parallel to the current flow direction, and πt and Tt indicate the piezoresistance coefficient and stress in the direction perpendicular to the current flow direction. The greater the stresses Tl and Tt, the greater the resistance value variation ΔR.

  FIG. 2 is a diagram showing the sheet resistance of Samples 1 to 3 in which insulating films having different two-layer structures are formed on the polysilicon resistor 15, respectively. The width is about 2 μm, the thickness is about 250 nm, and the impurity concentration is about 3.2E15 cm. When a silicon nitride film by a plasma CVD (Chemical vapor Deposition) method and a silicon oxynitride film by a plasma CVD method are formed on the polysilicon resistor 15 of −3, the sample 2 is silicon nitride by a low pressure plasma CVD method. When the silicon nitride oxide film is formed by the plasma CVD method, the sample 3 shows the case where the silicon nitride film by the low pressure CVD method and the silicon oxide film by the atmospheric pressure CVD method are formed.

  As shown in FIG. 2, according to the experiment, even if the same polysilicon resistor 15 is used, the stress inherent in the polysilicon resistor 15 differs depending on the type of insulating film to be coated. The sheet resistance was different and the amount of strain of the resistor 15 due to stress was estimated to be about 2 to 5%.

  FIG. 3 is a diagram schematically showing the electric field distribution applied to the polysilicon resistor 15 when the voltage V is applied to the conductors 13 and 17.

As shown in FIG. 3, when a voltage V is applied to the conductors 13 and 17, a force F shown in Expression 2 is applied to a current i flowing through the polysilicon resistor 15.
F = q · E = (i / v) · (V / d) (2)
Here, q is the amount of charge per unit volume of the polysilicon resistor 15, E is the electric field strength between the conductors 13 and 17, v is the speed at which the charge q moves in the length direction of the polysilicon resistor 15, d indicates the distance between the conductors 13 and 17.

  As a result, a stress is generated in the polysilicon resistor 15 in a direction perpendicular to the direction in which the current i flows and in a direction perpendicular to the semiconductor substrate 11. When this stress is in the same direction as the stress Tt of the polysilicon resistor 15, the stress Tt Therefore, ΔR increases due to the piezoresistive effect, and the resistance value R shifts in a higher direction.

  On the other hand, in the direction opposite to the stress Tt of the polysilicon resistor 15, the stress Tt decreases, so that ΔR becomes small due to the piezoresistive effect, and the resistance value R shifts in the lower direction.

  Therefore, when the resistance value of the polysilicon resistor 15 is measured and the measured value is higher than the design value, the conductor 13 is set so that the stress Tt is reduced by an amount corresponding to the resistance value deviating from the design value. , 17 is controlled in magnitude and direction of voltage V applied.

  On the other hand, when the measured value is lower than the design value, the magnitude of the voltage V applied to the conductors 13 and 17 and the direction of application are controlled so that the stress Tt increases.

  As a result, it is possible to make the resistance value of the polysilicon resistor 15 coincide with the design value or to make it sufficiently close.

  According to the experiment, the variation of the resistance value of the conventional polysilicon resistance element from the design value is about ± 10%, whereas the value of ± 2% or less is obtained for the polysilicon resistance element 10.

  FIG. 4 is a diagram showing a semiconductor integrated device using the polysilicon resistance element 10 shown in FIG. As shown in FIG. 10, in the semiconductor integrated device 27, the base B1 is connected to the input terminal Vin1, the collector C1 is connected to the power supply Vcc through the polysilicon resistance element 28, and the emitter E1 is connected to the power supply Vee through the resistor Re. A connected transistor Q1, a base B2 connected to the input terminal Vin2, a collector C2 connected to the power supply Vcc via the polysilicon resistance element 29, and an emitter E2 commonly connected to the resistor Re; A differential amplifier circuit formed on the same chip is configured.

  As is well known, an output signal proportional to the difference between the signals input to the input terminals Vin1 and Vin2 is obtained from the output terminals Vout1 and Vout2.

  By controlling the magnitude and application direction of the output voltages of the power supplies V1 and V2, it is possible to obtain the polysilicon resistance elements 28 and 29 having the same resistance value, and the resistance pairing necessary for the differential amplifier circuit is ensured. it can.

  As described above, according to the present embodiment, the stress in the direction perpendicular to the current flow direction of the polysilicon resistor 15 and perpendicular to the semiconductor substrate 11 is controlled by applying an electric field from the outside. Due to the piezoresistive effect, the resistance value of the polysilicon resistor 15 can be changed to both high and low directions.

  Therefore, the accuracy of the resistance value of the polysilicon resistor can be easily improved. As a result, a sufficiently accurate polysilicon resistance element and a semiconductor integrated device using the same can be provided.

  Although the case where bipolar transistors are used as the transistors Q1 and Q2 is described here, a junction field effect transistor or an insulated gate field effect transistor can be used when a high input impedance is required.

  5A and 5B are diagrams showing the configuration of a polysilicon resistance element according to Example 2 of the present invention, in which FIG. 5A is a plan view thereof, and FIG. 5B is taken along line BB in FIG. 5A. It is sectional drawing which cut | disconnected and looked at the arrow direction.

In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, description thereof will be omitted, and different portions will be described.
This embodiment is different from the first embodiment in that the conductor is disposed on the same plane as the polysilicon resistor.

  That is, as shown in FIG. 5, the polysilicon resistance element 30 is opposed to one end portion along the length direction of the polysilicon resistor 15 formed on the main surface of the semiconductor substrate 11 with the insulating film 12 interposed therebetween. It has the formed conductor 31 and the conductor 32 formed to be opposed to the other end portion.

  Furthermore, the conductor 31 is electrically connected to the connection pad 34 through a via connection portion 33 formed at a central portion of the conductor 31 in a predetermined portion of the insulating film 16. Similarly, the conductor 32 is electrically connected to the connection pad 36 via a via connection portion 35 formed at a central portion of the conductor 32 at a predetermined portion of the insulating film 16. The conductors 31 and 32 are connected to an external power source (not shown) via connection pads 34 and 36.

  FIG. 6 is a diagram schematically showing the electric field distribution applied to the polysilicon resistor 15 when the voltage V is applied to the conductors 31 and 32.

  As shown in FIG. 6, when a voltage V is applied to the conductors 31 and 32, an electric field in a direction parallel to the semiconductor substrate 11 is applied to the polysilicon resistor 15, and the polysilicon resistor 15 is applied to the polysilicon resistor 15 as shown in Equation 2. Stress occurs in a direction perpendicular to the direction of current flow and parallel to the semiconductor substrate 11.

  When this stress is in the same direction as the stress Tt of the polysilicon resistor 15, the stress Tt increases, so that ΔR increases due to the piezoresistance effect, and the resistance value R shifts in the higher direction.

  On the other hand, in the direction opposite to the stress Tt of the polysilicon resistor 15, the stress Tt decreases, so that ΔR becomes small due to the piezoresistive effect, and the resistance value R shifts in the lower direction.

  As a result, it is possible to make the resistance value of the polysilicon resistor 15 coincide with the design value or to make it sufficiently close.

  As described above, according to the present embodiment, since an electric field is applied from the outside, the stress in the direction perpendicular to the direction of current flow in the polysilicon resistor 15 and parallel to the semiconductor substrate 11 is controlled. There is an advantage that a great effect can be obtained when the main component of the stress inherent in the polysilicon resistor is in a direction parallel to the semiconductor substrate 11.

  Here, the separation distance between the polysilicon resistor 15 and the conductors 31 and 32 is not particularly limited as long as the target resistance value can be obtained, and is not constant along the length direction of the polysilicon resistor 15. It doesn't matter.

  7A and 7B are diagrams showing the structure of a polysilicon resistance element according to Example 3 of the present invention, in which FIG. 7A is a plan view thereof, and FIG. 7B is taken along line CC in FIG. 7A. It is sectional drawing which cut | disconnected and looked at the arrow direction.

  In the present embodiment, the same components as those in the first embodiment and the second embodiment are denoted by the same reference numerals, description thereof will be omitted, and different portions will be described.

  As shown in FIG. 7, the polysilicon resistor element 50 includes a polysilicon resistor 15, conductors 13 and 17 disposed on a different plane from the polysilicon resistor 15, and the same plane as the polysilicon resistor 15. It has conductors 31 and 32 arranged on top.

  FIG. 8 is a diagram schematically showing the electric field distribution applied to the polysilicon resistor 15 when the voltage V is applied to the conductors 13, 17, 31, 32. FIG. When a positive voltage is applied to 31 and a negative voltage is applied to the conductors 13 and 32, FIG. 8B illustrates a case where a positive voltage is applied to the conductor 17 and a negative voltage is applied to the conductors 13, 31, and 32. ) Shows a case where a positive voltage is applied to the conductors 13 and 17 and a negative voltage is applied to the conductors 31 and 32.

  As shown in FIG. 8A, when a positive voltage is applied to the conductive pairs 17 and 31 and a negative voltage is applied to the conductors 13 and 32, the electric field distribution from the conductive pair 17 to the conductor 32 and the conductor 31 to the conductor 13 are applied. Two electric field distributions of the electric field distribution leading to

  As shown in FIG. 8B, when a positive voltage is applied to the conductor 17 and a negative voltage is applied to the conductors 13, 31, 32, a divergent electric field distribution from the conductive pair 17 to the conductors 13, 31, 32 is generated. Arise.

  As shown in FIG. 8C, when a positive voltage is applied to the conductors 13 and 17 and a negative voltage is applied to the conductors 31 and 32, the cuff-like shape extends from the conductive pair 17 and the conductor 13 to the conductors 31 and 32, respectively. An electric field distribution occurs.

  As a result, stress is generated in both the vertical and horizontal directions perpendicular to the direction of current flow and perpendicular to the semiconductor substrate 11. When the stress in both directions is the same as the stress Tt of the polysilicon resistor 15, the stress Tt increases. Therefore, ΔR increases due to the piezoresistive effect, and the resistance value R shifts in the higher direction.

  On the other hand, in the direction opposite to the stress Tt of the polysilicon resistor 15, the stress Tt decreases, so that ΔR becomes small due to the piezoresistive effect, and the resistance value R shifts in the lower direction.

  As a result, it is possible to make the resistance value of the polysilicon resistor 15 coincide with the design value or to make it sufficiently close.

  As described above, according to the present embodiment, an external electric field is applied to control stresses in both the vertical and horizontal directions perpendicular to the semiconductor substrate 11 and perpendicular to the current flow direction of the polysilicon resistor 15. Therefore, there is an advantage that the resistance value can be controlled more finely even when the stress distribution inherent in the polysilicon resistor is complicated.

  9A and 9B are diagrams showing the structure of a polysilicon resistance element according to Example 4 of the present invention. FIG. 9A is a plan view thereof, and FIG. 9B is taken along the line DD in FIG. It is sectional drawing which cut | disconnected and looked at in the arrow direction.

In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, description thereof will be omitted, and different portions will be described.
This embodiment is different from the first embodiment in that the polysilicon resistor is surrounded by a coiled conductor.

  That is, as shown in FIG. 9, the polysilicon resistance element 70 includes a polysilicon resistor 15 and a coiled conductor 71 formed so as to surround the polysilicon resistor 15 in a direction parallel to the main surface of the semiconductor substrate 11. have.

  Further, one end portion of the coiled conductor 71 is electrically connected to the connection pad 73 via a via connection portion 72 formed in a predetermined portion of the insulating films 14, 16, 18, and the other end portion is connected to the via connection portion 74. Through the connection pad 75. The coiled conductor 71 is connected to an external current source (not shown) via connection pads 73 and 75.

  The coiled conductor 71 is three-dimensionally crossed with the L-shaped conductors 76 a, 76 b, and 76 c formed on the insulating film 12 so as to three-dimensionally intersect the polysilicon resistor 15, and the polysilicon resistor 15 on the insulating film 16. L-shaped conductors 77a and 77b are formed so that the L-shaped conductors 76a, 76b and 76c and the L-shaped conductors 77a and 77b are connected via via connection portions 78a, 78b, 78c and 78d. Are alternately connected in a coil shape.

  The L-shaped conductors 76a, 76b, 76c, 77a, and 77b preferably have a resistance value as low as possible because current flows.

  FIG. 10 is a diagram schematically showing a magnetic field distribution applied to the polysilicon resistor 15 when a current j is passed through the coiled conductor 71.

As shown in FIG. 10, when a current j flows through the coiled conductor 71, a force F shown in Equation 3 is applied to the current i flowing through the polysilicon resistor 15.
F = q · v × B (3)
Here, q is the amount of charge per unit volume of the polysilicon resistor 15, v is the speed at which the charge q moves in the length direction of the polysilicon resistor 15, and B is generated by the current j flowing through the coiled conductor 71. The magnetic field is shown.

  As a result, the polysilicon resistor 15 receives a force in a direction perpendicular to the direction of movement of the electric charge q. Therefore, stress occurs, and in the same direction as the stress Tt of the polysilicon resistor 15, the stress Tt increases. Due to the piezoresistive effect, ΔR increases and the resistance value R shifts in the higher direction.

  On the other hand, in the direction opposite to the stress Tt of the polysilicon resistor 15, the stress Tt decreases, so that ΔR becomes small due to the piezoresistive effect, and the resistance value R shifts in the lower direction.

  As described above, according to the present embodiment, since the magnetic field is applied from the outside to control the stress in the direction perpendicular to the current flow direction of the polysilicon resistor 15, the resistance value of the polysilicon resistor is controlled. Can be changed in both high and low directions.

  In the above-described embodiments, the case where the conductor is polysilicon has been described. However, the present invention is not limited to this, and any conductor that can withstand the thermal process of the manufacturing process may be used. For example, a refractory metal silicide film It does not matter.

FIG. 2A is a plan view of the polysilicon resistance element according to the first embodiment of the present invention, and FIG. 2B is a cross-sectional view taken along the line AA in FIG. Sectional view seen in the direction of the arrow. The figure which shows an example of the relationship between the insulating film formed on the polysilicon resistor which concerns on Example 1 of this invention, and sheet resistance. The figure which shows typically electric field distribution applied to the polysilicon resistor which concerns on Example 1 of this invention. 1 is a diagram showing a configuration of a semiconductor integrated device using a polysilicon resistance element according to Embodiment 1 of the present invention. FIG. 4A is a plan view of the polysilicon resistance element according to Example 2 of the present invention, and FIG. 4B is a cross-sectional view taken along line BB in FIG. 4A. Sectional view seen in the direction of the arrow. The figure which shows typically electric field distribution applied to the polysilicon resistor which concerns on Example 2 of this invention. FIG. 7A is a plan view of a polysilicon resistor element according to Example 3 of the present invention, and FIG. 7B is a cross-sectional view taken along line CC in FIG. 7A. Sectional view seen in the direction of the arrow. The figure which shows typically electric field distribution applied to the polysilicon resistor which concerns on Example 3 of this invention. FIG. 9A is a plan view of a polysilicon resistor element according to Example 4 of the present invention, and FIG. 9B is a cross-sectional view taken along line DD in FIG. 9A. Sectional view seen in the direction of the arrow. The figure which shows typically magnetic field distribution applied to the polysilicon resistor which concerns on Example 4 of this invention.

Explanation of symbols

10, 28, 29, 30, 50, 70 Polysilicon resistance element 11 Semiconductor substrate 12, 14, 16, 18 Insulating film 13, 17, 31, 32 Conductor 19, 21, 23, 25, 33, 35, 72, 74, 78a, 78b, 78c, 78d Via connection portion 20, 22, 24, 26, 34, 36, 73, 75 Connection pad 27 Semiconductor integrated device 71 Coiled conductors 76a, 76b, 76c, 77a, 77b L-shape Conductor Q1, Q2 Transistor Re Resistance Vcc, Vee, V1, V2 Power supply Vin1, Vin2 Input terminal Vout1, Vout2 Output terminal

Claims (5)

A substrate,
A first conductor formed on the main surface of the substrate via a first insulating film;
A resistor formed on the first conductor via a second insulating film;
A second conductor formed on the resistor via a third insulating film;
Means for applying a voltage to the first and second conductors;
A resistance element comprising: A substrate,
A resistor formed on the main surface of the substrate via an insulating film;
A first conductor formed on the insulating film so as to be spaced from and opposed to one end of the resistor;
A second conductor formed on the insulating film so as to be spaced apart from the other end of the resistor;
Means for applying a voltage to the first and second conductors;
A resistance element comprising: A substrate,
A first conductor formed on the main surface of the substrate via a first insulating film;
A resistor formed on the first conductor via a second insulating film;
A second conductor formed on the second insulating film so as to be opposed to one end of the resistor;
A third conductor formed on the second insulating film so as to be spaced apart from the other end of the resistor;
A fourth conductor formed on the resistor via a third insulating film;
Means for applying a voltage to the first to fourth conductors;
A resistance element comprising: A substrate,
A resistor formed on the main surface of the substrate via an insulating film;
A coiled conductor formed so as to surround the resistor in a direction parallel to the main surface of the substrate;
Means for passing a current through the coiled conductor;
A resistance element comprising: The base is connected to the first input signal, the collector is connected to the first power source via the first resistor according to any one of claims 1 to 4, and the emitter is connected to the second power source via the second resistor. A first transistor connected to a power source;
The base is connected to the second input signal, the collector is connected to the first power supply via the third resistor according to any one of claims 1 to 4, and the emitter is commonly connected to the second resistor. A second transistor,
Are integrated and formed on the same chip.

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