JP2006019807A - Communication method and apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a communication method and apparatus for correcting a deviation in timing between a base station apparatus and a terminal apparatus even when a distance between the base station apparatus and the terminal apparatus is increased. <P>SOLUTION: A signal processing section 14 carries out signal processing necessary for transmission/reception processing by an adaptive array antenna. A control section 20 controls timing and channel arrangement of a wireless section 12, a signal processing section 14, a modem section 18 and a base band section 18. The control section 20 discriminates whether or not a packet signal received from a terminal 26 for timing control includes an error. The control section switches CRC bits included in the packet signal or an EVM of the packet signal and use it. Further, the control section 20 generates frame timing to execute communication with a terminal 26. The control section 20 controls timing to transmit in the case of transmitting the packet signal to be earlier for a terminal 26 with a greater delay in the received packet signal. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a communication technique, and more particularly to a communication method and apparatus for transmitting a packet format signal.

  In mobile communication systems such as a simple mobile phone system and a mobile phone system, a base station device generally connects a plurality of terminal devices. When such a multiple access method is TDMA (Time Division Multiple Access), one frame is formed by a plurality of time slots, and the base station apparatus assigns each of the plurality of time slots to the terminal apparatus. Further, the base station device and the terminal device transmit packet signals in the corresponding time slots. On the other hand, the terminal apparatus and the base station apparatus that have received the packet signal execute error detection as line monitoring. That is, based on a CRC (Cyclic Redundancy Check) bit added to the packet signal, it is monitored whether there is an error in the received packet signal (see, for example, Patent Document 1).

JP 2000-23237 A

  In order to perform communication between the base station apparatus and the terminal apparatus, timing must be synchronized between them. Generally, when the terminal apparatus synchronizes with the timing generated by the base station apparatus, timing synchronization between the two is established. In that case, a terminal device performs timing synchronization with respect to the packet signal received from the base station apparatus. However, since the base station apparatus and the terminal apparatus are separated by a predetermined distance, a predetermined period is required until the packet signal transmitted from the base station apparatus is received by the terminal apparatus. There is a difference in timing between the base station apparatus and the terminal apparatus. In order to allow this deviation, a guard time is generally provided in the time slot. As a result, if the delay of the packet signal due to the timing difference is within the guard time, the packet signal can be received. However, if the distance between the base station apparatus and the terminal apparatus increases and the timing shift increases, the delay of the packet signal becomes larger than the guard time, and interference occurs in the packet signals between the plurality of terminal apparatuses.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a communication method and apparatus that corrects a timing shift between a base station apparatus and a terminal apparatus.

  In order to solve the above problems, a communication apparatus according to an aspect of the present invention detects a known signal from a packet signal received in a predetermined time slot, and detects a known signal among the time slots. A comparison unit that compares a timing with a predetermined reference timing and a timing at which a known signal is detected correspond to a timing before a predetermined reference timing, and is placed at the rear of the received packet signal. On the basis of the check bits, whether the received packet signal is correct or not is correct, and if the timing at which the known signal is detected corresponds to a timing after a predetermined reference timing, the modulation accuracy of the received packet signal is increased. And a determination unit that determines whether the received packet signal is correct or not based on the derived modulation accuracy.

An example of the “check bit” is a CRC bit, but is not limited to this and may be an error detection code.
According to this aspect, even if the check bit cannot be detected, the correctness of the packet signal is determined using the modulation accuracy of the packet signal, so that the error determination can be performed even if the delay of the packet signal increases.

The reference timing in the comparison unit may be determined based on the timing at which at least a part of the check bits arranged in the rear part of the received packet signal is out of the time slot.
“Determined based on the timing that deviates from the time slot” means that the timing at which the check bit deviates from the time slot is specified, and a predetermined value is added to or subtracted from the specified value. Even if it is other than the above, it may be determined by performing a predetermined process.

  The comparison unit further determines another reference timing at a timing later than a predetermined reference timing in the time slot, and the determination unit determines that the timing at which a known signal is detected is a different reference If it corresponds to a timing later than the timing, the correctness of the received packet signal may be determined based on the data obtained by demodulating the packet signal. Another reference timing in the comparison unit may be determined based on a timing at which all of the check bits arranged in the rear part of the received packet signal are out of the time slot. Even when all of the check bits overlap the subsequent time slot, it is possible to determine whether the packet signal is correct or not based on the data obtained by demodulation, so that error determination can be performed.

  It further includes a processing unit that performs adaptive array signal processing on the packet signals received by each of the plurality of antennas, and the determination unit includes one of the signal points where the signal included in the packet signal is to be placed, and the packet signal that has been subjected to adaptive array signal processing. The modulation accuracy of the packet signal may be derived based on the signal point of the signal included in the packet signal. Since the packet signal is demodulated after adaptive array signal processing, the transmission quality can be improved. If the timing at which the determination unit detects a known signal corresponds to a timing before a predetermined reference timing, the packet signal is transmitted from the predetermined timing to the communication device corresponding to the received packet signal. If the timing at which a known signal is detected corresponds to a timing later than a predetermined reference timing, the communication device corresponding to the received packet signal is transferred from the timing before the predetermined timing. You may further provide the transmission part which starts transmission of a packet signal. If the delay of the received packet signal is large, the transmission timing of the packet signal is shifted forward, so that the delay can be reduced when the packet signal is received after returning.

  Another aspect of the present invention is a communication method. The method includes detecting a known signal from a packet signal received in a predetermined time slot, comparing a timing at which the known signal is detected in the time slot, and a predetermined reference timing, If the timing at which the known signal is detected corresponds to the timing before the predetermined reference timing, the correctness of the received packet signal is determined based on the check bit arranged at the rear of the received packet signal. If the step and the timing at which the known signal is detected correspond to a timing later than a predetermined reference timing, the modulation accuracy of the received packet signal is derived, and the received packet is based on the derived modulation accuracy. Determining whether the signal is correct or incorrect.

  The reference timing in the comparing step may be determined based on a timing at which at least a part of the check bits arranged in the rear part of the received packet signal is out of the time slot. In the comparing step, another reference timing is further determined at a timing later than a predetermined reference timing in the time slot, and a timing at which a known signal is detected is determined to be higher than a predetermined other reference timing. If it corresponds to the later timing, it may further comprise a step of determining whether the received packet signal is correct or not based on data obtained by demodulating the packet signal. Another reference timing in the comparing step may be determined based on a timing at which all of the check bits arranged at the rear of the received packet signal are out of the time slot.

  The method further includes the step of adaptive array signal processing of the packet signals respectively received by the plurality of antennas, and the step of determining whether the received packet signal is correct or not based on the derived modulation accuracy includes arranging a signal included in the packet signal. The modulation accuracy of the packet signal may be derived based on one of the signal points to be processed and the signal point of the signal included in the packet signal subjected to adaptive array signal processing. In the step of comparing, if the timing at which the known signal is detected corresponds to a timing before the predetermined reference timing, the packet signal is transmitted from the predetermined timing to the communication device corresponding to the received packet signal. If the timing at which transmission is started and a known signal is detected corresponds to a timing later than a predetermined reference timing, the timing before the predetermined timing is transmitted to the communication device corresponding to the received packet signal. The method may further comprise the step of starting transmission of the packet signal.

  Yet another embodiment of the present invention is a program. This program detects a known signal from a packet signal received in a predetermined time slot via a wireless network, a timing at which a known signal is detected in the time slot, and a reference stored in a memory in advance. If the timing at which the known signal is detected and the timing at which the known signal is detected correspond to the timing before the reference timing stored in the memory in advance, the timing is based on the check bit arranged at the rear of the received packet signal. If the timing of detecting the correctness of the received packet signal and outputting the result and the timing of detecting the known signal correspond to a timing later than the reference timing stored in the memory in advance, the received packet signal And derives the received packet based on the derived modulation accuracy. Determining correctness of items, and a step of outputting the result to the computer.

  The reference timing in the comparing step may be determined based on a timing at which at least a part of the check bits arranged in the rear part of the received packet signal is out of the time slot. In the comparing step, another reference timing is further determined at a timing later than a predetermined reference timing in the time slot, and a timing at which a known signal is detected is determined to be higher than a predetermined other reference timing. If it corresponds to the later timing, it may further comprise a step of determining whether the received packet signal is correct or not based on data obtained by demodulating the packet signal. Another reference timing in the comparing step may be determined based on a timing at which all of the check bits arranged at the rear of the received packet signal are out of the time slot.

  The method further includes a step of performing adaptive array signal processing on packet signals respectively received by a plurality of antennas, and determining whether the received packet signal is correct or not based on the derived modulation accuracy and outputting the result is included in the packet signal The modulation accuracy of the packet signal may be derived based on one of the signal points where the processed signal is to be arranged and the signal point of the signal included in the packet signal subjected to adaptive array signal processing. In the step of comparing, if the timing at which the known signal is detected corresponds to a timing before the predetermined reference timing, the packet signal is transmitted from the predetermined timing to the communication device corresponding to the received packet signal. If the timing at which transmission is started and a known signal is detected corresponds to a timing later than a predetermined reference timing, the timing before the predetermined timing is transmitted to the communication device corresponding to the received packet signal. The method may further comprise the step of starting transmission of the packet signal.

  It should be noted that any combination of the above-described constituent elements and a conversion of the expression of the present invention between a method, an apparatus, a system, a recording medium, a computer program, etc. are also effective as an aspect of the present invention.

  ADVANTAGE OF THE INVENTION According to this invention, the shift | offset | difference of the timing between a base station apparatus and a terminal device can be correct | amended.

  Before describing the present invention in detail, an outline will be described. An embodiment of the present invention relates to a base station apparatus of a simple mobile phone system. The base station apparatus sets a frame composed of eight time slots. The eight time slots are composed of four uplink time slots and four downlink time slots, and one uplink time slot and one downlink time slot are allocated to one terminal apparatus. Communicate with the device. The base station apparatus receives a packet signal from the terminal apparatus in a predetermined time slot.

  In addition, a guard time is provided at the last part of the time slot, and a CRC bit is provided in the preceding stage of the guard time. The base station apparatus determines whether or not an error is included in the packet signal received from the terminal apparatus in a predetermined time slot based on the CRC bit. As the distance between the terminal device and the base station device increases, the delay of the packet signal received from the terminal device also increases. Furthermore, if the delay of the packet signal increases until the CRC bit is out of the time slot, it is impossible to determine whether the packet signal contains an error by the CRC bit, and the packet signal cannot be received.

  If the packet signal is delayed to the extent that the CRC bits are contained in the time slot, the base station apparatus according to the present embodiment determines whether the packet signal includes an error with the CRC bits as in the conventional case. On the other hand, if the CRC bit does not fit in the time slot, the EVM (Error Vector Magnitude) of the packet signal is measured to determine whether the packet signal contains an error based on the EVM. That is, if the EVM is small, it is determined that no error is included in the packet signal. Furthermore, if the CRC bit does not fit in the time slot, the base station apparatus advances the transmission start timing of the packet signal when transmitting the packet signal to the terminal apparatus in a predetermined time slot. The terminal device establishes timing synchronization with the base station device based on the packet signal received from the base station device, but the timing of starting transmission of the packet signal is advanced, so that the terminal device and the base station device Even if the distance is long, the timing error between the terminal apparatus and the base station apparatus becomes small. Therefore, the transmission start timing of the packet signal from the terminal device to the base station device is also advanced, and the delay time of the packet signal received by the base station device is also reduced. Since the above processing can be executed in units of one terminal device, the other terminal devices can be processed as usual, and the processing can be simplified.

  FIG. 1 shows a configuration of a communication system 100 according to an embodiment of the present invention. The communication system 100 includes a base station device 10, a terminal device 26, and a network 24. The base station apparatus 10 includes a first antenna 22a, a second antenna 22b, an nth antenna 22n, a radio unit 12, a signal processing unit 14, a modem unit 16, a baseband unit 18, and a control unit 20, which are collectively referred to as an antenna 22. It is connected to the network 24. The terminal device 26 includes an antenna 34. The radio unit 12 includes a first radio unit 12a, a second radio unit 12b, and an Nth radio unit 12n. In addition, the radio unit control signal 318, the modem unit control signal 320, the baseband unit control signal 322, and the signal processing unit control signal 330 are included as signals. In the communication system of FIG. 1, the base station apparatus 10 connects one terminal apparatus 26, but actually a plurality of terminal apparatuses 26 can be connected, and the distance from the terminal apparatus 26 varies.

  The baseband unit 18 is an interface with the network 24, and performs transmission / reception processing of an information signal to be transmitted in the communication system. Further, error correction and automatic retransmission processing may be performed, but description thereof is omitted here.

  The modem unit 16 modulates an information signal to be transmitted by a modulation method of π / 4 shift QPSK (Quadrature Phase Shift Keying) as modulation processing. Further, as a demodulation process, the received signal is demodulated and the transmitted information signal is reproduced. An instruction necessary for executing the modulation process and the demodulation process is given from the control unit 20 by the modem unit control signal 320.

  The signal processing unit 14 performs signal processing necessary for transmission / reception processing by the adaptive array antenna. Details will be described later. The radio unit 12 performs frequency conversion processing, amplification processing, AD or DA conversion processing between a baseband signal and a radio frequency signal processed by the signal processing unit 14, the modem unit 16, and the baseband unit 18. The antenna 22 performs transmission / reception processing of radio frequency signals. The antenna directivity may be arbitrary, and the number of antennas 22 is N.

  The control unit 20 controls the timing and channel arrangement of the radio unit 12, the signal processing unit 14, the modem unit 16, and the baseband unit 18. Although details will be described later, the control unit 20 determines whether an error is included in the packet signal received from the terminal device 26. For the determination, the CRC bit included in the packet signal or the EVM of the packet signal is switched and used. The EVM of the packet signal is also measured. Further, the control unit 20 generates frame timing, arranges eight time slots in one frame, and executes communication with the terminal device 26. Here, control is performed so as to stop the timing to be transmitted when transmitting the packet signal to the terminal device 26 in which the delay of the received packet signal is large.

  This configuration can be realized in terms of hardware by a CPU, memory, or other LSI of an arbitrary computer, and in terms of software, it is realized by a program having a reservation management function loaded in memory. The functional block realized by those cooperation is drawn. Accordingly, those skilled in the art will understand that these functional blocks can be realized in various forms by hardware only, software only, or a combination thereof.

  FIG. 2 shows a frame format configuration in the communication system 100. As described above, one frame shown in the upper part is composed of eight time slots, and here, it is indicated by “first time slot” to “eighth time slot”. Further, as shown in the figure, “first time slot” through “fourth time slot” are used for the uplink, and “fifth time slot” through “eighth time slot” are used for the downlink. For example, the base station apparatus 10 assigns “second time slot” and “sixth time slot” to one terminal apparatus 26 and communicates with the terminal apparatus 26.

  The lower part shows the structure of one time slot. Since the base station apparatus 10 and the terminal apparatus 26 transmit a packet signal having such a structure, it can be said that the structure of the packet signal. “R” is “ramp”, and is set to a value that gradually increases the amplitude of the packet signal. “SS” is a “start symbol” and indicates the start of a packet signal. “PR” is a “preamble” and is used for timing synchronization and the like. “UW” is a “unique word” and is used to identify the packet signal. Subsequently, “CI” and “SA” are arranged. “DATA” is “data” and includes information to be transmitted. “CRC” is a “CRC bit” and is used to determine whether an error is included in the packet signal. “G” is a “guard time”, and is a period in which no signal is actually transmitted and no signal is transmitted. Here, since “PR” is a known signal, it is used as a training signal described later.

  3A to 3D show the relationship between time slots and packet signals in the communication system 100. FIG. FIG. 3A shows a case where a packet signal is contained in one time slot. FIG. 3B shows a case where the packet signal is delayed from the state of FIG. 3A and “G” overlaps with the subsequent time slot. Even in such a state, since “CRC” is included in the time slot, it can be determined by “CRC” whether an error is included in the packet signal. Furthermore, although “G” overlaps with the subsequent time slot, since the signal is not included in “G” substantially, the packet signal arranged in the subsequent time slot does not interfere. As a result, in the state of FIG. 3B, communication is performed as in FIG. In such a state, the timing at which “SS” is arranged in the time slot is referred to as “first reference timing”. The first reference timing is determined based on a timing at which at least a part of “CRC” arranged in the received packet signal is out of the time slot. If the timing of the SS included in the received packet signal corresponds to the timing before the first reference timing, it is determined by CRC whether the packet signal contains an error.

  FIG. 3C shows a case where the packet signal is delayed from the state of FIG. 3B and a part of “CRC” overlaps with the subsequent time slot. FIG. 3D shows a case where the packet signal is delayed from the state of FIG. 3C and “CRC” overlaps with the subsequent time slot. In FIG. 3C and FIG. 3D, since the entire “CRC” is not included in the time slot, it cannot be determined by “CRC” whether or not an error is included in the packet signal. In such a case, the base station apparatus 10 measures the EVM of the packet signal, and determines whether the packet signal contains an error based on the measured EVM.

  Even in the state of FIG. 3D, the portion of the data signal included in the packet signal is included in the time slot. In such a state, the timing at which “SS” is arranged in the time slot is referred to as “second reference timing”. The second reference timing is determined based on a timing at which all of the “CRC” arranged in the received packet signal is out of the time slot. On the other hand, when the reception of the packet signal is later than the second reference timing, a part of the data signal included in the packet signal is not included in the time slot. When the reception of the packet signal becomes later than the second reference timing, it is determined whether the packet signal contains an error after demodulating the data.

  FIG. 4 shows the configuration of the first radio unit 12a. The first radio unit 12a includes a switch unit 36, a receiving unit 38, and a transmitting unit 40. Furthermore, the reception unit 38 includes a frequency conversion unit 42, a quadrature detection unit 44, an AGC (Automatic Gain Control) 46, and an AD conversion unit 48. The transmission unit 40 includes an amplification unit 50, a frequency conversion unit 52, and a quadrature modulation unit 54. DA converter 56 is included. Further, the signal includes a first digital reception signal 300 a generically referred to as a digital reception signal 300 and a first digital transmission signal 302 a generically referred to as a digital transmission signal 302.

The switch unit 36 switches input / output of signals to and from the reception unit 38 and the transmission unit 40 based on an instruction of the radio unit control signal 318.
The frequency conversion unit 42 of the reception unit 38 and the frequency conversion unit 52 of the transmission unit 40 perform frequency conversion between a radio frequency signal and one or a plurality of intermediate frequency signals.

  The AGC 46 automatically controls the gain so that the amplitude of the frequency-converted signal becomes an amplitude within the dynamic range of the AD converter 48. The AD converter 48 converts a baseband analog signal into a digital signal. The quadrature detection unit 44 generates a baseband digital signal from the intermediate frequency signal through quadrature detection. In general, a baseband signal contains two components, an in-phase component and a quadrature component, so it should be indicated by two signal lines. Shown by signal line. The same applies to the following.

The DA converter 56 converts a baseband digital signal into an analog signal. The quadrature modulation unit 54 generates an intermediate frequency signal from the baseband analog signal by quadrature modulation. Here, a digital signal output from the AD conversion unit 48 is a digital reception signal 300, and a digital signal input to the DA conversion unit 56 is a digital transmission signal 302.
The amplifying unit 50 amplifies a radio frequency signal to be transmitted.

  FIG. 5 shows the configuration of the signal processing unit 14. The signal processing unit 14 includes a reference signal generation unit 72, a reception weight vector calculation unit 70, a synthesis unit 68, a reception response vector calculation unit 200, a transmission weight vector calculation unit 76, and a separation unit 74. Further, the combining unit 68 includes a first multiplying unit 78a, a second multiplying unit 78b, an Nth multiplying unit 78n, and an adding unit 80, which are collectively referred to as a multiplying unit 78, and the separating unit 74 is collectively referred to as a multiplying unit 82. A first multiplier 82a, a second multiplier 82b, and an Nth multiplier 82n are included.

  Also, the signals are collectively referred to as a composite signal 304, a pre-separation signal 306, a first reception weight vector 308a, a second reception weight vector 308b, an Nth reception weight vector 308n, and a transmission weight vector 310. A first transmission weight vector 310a, a second transmission weight vector 310b, an Nth transmission weight vector 310n, a reference signal 312 and a reception response vector 402.

  The reference signal generation unit 72 stores “PR” shown in FIG. 2, outputs the stored “PR” as the reference signal 312 during the training period, and determines the composite signal 304 after the training ends. The determined signal is output as a reference signal 312. Note that the end of the training period is notified by a signal processing unit control signal 330 from the control unit 20 (not shown).

ここで、Ｗは受信ウエイトベクトル３０８、μは忘却係数、ｕは、デジタル受信信号３００、ｅは符号間干渉を示した誤差、すなわち合成信号３０４と参照信号３１２との間の誤差を示す。
乗算部７８は、デジタル受信信号３００を受信ウエイトベクトル３０８で重み付けする。加算部８０は、乗算部７８からの出力を加算して、合成信号３０４を出力する。 The reception weight vector calculation unit 70 calculates a reception weight vector 308 necessary for weighting the digital reception signal 300 by an adaptive algorithm such as an RLS (Recursive Least Squares) algorithm or an LMS (Least Mean Squares) algorithm. The calculation of the adaptive algorithm is performed based on the digital received signal 300, the synthesized signal 304, and the reference signal 312. For example, the LMS algorithm is shown as follows: The same applies to the RLS algorithm.

Here, W is a received weight vector 308, μ is a forgetting factor, u is a digital received signal 300, and e is an error indicating intersymbol interference, that is, an error between the synthesized signal 304 and the reference signal 312.
Multiplier 78 weights digital reception signal 300 with reception weight vector 308. The adder 80 adds the outputs from the multiplier 78 and outputs a combined signal 304.

  The reception response vector calculation unit 200 calculates a reception response vector 402 as the reception response characteristic of the reception signal with respect to the transmission signal. Here, for convenience of explanation, the number of terminal devices 26 is two. Among them, the first terminal device 26 is a communication target, and the second terminal device 26 is not a communication target but corresponds to an interference source. Therefore, it is assumed that a signal related to the second terminal device is input from the second signal processing unit 14 (not shown) or the like. In addition, when not considering the 2nd terminal device 26 as an interference source, you may delete the term relevant to a 2nd terminal device from the following description. For convenience of explanation, the number of antennas 22 is assumed to be four. An input signal vector X (t) corresponding to the digital received signal 300 is expressed as follows.

ここで、Ｓｒｘｉ（ｔ）は、ｉ番目の端末装置２６が送信した信号を示す。さらに、Ｘ（ｔ）は、前述のごとく入力信号ベクトルであり、デジタル受信信号３００のそれぞれをＲＸｊ（ｔ）とすれば、次のように示される。なお、ｊは図示しないアンテナ２２の番号であり、Ｔは行列の転置を示す。

また、Ｈｉは受信応答ベクトル４０２であり、ｊ番目のアンテナ２２で受信されたｉ番目の端末装置２６からの信号の応答係数をｈｉｊで示せば、Ｈｉは次のように示される。

Here, Srxi (t) indicates a signal transmitted by the i-th terminal device 26. Further, X (t) is an input signal vector as described above, and is expressed as follows if each digital received signal 300 is RXj (t). Here, j is the number of the antenna 22 (not shown), and T indicates transposition of the matrix.

In addition, Hi is a reception response vector 402. If the response coefficient of the signal from the i-th terminal device 26 received by the j-th antenna 22 is represented by hij, Hi is represented as follows.

さらに、Ｎ（ｔ）は雑音ベクトルであり、ｊ番目のアンテナ２２で受信された信号、すなわちｊ番目のデジタル受信信号３００に含まれた雑音をｎｊ（ｔ）で示せば、Ｎ（ｔ）は次のように示される。

ここで、信号処理部１４においてアダプティブアレイが正常に動作していれば、複数の端末装置２６からの信号を分離できるので、前述のＳｒｘｉ（ｔ）はすべて既知の信号になる。なお、この条件に関係なく、トレーニング信号の期間においても、前述のＳｒｘｉ（ｔ）はすべて既知の信号になる。これらを利用すれば、受信応答ベクトル４０２は以下の通りに導出できる。

Furthermore, N (t) is a noise vector, and if the noise received in the jth antenna 22, that is, the noise contained in the jth digital received signal 300 is denoted by nj (t), N (t) is It is shown as follows.

Here, if the adaptive array is operating normally in the signal processing unit 14, the signals from the plurality of terminal devices 26 can be separated, so that the above-mentioned Srxi (t) becomes all known signals. Regardless of this condition, all of the aforementioned Srxi (t) are known signals even during the training signal period. Using these, the reception response vector 402 can be derived as follows.

ここで、Ｅはアンサンブル平均を示すが、ここではアンサンブル平均の処理を時間平均の処理におきかえるものとする。時間平均の処理が十分長い期間実行されれば、次のようになる。

これは、Ｓｒｘ１（ｔ）とＳｒｘ２（ｔ）の間に相関がなく、さらにＳｒｘ１（ｔ）とＮ（ｔ）の間に相関がないためである。以上のように受信応答ベクトル４０２に対応したＨ１は、次のように示される。

If an ensemble average is calculated based on the signal Srx1 (t) from the first terminal device 26, it is shown as follows.

Here, E represents an ensemble average. Here, the ensemble average process is replaced with a time average process. If the time-average processing is executed for a sufficiently long period, the following occurs.

This is because there is no correlation between Srx1 (t) and Srx2 (t), and there is no correlation between Srx1 (t) and N (t). As described above, H1 corresponding to the reception response vector 402 is expressed as follows.

  The transmission weight vector calculation unit 76 estimates the transmission weight vector 310 necessary for weighting the pre-separation signal 306 from the reception weight vector 308 and the reception response vector 402 that are reception response characteristics. The method for estimating the transmission weight vector 310 is arbitrary, but as the simplest method, the reception weight vector 308 may be used as it is. Alternatively, the reception weight vector 308 or the reception response vector 402 may be corrected by a conventional technique in consideration of the Doppler frequency fluctuation in the propagation environment caused by the time difference between the reception process and the transmission process. Here, for simplification of explanation, the reception response vector 402 is used to estimate the transmission weight vector 310. However, the reception weight vector 308 input by a signal line (not shown) may be used.

ここでも受信応答ベクトル計算部２００の説明と同様にアンテナ２２の数を４とした。なお、ｑは、ｑ番目の端末装置２６を示し、パケット信号を送信すべき端末装置２６の他に、アンテナ指向性のヌルを向けようとする端末装置２６も考慮しているものとする。また、ｉは時刻である。所定の端末装置２６に対する送信ウエイトベクトル３１０は、次のように示される。

ここで、ｑは２以上とする。さらに、拘束条件として、以下の条件ｃ１）、ｃ２）を課す。

The reception response vector 402 has already been derived by the reception response vector calculation unit 200. Considering the Doppler frequency variation for the reception response vector 402, the predicted value for the reception response vector 402 is shown as follows.

Here, the number of antennas 22 is set to four as in the description of the reception response vector calculation unit 200. In addition, q indicates the q-th terminal device 26, and it is assumed that the terminal device 26 that tries to direct the antenna directivity null is considered in addition to the terminal device 26 that should transmit the packet signal. I is a time. The transmission weight vector 310 for a given terminal device 26 is shown as follows.

Here, q is 2 or more. Furthermore, the following conditions c1) and c2) are imposed as constraint conditions.

  The estimation of the transmission weight vector 310 is not limited to this, and may be performed by a method using a pseudo correlation value or a method of directing a beam toward a predetermined terminal device 26. In particular, regarding the method of using the pseudo correlation value, for example, the document: T.W. Ohgane, Y .; Ogawa, and K.K. Itoh, Proc. VTC '97, vol. 2, pp. 725-729, May 1997, and the like.

  Multiplier 82 weights pre-separation signal 306 with transmission weight vector 310 and outputs digital transmission signal 302.

  FIG. 6 shows the configuration of the control unit 20. The control unit 20 includes a detection unit 110, a storage unit 112, a comparison unit 114, a determination unit 116, and a transmission timing processing unit 118.

  The detection unit 110 detects “SS” from the packet signal received in a predetermined time slot via the radio unit control signal 318 or the signal processing unit control signal 330. The storage unit 112 stores the first reference timing and the second reference timing in FIG. 3 as the reference timing.

  The comparison unit 114 compares the timing at which “SS” is detected by the detection unit 110 with the first reference timing and the second reference timing stored in the storage unit 112 in the time slot.

  If the detected timing of “SS” corresponds to the timing before the first reference timing, that is, corresponds to FIGS. 3A and 3B, the determination unit 116 arranges the received SS in the received packet signal. Whether the received packet signal is correct or not is determined based on the received “CRC”. Here, the correctness / incorrectness of the packet signal by CRC is the same as in the prior art, and the description thereof is omitted. It is assumed that the demodulated signal is input via modem control signal 320 or baseband control signal 322 for CRC detection. Here, if an error is detected by an error check by CRC, the received packet signal is assumed to be incorrect, and the result is output.

  If the detected timing of “SS” corresponds to the timing after the first reference timing and before the second reference timing, the determination unit 116 derives the EVM. It should be noted that a signal to be processed is input via the modem unit control signal 320 or the signal processing unit control signal 330 in order to derive the EVM. The EVM is derived as follows.

  FIG. 7 shows an outline of the EVM calculated by the determination unit 116, and here shows π / 4 shift QPSK symbol points on the IQ coordinate plane. Black circles in the figure indicate original π / 4 shift QPSK symbol points, that is, signal points at which signals included in the packet signal are to be arranged, and X marks indicate received symbol points of received signals, that is, adaptive array signal processing. The signal point of the signal included in the packet signal is shown. Since adaptive signal processing is performed in the signal processor 14, the π / 4 shift QPSK symbol point corresponds to the result of the adaptive array signal processing. As shown in the figure, the received symbol point of the received signal is deviated from the original π / 4 shift QPSK symbol point due to noise and interference waves on the transmission path. The deviation indicated by the arrow in the figure is EVM. The EVM is, for example, Wayne Music, Broadcom Corp. In "Statistical Analysis of Noise Measurement Accuracy" (IEEE P802.15 Wireless Personal Networks, March 8, 2001).

The determination unit 116 calculates the EVM as follows. If the coordinates of the original π / 4 shift QPSK symbol point in FIG. 7 are (di, dq) and the received symbol point is (yi, yq), the EVM is expressed as follows.
(Equation 12)
EVM = (yi-di) ² + (yq-dq) ²
Note that details regarding the calculation of EVM are described in the above-mentioned document, and thus description thereof is omitted here. Returning to FIG. The determination unit 116 compares the calculated EVM with a predetermined threshold value, and if the EVM is larger than the threshold value, the received packet signal is assumed to be incorrect and the result is output.

  When the detected timing of “SS” corresponds to the timing after the second reference timing, the determination unit 116 acquires the data obtained by demodulating the packet signal. Data obtained by demodulating the packet signal is input via the modem unit control signal 320 or the baseband unit control signal 322. Here, the data obtained by demodulating the packet signal includes dummy data and significant data, that is, information to be transmitted, and the dummy data is arranged at the subsequent stage of the significant data. Therefore, due to the delay of the packet signal, dummy data overlaps with the subsequent time slot, and further, the packet signal delays, and significant data overlaps with the subsequent time slot. If significant data does not overlap the subsequent time slot, there may be no problem in communication. If significant data overlaps the subsequent time slot, the determination unit 116 assumes that the received packet signal is incorrect and outputs the result. That is, the determination is made based on the data contents. The determination unit 116 also performs UW determination in addition to the above determination, and outputs a result assuming that the received packet signal is incorrect when one of the two is incorrect. Also good.

  If the timing at which “SS” is detected by the determination unit 116 corresponds to a timing before the first reference timing, the transmission timing processing unit 118 sends a predetermined time to the terminal device 26 corresponding to the received packet signal. The transmission of the packet signal is started in the slot, specifically, in any of the fifth time slot to the eighth time slot in FIG. On the other hand, if the timing at which “SS” is detected corresponds to a timing later than the first reference timing, the terminal device 26 corresponding to the received packet signal is overlapped with the time slot preceding the predetermined time slot. After the packet signal is shifted forward, transmission of the packet signal is started.

  3A will be described as an example. The packet signal is further shifted to the left side so that “R” and “SS” of the packet signal overlap with the preceding time slot. The amount by which the packet signal is shifted at a time may be determined based on the timing at which “SS” is detected and the first reference timing. That is, the packet signal is greatly shifted as the timing at which “SS” is detected is significantly delayed from the first reference timing. Further, the amount by which the packet signal is shifted at a time may be determined according to the window size such as an open aperture or a narrow aperture when the terminal device 26 detects the packet signal. Here, the reference is described as the first reference timing, but the reference is not limited thereto, and may be the second reference timing or other reference.

  FIG. 8 is a flowchart illustrating a procedure of reception processing in the base station apparatus 10. The detection unit 110 acquires the start timing of the received packet signal, that is, the timing of “SS” (S10). If the comparison unit 114 compares the start timing with the reference timing and the start timing is not behind the first reference timing (N in S12), the determination unit 116 determines whether the packet signal is correct or not based on the CRC bit (S14). . If the start timing is behind the first reference timing (Y in S12) and the start timing is not behind the second reference timing (N in S16), the determination unit 116 determines whether the packet signal is correct or incorrect with EVM. (S18). On the other hand, if the start timing is later than the second reference timing (Y in S16), the determination unit 116 determines whether the data is correct (S20). If the packet signal is correct (Y in S22), the determination unit 116 processes the packet signal (S24). If the packet signal is not correct (N in S22), the baseband unit 18 The signal is discarded (S26).

  Based on FIG. 9, the operation of the communication system 100 configured as described above will be described. FIG. 9 is a sequence diagram illustrating a procedure of communication processing in the communication system 100. Here, the operation when the base station apparatus 10 and the terminal apparatus 26 start communication will be described. The base station apparatus 10 transmits a notification signal (S50). The terminal device 26 establishes frame timing based on the received notification signal (S52). That is, timing synchronization with the base station apparatus 10 is established. The terminal device 26 transmits an LCH assignment request to the base station device 10 in the time slot assigned to the control signal (S54).

  The base station apparatus 10 detects the timing of “SS” included in the received LCH allocation request packet signal (S56). Here, it is assumed that the timing of “SS” corresponds to the timing after the first reference timing. Therefore, the base station apparatus 10 determines the forward shift of transmission timing (S58). After transmitting the LCH establishment packet signal to the terminal device 26 (S60), the base station device 10 transmits the TCH to the terminal device 26 (S62). The terminal device 26 corrects the frame timing based on the received packet signal (S64). That is, the frame timing is shifted forward. The terminal device 26 transmits a TCH to the base station device 10 based on the corrected frame timing (S66).

  According to the embodiment of the present invention, even if the CRC bit cannot be detected, the packet signal EVM is used to determine whether the packet signal includes an error. Therefore, even if the delay of the packet signal increases, Error determination can be performed. In addition, since error determination can be performed even if the delay is large, the distance between the base station apparatus and the terminal apparatus can be increased. Further, since the distance between the base station apparatus and the terminal apparatus can be increased, the service area per base station apparatus is expanded, and the number of base station apparatuses necessary to cover the same area can be reduced. Moreover, since the number of base station apparatuses can be reduced, cost can be reduced. Further, if the CRC bit does not overlap with the subsequent time slot, the packet signal error determination based on the CRC bit is executed, so that it can be detected with normal accuracy.

  Further, even when all the CRC bits overlap the subsequent time slot, it is possible to determine whether or not the packet signal includes an error based on the data content, so that it is possible to perform error determination. Even if the distance between the base station device and the terminal device is further increased, the coverage area of the base station device can be further increased. Further, since the packet signal is demodulated after the adaptive array signal processing, the transmission quality can be improved. Also, if the received packet signal has a large delay, the timing for transmitting the packet signal is shifted forward, so that the delay can be reduced when the packet signal is received in a loopback.

  The present invention has been described based on the embodiments. This embodiment is an exemplification, and it will be understood by those skilled in the art that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are also within the scope of the present invention. is there.

  In the embodiment of the present invention, the communication system 100 is a simple mobile phone system. However, the present invention is not limited to this. For example, a mobile phone system, a third generation mobile phone system, a wireless LAN system, or an FWA (Fixed Wireless Access) system may be used. According to this modification, the present invention can be applied to various communication systems 100. That is, the base station device 10 and the terminal device 26 may perform communication based on the frame generated by the base station device 10.

  In the embodiment of the present invention, the base station apparatus 10 performs adaptive array signal processing. However, the present invention is not limited to this, and adaptive detection may not be performed, and packet signals may be received by one or a plurality of antennas to perform error detection and transmission timing control. According to this modification, the process of the base station apparatus 10 can be simplified. That is, error detection and transmission timing control may be executed.

  In the embodiment of the present invention, the first reference timing stored in the storage unit 112 is defined as the timing when “G” is completely out of the time slot, and the second reference timing is such that “CRC” is completely out of the time slot. It is defined as the timing of deviating. However, the present invention is not limited to this. For example, even if the first reference timing and the second reference timing are determined by shifting the timing by an amount corresponding to the error in consideration of the error with respect to the timing specified as described above. Good. According to this modification, it is possible to adjust the length of the period in which the determination is performed by CRC, the period in which the determination is performed by EVM, and the period in which the determination is performed based on the data contents. That is, the first reference timing and the second reference timing may be determined based on the timing when “G” is completely removed from the time slot and the timing when “CRC” is completely removed from the time slot.

  In the embodiment of the present invention, the transmission timing processing unit 118 starts transmitting a packet signal after shifting the packet signal forward in a predetermined case. However, the present invention is not limited to this. For example, the transmission timing processing unit 118 may add a signal indicating that the timing is shifted forward to the packet signal to be transmitted. According to the present modification, the terminal device 26 that has received the packet signal can recognize that the frame timing with the base station device 10 to be communicated is different from the frame timing with the other base station device 10, and the frame timing In consideration of this difference, signals can be received from other base station apparatuses 10. As a result, handover and the like can be executed smoothly.

  In the embodiment of the present invention, the transmission timing processing unit 118 starts transmitting a packet signal after shifting the packet signal forward in a predetermined case. However, the present invention is not limited to this. For example, the transmission timing processing unit 118 may remove “R” from the packet signal when transmitting the packet signal. According to this modification, it is possible to reduce interference given to the preceding time slot. That is, it is only necessary to receive the subsequent stage of “SS” in the packet signal.

It is a figure which shows the structure of the communication system which concerns on the Example of this invention. It is a figure which shows the structure of the frame format in the communication system of FIG. FIGS. 3A to 3D are diagrams showing the relationship between time slots and packet signals in the communication system of FIG. It is a figure which shows the structure of the 1st radio | wireless part of FIG. It is a figure which shows the structure of the signal processing part of FIG. It is a figure which shows the structure of the control part of FIG. It is a figure which shows the outline | summary of EVM calculated by the determination part 116 of FIG. It is a flowchart which shows the procedure of the reception process in the base station apparatus of FIG. It is a sequence diagram which shows the procedure of the communication process in the communication system of FIG.

Explanation of symbols

  10 base station apparatus, 12 radio section, 14 signal processing section, 16 modem section, 18 baseband section, 20 control section, 22 antenna, 24 network, 26 terminal apparatus, 34 antenna, 100 communication system, 110 detection section, 112 storage Unit, 114 comparison unit, 116 determination unit, 118 transmission timing processing unit, 200 reception response vector calculation unit.

Claims (8)

A detection unit for detecting a known signal from a packet signal received in a predetermined time slot;
Among the time slots, a comparison unit that compares a timing at which a known signal is detected with a predetermined reference timing;
If the timing at which the known signal is detected corresponds to a timing before the predetermined reference timing, based on a check bit arranged at the rear of the received packet signal, the received packet signal If the timing when the correct signal is determined and the known signal is detected corresponds to a timing later than the predetermined reference timing, the modulation accuracy of the received packet signal is derived, and based on the derived modulation accuracy A determination unit for determining whether the received packet signal is correct or not;
A communication apparatus comprising:   2. The reference timing in the comparison unit is determined based on a timing at which at least a part of check bits arranged in a rear part of the received packet signal deviates from a time slot. The communication device described. The comparison unit further determines another reference timing at a timing later than the predetermined reference timing in the time slot,
The determination unit, based on the data obtained by demodulating the packet signal, if the timing at which the known signal is detected corresponds to a timing later than the predetermined timing of another reference The communication apparatus according to claim 1, wherein whether the packet signal is correct or incorrect is determined.   The timing of another reference in the comparison unit is determined based on a timing at which all the check bits arranged in the rear part of the received packet signal are out of the time slot. The communication device described. A processing unit that performs adaptive array signal processing on packet signals received by each of the plurality of antennas;
The determination unit derives the modulation accuracy of the packet signal based on one of the signal points where the signal included in the packet signal should be arranged and the signal point of the signal included in the packet signal subjected to adaptive array signal processing. The communication apparatus according to any one of claims 1 to 4, wherein   In the determination unit, if the timing at which the known signal is detected corresponds to a timing before the predetermined reference timing, the communication unit corresponding to the received packet signal is started from the predetermined timing. If the timing at which the transmission of the packet signal is started and the known signal is detected corresponds to a timing later than the predetermined reference timing, the predetermined signal is transmitted to the communication device corresponding to the received packet signal. The communication apparatus according to claim 1, further comprising: a transmission unit that starts transmission of a packet signal from a timing before the determined timing. Detecting a known signal from a packet signal received in a predetermined time slot;
Comparing the timing at which a known signal is detected in the time slot with a predetermined reference timing;
If the timing at which the known signal is detected corresponds to a timing before the predetermined reference timing, based on a check bit arranged at the rear of the received packet signal, the received packet signal A step of judging correctness;
If the timing at which the known signal is detected corresponds to a timing after the predetermined reference timing, the modulation accuracy of the received packet signal is derived, and the received signal is received based on the derived modulation accuracy. Determining whether the packet signal is correct or not;
A communication method comprising: Detecting a known signal from packet signals received in a predetermined time slot via a wireless network;
Comparing the timing at which a known signal is detected in the time slot with the reference timing stored in advance in the memory;
If the timing at which the known signal is detected corresponds to a timing before the reference timing stored in advance in the memory, the received packet is based on a check bit arranged at the rear of the received packet signal. Determining the correctness of the signal and outputting the result; and
If the timing at which the known signal is detected corresponds to a timing after the reference timing stored in advance in the memory, the modulation accuracy of the received packet signal is derived, and based on the derived modulation accuracy, Determining whether the received packet signal is correct or not, and outputting the result;
A program that causes a computer to execute.

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