JP2005317563A - Sollar battery - Google Patents

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JP2005317563A
JP2005317563A JP2004130265A JP2004130265A JP2005317563A JP 2005317563 A JP2005317563 A JP 2005317563A JP 2004130265 A JP2004130265 A JP 2004130265A JP 2004130265 A JP2004130265 A JP 2004130265A JP 2005317563 A JP2005317563 A JP 2005317563A
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semiconductor layer
layer
solar cell
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semiconductor
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Shinichi Shimakawa
伸一 島川
Yasuhito Takahashi
康仁 高橋
Takayuki Negami
卓之 根上
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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    • Y02E10/541CuInSe2 material PV cells

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a solar battery which ensures small environmental load and shows higher conversion efficiency in the solar battery using a compound semiconductor including the group Ib element, group IIIb element and group VIb element as the p-type semiconductor layer. <P>SOLUTION: The solar battery (1) comprises a first semiconductor layer (12) using a p-type semiconductor and a second semiconductor layer (13) using an n-type semiconductor. In this solar battery (1), the first semiconductor layer (12) and the second semiconductor layer (13) are coupled with the pn-joining method, the first semiconductor layer (12) includes the group Ib element, group IIIb element, and group VIb element; and the second semiconductor layer (13) is formed of three or more kinds of elements selected from a group including the elements of the third period and fourth period of the periodic table. Moreover, the lattice mismatching coefficient (%) calculated by ¾L<SB>1</SB>-L<SB>2</SB>¾/ä(L<SB>1</SB>+L<SB>2</SB>)/2}×100 is 3% or less when the lattice constant of the first semiconductor layer (12) is L<SB>1</SB>and the lattice constant of the second semiconductor layer (13) is L<SB>2</SB>. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、太陽電池に関し、特に、Ib族元素、IIIb族元素及びVIb族元素を含む化合物半導体をp型半導体層に用いた太陽電池に関する。   The present invention relates to a solar cell, and more particularly to a solar cell using a compound semiconductor containing a group Ib element, a group IIIb element and a group VIb element for a p-type semiconductor layer.

従来、Ib族元素、IIIb族元素及びVIb族元素を含む化合物半導体(カルコパイライト構造半導体)であるCuInSe2(以下、「CIS」という)や、これにGaを固溶させたCuIn(1-X)GaXSe2(Xは0<X<1の間の実数、以下、「CIGS」という)をp型半導体層に用いた薄層系太陽電池(以下、「CIS系太陽電池」ともいう)が、高いエネルギー変換効率を示し、かつ、光照射等による変換効率の劣化が少ないという利点を有していることが知られている。 Conventionally, CuInSe 2 (hereinafter referred to as “CIS”), which is a compound semiconductor (chalcopyrite structure semiconductor) containing a group Ib element, a group IIIb element, and a group VIb element, or CuIn (1-X ) Ga x Se 2 (X is a real number between 0 <X <1, hereinafter referred to as “CIGS”) as a p-type semiconductor layer (hereinafter also referred to as “CIS solar cell”) However, it is known that it has the advantages of showing high energy conversion efficiency and little deterioration in conversion efficiency due to light irradiation or the like.

一般的なCIS系太陽電池の製造方法を、図2を参照しながら説明する。まず、ガラス等からなる絶縁性の基板101上に、Mo等からなる第1電極層102を蒸着法やスパッタリング法等によって形成する。次に、第1電極層102上に、CIS又はCIGSからなるp形半導体層103を蒸着法やスパッタリング法等によって形成する。このp形半導体層103は光吸収層として機能する。さらに、p形半導体層103上にCdSからなるn形半導体層104を化学析出法や蒸着法等によって形成し、p形半導体層103とpn接合させる。このn形半導体層104はバッファ層として機能する。そして、高い電気抵抗値を有するZnOからなる窓層105をスパッタリング法等により形成し、更に、透明電極である酸化インジウム−スズ合金(以下、「ITO」という)等からなる第2電極層106をスパッタリング法や化学気相成長法(CVD法)等により形成する。そして、第1及び第2電極層102,106上の一部に、第1取り出し電極108及び第2取り出し電極109を電子ビーム蒸着法等により形成し、第2電極層106上に反射防止層107を蒸着法等により形成して、太陽電池100が得られる。   A general method for producing a CIS solar cell will be described with reference to FIG. First, a first electrode layer 102 made of Mo or the like is formed on an insulating substrate 101 made of glass or the like by a vapor deposition method, a sputtering method, or the like. Next, a p-type semiconductor layer 103 made of CIS or CIGS is formed on the first electrode layer 102 by vapor deposition, sputtering, or the like. The p-type semiconductor layer 103 functions as a light absorption layer. Further, an n-type semiconductor layer 104 made of CdS is formed on the p-type semiconductor layer 103 by a chemical deposition method, an evaporation method, or the like, and is pn-junction with the p-type semiconductor layer 103. The n-type semiconductor layer 104 functions as a buffer layer. Then, a window layer 105 made of ZnO having a high electric resistance value is formed by a sputtering method or the like, and a second electrode layer 106 made of an indium oxide-tin oxide (hereinafter referred to as “ITO”) that is a transparent electrode is formed. It is formed by sputtering, chemical vapor deposition (CVD) or the like. Then, a first extraction electrode 108 and a second extraction electrode 109 are formed on part of the first and second electrode layers 102 and 106 by an electron beam evaporation method or the like, and the antireflection layer 107 is formed on the second electrode layer 106. Is formed by vapor deposition or the like, and the solar cell 100 is obtained.

太陽電池100において、p形半導体層103(CIS層又はCIGS層)とn形半導体層104(CdS層)との界面は、ヘテロ接合であるが、各層間の格子定数の差が小さい、即ち各層間の格子不整合率が小さいため、太陽電池100は高い変換効率を示す。ここで、CIS層及びCIGS層(組成比:In/Ga=10/3)の格子定数は、それぞれ0.579nm及び0.575nmで、CdS層の格子定数は0.582nmであるため、CIS層及びCIGS層のいずれを用いても各層間の格子不整合率は2%以下となる。なお、本明細書における格子不整合率は、例えばp形半導体層の格子定数をLp、n形半導体層の格子定数をLnとした場合に、|Lp−Ln|/〔(Lp+Ln)/2〕×100で算出されるものとする。 In the solar cell 100, the interface between the p-type semiconductor layer 103 (CIS layer or CIGS layer) and the n-type semiconductor layer 104 (CdS layer) is a heterojunction, but the difference in lattice constant between the layers is small. Since the lattice mismatch rate between the layers is small, the solar cell 100 exhibits high conversion efficiency. Here, the lattice constants of the CIS layer and CIGS layer (composition ratio: In / Ga = 10/3) are 0.579 nm and 0.575 nm, respectively, and the lattice constant of the CdS layer is 0.582 nm. Even if any of the CIGS layers is used, the lattice mismatch rate between the layers is 2% or less. Note that the lattice mismatch rate in this specification is expressed as | L p −L n | / [(L, where L p is the lattice constant of the p-type semiconductor layer and L n is the lattice constant of the n-type semiconductor layer. p + L n ) / 2] × 100.

他方、近年における環境汚染防止等の観点から、毒性を有するCdを含まない(即ち、CdS層を用いない)CIS系太陽電池が注目されており、CdS層の代わりにn形半導体層として、ZnO層やZnO、ZnS及びZn(OH)2の混晶化合物半導体層を用いた太陽電池が報告されている(例えば特許文献1参照)。
特許3249342号公報
On the other hand, CIS solar cells not containing toxic Cd (that is, not using a CdS layer) have attracted attention from the viewpoint of preventing environmental pollution in recent years, and ZnO is used as an n-type semiconductor layer instead of the CdS layer. A solar cell using a layer or a mixed crystal compound semiconductor layer of ZnO, ZnS, and Zn (OH) 2 has been reported (see, for example, Patent Document 1).
Japanese Patent No. 3249342

しかし、特許文献1に記載の太陽電池において、例えばn形半導体層としてZnO層を用いた場合、ZnO層の格子定数は0.325nmであるため、CIS層やCIGS層との格子不整合率は50%以上となる。この場合、pn接合させたヘテロ界面での格子定数の差が大きいため、つまり格子不整合率が大きいために界面に欠陥が生じて、使用時における接合界面でのキャリアの再結合頻度が増大し、CdS層を用いたときと比較して、変換効率、曲線因子FF等が低下するおそれがある。   However, in the solar cell described in Patent Document 1, for example, when a ZnO layer is used as the n-type semiconductor layer, the lattice constant of the ZnO layer is 0.325 nm, so the lattice mismatch rate with the CIS layer and the CIGS layer is 50% or more. In this case, the difference in lattice constant at the pn-junction hetero interface is large, that is, because the lattice mismatch rate is large, defects occur at the interface, and the frequency of carrier recombination at the junction interface during use increases. As compared with the case where the CdS layer is used, there is a possibility that the conversion efficiency, the fill factor FF, and the like are lowered.

本発明は、前記課題を解決するためになされたものであり、Ib族元素、IIIb族元素及びVIb族元素を含む化合物半導体をp型半導体層に用いた太陽電池において、環境負荷が小さく、かつ高い変換効率を示す太陽電池を提供する。   The present invention has been made to solve the above-mentioned problems, and in a solar cell using a compound semiconductor containing a group Ib element, a group IIIb element and a group VIb element for a p-type semiconductor layer, the environmental load is small, and A solar cell exhibiting high conversion efficiency is provided.

本発明の太陽電池は、p型半導体を用いた第1半導体層と、n型半導体を用いた第2半導体層とを含み、前記第1半導体層と前記第2半導体層とはpn接合されている太陽電池であって、前記第1半導体層は、Ib族元素、IIIb族元素及びVIb族元素を含み、前記第2半導体層は、周期律表第3周期及び第4周期の元素よりなる群から選ばれる3種以上の元素で構成され、前記第1半導体層の格子定数をL1、前記第2半導体層の格子定数をL2とした場合、|L1−L2|/〔(L1+L2)/2〕×100で算出される格子不整合率(%)が3%以下であることを特徴とする。 The solar cell of the present invention includes a first semiconductor layer using a p-type semiconductor and a second semiconductor layer using an n-type semiconductor, and the first semiconductor layer and the second semiconductor layer are pn-junctioned. The first semiconductor layer includes a group Ib element, a group IIIb element, and a group VIb element, and the second semiconductor layer includes a group consisting of elements in the third and fourth periods of the periodic table. When the lattice constant of the first semiconductor layer is L 1 and the lattice constant of the second semiconductor layer is L 2 , | L 1 −L 2 | / [(L 1 + L 2 ) / 2] × 100, the lattice mismatch rate (%) is 3% or less.

本発明の太陽電池によれば、第2半導体層が、周期律表第3周期及び第4周期の元素よりなる群から選ばれる3種以上の元素で構成されており、第2半導体層に毒性の高いCdを含まないため、環境負荷の小さい太陽電池が実現できる。また、第1半導体層と第2半導体層との格子不整合率が3%以下であるため、ヘテロ接合界面での欠陥の発生が抑えられる。これにより、使用時における接合界面でのキャリアの再結合頻度が低減するため、変換効率を向上させることができる。   According to the solar cell of the present invention, the second semiconductor layer is composed of three or more elements selected from the group consisting of the elements of the third period and the fourth period of the periodic table, and is toxic to the second semiconductor layer. Since high Cd is not included, a solar cell with a small environmental load can be realized. In addition, since the lattice mismatch rate between the first semiconductor layer and the second semiconductor layer is 3% or less, generation of defects at the heterojunction interface can be suppressed. Thereby, since the recombination frequency of the carrier at the joint interface at the time of use is reduced, the conversion efficiency can be improved.

本発明の太陽電池は、p型半導体を用いた第1半導体層と、n型半導体を用いた第2半導体層とを含み、第1半導体層と第2半導体層とはpn接合されている。pn接合は、例えば、Mo等からなる電極層上に、第1半導体層及び第2半導体層を蒸着法等により順次
積層させることにより形成できる。第1半導体層は、Ib族元素、IIIb族元素及びVIb族元素を含む化合物半導体層であり、例えば、背景技術で説明したCIS、CIGSやCuInS2等を使用することができる。第2半導体層は、周期律表第3周期及び第4周期の元素よりなる群から選ばれる3種以上の元素で構成されている。これにより、第2半導体層に毒性の高いCdを含まないため、環境負荷の小さい太陽電池が実現できる。第2半導体層として使用できる半導体としては、3種の元素から構成される3元化合物半導体や、4種の元素から構成される4元化合物半導体が好ましい。3元化合物半導体としては、一般式Zn(1-X)XSeで表される化合物半導体が好適である。但し、式中のXは0<X<1の間の実数であり、式中のMはMg及びMnのうちいずれか一方の元素である。また、4元化合物半導体としては、Zn、Mg、S及びSeで構成される化合物半導体や、Zn、Mn、S及びSeで構成される化合物半導体が好適である。
The solar cell of the present invention includes a first semiconductor layer using a p-type semiconductor and a second semiconductor layer using an n-type semiconductor, and the first semiconductor layer and the second semiconductor layer are pn-junctioned. The pn junction can be formed, for example, by sequentially laminating a first semiconductor layer and a second semiconductor layer on an electrode layer made of Mo or the like by an evaporation method or the like. The first semiconductor layer is a compound semiconductor layer containing an Ib group element, an IIIb group element, and a VIb group element. For example, CIS, CIGS, CuInS 2, or the like described in the background art can be used. The second semiconductor layer is composed of three or more elements selected from the group consisting of elements in the third and fourth periods of the periodic table. Thereby, since the highly toxic Cd is not included in the second semiconductor layer, a solar cell with a small environmental load can be realized. As the semiconductor that can be used as the second semiconductor layer, a ternary compound semiconductor composed of three elements and a quaternary compound semiconductor composed of four elements are preferable. As the ternary compound semiconductor, a compound semiconductor represented by the general formula Zn (1-X) M X Se is preferable. However, X in the formula is a real number between 0 <X <1, and M in the formula is any one element of Mg and Mn. As the quaternary compound semiconductor, a compound semiconductor composed of Zn, Mg, S, and Se and a compound semiconductor composed of Zn, Mn, S, and Se are suitable.

そして、本発明の太陽電池は、第1半導体層の格子定数をL1、第2半導体層の格子定数をL2とした場合、|L1−L2|/〔(L1+L2)/2〕×100で算出される格子不整合率(%)が3%以下である。これにより、使用時における接合界面でのキャリアの再結合頻度が低減するため、変換効率を向上させることができる。 In the solar cell of the present invention, when the lattice constant of the first semiconductor layer is L 1 and the lattice constant of the second semiconductor layer is L 2 , | L 1 −L 2 | / [(L 1 + L 2 ) / 2] The lattice mismatch rate (%) calculated by x100 is 3% or less. Thereby, since the recombination frequency of the carrier at the bonding interface at the time of use is reduced, the conversion efficiency can be improved.

ここで、第1半導体層としてCIS又はCIGSを用い、第2半導体層として一般式Zn(1-X)XSeで表される化合物半導体を用いる場合は、第1半導体層の格子定数が0.561〜0.579nmとなるので、前記条件を満たすためには、第2半導体層として、前記式中のXが、MがMgの場合:0を超えて0.52以下、MがMnの場合:0を超えて0.48以下となる化合物半導体を用いればよい。また、第1半導体層としてCIS又はCIGSを用い、第2半導体層としてZn、Mg、S及びSeで構成される化合物半導体を用いる場合は、前記条件を満たすためには、組成比がZn/Mg/S/Se=0を超えて0.5以下となる実数/0を超えて0.6以下となる実数/0.05〜0.3/0.05〜0.6となる化合物半導体を用いればよい。また、第1半導体層としてCIS又はCIGSを用い、第2半導体層としてZn、Mn、S及びSeで構成される化合物半導体を用いる場合は、前記条件を満たすためには、組成比がZn/Mn/S/Se=0を超えて0.5以下となる実数/0を超えて0.6以下となる実数/0.1〜0.3/0.1〜0.6となる化合物半導体を用いればよい。 Here, when CIS or CIGS is used as the first semiconductor layer and a compound semiconductor represented by the general formula Zn (1-X) M X Se is used as the second semiconductor layer, the lattice constant of the first semiconductor layer is 0. 561 to 0.579 nm, in order to satisfy the above condition, as the second semiconductor layer, when X in the formula is M is Mg: more than 0 and 0.52 or less, and M is Mn Case: A compound semiconductor that exceeds 0 and becomes 0.48 or less may be used. When CIS or CIGS is used as the first semiconductor layer and a compound semiconductor composed of Zn, Mg, S and Se is used as the second semiconductor layer, the composition ratio is Zn / Mg in order to satisfy the above condition. / S / Se = 0 to a real number that is 0.5 or less / a real number that is greater than 0 to 0.6 or less / a compound number that is 0.05 to 0.3 / 0.05 to 0.6 That's fine. When CIS or CIGS is used as the first semiconductor layer and a compound semiconductor composed of Zn, Mn, S and Se is used as the second semiconductor layer, the composition ratio is Zn / Mn in order to satisfy the above condition. / S / Se = 0 to a real number that is 0.5 or less / a compound number that is a real number that is greater than 0 to 0.6 or less / 0.1 to 0.3 / 0.1 to 0.6 That's fine.

また、第1半導体層の厚みは、1.0〜3.0μmが好ましい。1μm未満では光吸収が困難となり、光電流が充分に得られなくなる可能性がある。一方、3μmを越える場合は、少数キャリアの拡散長が1〜3μmと予想されるため、裏面電極膜近傍で発生した電子(キャリア)が移動中に再結合し、光電流が充分に得られなくなる可能性がある。また、第2半導体層の厚みは、3〜15nmが好ましい。3nm未満では均一にpn接合させるのが困難となる。また、15nmを超えると、トンネル電流が流れ難くなる。例えば、前述した一般式Zn(1-X)XSeで表される化合物半導体の場合、伝導帯でのオフセットが0.4eV以上あり、トンネル電流が流れるためには膜厚を15nm以下にしなければならない。 Further, the thickness of the first semiconductor layer is preferably 1.0 to 3.0 μm. If it is less than 1 μm, it is difficult to absorb light, and a photocurrent may not be sufficiently obtained. On the other hand, if it exceeds 3 μm, the diffusion length of minority carriers is expected to be 1 to 3 μm, so electrons (carriers) generated in the vicinity of the back electrode film are recombined during movement, and a photocurrent cannot be obtained sufficiently. there is a possibility. Further, the thickness of the second semiconductor layer is preferably 3 to 15 nm. If the thickness is less than 3 nm, it is difficult to form a uniform pn junction. On the other hand, if it exceeds 15 nm, the tunnel current hardly flows. For example, in the case of the compound semiconductor represented by the general formula Zn (1-X) M X Se described above, the offset in the conduction band is 0.4 eV or more, and the film thickness must be 15 nm or less in order for the tunnel current to flow. I must.

以下、本発明の実施形態について適宜図面を参照して説明する。参照する図1は、本発明の一実施形態に係る太陽電池の断面図である。   Hereinafter, embodiments of the present invention will be described with reference to the drawings as appropriate. FIG. 1 to be referred to is a cross-sectional view of a solar cell according to an embodiment of the present invention.

図1に示すように、本発明の一実施形態に係る太陽電池1は、基板10と、基板10上に順次積層された第1電極層11、第1半導体層12、第2半導体層13、窓層14、第2電極層15及び反射防止層16と、第1及び第2電極層11,15上の一部に形成された第1取り出し電極17及び第2取り出し電極18とを備えている。なお、太陽電池1は、使用時において、反射防止層16側から光が入射される。   As illustrated in FIG. 1, a solar cell 1 according to an embodiment of the present invention includes a substrate 10, a first electrode layer 11, a first semiconductor layer 12, a second semiconductor layer 13 that are sequentially stacked on the substrate 10, The window layer 14, the second electrode layer 15, and the antireflection layer 16, and the first extraction electrode 17 and the second extraction electrode 18 formed on a part of the first and second electrode layers 11 and 15 are provided. . In the solar cell 1, light is incident from the antireflection layer 16 side when in use.

基板10には、例えばガラス、ステンレス、ポリイミド等を用いることができる。第1電極層11には、例えばMo等の金属層を用いることができ、厚みは0.2〜2μmが好ましい。第1半導体層12及び第2半導体層13には、前述した材料及び厚みの化合物半導体層を用いることが好ましい。窓層14には、例えばZnO層を用いることができ、厚みは30〜200nmが好ましい。なお、窓層14の抵抗値は1.0×104Ω・cm以上であることが好ましい。第2電極層15は透明導電層であり、例えば、ZnOにAlがドープされたZnO−Alや、ITO等を用いることができ、厚みは0.05〜2μmが好ましい。反射防止層16は、第2電極層15との界面において、入射光の反射を防止するために設けられ、第2電極層15がITOやZnO−Alである場合には、例えばMgF2を用いることができる。また、反射防止層16の厚みは、第2電極層15がITOやZnO−Alである場合には、80〜150nmが好ましい。第1及び第2取り出し電極17,18には、例えばNiCr層とAu層とが積層された金属層を用いることができ、好ましい厚みは、第1及び第2取り出し電極17,18ともに、100〜300nmである。なお、太陽電池1の製造方法は、背景技術で説明した太陽電池100の製造方法と同様なので、説明は省略する。 For the substrate 10, for example, glass, stainless steel, polyimide, or the like can be used. For the first electrode layer 11, for example, a metal layer such as Mo can be used, and the thickness is preferably 0.2 to 2 μm. For the first semiconductor layer 12 and the second semiconductor layer 13, it is preferable to use the compound semiconductor layer having the material and thickness described above. As the window layer 14, for example, a ZnO layer can be used, and the thickness is preferably 30 to 200 nm. The resistance value of the window layer 14 is preferably 1.0 × 10 4 Ω · cm or more. The second electrode layer 15 is a transparent conductive layer. For example, ZnO—Al in which ZnO is doped with Al, ITO, or the like can be used, and the thickness is preferably 0.05 to 2 μm. The antireflection layer 16 is provided to prevent reflection of incident light at the interface with the second electrode layer 15. When the second electrode layer 15 is made of ITO or ZnO—Al, for example, MgF 2 is used. be able to. Further, the thickness of the antireflection layer 16 is preferably 80 to 150 nm when the second electrode layer 15 is made of ITO or ZnO—Al. For the first and second extraction electrodes 17 and 18, for example, a metal layer in which a NiCr layer and an Au layer are laminated can be used, and a preferable thickness is 100 to 100 for both the first and second extraction electrodes 17 and 18. 300 nm. In addition, since the manufacturing method of the solar cell 1 is the same as the manufacturing method of the solar cell 100 demonstrated by background art, description is abbreviate | omitted.

以下、本発明の実施例について、特許請求の範囲から外れる比較例を参照して説明する。なお、本発明はこの実施例に限定されるものではない。   Examples of the present invention will be described below with reference to comparative examples that depart from the scope of the claims. In addition, this invention is not limited to this Example.

(実施例1)
実施例1として、前述した本発明の一実施形態に係る太陽電池1(図1参照)において反射防止層16を除いた構成の太陽電池を作製した。各層の材料、厚み及び形成方法は、基板:ガラス(0.7mm)、第1電極層:Mo(0.8μm、スパッタリングで形成)、第1半導体層:CIGS(2μm、多元蒸着法で形成)、第2半導体層:Zn0.68Mn0.32Se(10nm、蒸着法で形成)、窓層:ZnO(100nm、スパッタリングで形成)、第2電極層:ITO(150nm、スパッタリングで形成)、第1取り出し電極及び第2取り出し電極:NiCr層とAu層とが積層された金属層(100nm、電子ビーム蒸着で形成)とした。
Example 1
As Example 1, a solar cell having a configuration excluding the antireflection layer 16 in the solar cell 1 (see FIG. 1) according to the embodiment of the present invention described above was manufactured. The material, thickness, and formation method of each layer are: substrate: glass (0.7 mm), first electrode layer: Mo (0.8 μm, formed by sputtering), first semiconductor layer: CIGS (2 μm, formed by multi-source deposition) Second semiconductor layer: Zn 0.68 Mn 0.32 Se (10 nm, formed by vapor deposition), window layer: ZnO (100 nm, formed by sputtering), second electrode layer: ITO (150 nm, formed by sputtering), first extraction electrode And a second extraction electrode: a metal layer (100 nm, formed by electron beam evaporation) in which a NiCr layer and an Au layer were laminated.

(比較例1)
比較例1として、実施例1の構成において第2半導体層として使用したZn0.68Mn0.32Seを、ZnOとZnSの混晶化合物半導体に変更し、その他は実施例1と同様の条件で太陽電池を作製した。なお、この混晶化合物の組成比は、ZnO/ZnS=0.7/0.3とした。
(Comparative Example 1)
As Comparative Example 1, Zn 0.68 Mn 0.32 Se used as the second semiconductor layer in the configuration of Example 1 was changed to a mixed crystal compound semiconductor of ZnO and ZnS, and the other conditions were the same as in Example 1. Produced. The composition ratio of the mixed crystal compound was ZnO / ZnS = 0.7 / 0.3.

(評価)
実施例1及び比較例1について、光電変換特性を評価した。評価は、エア・マス(AM)1.5、100mW/cm2の疑似太陽光を第2電極層(透明電極層)側から照射して行った。結果を表1に示す。なお、表1において、第1及び第2半導体層の格子定数はX線回折法により測定した。
(Evaluation)
For Example 1 and Comparative Example 1, photoelectric conversion characteristics were evaluated. The evaluation was performed by irradiating pseudo-sunlight of air mass (AM) 1.5, 100 mW / cm 2 from the second electrode layer (transparent electrode layer) side. The results are shown in Table 1. In Table 1, the lattice constants of the first and second semiconductor layers were measured by an X-ray diffraction method.

Figure 2005317563
Figure 2005317563

表1に示すように、比較例1は、格子不整合率が本発明の条件を満たしていないため、接合界面でのキャリアの再結合頻度が増大し、実施例1に比べ、変換効率Eff、開放電圧VOC及び曲線因子FFの値が低下した。以上の結果より、本発明の太陽電池は、第1半導体層と第2半導体層との格子不整合率(%)を3%以下とすることにより、良好な光電変換特性を得ることができた。 As shown in Table 1, in Comparative Example 1, since the lattice mismatch rate does not satisfy the conditions of the present invention, the carrier recombination frequency at the junction interface increases, and the conversion efficiency Eff, compared with Example 1, The values of the open circuit voltage V OC and the fill factor FF were lowered. From the above results, the solar cell of the present invention was able to obtain good photoelectric conversion characteristics by setting the lattice mismatch ratio (%) between the first semiconductor layer and the second semiconductor layer to 3% or less. .

本発明の太陽電池は、環境負荷が小さいため、様々な場所に設置が可能である。また、変換効率が高いため、従来の太陽電池に比べ設置面積を小さくできる。よって、例えば住宅用として様々な大きさの屋根に設置可能な太陽電池を提供できる。   Since the environmental impact of the solar cell of the present invention is small, it can be installed in various places. Moreover, since conversion efficiency is high, an installation area can be made small compared with the conventional solar cell. Therefore, for example, solar cells that can be installed on roofs of various sizes for residential use can be provided.

本発明の一実施形態に係る太陽電池の断面図である。It is sectional drawing of the solar cell which concerns on one Embodiment of this invention. 従来の太陽電池の断面図である。It is sectional drawing of the conventional solar cell.

符号の説明Explanation of symbols

1 太陽電池
12 第1半導体層
13 第2半導体層
DESCRIPTION OF SYMBOLS 1 Solar cell 12 1st semiconductor layer 13 2nd semiconductor layer

Claims (5)

p型半導体を用いた第1半導体層と、n型半導体を用いた第2半導体層とを含み、前記第1半導体層と前記第2半導体層とはpn接合されている太陽電池であって、
前記第1半導体層は、Ib族元素、IIIb族元素及びVIb族元素を含み、
前記第2半導体層は、周期律表第3周期及び第4周期の元素よりなる群から選ばれる3種以上の元素で構成され、
前記第1半導体層の格子定数をL1、前記第2半導体層の格子定数をL2とした場合、|L1−L2|/〔(L1+L2)/2〕×100で算出される格子不整合率(%)が3%以下であることを特徴とする太陽電池。
a solar cell including a first semiconductor layer using a p-type semiconductor and a second semiconductor layer using an n-type semiconductor, wherein the first semiconductor layer and the second semiconductor layer are pn-junction,
The first semiconductor layer includes a group Ib element, a group IIIb element, and a group VIb element;
The second semiconductor layer is composed of three or more elements selected from the group consisting of elements in the third and fourth periods of the periodic table,
When the lattice constant of the first semiconductor layer is L 1 and the lattice constant of the second semiconductor layer is L 2 , it is calculated as | L 1 −L 2 | / [(L 1 + L 2 ) / 2] × 100. A solar cell having a lattice mismatch rate (%) of 3% or less.
前記第2半導体層は、一般式Zn(1-X)XSeで表される化合物半導体で構成されている請求項1に記載の太陽電池。[但し、式中のXは0<X<1の間の実数であり、式中のMはMg及びMnのうちいずれか一方の元素である。] The solar cell according to claim 1, wherein the second semiconductor layer is made of a compound semiconductor represented by a general formula Zn (1-X) M X Se. [However, X in the formula is a real number between 0 <X <1, and M in the formula is any one element of Mg and Mn. ] 前記第2半導体層は、Zn、Mg、S及びSeで構成されている請求項1に記載の太陽電池。   The solar cell according to claim 1, wherein the second semiconductor layer is made of Zn, Mg, S, and Se. 前記第2半導体層は、Zn、Mn、S及びSeで構成されている請求項1に記載の太陽電池。   The solar cell according to claim 1, wherein the second semiconductor layer is made of Zn, Mn, S, and Se. 前記第2半導体層の厚みは、15nm以下である請求項1〜4のいずれか1項に記載の太陽電池。   The thickness of the said 2nd semiconductor layer is 15 nm or less, The solar cell of any one of Claims 1-4.
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JP2008243983A (en) * 2007-03-26 2008-10-09 Tokio Nakada Method of manufacturing thin film solar battery
WO2011108685A1 (en) * 2010-03-05 2011-09-09 株式会社 東芝 Compound thin-film solar cell and method for producing same
JP2013517627A (en) * 2010-01-14 2013-05-16 ダウ グローバル テクノロジーズ エルエルシー Moisture-resistant photovoltaic device with exposed conductive grid
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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008243983A (en) * 2007-03-26 2008-10-09 Tokio Nakada Method of manufacturing thin film solar battery
JP2013517627A (en) * 2010-01-14 2013-05-16 ダウ グローバル テクノロジーズ エルエルシー Moisture-resistant photovoltaic device with exposed conductive grid
US8921148B2 (en) 2010-01-14 2014-12-30 Dow Global Technologies Llc Moisture resistant photovoltaic devices with exposed conductive grid
WO2011108685A1 (en) * 2010-03-05 2011-09-09 株式会社 東芝 Compound thin-film solar cell and method for producing same
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