JP2005287055A - Transmission line and semiconductor integrated circuit device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a transmission line and a semiconductor integrated circuit device which are capable of improving a high frequency separation characteristic between terminals connected to the transmission line. <P>SOLUTION: The transmission line comprises a signal line 3, a resistive layer 4 arranged opposite to the signal line across a dielectric layer 2, and a grounding conductor 11 electrically connected to the resistive layer. When a high frequency signal with a specified frequency is transmitted in the signal line, in case where a resistance per unit length generated when a high frequency current induced in the resistive layer through capacitance formed by the dielectric layer between the signal line and the resistive layer flows in the resistive layer and between the resistive layer and the grounding conductor is defined as additional resistance and a resistance per unit length generated when the above high frequency current flows in the grounding conductor is defined as a ground resistance, the additional resistance is larger than the ground resistance. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a transmission line that handles a high-frequency signal in a microwave band, a millimeter wave band, and the like, and a semiconductor integrated circuit device including the transmission line.

  Conventionally, a transmission line such as a microstrip line or a coplanar line is used as a bias supply circuit for supplying power to an active device in a communication apparatus that uses a high frequency signal in a microwave band, a millimeter wave band or the like as a carrier wave. It is common.

  22A and 22B are cross-sectional views schematically showing structures of general microstrip lines and coplanar lines, respectively.

  As shown in FIG. 22A, the microstrip line is provided on the dielectric substrate 101, the signal wiring 102 provided on the upper surface of the dielectric substrate 101, and the lower surface of the dielectric substrate 101. And a ground conductor layer 103 opposed to the signal wiring.

  As shown in FIG. 22B, the coplanar line includes the dielectric substrate 101, the signal wiring 102 provided on the upper surface of the dielectric substrate 101, and the signal wiring 102 provided on the upper surface of the dielectric substrate 101. And a pair of ground conductor layers 104 facing each other in the width direction at a predetermined interval.

  The main signal circuit of the communication apparatus has an arbitrary number of bias terminals for supplying a common voltage to the main signal circuit, and a bias supply having a transmission line as shown in FIGS. It is electrically connected through a circuit. This communication device is composed of a microwave monolithic integrated circuit (hereinafter referred to as MMIC), which is a semiconductor integrated circuit device in which transmission lines, active elements, passive elements, etc. are provided on a common dielectric substrate, and peripheral circuits associated therewith. It is often done.

  In general, it is necessary to efficiently transmit a carrier wave in a module which is a communication device. For this purpose, in the MMIC and the peripheral circuit where the carrier wave is transmitted, the dielectric substrate constituting the circuit is made of a low-loss material, and the signal wiring has a high conductivity (low resistance). It is required to be composed of materials.

  Therefore, an MMIC is also known in which gallium arsenide, which is a low-loss material, is used as a dielectric substrate material, and transmission lines, active elements, passive elements, etc. are provided on a common dielectric substrate.

  FIG. 23 is a circuit diagram showing a circuit configuration on the output side in a module functioning as a high-frequency amplifier, which is a first conventional example. In the module shown in the figure, the MMIC includes an active element 111, an output terminal Tout, main signal lines 112a and 112b that electrically connect the active element 111 and the output terminal Tout to each other, and a DC blocking capacitor 118. The main signal circuit 110 is provided. In the MMIC configured as described above, in the main signal circuit 110, after the input signal received by the input unit (not shown) is amplified by the active element 111, the output signal of the active element 111 is sent to the main signal lines 112a and 112b. And output from the output terminal Tout. The MMIC also includes a short-circuit stub 113 that branches from an intermediate portion of the main signal lines 112a and 112b, and a first bypass capacitor 114 that is interposed between the short-circuit stub 113 and the ground conductor. Further, the entire module is provided with a bias supply circuit 120A for supplying a power supply voltage to the MMIC. The bias supply circuit 120A includes a bias terminal Tvd for supplying a DC power supply voltage and two series connection circuits. Transmission line 115 and transmission line 116 connected to each other, and a second bypass capacitor 117 interposed between the connection point of transmission line 115 and transmission line 116 and the ground conductor.

  Here, the short-circuit stub 113 functions as a matching circuit for the main signal circuit 110 in the RF (radio frequency) band, and also functions as a part of the bias supply circuit 120A. The capacitance value C1 of the first bypass capacitor 114 is set so that a high-frequency signal included in the design frequency band is short-circuited. The capacitance value C2 of the second bypass capacitor 117 is set to a large value so that a high frequency signal included in the low frequency band is short-circuited. In this example, the capacitance value C2 is externally attached as a chip capacitor.

  In general, in a communication device, if a high-frequency signal is not short-circuited in a bias supply path (bias supply circuit 120A) from the main signal circuit 110 to the bias terminal Tvd, the high-frequency signal may leak to the bias supply circuit 120A. There is. For example, in a multistage amplifier, if the transmission line constituting the bias supply circuit is connected in a state that causes positive feedback from the subsequent amplifier to the previous amplifier, parasitic oscillation may occur. Therefore, in the module shown in FIG. 23, bypass capacitors 114 and 117 are arranged so that shunts are respectively arranged between both ends of the transmission line 115 which is a part of the transmission line constituting the bias supply line and the ground conductor. The high-frequency signal having any frequency component that can be amplified by the active element 111 is short-circuited.

  However, there are still many problems to be solved in the conventional transmission line and the communication device having the transmission line.

  For example, in the module (amplifier) shown in FIG. 23, high-frequency signals of all frequency components that may be amplified by the active element 111 in the bias supply path from the main signal circuit 110 to the bias terminal Tvd are sufficiently short-circuited. The conditions to be met are not satisfied. Therefore, the subject that the high frequency isolation characteristic between each element and each terminal connected by a transmission line was not satisfied occurred. Specifically, a high-capacitance chip capacitor (for example, the second bypass capacitor 117 shown in FIG. 23) designed to short-circuit a low frequency band of about several tens of MHz has parasitic components such as ground capacitance. It is difficult to short-circuit a high frequency band of about several GHz or more. Therefore, for example, in a general multistage series-connected amplifier element structure in which a subsequent active element and a previous active element are connected to the same bias supply circuit, there is a risk of parasitic oscillation due to positive feedback. This is because the high-frequency signal amplified in the subsequent active element leaks to the bias supply circuit on the output side, and the component that has not been short-circuited becomes positive feedback via the bias supply circuit to the previous active element. When the phase condition is input, parasitic oscillation occurs.

  Further, for example, resonance may occur due to the capacitance of the first bypass capacitor 114 and the inductance of the transmission lines 115 and 116 of the bias supply circuit. At that time, since standing waves are generated in the transmission line 115 and radiation is generated, unintentional coupling with peripheral circuits may occur at the resonance frequency. In addition, the signal passing characteristic in the main signal circuit 110 connected to the short-circuit stub 113 is unintentionally improved at the resonance frequency. For this reason, as a whole characteristic of the amplifier, an unnecessary gain peak occurs at the resonance frequency.

  FIG. 24 is a circuit diagram showing a circuit configuration on the output side in a high-frequency amplifier (module) to which a structure for reducing the resonance Q value is added as a second conventional example. As shown in FIG. 24, the MMIC is unstable by attenuating a low frequency component by interposing a resistor 119 having a resistance value R1 between the transmission line 115a and the transmission line 115b of the bias supply circuit 120B. It is configured to improve.

  However, in the configuration shown in FIG. 24, it is necessary to set the electrical resistance value of the resistor 119 large in order to remove the low frequency component. In this case, the voltage drop of the power supply voltage supplied from the bias terminal Tvd Becomes larger. That is, in order to reduce the drive voltage of the MMIC, there is a risk of causing problems such as deterioration of amplification efficiency in the MMIC.

  FIG. 25 is a block circuit diagram showing a circuit configuration on the output side in a high-frequency amplifier (module) to which another structure for reducing the Q value of resonance is added as a third conventional example. This high-frequency amplifier is disclosed in literature (for example, see Non-Patent Document 1). In this circuit configuration example, the bias supply circuit 120C is short-circuited in parallel with the bias supply circuit 120C by the RC series circuit 123. The output circuit of the high frequency amplifier of FIG. 25 differs from the output circuit of the high frequency amplifier of FIG. 23 in that in the high frequency amplifier output circuit of FIG. The transmission line 115 to which the bypass capacitor 117) is connected is divided into transmission lines 115a and 115b in the output circuit of the high-frequency amplifier in FIG. 25, and a third bypass capacitor is formed at the connection point between both transmission lines 115a and 115b. 122 is added and connected in a shunt arrangement. 23 is also different from the output circuit of the high-frequency amplifier of FIG. 23 in that a resistor 121 having a resistance value R2 is disposed between the connection point of both transmission lines 115a and 115b and the third bypass capacitor 122. Is a point. In other words, the RC series circuit 123 functioning as a stabilization circuit is newly inserted between one part of the bias supply circuit 120C and the ground conductor in the output circuit of the high-frequency amplifier of FIG.

Here, the capacitance value C3 of the third bypass capacitor 122 is set such that a high-frequency signal in an intermediate frequency band that is not short-circuited by the first and second bypass capacitors 114 and 117 is short-circuited. In addition, the resistor 121 is provided so as to reduce unnecessary gain in a high frequency signal in a low frequency band lower than the design frequency band and to reduce the high frequency signal in the intermediate frequency band in order to improve the stability of the high frequency amplifier. This is for short-circuit processing.
Chen et al .: “One Watt Q-Band Class A Pseudomorphic HEMT MMIC Amplifier”, 1994 IEEE MTT-S digest pp805-808

  However, in the high-frequency amplifier shown in FIG. 25, a bypass capacitor 122 and a resistor 121 having a sufficient capacitance value for short-circuiting a high-frequency signal in the intermediate frequency band are additionally provided in the high-frequency amplifier shown in FIG. This is not preferable because the necessity arises and the circuit area of the entire module increases.

  Further, in a high-frequency amplifier using a microstrip line as a transmission line, it is necessary to additionally arrange a via hole as a ground circuit, which further increases the circuit area, which is not preferable.

  In the high-frequency amplifier shown in FIG. 25, if the RC series circuit 123 is arranged close to other circuit elements, electromagnetic coupling with other adjacent circuits (for example, the main signal circuit 110) occurs, and the high-frequency amplifier is not effective. There was also a possibility that a problem of stabilization would occur. In order to avoid this, a method of arranging the RC series circuit 123 away from the main signal circuit 110 is also conceivable, but doing so increases the circuit area, which is not preferable.

  The above-described problems are not only common to amplifiers but also common to semiconductor integrated circuit devices such as mixers (mixers), frequency multipliers, switches, attenuators, frequency dividers, and quadrature modulators.

  An object of the present invention is to provide a transmission line and a semiconductor integrated circuit device that can improve high-frequency separation characteristics between terminals connected to the transmission line.

  In order to achieve the above object, a transmission line according to the present invention includes a signal wiring, a resistance layer facing the signal wiring across a dielectric layer, and a grounding conductor electrically connected to the resistance layer. When a high-frequency signal having a predetermined frequency is transmitted through the signal wiring, the dielectric layer induces the resistance layer via a capacitor formed between the signal wiring and the resistance layer. When a high frequency current flows between the resistance layer and the resistance layer and the grounding conductor, a resistance per unit length generated is defined as an additional resistance, and when the high frequency current flows through the grounding conductor. When the resistance per unit length generated in the above is defined as a ground resistance, the additional resistance is larger than the ground resistance. Here, the length direction of the unit length means the signal transmission direction. With such a configuration, in the transmission line, a circuit in which a large number of RC series components composed of a capacitor and a resistor are arranged in parallel is formed by a portion facing each other across the signal wiring and the dielectric layer of the resistance layer. Therefore, the high frequency component of the signal flowing through the transmission line is attenuated. Therefore, when a bias supply circuit that supplies a bias through this transmission line is connected to a circuit that processes a high-frequency signal, high-frequency power that leaks from the circuit to the bias supply circuit can be efficiently reduced. In other words, the high frequency separation characteristic between the terminals to which the transmission line is connected can be improved.

  The length of the resistance layer may be 1/16 or more of the effective wavelength λ of the signal having the upper limit frequency of the high-frequency signal. With such a configuration, the capacitance and the additional resistance formed between the signal wiring and the resistance layer can be handled in a distributed constant manner.

  The conductivity of the material constituting the resistance layer may be smaller than the conductivity of the grounding conductor. With such a configuration, by adopting this condition, the additional resistance per unit length added to the transmission line of the present invention is more than the resistance generated by the grounding conductor per unit length in the transmission line. Can also be set larger.

It is preferable that the conductivity of the material constituting the resistance layer is 1 × 10 ³ S / m or more and 1 × 10 ⁷ S / m or less.

More preferably, the material constituting the resistance layer has a conductivity of 1 × 10 ³ S / m or more and 1 × 10 ⁵ S / m or less.

  The resistance layer is at least one selected from chromium, nickel chromium alloy, iron-chromium alloy, thallium, chromium-silicon oxide composite, titanium, impurity-containing semiconductor, and polycrystalline or amorphous semiconductor of polysilicon. It may be composed of one material. With such a configuration, the value of the additional resistance generated in the resistance layer can be set high.

  The width of the resistance layer may be larger than the width of the signal wiring.

  The resistance layer may be formed to face the signal wiring over the entire width thereof. With such a configuration, since the signal wiring is entirely opposed to the resistance layer in the width direction, the electric field distribution leaking from the signal wiring to the ground conductor layer is suppressed, and as a result, the high frequency between the terminals to which the transmission line is connected is suppressed. The effect of improving the separation characteristics is further increased.

  The signal wiring is formed on the upper surface of the dielectric layer, the resistance layer is formed between the substrate and the dielectric layer, the grounding conductor is formed on the lower surface of the substrate, and the resistance layer is It may be connected to the grounding conductor by a through conductor penetrating the substrate. With such a configuration, a transmission line suitable for a high-frequency circuit having a microstrip line structure can be obtained.

  The through conductor may be formed at an edge of the resistance layer. With such a configuration, since the flow path of the high-frequency current induced in the resistance layer becomes long, the additional resistance per unit length can be increased.

  The plurality of through conductors may be formed with an interval in the length direction of the resistance layer. With such a configuration, the capacitance and the additional resistance formed between the signal wiring and the resistance layer can be arranged in a more distributed manner.

  The signal wiring is formed on the top surface of the dielectric layer, the resistance layer is formed between the substrate and the dielectric layer, the grounding conductor is formed on the top surface of the dielectric layer, and the resistance layer May be connected to the grounding conductor by a through conductor penetrating the dielectric layer. With such a configuration, a transmission line suitable for a high-frequency circuit having a coplanar line structure can be obtained.

  The signal wiring is formed between the substrate and the dielectric layer, the resistance layer is formed on the top surface of the dielectric layer, and the grounding conductor is connected to the resistance layer on the top surface of the dielectric layer. It may be formed so that. With such a configuration, the through conductor can be omitted. In addition, a semiconductor integrated circuit device according to the present invention includes a main signal circuit having one or more active elements, a bias supply circuit having a transmission line and supplying a bias to the main signal circuit through the transmission line. And at least a part of the transmission line is configured by the transmission line according to claim 8. With such a configuration, unnecessary (frequency band) high-frequency power leaking from the main signal circuit to the bias supply circuit can be efficiently reduced, and as a result, the semiconductor integrated circuit device can be stably operated. In addition, this transmission line can exhibit the above-described effect without providing a large capacitor, so that the semiconductor integrated circuit device can be downsized.

  The transmission line has a first transmission line connected to the main signal circuit and a second transmission line connected to the first transmission line, and the first transmission line is a coplanar line or a micro line. The first transmission line is composed of at least a part of the transmission line, and the main signal circuit side end of the first transmission line is connected to a ground terminal via a bypass capacitor. May be. With such a configuration, it is possible to more effectively reduce unnecessary high frequency power (in a frequency band) leaking from the main signal circuit to the bias supply circuit while suppressing an increase in circuit area.

  The semiconductor integrated circuit device is a one-stage high-frequency amplifier having one amplifying transistor as the one or more active elements, and the bias supply circuit is an input upstream of the active elements of the main signal circuit. It may be a bias supply circuit of at least one of a side circuit and an output side circuit that is on the rear side of the active element of the main signal circuit. With such a configuration, high-frequency power in an unnecessary frequency band leaking from the main signal circuit to the bias supply circuit can be reduced, and stable operation can be performed.

  The semiconductor integrated circuit device is a multi-stage high-frequency amplifier having a plurality of amplifying transistors as the one or more active elements, and the bias supply circuit is an input upstream of the active elements of the main signal circuit. It may be at least one bias supply circuit among a side circuit, an output side circuit that is on a stage after the active element of the main signal circuit, and an interstage circuit between the plurality of amplification transistors. With such a configuration, it is possible to suppress parasitic oscillation due to positive feedback of high-frequency power leaking from the main signal circuit to the bias supply circuit to the previous stage.

  Although the active element is limited to an amplifying transistor here, it is needless to say that not only amplification but all transistors used for the purpose of controlling the amplitude and phase of a high-frequency signal are applicable. Absent.

  The above object, other objects, features, and advantages of the present invention will become apparent from the following detailed description of the preferred embodiments with reference to the accompanying drawings.

  The present invention has the configuration described above, and in the transmission line and the semiconductor integrated circuit device, there is an effect that it is possible to improve the high frequency separation characteristics between the terminals connected to the transmission line.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a sectional view showing the structure of a transmission line according to the first embodiment of the present invention, and FIG. 2 is a plan view showing the planar structure of the transmission line of FIG.

  As shown in FIG. 1, the transmission line of this embodiment includes a dielectric substrate 1, a dielectric film 2 provided on the upper surface of the dielectric substrate 1, and a signal wiring 3 provided on the upper surface of the dielectric film 2. Between the dielectric substrate 1 and the dielectric film 2 and opposed to the signal wiring 3 with the dielectric film 2 interposed therebetween, and a ground conductor provided on the lower surface of the dielectric film 2 A layer 11 and a through conductor 6 that penetrates the dielectric film 2 and connects the resistance layer 4 and the ground conductor layer 11 to each other are provided.

  As shown in FIG. 2, the signal line 3 and the resistance layer 4 are both formed in a band shape, and are formed so that the signal line 3 is positioned within the width of the resistance layer 4 in plan view. The through conductors 6 have a cylindrical shape, and are formed on the edge of the resistance layer 4 at a predetermined pitch in the length direction of the resistance layer 4.

The signal wiring 3 is connected to an external circuit. The ground conductor layer 11 is connected to the external high-frequency ground 13 through the solder 12 on the entire surface, and the high-frequency ground function of the ground conductor layer 11 is enhanced. Next, the resistance layer 4 and The through conductor 6 will be described in detail.
In the present invention, the value of the capacitance formed between the resistance layer 4 and the signal wiring 3 (hereinafter referred to as a value per unit length of the transmission line is referred to as Cadd) and the resistance layer 4 are induced. It is preferable that the electric resistance (additional resistance: hereinafter referred to as a value per unit length of the transmission line and referred to as Radd) when a current flows to the ground conductor layer 11 through the through conductor 6 is arranged in a distributed constant manner. More specifically, the length of the resistance layer 4 is preferably set to a length that can be regarded as being distributed in a distributed manner with respect to a signal to which Cadd and Radd are transmitted. That is, the length of the resistance layer 4 is a lower limit value when the effective wavelength of the signal having the upper limit frequency of the high frequency signal that may be transmitted through the transmission line is λ, taking into account the dielectric constant of the dielectric film 2. Is preferably λ / 16 or more. The upper limit is a length equal to the length of the transmission line. The length of the transmission line substantially means the length of the signal wiring 3 in this embodiment. Here, the high frequency is a frequency that can be amplified by the amplifier, and the value varies depending on the transistor used, but it is a general term for electromagnetic waves having a frequency of 1 MHz to 1 THz.

  The number of through electrodes 6 may be at least one, but in the case of a plurality, it is preferable to reduce the pitch as much as possible. This is because Cadd and Radd are arranged more distributedly.

Radd needs to be larger than the resistance of the ground conductor layer 11 (ground resistance). This can be realized by appropriately setting the conductivity and shape of the ground conductor layer 11 and the through conductor 6.
When the conductivity is set, the conductivity of the resistor constituting the resistance layer 4 is set lower than the conductivity of the ground conductor layer 11. Specifically, the conductivity of the resistors constituting the resistor layer ^{4, 1 × 10 3 S / 1} × is preferably from ¹⁰ 7 S / m or more ^{m, 1 × 10 3 S /} m or more 1 × ¹⁰ 5 S / M or less is more preferable.

Specifically, the ground conductor layer 11 is made of a material having a high conductivity such as gold, and the resistance layer 4 is a resistor having a low conductivity, that is, chromium, nickel chromium alloy, iron-chromium alloy, thallium, It is preferable to use a resistor made of a low-conductivity material such as a chromium-silicon oxide composite, titanium, an impurity-containing semiconductor, a polycrystalline semiconductor film such as polysilicon, or an amorphous semiconductor film.
Further, the conductivity of the through conductor 6 may be set similarly. In the case of setting the shape, for example, the thickness of the resistor capacitor layer 4 is reduced. Further, the through conductor 6 is provided so as to be located as close to the edge of the resistance layer 4 as possible.
Further, the cross-sectional area of the through conductor 6 may be set small. Further, the length of the through conductor 6 may be increased.
[Example 1]
As Example 1 in the first embodiment of the present invention, a transmission line having the structure shown in FIG. 1 was created under the following conditions. The dielectric substrate 1 is composed of a gallium arsenide (GaAs) substrate having a thickness of 500 μm and a dielectric constant of 13, the dielectric film 2 is composed of a silicon nitride (SiN) film having a thickness of 1 μm and a dielectric constant of 7, and The ground conductor layer 5 was made of gold having a conductivity of 3 × 10 ⁷ S / m and a thickness of 5 μm. In addition, an impurity diffusion layer having a thickness of 0.2 μm and a conductivity of 4 × 10 ⁴ S / m was formed immediately below the surface of the dielectric substrate 1 made of gallium arsenide, and this impurity diffusion layer was used as the resistance layer 4. The signal wiring 3 had a width of 20 μm, the resistance layer 4 had a width of 100 μm, and was arranged so that the center line of the signal wiring 3 and the center line of the resistance layer 4 coincided in plan view. A through conductor 6 having a radius of 5 μm penetrating the dielectric substrate 1 was formed of gold, the ground conductor layer 11 and the resistance layer 4 were connected at a pitch of 100 μm, and the resistance layer 4 was short-circuited.

  FIG. 3 is a graph showing the frequency dependence of the passage loss of the transmission line of the first embodiment. The vertical axis in FIG. 3 indicates an effective loss that occurs in the transmission line when a high-frequency signal passes, and is a value obtained by multiplying the maximum available power gain by -1.

  As shown in FIG. 3, the transmission loss per 5 mm length of the transmission line of this example was 1.4 dB at 1 GHz, 15.0 dB at 5 GHz, and 30.6 dB at 10 GHz. On the other hand, in a general microstrip line, since the loss hardly changes in the frequency band of 1 GHz to 10 GHz, it was confirmed that the transmission line of this example can selectively attenuate a high-frequency signal.

Therefore, the transmission line of this embodiment can attenuate high frequency power without attenuating DC power. That is, by arranging the transmission line of the present embodiment in the bias circuit, it becomes possible to attenuate the high-frequency power leaking from the main signal circuit where the active element is arranged to the peripheral circuit, so that the high-frequency separation characteristics are excellent. A semiconductor integrated circuit having a bias supply circuit and excellent in high frequency characteristics can be configured.
[Principle of the present invention]
Next, the principle by which the high frequency signal in the transmission line of the present invention is attenuated will be described. 4A is an equivalent circuit diagram of a conventional transmission line, and FIG. 4B is an equivalent circuit diagram of the transmission line of the present invention.
As shown in FIG. 4A, an equivalent circuit in a high frequency region of a conventional transmission line includes a signal wiring per unit length (signal wiring 102 shown in FIG. 22) and a ground conductor layer (ground conductor layer shown in FIG. 22). 103) and an inductance Ld representing a signal phase change per unit length during signal transmission are distributed and exist.

On the other hand, as shown in FIG. 1, in the transmission line of the present invention, a resistance layer 4 made of a resistor having low conductivity is interposed between the signal wiring 3 and the ground conductor layer 11. In the length direction of the transmission line shown in FIG. 2, a capacitance of Cadd per unit length is generated between the opposing portions of the resistance layer 4 and the signal wiring 3, and an inductance of Ld per unit length is generated in the signal wiring 3. As a result, the resistance layer 4 has a resistance of Radd per unit length. Since the resistance Radd is interposed between the ground conductor (ground conductor layer 11) and the capacitance Cadd in the length direction of the transmission line, the signal attenuation function is improved. In this case, the opposing portions of the signal wiring 3 and the resistance layer 4 are not clearly partitioned but are continuous. However, when the through conductors 6 are provided at a predetermined pitch as shown in FIG. 1, each through conductor 6 is represented by an equivalent series circuit of Ld, Cadd, and Radd shown in FIG. Can be considered to exist.

Here, the capacitance Cadd between the signal wiring 3 and the resistance layer 4 functions as a shunt capacitance. Capacitance functions as a high-pass filter that blocks signals with a frequency lower than a specific frequency (referred to as the cut-off frequency) determined according to the capacitance, and passes signals in the high frequency band above the cut-off frequency. In view of this, it can be seen that it is effective to set the value of the capacitance Cadd high in order to maintain the power attenuation effect which is the effect of the present invention up to the low frequency band.

  In order to set the value of the capacitance Cadd high, the dielectric constant of the material constituting the dielectric film 2 is set high, the thickness of the dielectric film 2 is set thin, the signal wiring 3 and the resistance layer It is effective to set the width of 4 wide.

On the other hand, the resistance value Radd depends on the sheet resistance of the resistance layer 4, that is, the conductivity of the material constituting the resistance layer 4 and the thickness of the resistance layer 4. Further, the distance from the region functioning as a capacitor between the signal wiring 3 and the resistance layer 4 to the region connected to the ground conductor layer 11 is also greatly dependent. Further, it depends on the resistance value of the through conductor 6. Furthermore, it depends on the length of the through conductor 6.
(Second Embodiment)
FIG. 5 is a sectional view schematically showing a configuration of a transmission line according to the second embodiment of the present invention, and FIG. 6 is a plan view showing a planar structure of the transmission line in FIG.

  As shown in FIG. 5, the transmission line of this embodiment includes a dielectric substrate 1, a dielectric film 2 provided on the upper surface of the dielectric substrate 1, and a signal wiring 3 provided on the upper surface of the dielectric film 2. Between the dielectric substrate 1 and the dielectric film 2, the signal wiring 3 is opposed to the signal wiring 3 with the dielectric film 2 interposed therebetween, and the signal wiring 3 is provided on the upper surface of the dielectric film 2. And a pair of ground conductor layers 5 facing each other in the width direction at a predetermined interval, and a through conductor 6 that penetrates the dielectric film 2 and connects the resistance layer 4 and the ground conductor layer 5 to each other.

As shown in FIG. 6, the signal line 3 and the resistance layer 4 are both formed in a band shape, and are formed so that the signal line 3 is positioned within the width of the resistance layer 4 in plan view. The through conductors 6 are formed on the edge of the resistance layer 4 at a predetermined pitch in the length direction of the resistance layer 4. The ground conductor layer 5 is formed in parallel with the signal wiring 3.
The other points are the same as in the first embodiment.
[Example 2]
As Example 2 in the second embodiment, a transmission line having the configuration of FIG. 5 was created. In this example, the thickness and material of the signal wiring 3, the dielectric film 2, the dielectric substrate 1, and the ground conductor layer 11 are the same as those of Example 1 of the first embodiment, and the diameter, material, and pitch of the through conductor 6 are the same. Was the same as Example 1 of the first embodiment. Then, a ground conductor layer 5 having a width of 5 mm and a width of 5 mm was formed on both sides of the signal wiring 3. The distance between the signal wiring 3 and the ground conductor layer 5 is 30 μm. In addition, the ground conductor layer 5 and an external high-frequency ground (not shown) were electrically connected at intervals of 200 μm by numerous wire bondings, and the high-frequency ground function of the ground conductor layer 5 was strengthened.

  FIG. 7 is a graph showing the frequency dependence characteristics of the passage loss of the transmission line of the second embodiment. The vertical axis in FIG. 7 indicates the effective loss that occurs in the transmission line when a high-frequency signal passes, and is a value obtained by multiplying the maximum available power gain by -1.

As shown in FIG. 7, the transmission loss of the transmission line of Example 1 was 1.1 dB at 1 GHz, 14.2 dB at 5 GHz, and 30.4 dB at 10 GHz. [Comparative Example 1]
For comparison of the passage loss with Example 1, the transmission line of Comparative Example 1 was created. In the transmission line of Comparative Example 1, the resistance layer 4 and the through conductor 6 shown in FIG. 5 are not provided, that is, only the general coplanar line shown in FIG. 22 is used. The same as in the second embodiment. The loss per 5 mm length of the transmission line of Comparative Example 1 was 0.1 dB at 1 GHz, 0.2 dB at 5 GHz, and 0.3 dB at 10 GHz.

  From the result of comparison between Comparative Example 1 and Example 2, it was confirmed that Example 2 attenuates the high-frequency signal. Needless to say, there was no change in the DC resistance value between the transmission lines of Example 2 and Comparative Example 1.

  Thus, in this example, the high frequency attenuation characteristic almost the same as that of Example 1 of the first embodiment can be obtained, and the operation of the present invention can be achieved by changing the connection method between the resistance layer 4 and the ground conductor layer 5. It was shown that the effect was maintained.

Next, each example in which the advantageous effect of the transmission line of this embodiment is obtained by effectively changing the values of the capacitance Cadd and the resistance value Radd based on the principle of the present invention described in the first embodiment. It is shown below.
[Example 3]
As Example 3 in the second embodiment, a transmission line in which the width of the signal wiring 3 in Example 2 was 50 μm and the width of the resistance layer 4 was 100 μm was created. The distance between the signal wiring 2 and the ground conductor layer 5 is 15 μm. Other conditions are the same as in Example 2.

  FIG. 8 is a graph showing the frequency dependence of the passage loss of the transmission line of Example 3. The vertical axis in FIG. 8 indicates the effective loss that occurs in the transmission line when a high-frequency signal passes, and is a value obtained by multiplying the maximum available power gain by -1.

As shown in FIG. 8, the transmission loss per 5 mm length of the transmission line of Example 3 was 2.1 dB at 1 GHz, 15.2 dB at 5 GHz, and 29.2 dB at 10 GHz. Here, the transmission loss for 1 GHz is increased because the capacitance generated between the resistance layer 4 and the signal wiring 3 is increased, and the effect of the present invention is strong even for a low frequency band signal. Because it was demonstrated. On the other hand, the transmission loss with respect to 10 GHz is slightly reduced as compared with the first embodiment because the area of the region where the signal wiring 3 and the resistance layer 4 face each other increases as the width of the signal wiring 3 increases. This is because the width of the region other than the facing region of the facing region and the resistance layer 4 is reduced, and the resistance value applied to the high-frequency signal is reduced before the short circuit process.
[Example 4]
As Example 4 in the second embodiment, a transmission line in which the thickness of the dielectric film 2 in Example 2 is reduced from 1 μm to 0.2 μm only in the region where the signal wiring 3 and the resistance layer 4 face each other is created. did. The width of the signal wiring 3 in Example 2 was 50 μm, and the width of the resistance layer 4 was 100 μm. The distance between the signal wiring 2 and the ground conductor layer 5 is 15 μm. Other conditions are the same as in Example 2.

  FIG. 9 is a graph showing the frequency dependence of the passage loss of the transmission line of Example 4. The vertical axis in FIG. 9 indicates the effective loss that occurs in the transmission line when a high-frequency signal passes, and is a value obtained by multiplying the maximum available power gain by -1.

As shown in FIG. 9, the transmission loss per 5 mm length of the transmission line of Example 4 was 2.8 dB at 1 GHz, 18.2 dB at 5 GHz, and 33.2 dB at 10 GHz. Here, the transmission loss in the present embodiment increased because the capacitance generated between the signal wiring 3 and the resistance layer 4 increased due to the reduction of the distance between the signal wiring 3 and the resistance layer 4. This is because the effect of the increase has been increased.
[Example 5]
As Example 5 in the second embodiment, a transmission line was created by changing the dielectric film 2 in Example 2 from a silicon nitride film to a strontium titanate film. Other conditions are the same as in the second embodiment.

FIG. 10 is a graph showing the frequency dependence of the passage loss of the transmission line of Example 5. The vertical axis in FIG. 10 indicates an effective loss that occurs in the transmission line when a high-frequency signal passes, and is a value obtained by multiplying the maximum available power gain by -1.
As shown in FIG. 10, the transmission loss per 5 mm length of the transmission line of Example 5 was 18.2 dB at 1 GHz, 36.1 dB at 5 GHz, and 50 dB or more at 10 GHz. Here, in the transmission line of this example, the transmission loss especially for 1 GHz increased because the dielectric constant of the dielectric film 2 increased to 150 in this example compared to 7 in Example 2. This is because the capacitance generated between the signal wiring 3 and the resistance layer 4 is increased.

As is clear from the results of Examples 3 to 5 described above, it was demonstrated that the effect of the present invention that the transmission loss of the high-frequency signal in the transmission line increases as the capacity Cadd increases.
(Third embodiment)
FIG. 11 is a cross-sectional view schematically showing a configuration of a transmission line according to the third embodiment of the present invention.

  As shown in FIG. 11, the transmission line of the present embodiment includes a dielectric substrate 1, a signal wiring 3 provided on the upper surface of the dielectric substrate 1, and a dielectric covering the upper surface of the dielectric substrate 2 and the signal wiring 3. The film 2, a resistance layer 21 provided on the upper surface of the dielectric film 2 so as to face the signal wiring 3 with the dielectric film 2 interposed therebetween, and a resistance layer 21 connected to the upper surface of the dielectric film 2 A first grounding conductor layer 22 provided and a second grounding conductor layer 23 provided on the lower surface of the dielectric substrate 1 are provided. In other words, the transmission line of the present embodiment reverses the structure of the transmission line of the second embodiment in which the signal wiring 3 is provided on the upper surface of the dielectric film 2 and the resistance layer 4 is provided on the lower surface of the dielectric film 2. It can be considered that the signal wiring 3 is provided on the lower surface of the dielectric film 2 and the resistance layer 21 is provided on the upper surface of the dielectric film 2.

  In the present embodiment, by forming the ground conductor layer 22 after forming the resistance layer 21, a region Rov where the ground conductor layer 22 and the resistance layer 21 are arranged to overlap is formed on the upper surface of the dielectric film 2. The In the actual child form, the width of the overlap region Rov is, for example, 10 μm. Electrical connection is made between the resistance layer 21 and the ground conductor 22 in the overlap region Rov. Therefore, in this embodiment, a through conductor for high-frequency grounding is not necessary.

  The first ground conductor layer 22 and the second ground conductor layer 23 are connected by a through hole or the like (not shown). The second ground conductor layer 23 is not an essential element in the configuration of the present invention. However, in the high-frequency amplifier using the transmission line of the present embodiment, since the ground conductor layer is generally provided on the lower surface of the dielectric substrate 1, the second ground conductor layer 23 is provided as in the present embodiment. Thereby, the transmission line of this embodiment can be easily applied to a high frequency amplifier.

The other points are the same as in the first embodiment.
[Example 6]
As Example 6 in the third embodiment, a transmission line having the configuration of FIG. 11 was created. In this example, the materials of the dielectric substrate 1 and the dielectric film 2 are the same as those of Example 1 of the first embodiment. The signal wiring 3 is composed of a gold film having a thickness of 0.2 μm and a conductivity of 2 × 10 ⁷ S / m, and the resistance layer 21 is nickel chromium having a thickness of 20 nm and a conductivity of 1.5 × 10 ⁵ S / m. It was composed of an alloy film. The nickel-chromium alloy film was formed, for example, by depositing an alloy having a composition ratio of 70% nickel and 30% chromium by electron beam evaporation and depositing it at a growth rate of 1000 angstroms per minute. The widths of the signal wiring 3 and the resistance layer 21 are the same as those of Example 1 of the first embodiment. The material of the ground conductor 22 and the arrangement on the top surface of the dielectric film 2 are the same as in Example 2 of the second embodiment. However, since it is necessary to connect the external circuit and the signal wiring 3 in order to measure the high frequency characteristics, a through conductor that penetrates the dielectric film 2 and is connected to the signal wiring 3 is formed, and the signal wiring 3 The signal was taken out from the lower surface of the dielectric film 2 to the upper surface and measured.

  FIG. 12 is a graph showing the frequency dependence of the transmission loss of the transmission line of Example 6 according to the third embodiment. The vertical axis in FIG. 12 indicates an effective loss that occurs in the transmission line when a high-frequency signal passes, and is a value obtained by multiplying the maximum available power gain by -1.

  As shown in FIG. 12, the transmission loss per 5 mm length of the transmission line of this example was 1.0 dB at 1 GHz, 12.0 dB at 5 GHz, and 20.6 dB at 10 GHz. In this example, substantially the same high-frequency attenuation characteristics as in Example 1 of the first embodiment can be obtained, the change in the connection method between the resistance layer and the ground conductor, and the relationship between the signal wiring, the resistance layer, and the dielectric film. It was shown that the effect of the present invention was not lost even by the change.

  In the transmission line having the structure of Example 1 of the first embodiment and Example 5 of the third embodiment, an arbitrary total number of dielectric layers are arranged on the upper surface of the dielectric film and the lower surface of the dielectric substrate. Even in such a case, the effect of the present invention is not lost.

Further, by applying the transmission line according to the first to third embodiments to a bias supply circuit for an amplifier (semiconductor integrated circuit device) used in a communication device, the isolation characteristic between the bias terminals of each amplifier is improved. I confirmed that. In addition, reduction of parasitic oscillation and more stable operation of the amplifier were confirmed.
(Fourth embodiment)
FIG. 13 is a circuit diagram showing configurations of an output circuit and a bias circuit in a semiconductor integrated circuit (MMIC) functioning as a high-frequency amplifier according to the fourth embodiment of the present invention. 13, the same reference numerals as those in FIG. 1 denote the same or corresponding parts.

  In FIG. 13, the MMIC includes an active element 31, an output terminal Tout, main signal lines 32a and 32b that electrically connect the active element 31 and the output terminal Tout to each other, a main signal line 32b, and an output terminal Tout. A DC blocking capacitor 38 interposed therebetween, a short-circuit stub 33 branched from an intermediate portion of the main signal lines 32a and 32b, a first bypass capacitor 34 interposed between the short-circuit stub 33 and the ground, A bias terminal Tvd for supplying a DC power supply voltage, the first and second transmission lines 35 and 36, and a portion between the second transmission line 36 and the bias terminal Tvd and the ground. And a second bypass capacitor 37 for short-circuiting the signal in the low frequency region. Further, an external bias supply circuit 39 for controlling a bias supplied to the bias terminal Tvd and an external bias terminal Tvo are provided outside the MMIC.

  Here, the active signal 32, the main signal lines 32a and 32b, the DC blocking capacitor 38, and the like constitute the main signal circuit 10 of the MMIC. Further, the short-circuit stub 33 branched from the main signal circuit 10 serves as both an RF matching circuit and a bias supply circuit. The bias supply circuit 40 is configured by the short-circuit stub 33, the first and second transmission lines 35 and 36, and the first and second bypass capacitors 34 and 37. Although not shown in FIG. 13, the main signal lines 32a, 32b, etc. are connected to the output terminal Tout via a matching circuit group such as an arbitrary number of branched short stubs and DC blocking capacitors. Yes. The first bypass capacitor 34 shown in FIG. 13 is an MIM capacitor. The MIM capacitor is inserted between the short-circuit stub 33 and the ground, and the capacitance value is set so that the RF short-circuit is performed with respect to the design frequency band, thereby functioning as the first bypass capacitor 34. .

  The first transmission line 35 of the bias supply circuit 40 has a general microstrip line structure, and the second transmission line 36 is the transmission of the present invention shown in FIG. 1, FIG. 5, or FIG. It has a track structure. An equivalent circuit of the second transmission line 36 is represented by a distributed constant circuit shown in FIG.

  For example, as shown in the lower part of FIG. 13, the second transmission line 36 has the structure of the transmission line shown in FIG. 1 of the first embodiment. The first transmission line 35 includes, for example, the dielectric substrate 1 (for example, a GaAs substrate) common to the second transmission line 36, the signal wiring 3, and the ground conductor layer 11, and the first and second transmission lines. Both 35 and 36 are connected to the external high frequency ground 13 by the solder 12. In the first transmission line 35, a dielectric film may be provided between the dielectric substrate 1 and the signal wiring 3.

  The second transmission line 36 may have the structure shown in FIG. When the second transmission line has the structure shown in FIG. 5, it is preferable that the first transmission line 35 has a coplanar line structure. When the second transmission line 36 has the structure shown in FIG. 9, the signal line 3 is directly formed on the dielectric substrate 1 in the second transmission line 36, and then the dielectric film 2. Then, the resistance layer 21 and the ground conductor 22 are formed.

  According to the semiconductor integrated circuit device of the present embodiment, by incorporating the second transmission line 6 having a high attenuation function of high-frequency power, it is not necessary to provide a capacitor that has been conventionally required to prevent parasitic oscillation. Miniaturization of the MMIC can be achieved.

  The second bypass capacitor 37 may be disposed in the external bias supply circuit 39 outside the amplifier instead of being incorporated in the amplifier.

  For electrical connection between the inside and the outside of the amplifier at the bias terminal Tvd, a connection method using wire bonding, bumps, or the like can be employed.

  In the case of a multistage amplifier, in the case where a bias supply circuit to the active element of each stage driven at the same potential is shared, the bias terminal Tvd may be shared inside the amplifier.

  In the prior art, the first bypass capacitor 114 and the RC series circuit 123 are connected in parallel as shown in FIG. 25 in order to reduce unnecessary gain at a frequency lower than the design frequency band and improve stability. Arranged circuit structures are widely used. Here, in the RC series circuit 123, the resistor 121 and the third bypass capacitor 122 function as a distributed constant circuit, and the arrangement order of the resistor and the capacitor is reversed, whereby the present invention as shown in FIG. It can be seen that an equivalent circuit of the transmission line can be obtained, and both can achieve the same effect in terms of circuit.

  Therefore, according to the amplifier of the present invention, since the low frequency band signal that is not terminated by the first bypass capacitor 34 is attenuated in the second transmission line 36 of the bias supply circuit 40, the stability is improved and the unnecessary gain is increased. It can be understood that it is possible to reduce the intensity of the signal leaking to the external circuit of the amplifier.

  FIG. 14 is a block diagram schematically showing an example of the planar structure of the entire one-stage amplifier that is the GaAs-based MMIC according to the present embodiment.

  As shown in FIG. 14, the MMIC includes an active element (amplifying MESFET) 31, an output terminal Tout, a main signal line 32, a DC blocking capacitor 38, a short-circuit stub 33, a first bypass capacitor 34, A circuit corresponding to FIG. 13 having a bias terminal Tvd and first and second transmission lines 35 and 36 is provided, and in addition to this, an input circuit is provided. The input circuit is provided with an input terminal Tin, a DC blocking capacitor 49, a main signal line 42, and an input side bias supply circuit 50 branched from the middle of the main signal line 42. The input-side bias supply circuit 50 includes a short-circuit stub 43, an input-side bypass capacitor 44, first and second transmission lines 45 and 46, and a bias terminal Tvd. The second transmission line 46 has the same structure as the second transmission line 36 shown in FIG. Hbi denotes a via hole for short-circuiting the short-circuit stubs 33 and 43 at a high frequency, and reference numerals 51 and 52 denote open stubs.

  FIG. 15 is a block diagram schematically showing an example of the planar structure of the entire conventional MMIC shown in FIG.

  As shown in FIG. 15, the MMIC includes an active element (amplifying MESFET) 111, an output terminal Tout, a main signal line 112, a DC blocking capacitor 118, a short stub 113, a first bypass capacitor 114, , A circuit corresponding to FIG. 25 having a bias terminal Tvd, transmission lines 115a and 115b, a resistor 121 of an RC series circuit 123 (stabilization circuit), and a third bypass capacitor 122, in addition to this. It has a circuit. The input circuit is provided with an input terminal Tin, a DC blocking capacitor 138, a main signal line 132, and an input side bias supply circuit 130 that branches from the middle of the main signal line 132. The input-side bias supply circuit 130 includes a short-circuit stub 133, an input-side bypass capacitor 134, a transmission line 135, a stabilization circuit resistor 141, a third bypass capacitor 142, and a bias terminal Tvd. . Hbi denotes a via hole for short-circuiting the short-circuit stubs 113 and 133 at a high frequency, and reference numerals 151 and 152 denote open stubs.

  As can be seen by comparing FIG. 15 and FIG. 14, by using the transmission line (second transmission line 36, 56) of the present invention for the bias supply circuit 40, while suppressing parasitic oscillation and leakage of high-frequency power, It is possible to reduce the area occupied by the entire MMIC (integrated circuit device), that is, to reduce the size.

  In the configuration example shown in FIG. 14, the second bypass capacitor 37 shown in FIG. 13 is not incorporated in the MMIC, but the second bypass capacitor 37 may be incorporated in the MMIC.

  In the multistage amplifier, the transmission line of the present invention (see FIGS. 5, 1 and 9) can be used in any of the input circuit, the interstage circuit, and the output circuit.

  The semiconductor integrated circuit device of the present invention is not limited to the high-frequency amplifier described in the present embodiment, and is widely used as a mixer (mixer), a frequency multiplier, a switch, an attenuator, a frequency divider, and a quadrature modulator. It can be applied to a device using a high frequency signal such as.

As the active element, a field effect transistor, a heterojunction bipolar transistor, or the like can be used.
[Example 7]
As Example 7 of the fourth embodiment, a one-stage amplifier having the MMIC configuration of FIG. 13 was created under the following conditions.

  As the active element 31, a T-type gate AlGaAs / InGaAs heterojunction FET (gate width Wg = 100 μm) having a gate length of 0.2 μm was used. The dielectric film 2 is composed of a silicon nitride film having a thickness of 1 μm, and the dielectric substrate 1 is composed of a gallium arsenide substrate having a thickness of 100 μm. As the signal wiring 3, a gold film having a thickness of 3 μm was formed by plating. As the resistance layer 4, an impurity diffusion layer having a thickness of 0.2 μm was formed on the surface layer portion of the upper surface of the gallium arsenide substrate 1. A microstrip line having the signal wiring 3 as a signal line was used as the transmission line, and an AuSn film having a thickness of 10 μm was formed as the ground conductor layer 11 on the lower surface of the gallium arsenide substrate.

Then, the amplifier of this embodiment was designed with the design frequency being 25 GHz to 27 GHz. For the drain side circuit (output circuit) of the amplifier, a short-circuit stub matching circuit was used, and the tip of the stub 33 was connected to the via hole via a 0.5 pF bypass capacitor 34 for short-circuit processing. The via hole penetrates the gallium arsenide substrate 1 and is connected to the ground conductor layer 11 on the lower surface. A part of the upper electrode of the bypass capacitor 34 was branched with a width of 20 μm and connected to the signal wiring of the transmission line of the bias supply circuit 40. Since the capacitance value 0.5 pF of the bypass capacitor 34 is a value sufficient for short-circuiting the signal in the design frequency band, the bias supply circuit 40 is open from the amplifier in the design band. The length of the signal wiring 3 and the length of the resistance layer 4 were both 300 μm, and the width of the signal wiring 3 and the width of the resistance layer 4 were 30 μm and 80 μm, respectively. One via hole as a through conductor 6 was provided on one side of the resistance layer 4 and connected to the ground conductor layer 11, and the resistance layer 4 was short-circuited. The via hole connected to the resistance layer 4 and the via hole in which the short-circuit stub 33 was short-circuited were the same. The bias supply circuit 40 was terminated with a square-shaped bias terminal Tvd having a side of 80 μm, and connected to an external bias supply circuit 39 outside the amplifier formed on the multilayer ceramic substrate by wire bonding. In the external bias supply circuit 39 outside the amplifier, the low frequency band is short-circuited with a chip capacitor of 100 pF. The amplifier obtained a small signal gain of 9.2 dB from 25 GHz to 27 GHz. In addition, the stability coefficient K exceeded 1 in all frequency bands, and stable operation was confirmed. Further, the stability factor K did not change even when the electrical length of the wiring from the power source to the bias terminal Tvd, the characteristic impedance, the length of the wires to be connected, and the number of wires were changed in the bias supply circuit 39 outside the amplifier.
[Comparative Example 2]
On the other hand, as Comparative Example 2, a high frequency amplifier having a structure in which the resistance layer 4 was removed from the high frequency amplifier of Example 7 was prepared.

  FIG. 16 is a graph comparing the frequency dependence of the stability factor K between the high-frequency amplifier according to the seventh embodiment and the high-frequency amplifier according to the second comparative example. In FIG. 16, the broken line indicates the characteristics of the high-frequency amplifier of the seventh embodiment, and the solid line indicates the characteristics of the high-frequency amplifier of the comparative example 2. As can be seen from FIG. 16, in the amplifier of Example 7 employing the structure of the present invention, the stability coefficient K is 1 or more over the frequency of 0 to 20 GHz, and a stable characteristic is obtained. In the amplifier of Example 2, the stability coefficient K is 0.91 at 16 GHz and 0.61 at 20 GHz, which is less than 1, and it is difficult to guarantee stable operation.

  Then, the amplifier of Comparative Example 2 was examined for the presence or absence of an oscillation operation on the external bias supply circuit formed on the multilayer ceramic substrate with the wiring length from the wire to the power supply being 2 mm and the characteristic impedance of the wiring line being 75Ω. . And about 80 amplifiers which did not oscillate at this time, when wiring length was changed into 5 mm, 32 amplifiers oscillated among 80 amplifiers. Further, regarding the 80 amplifiers that did not oscillate, when the characteristic impedance of the wiring was changed to 40Ω, 9 amplifiers oscillated.

  Furthermore, in the amplifier of Comparative Example 2, the length of the bonding wire used for connecting the bias terminal was set to 0.5 mm, and oscillation did not occur in the state where the connection was made with one wire having a diameter of 50 μm for each terminal. For 80 amplifiers, when the bonding wire length was changed to 1 mm, 40 amplifiers oscillated. Further, regarding the 80 amplifiers that did not oscillate, when the number of wires connected was changed to 2, 12 amplifiers oscillated.

  Further, when comparing the stability coefficient K in the low frequency band of about 3 GHz to 6.5 GHz of the amplifier, the amplifier of the seventh embodiment obtains a value of 6 or more, and the amplifier of the second comparative example operates stably. The value was less than 1 and was unstable. Furthermore, in the amplifier of Comparative Example 2, 20% of the 100 manufactured amplifiers oscillated in a frequency band near 5 GHz due to characteristic variations of active elements.

  From the above comparison, in the MMIC of the present embodiment, it is possible to attenuate the high-frequency signal leaking from the short-circuit stub circuit 33 to the bias supply circuit 40, so that the external bias supply circuit connected to the outside of the bias supply circuit 40 It can be seen that the effect of the 39 impedance change on the characteristics of the amplifier can be reduced, and the advantageous effect of stably operating the amplifier is obtained.

  FIG. 17 is a graph comparing the frequency dependence of the small signal gain between the high frequency amplifier of Example 7 and the high frequency amplifier of Comparative Example 2. In FIG. 17, the broken line indicates the characteristic of the amplifier of Example 7, and the solid line indicates the characteristic of the amplifier of Comparative Example 2.

As shown in FIG. 17, an unnecessary gain was obtained in the band of 4 GHz to 7 GHz, which is an unnecessary band, in the amplifier of Comparative Example 2, but in the amplifier of Example 7, a low frequency band (unnecessary band) of less than 19.5 GHz. It can be seen that the gain of the signal does not take a positive value, and the adoption of the structure of the present embodiment provides an advantageous effect of reducing unnecessary gain in the low frequency band. Further, in the amplifier of Comparative Example 2, a gain of 10 dB or more exceeding the gain in the design frequency band (25 to 27 GHz) was obtained at a frequency near 20 GHz, but in the amplifier of Example 7, the gain of 20 GHz is 0 dB. Also in the band, it can be seen that the advantageous effect of reducing unnecessary gain was obtained by adopting this structure.
[Comparative Example 3]
As Comparative Example 3 in the present embodiment, a high-frequency amplifier having the configuration of FIG. 24 having a bias supply circuit in which a resistor 119 is inserted in series in a bias supply path was created. In this comparative example, the resistance value R1 of the resistor 119 is set to 20Ω so as not to drastically reduce the drive voltage of the active element.

  FIG. 18 is a graph comparing the high frequency amplifier of the seventh embodiment and the high frequency amplifier of the comparative example 3 with respect to the frequency dependence of the stability coefficient K. FIG. 19 shows the high frequency amplifier of the seventh embodiment and the high frequency amplifier of the comparative example 3. It is a graph which compares about the frequency dependence of a small signal gain.

  As shown in FIG. 18, the stability factor K of the amplifier of Comparative Example 3 is significantly lower than the characteristics of the amplifier of Example 7 in the low frequency band near 5 GHz to 10 GHz and the band of 20 GHz or more, and the stability is deteriorated. did. Here, the stability factor K of the amplifier of Comparative Example 3 is higher than 1 at 5 GHz to 10 GHz, so that no major problem occurs. However, it is lower than 1 in the band of 20 GHz or higher, and a large problem occurs in stable operation. Oops.

  In the amplifier of Comparative Example 3, the high-frequency signal that passes through the bias supply circuit and leaks to the external circuit is attenuated to a certain amount in a wide band by the resistor 119 inserted in series in the bias supply path. On the other hand, in the bias supply circuit 40 in the amplifier of the seventh embodiment, the signal wiring 3 and the resistance layer 4 (see FIG. 1) are opposed to each other as an element that attenuates the leakage signal of the high frequency signal. Since the distributed constant circuit is spatially distributed along a certain area (see FIG. 4B), the amount of attenuation increases as the frequency of the leaked signal increases. Therefore, it is difficult for the amplifier of the comparative example 3 to improve the stability with respect to the highest frequency component among the leakage signals that are not completely short-circuited by the first bypass capacitor 114 shown in FIG. This amplifier is easy.

  The amplifier of Comparative Example 3 also has a certain effect of reducing unnecessary gain in the low frequency band, but the small signal gain at 6 GHz is -1 dB. The small signal gain in this band in the amplifier of the seventh embodiment is about -8 dB, and the unnecessary gain is effectively reduced in the amplifier of the comparative example 3 under the condition that the resistance value of the inserted resistor 119 cannot be set large. It turned out to be difficult to suppress. In the amplifier of Comparative Example 3 shown in FIG. 24, when the resistance value of the resistor 119 inserted to obtain an effect of reducing unnecessary gain is set large, the resistor 119 is applied to the active element 111 from the bias terminal Tvd. Needless to say, the voltage drops and the output drops. The saturation output at 25 GHz of the amplifier of Comparative Example 3 is 16.2 dBm, which is lower by 0.4 dB than the saturation output of 16.6 dBm at 25 GHz of the amplifier of Example 7. This is because, in the amplifier of Comparative Example 3, the drive voltage of the active element 111 has dropped due to the insertion of the resistor 119 into the bias supply circuit.

As described above, comparing the characteristics of the amplifier of Comparative Example 3 and the amplifier of Example 7, the adoption of the transmission line of the present invention has the advantage of reducing unnecessary gain and improving stability without reducing the drive voltage of the active element. It was shown that it is possible to obtain a special effect.
[Comparative Example 4]
As Comparative Example 4 in the present embodiment, a high-frequency amplifier having the configuration of FIG. 25 having a bias supply circuit 120C in which a high-frequency signal is short-circuited in parallel by an RC series circuit 123 was created.

  FIG. 20 is a graph comparing the high frequency amplifier of the seventh embodiment and the high frequency amplifier of the comparative example 4 with respect to the frequency dependence of the stability coefficient K, and FIG. 21 shows the high frequency amplifier of the seventh embodiment and the high frequency amplifier of the comparative example 4. It is a graph which compares about the frequency dependence of a small signal gain. In this comparative example, the circuit constant of the RC series circuit 123 was selected as R = 10Ω and C = 10 pF.

  As shown in FIG. 21, also in Comparative Example 4, a large suppression effect of gain in the low frequency region was obtained. As shown in FIGS. 20 and 21, the amplifier of the comparative example 4 has the same effects as the amplifier of the seventh embodiment in both unnecessary gain suppression and stability improvement in a low frequency band of about several GHz. Has been obtained. However, in order to obtain a capacitance value of 10 pF with the MIM capacitor, an area of 210 μm square is required (capacitor 122 shown in FIG. 15), and a via hole (via hole Hbi1 shown in FIG. 15) is required in the short-circuit processing circuit. In order to realize a resistance of 10Ω with a mesa resistor (resistor 121 shown in FIG. 15), a corresponding circuit area is required, which greatly limits the circuit layout. On the other hand, in the amplifier layout of Example 7, compared to the amplifier layout of Comparative Example 2, a resistive layer 4 is provided directly below the signal wiring 3 via the dielectric film 2, and a via hole is disposed in the vicinity thereof. The restrictions on the layout are relaxed, and the same effect is obtained.

  From the above comparison, it is shown that the adoption of the transmission line of the present invention can provide the advantageous effects of reducing unnecessary gain and improving stability without increasing the circuit area of the semiconductor integrated circuit device constituting the amplifier. It was done.

In the amplifier of Comparative Example 4, the transmission lines that constitute the bias supply circuit 120C between the bypass capacitors and the bias supply circuit 120C are ordinary microstrip lines that use a circuit board composed of a dielectric substrate and a dielectric film as a substrate. However, there are many distributions of the electric field to the air layer on the upper surface of the board, and there is a difficulty that coupling with peripheral circuits is likely to occur, and depending on the arrangement of circuit components, it may be caused by unintentional electromagnetic coupling between circuits Possible oscillation may occur.
On the other hand, in the second transmission line 36 (see FIG. 13) of the bias supply circuit which is a feature of the present invention, the distance between the signal wiring 3 and the resistance layer 4 is set short. The characteristic impedance of 36 is low, the electric field distribution is concentrated on the dielectric film 2, and the electromagnetic coupling with the peripheral circuit can be greatly reduced. Therefore, the amplifier of the seventh embodiment has an advantageous effect that the high frequency characteristics do not change even when the arrangement of the circuit components is changed.

From the above comparison, by adopting the transmission line of the present invention, it is possible to obtain the advantageous effects of reducing unnecessary gain and improving stability without reducing the driving voltage of the active element without increasing the circuit area. It became clear that this is possible.
[Example 7b and Comparative Examples 2b to 4b]
As Example 7b in the present embodiment, an amplifier in which the configuration of the amplifier of Example 7 is adopted in a two-stage amplifier, and a bias supply circuit for driving active elements in the front and rear stages is configured by the bias supply circuit of Example 7. Created.

Further, as Comparative Examples 2b to 4b in the present embodiment, the configuration of the amplifiers of Comparative Examples 2 to 4 is adopted in a two-stage amplifier, and bias supply circuits for driving the active elements in the front and rear stages are respectively used as Comparative Examples 2 to 4. Each of the amplifiers configured with a bias supply circuit was prepared.
In this case, the amplifiers of Comparative Examples 2b and 3b oscillated at 20 GHz, but the amplifiers of Example 7b and Comparative Example 4b did not oscillate. The phase of the feedback signal in which the signal output from the subsequent active element of the two-stage amplifier returns to the previous active element via the bias supply circuit shared inside the amplifier is the sum of the electrical lengths of the respective short-circuit stubs in the front and rear stages, It depends on the sum of the electrical lengths of the transmission lines of the bias supply circuits at each stage. In the produced amplifiers of Example 7b and Comparative Examples 2b to 4b, the sum of the electrical lengths is a value close to a half wavelength with respect to 20 GHz, and the output from the subsequent active element is directed to the active element in the previous stage. It was a condition to input with a positive feedback phase. It can be understood that the oscillation phenomenon that occurs in the amplifier of Comparative Example 2b is due to the fact that no attenuation occurs in the positive feedback signal. Also, it can be understood that the amplifier of Comparative Example 3b oscillated because the amount of attenuation received by the positive feedback signal in the bias supply circuit was insufficient.

  On the other hand, the amplifier of Example 7b and the amplifier of Comparative Example 4b are different in structure, but both have a function of giving a loss to an unnecessary frequency band signal leaking to the bias supply circuit. It is understood that no oscillation occurred because the feedback signal from the active element to the previous active element was attenuated. Further, comparing the amplifier of Example 7b with the amplifier of Comparative Example 4b from the viewpoint of the area occupied by the circuit, the amplifier of Comparative Example 4b requires a large bypass capacitor of 10 pF separately in the front stage and the rear stage. Although the circuit area is required, the amplifier of Example 7b does not require a large-capacity bypass capacitor, and the advantageous effect of the present invention that the stable operation can be ensured while reducing the occupied area is clear. It has become.

  Therefore, by using the transmission line of the present invention for a bias supply circuit in a semiconductor integrated circuit device such as an amplifier, the drive voltage of the active element is not lowered and an increase in the occupied area of the semiconductor integrated circuit device is suppressed. However, it is possible to suppress the characteristic change due to the impedance change of the bias supply circuit outside the semiconductor integrated circuit device to which the bias supply circuit is connected, and to obtain advantageous effects such as reduction of unnecessary gain and improvement of stability.

  In particular, the semiconductor integrated circuit device of the present invention greatly contributes to expanding the application of the semiconductor integrated circuit device to the millimeter wave communication system.

  In the first to third embodiments including Examples 1 to 7, a GaAs substrate is used as the dielectric substrate. However, the present invention is not limited to the embodiment, and a GaN substrate or an InP substrate. May be used. Further, an insulating substrate made of an oxide or the like may be used as the dielectric substrate. Furthermore, the phrases “dielectric substrate” and “semiconductor substrate” are not necessarily used in a strict sense. The GaAs substrate is sometimes referred to as a “semi-insulating substrate” and functions as a semiconductor substrate when doped with impurities. Therefore, various substrates can be used as the substrate of the present invention according to the basic structure of the high-frequency line.

  From the foregoing description, many modifications and other embodiments of the present invention are obvious to one skilled in the art. Accordingly, the foregoing description should be construed as illustrative only and is provided for the purpose of teaching those skilled in the art the best mode of carrying out the invention. The details of the structure and / or function may be substantially changed without departing from the spirit of the invention.

  The transmission line according to the present invention is useful as a transmission line used in a semiconductor integrated circuit.

  The semiconductor integrated circuit according to the present invention is useful as a semiconductor integrated circuit constituting an amplifier, a mixer, a frequency multiplier, a switch, an attenuator, a frequency divider, a quadrature modulator, and the like.

It is sectional drawing which shows the structure of the transmission line which concerns on the 1st Embodiment of this invention. It is a top view which shows the planar structure of the transmission line of FIG. It is a graph which shows the frequency dependence of the passage loss of the transmission line of Example 1 in the 1st Embodiment of this invention. 4A is an equivalent circuit diagram of a conventional transmission line, and FIG. 4B is an equivalent circuit diagram of the transmission line of the present invention. It is sectional drawing which shows schematically the structure of the transmission line which concerns on the 2nd Embodiment of this invention. It is a top view which shows the planar structure of the transmission line of FIG. It is a graph which shows the frequency dependence characteristic of the passage loss of the transmission line of Example 2 in the 2nd Embodiment 2 of this invention. It is a graph which shows the frequency dependence of the passage loss of the transmission line of Example 3 in the 2nd Embodiment 2 of this invention. It is a graph which shows the frequency dependence of the passage loss of the transmission line of Example 4 in the 2nd Embodiment 2 of this invention. It is a graph which shows the frequency dependence of the transmission loss of the transmission line in Example 5 in the 2nd Embodiment 2 of this invention. It is sectional drawing which shows roughly the structure of the transmission line which concerns on the 3rd Embodiment of this invention. It is a graph which shows the frequency dependence of the passage loss of the transmission line of Example 6 in 3rd Embodiment. It is a circuit diagram which shows the structure of the output circuit and bias circuit in the semiconductor integrated circuit which functions as a high frequency amplifier based on the 4th Embodiment of this invention. It is a block diagram which shows roughly an example of the planar structure of the whole 1 step | paragraph amplifier which is GaAs type | system | group MMIC which concerns on this embodiment. FIG. 26 is a block diagram schematically showing an example of a planar structure of the entire conventional MMIC shown in FIG. 25. It is a graph which compares the high frequency amplifier of Example 7 in the 4th Embodiment of this invention, and the high frequency amplifier of the comparative example 2 regarding the frequency dependence of the stability factor K. It is a graph which compares the high frequency amplifier of Example 7 in the 4th Embodiment of this invention, and the high frequency amplifier of the comparative example 2 regarding the frequency dependence of a small signal gain. It is a graph which compares the high frequency amplifier of Example 7 in the 4th Embodiment of this invention, and the high frequency amplifier of the comparative example 3 regarding the frequency dependence of the stability factor K. It is a graph which compares the high frequency amplifier of Example 7 in the 4th Embodiment of this invention, and the high frequency amplifier of the comparative example 3 regarding the frequency dependence of a small signal gain. It is a graph which compares the high frequency amplifier of Example 7 in the 4th Embodiment of this invention, and the high frequency amplifier of the comparative example 4 regarding the frequency dependence of the stability coefficient K. It is a graph which compares the high frequency amplifier of Example 7 in the 4th Embodiment of this invention, and the high frequency amplifier of the comparative example 4 regarding the frequency dependence of a small signal gain. FIG. 22A is a cross-sectional view schematically showing the structure of a conventional microstrip line, and FIG. 22B is a cross-sectional view schematically showing the structure of a conventional coplanar line. It is a circuit diagram which shows the circuit structure of the output side in the module which functions as a high frequency amplifier which is a 1st prior art example. It is a circuit diagram which shows the circuit structure of the output side in the high frequency amplifier which added the structure for Q value reduction of resonance which is a 2nd prior art example. It is a block circuit diagram which shows the circuit structure of the output side in the high frequency amplifier which added another structure for resonance Q value reduction which is a 3rd prior art example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Dielectric board | substrate 2 Dielectric layer 3 Signal wiring 4 Capacitance resistor layer 5 Ground conductor 6 Through electrode 10 Main signal circuit 11 Ground conductor film 12 Solder 13 External high frequency ground 21 Capacitor resistor 31 Active element 32 Main signal line 33 Short-circuit stub 34 First bypass capacitor 35 First transmission line 36 Second transmission line 37 Second bypass capacitor 38 DC blocking capacitor 39 External bias supply circuit 40 Bias supply circuit 42 Main signal line 43 Short-circuit stub 44 Input-side bypass capacitor 45 First transmission line 46 Second transmission line 50 Input side bias supply circuit 51 Open stub 52 Open stub Rov Overlap region

The transmission line has a first transmission line connected to the main signal circuit and a second transmission line connected to the first transmission line, and the first transmission line is a coplanar line or a micro line. It is composed of a strip line, the second transmission line is composed of at least a part of the transmission line, and the end of the first transmission line on the main signal circuit side is connected to a ground terminal via a bypass capacitor. May be. With such a configuration, it is possible to more effectively reduce unnecessary high frequency power (in a frequency band) leaking from the main signal circuit to the bias supply circuit while suppressing an increase in circuit area.

Claims (17)

Signal wiring,
A resistance layer facing the signal wiring across a dielectric layer;
A grounding conductor electrically connected to the resistance layer;
When a high-frequency signal having a predetermined frequency is transmitted through the signal wiring, a high-frequency current induced in the resistance layer through a capacitor formed between the signal wiring and the resistance layer by the dielectric layer is A resistance per unit length generated when flowing between the resistance layer and the resistance layer and the grounding conductor is defined as an additional resistance, and a unit generated when the high-frequency current flows through the grounding conductor. A transmission line in which the additional resistance is larger than the ground resistance when a resistance per length is defined as a ground resistance.   The transmission line according to claim 1, wherein the length of the resistance layer is 1/16 or more of an effective wavelength λ of a signal having an upper limit frequency of the high-frequency signal.   The transmission line according to claim 1, wherein a conductivity of a material constituting the resistance layer is smaller than a conductivity of the grounding conductor. The transmission line according to claim 1, wherein the conductivity of the material constituting the resistance layer is 1 x 10 ³ S / m or more and 1 x 10 ⁷ S / m or less. The transmission line according to claim 4, wherein the conductivity of the material constituting the resistance layer is 1 × 10 ³ S / m or more and 1 × 10 ⁵ S / m or less.   The resistance layer is at least one selected from chromium, nickel chromium alloy, iron-chromium alloy, thallium, chromium-silicon oxide composite, titanium, impurity-containing semiconductor, and polycrystalline or amorphous semiconductor of polysilicon. The transmission line according to claim 1, comprising one material.   The transmission line according to claim 1, wherein a width of the resistance layer is larger than a width of the signal wiring.   The transmission line according to claim 7, wherein the resistance layer is formed to face the signal wiring over the entire width thereof. The signal wiring is formed on an upper surface of the dielectric layer;
The resistive layer is formed between the substrate and the dielectric layer;
The grounding conductor is formed on the lower surface of the substrate;
The transmission line according to claim 8, wherein the resistance layer is connected to the grounding conductor by a through conductor penetrating the substrate.   The transmission line according to claim 9, wherein the through conductor is formed at an edge of the resistance layer.   The transmission line according to claim 9, wherein the plurality of through conductors are formed at intervals in the length direction of the resistance layer. The signal wiring is formed on an upper surface of the dielectric layer;
The resistive layer is formed between the substrate and the dielectric layer;
The grounding conductor is formed on the top surface of the dielectric layer;
The transmission line according to claim 8, wherein the resistance layer is connected to the grounding conductor by a through conductor penetrating the dielectric layer. The signal wiring is formed between the substrate and the dielectric layer,
The resistive layer is formed on an upper surface of the dielectric layer;
The transmission line according to claim 8, wherein the grounding conductor is formed on an upper surface of the dielectric layer so as to be connected to the resistance layer. A main signal circuit in which one or more active elements are arranged, and a bias supply circuit having a transmission line and supplying a bias to the main signal circuit through the transmission line,
9. A semiconductor integrated circuit device, wherein at least a part of the transmission line is constituted by the transmission line according to claim 8.   The transmission line has a first transmission line connected to the main signal circuit and a second transmission line connected to the first transmission line, and the first transmission line is a coplanar line or a micro line. The first transmission line is formed of at least a part of the transmission line, and the main signal circuit side end of the first transmission line is connected to a ground terminal via a bypass capacitor. The semiconductor integrated circuit device according to claim 14. The semiconductor integrated circuit device is a one-stage high-frequency amplifier having one amplifying transistor as the one or more active elements,
The bias supply circuit includes at least one bias of an input-side circuit that is upstream of the active element of the main signal circuit and an output-side circuit that is downstream of the active element of the main signal circuit. 15. The semiconductor integrated circuit device according to claim 14, which is a supply circuit. The semiconductor integrated circuit device is a multi-stage high-frequency amplifier having a plurality of amplification transistors as the one or more active elements,
The bias supply circuit includes an input-side circuit that is upstream of the active element of the main signal circuit, an output-side circuit that is downstream of the active element of the main signal circuit, and the plurality of amplification transistors The semiconductor integrated circuit device according to claim 16, wherein the semiconductor integrated circuit device is at least one bias supply circuit of the inter-stage circuit.

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