JP2005286707A - Zero-cross signal output unit, image processor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a zero-cross signal by removing the influence of noise from the output signal of an AC power supply. <P>SOLUTION: The zero-cross signal output unit comprises a half-wave shaping circuit 1 for generating a half-wave shaping signal based on the output signal from an AC power supply PW, a circuit 2 for delaying the half-wave shaping signal using a capacitor C1, and a circuit 4 for generating the exclusive OR signal of the half-wave shaping signal, before and after being delayed through the delay circuit 2, from an XOR detection element 3 and outputting a zero-cross signal based on the exclusive OR signal. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a zero-cross signal output device that outputs a zero-cross signal based on an output signal of an AC power supply, and an image processing device including the same.

An image processing apparatus such as a printer, a facsimile machine, or a digital multi-function peripheral has a zero-cross signal output circuit (an example of a zero-cross signal output apparatus) that outputs a zero-cross signal based on an output signal of an AC power source, and uses the zero-cross signal. By interrupting the control CPU (executing interrupt processing), power failure monitoring, phase control for controlling the power supplied to the heater of the fixing device, detection of the power supply frequency (50 Hz / 60 Hz), etc. are performed. .
Conventionally, Patent Document 1 discloses a technique for outputting a zero-cross signal by half-wave rectifying an output signal of an AC power supply and inputting the half-wave rectified signal to a comparator.
However, in this case, since only the zero cross signal for each cycle of the output signal of the AC power supply can be obtained, in order to perform the zero cross control for each half cycle, the rising edge trigger and the falling edge trigger of the zero cross signal in the CPU Must be switched alternately, which is not realistic.
Therefore, a general zero-cross signal output circuit generates (outputs) a zero-cross signal by full-wave rectifying the output signal of the AC power supply and inputting the full-wave rectified signal to a comparator.
FIG. 4 is a diagram illustrating voltage waveforms of an AC signal and a zero-cross signal in the conventional zero-cross signal output circuit A.
4A is an AC signal (AC power supply output signal) input to the zero-cross signal output device A, FIG. 4B is a full-wave rectified signal obtained by full-wave rectification of the AC power supply output signal, c) represents a zero-cross signal output based on the full-wave rectified signal, and (d) represents an enlarged view of a part of the zero-cross signal.
In the conventional zero-cross signal output circuit A, the full-wave rectified signal is input to the comparator, and the output signal of the comparator that detects whether or not the input signal has fallen below a predetermined set voltage level VL is the zero-cross signal (c). To do.
In this case, if noise (voltage fluctuation) occurs in the output signal of the original AC power supply, at the rising edge and the rising edge of the zero cross signal (FIG. 4C), the pulsed noise as shown by the broken line in FIG. Will occur. If noise as shown in FIG. 4D is generated in the zero cross signal, unnecessary interrupt processing occurs in the CPU using the zero cross signal, and the device malfunctions.
Conventionally, in order to prevent malfunction of interrupt processing due to noise generated in a zero cross signal, Patent Document 1 discloses that an interrupt is prohibited for a predetermined time after an interrupt is generated by a zero cross signal. As a result, the occurrence of noise near the zero-cross detection voltage in the AC signal can prevent a malfunction in which the zero-cross signal is continuously turned ON / OFF and unnecessary interrupt processing occurs.
On the other hand, Patent Document 2 discloses a method in which an output signal of an AC power supply is half-wave rectified and zero-cross detection is performed based on the half-wave rectified signal.
JP 59-22439 A JP 2002-272089 A

However, the technique disclosed in Patent Document 2 has a problem in that it does not prevent noise itself in a zero-cross signal. Further, as disclosed in Patent Document 2, when a time zone for prohibiting interrupts is provided, there is a problem that the pulse width of the zero cross signal (time from ON to OFF), which is a relatively short time width, cannot be detected.
Accordingly, the present invention has been made in view of the above circumstances, and its object is to provide a zero-cross signal output device capable of obtaining a zero-cross signal from which the influence of noise has been removed from the output signal of an AC power supply, and the same. The object is to provide an image processing apparatus.

In order to achieve the above object, the present invention provides a zero-cross signal output device that outputs a zero-cross signal based on an output signal of an AC power supply, and generates a half-wave shaped signal based on the output signal of the AC power supply. A signal generation means, a delay means for delaying the half-wave shaping signal using a capacitor or an inductance, and the exclusive OR signal of each signal before and after the half-wave shaping signal is delayed by the delay means, And a zero-cross signal output means for outputting a zero-cross signal based on an exclusive OR signal.
With such a configuration, it is possible to prevent noise pulses from occurring at either the rising edge or the falling edge of the output zero-cross signal.
That is, the noise pulse component of the noise pulse generated in the half-wave shaping signal before the delay input to the delay means is absorbed by the capacitor. Therefore, the delayed half-wave shaping signal on the output side of the delay means does not include a noise pulse. Therefore, in the exclusive OR (XOR) signal (zero cross signal) for each half-wave shaping signal before and after the delay, as described later, in the case of positive logic (high level output at zero cross), the exclusive OR signal rises. No noise pulse occurs at the falling edge. Similarly, in the case of negative logic (Low level output at zero crossing), no noise pulse occurs at the rising edge portion of the exclusive OR signal.
In addition, a zero cross signal can be obtained every half cycle of the output signal of the AC power supply.
In this case, if the delay time by the delay means is set longer than the generation period of the noise pulse generated in the half-wave shaping signal, the generation of the noise pulse at one edge portion of the output zero-cross signal is prevented. It can be surely prevented.

The zero-cross signal output means limits the maximum current of the signal that flows to the primary side of the photocoupler and the photocoupler output means that outputs the zero-cross signal via the photocoupler based on the exclusive OR signal. And a current limiting means.
Generally, a photocoupler is used in a zero cross signal output unit for signal insulation, but a resistance element is provided in a signal path of a signal flowing on the primary side of the photocoupler. However, in this case, when each voltage on the primary side rises due to voltage fluctuation of the AC power supply, an excessive current flows through the photocoupler.
However, according to the above configuration, since the current flowing through the photocoupler is limited, stable operation of the photocoupler (that is, stabilization of the secondary zero-cross signal) and power consumption can be suppressed.
Further, it is conceivable that the half-wave shaping signal generating means differentially inputs the output signal of the AC power supply to a comparator and uses the output signal as the half-wave shaping signal.
Thus, even if common mode noise occurs in the AC power supply, this is canceled out by the differential input, so that the influence of common mode noise can be removed from the zero cross signal.

The half-wave shaping signal generating means inputs the output signal of the AC power supply to a comparator whose output signal is positively fed back through a resistance element and a capacitor, and uses the output signal as the half-wave shaping signal. Can be considered.
As a result, on the input side of the comparator, the input voltage is temporarily shifted to the positive voltage side when a zero cross from the negative voltage to the positive voltage occurs, and is temporarily input when the zero cross from the positive voltage to the negative voltage occurs. The voltage is shifted to the negative voltage side. By obtaining such hysteresis characteristics, noise pulse generation at the time of zero crossing can be suppressed.
The present invention may also be understood as an image processing apparatus that includes each of the zero cross signal output devices and a control unit that performs interrupt processing using the zero cross signals output thereby.

  According to the present invention, a half-wave shaping signal generating means for generating a half-wave shaping signal based on an output signal of an AC power supply, a delay means for delaying the half-wave shaping signal, and the half-wave shaping signal being delayed An exclusive OR signal output means for outputting an exclusive OR signal of each signal before and after being delayed by the means, and a zero cross signal output means for inputting the exclusive OR signal and outputting a zero cross signal. The noise pulse component is absorbed by the means, and the generation of the noise pulse can be prevented at either the rising edge or the falling edge in the zero cross signal. As a result, it is possible to prevent malfunction of the CPU that performs interrupt processing using the zero cross signal. In addition, a zero cross signal can be obtained every half cycle of the output signal of the AC power supply.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings so that the present invention can be understood. The following embodiment is an example embodying the present invention, and does not limit the technical scope of the present invention.
1 is a block diagram showing a schematic configuration of an image processing apparatus Z provided with a zero-cross signal output circuit X according to an embodiment of the present invention, FIG. 2 is a circuit diagram of the zero-cross signal output circuit X, and FIG. 3 is a zero-cross signal. FIG. 4 is a diagram showing the voltage waveforms of the AC signal and the zero cross signal in the conventional zero cross signal output circuit A, and FIG.

First, the configuration of an image processing apparatus Z including a zero-cross signal output circuit X according to an embodiment of the present invention will be described using the block diagram of FIG.
The image processing device Z includes a zero-cross signal output circuit X, a control unit 300, a display operation unit 301, a document reading unit 302, an image forming unit 303, a communication unit 304, an image processing unit 305, an image memory 306, a paper feeding device 307, and the like. A program memory 308 is provided.
The control unit 300 includes a CPU, a ROM, a RAM, and the like, and controls the entire image forming apparatus Z.
The display operation unit 301 includes a liquid crystal touch panel, a display lamp, a sheet key, or the like, and is a means for inputting information display to the user and user operations.
The document reading unit 302 irradiates a document placed on a placing table with light from a light source and collects the reflected light on a CCD by an optical system to obtain image data (electronic data).
The image forming unit 303 is arranged on the photosensitive drum according to a photosensitive drum and a charging device for charging the photosensitive drum, image data obtained by the document reading unit 302 and a print job obtained from an external host device via the communication unit 304. A laser scanning device for writing an electrostatic latent image, a developing device for developing the electrostatic latent image as a toner image, a transfer device for transferring the toner image on the photosensitive member to paper, and fixing an unfixed toner image transferred to the paper It consists of a fixing device or the like and forms an image on a sheet.
The communication unit 304 controls communication with an external host device such as a personal computer.
The image processing unit 305 performs image processing on a print job received from an external host device or a document image read by the document reading unit 302.
The image memory 306 is a storage unit that stores image data to be processed by the image processing unit 305.
The paper feeding device 307 accommodates paper and supplies the paper to the image forming unit 303 when image formation is performed.
The program memory 308 is a storage unit that stores a control program executed by the control unit 300.
The zero-cross signal output circuit X (zero-cross signal output device) sends a zero-cross signal to the controller 300 (CPU) based on an output signal (hereinafter referred to as an AC signal) of an AC power source supplied from the outside. Output.
The control unit 300 (control unit) performs interruption processing using the zero cross signal output from the zero cross signal output circuit X, thereby monitoring power failure and supplying the heater of the fixing device provided in the image forming unit 303 to the heater. Phase control for controlling electric power, detection of the frequency (50 Hz / 60 Hz) of the AC power source, and the like are performed.

Next, the zero cross signal output circuit X will be described using the circuit diagram of the zero cross signal output circuit X shown in FIG. 2 and the AC signal and the voltage waveform of the zero cross signal in the zero cross signal output circuit X shown in FIG. To do. The zero-cross signal output circuit X outputs the zero-cross signal FW based on an output signal (hereinafter referred to as an AC signal) of the AC power supply PW.
The zero-cross signal output circuit X includes a half-wave shaping circuit 1 that performs half-wave shaping by inputting an output signal (AC signal) of the AC power supply PW to a comparator CP (comparator). Each of the two signal lines of the AC signal is input to the comparator CP and compared. As a result, the AC signal (the signal at the position P1) shown in FIG. 3A is half-wave shaped as shown in FIG. 3B (the signal at the position P2, hereinafter referred to as a half-wave shaped signal). Output from the comparator CP.
Here, the comparator CP in the half-wave shaping circuit 1 is configured to differentially input the output signal of the AC power supply PW. In the configuration shown in FIG. 2, the signals of the two signal output lines of the AC power supply PW are divided by the resistance elements R1 and R2, R3 and R4, respectively, and input to the comparator CP. Here, the resistance elements R1 and R3, R2 and R4 have the same resistance value, and are input to the comparator CP at the same voltage dividing ratio.
Thus, even if common mode noise occurs in the AC power supply PW, it is canceled out by the differential input, so that the influence of the common mode noise can be removed from the zero cross signal. Here, the comparator CP and the resistance elements R1 to R4 are the half-wave shaping circuit 1 (an example of the half-wave shaping signal generating means).

Further, the zero-cross signal output circuit X includes a delay circuit 2 (an example of the delay unit) that delays the half-wave shaping signal that is the output of the comparator CP using a resistor element R5, a capacitor C1, and a buffer B1. ing. Here, the delay is performed using the capacitor C1, but a delay circuit that performs the delay using the inductance may be used. 3C is an enlarged view of the half-wave shaping signal (the signal at the position P2) before being delayed by the delay circuit 2, and FIG. 3D is a view before being delayed by the delay circuit 2. FIG. It is an enlarged view of the half-wave shaping signal (signal at the position of P2).
Here, when voltage fluctuation due to noise occurs in the AC signal, as shown by a broken line in FIG. 3C, a rising edge portion of the half-wave shaping signal (P2 signal) before being delayed by the delay circuit 2 And a noise pulse is generated at each falling edge.
On the other hand, as shown in FIG. 3D, the noise pulse is removed from the half-wave shaping signal delayed by the delay circuit 2. This is because the noise pulse component is absorbed and removed by the action of the capacitor C1.
Here, the delay time by the delay circuit 2 is determined by the capacitances of the capacitor C1 and the buffer B1, but is set to a time t2 longer than the generation period t1 of the noise pulse generated in the half-wave shaping signal. For example, setting to about 1 millisecond is conceivable.
As a result, it is possible to reliably prevent the generation of noise pulses in the half-wave shaping signal after being delayed by the delay circuit 2.

Further, the zero-cross signal output circuit X inputs each signal before and after the half-wave shaping signal is delayed by the delay circuit 2, and generates an exclusive OR signal of each signal by the XOR detection element (circuit) 3. A signal output circuit 5 (an example of the zero cross signal output means) that outputs a zero cross signal FW based on the exclusive OR signal is provided.
Here, the signal shown in FIG. 3E is the output signal of the XOR detection element 3 (the exclusive OR signal).
As shown in FIG. 3E, in the exclusive OR signal (the signal at the position of P4), in the case of positive logic, the rising edge portion eg1 of the signal has an influence of the half-wave shaping signal before the delay. However, no noise pulse occurs at the falling edge portion eg2 of the signal. Moreover, as shown in FIG. 3 (e), a zero-cross signal can be obtained for each half cycle of the AC signal.
By inputting the zero-cross signal shown in FIG. 3E to the control unit 300 and executing the interrupt process at the falling edge, the malfunction of the interrupt process due to the fluctuation of the power supply voltage can be prevented.
Similarly, in the case of negative logic (Low level output at zero crossing), a noise pulse does not occur at the rising edge portion of the exclusive OR signal, contrary to FIG. When this signal is used, the control unit 300 may execute interrupt processing with a rising edge.

Here, it is conceivable that the output signal of the XOR detection element 3 is used as it is as a zero cross signal. However, in order to insulate the primary power supply system and the secondary system input to the control unit 300 normally, A photocoupler is used.
The signal output circuit 5 (zero-cross signal output means) included in the zero-cross signal output circuit X also inputs the exclusive OR signal to the transistor TR1, and includes a photodiode D1 constituting the photocoupler PC by a signal flowing through the transistor TR1. It has a photocoupler circuit 4 that emits light and operates the phototransistor TR2 that also constitutes the photocoupler PC by the light. Thus, the signal flowing through the phototransistor TR2 (secondary side of the photocoupler) is output as a zero cross signal FW (an example of the photocoupler output means).
Here, a constant current diode D2 for limiting the maximum current of the signal (in the path of the current limiting means) in the path of the signal flowing to the primary side of the photocoupler PC (that is, the signal flowing to the photodiode D1). An example) is provided.
In general, a resistance element is provided in the signal path (position of the low current diode D2 in FIG. 2) of the signal flowing on the primary side of the photocoupler. However, in this case, if each voltage on the primary side (VCC or the like) rises due to voltage fluctuation of the AC power supply PW, an excessive current flows through the photocoupler PC.
However, according to the configuration shown in FIG. 2, since the current flowing through the photocoupler PC is limited, the stable operation of the photocoupler PC (that is, stabilization of the zero-cross signal FW on the secondary side) and the suppression of power consumption. Can be planned.

By the way, a configuration in which a half-wave shaping circuit 1 ′ in which a part of the half-wave shaping circuit 1 (the portion indicated by a broken line in FIG. 2) is replaced with another configuration (the portion indicated by a one-dot chain line in FIG. 2) is also considered. It is done.
That is, as shown in a line frame at one point in FIG. 2, the half-wave shaping circuit 1 ′ (an example of the half-wave shaping signal generating means) is configured such that the output signal (the signal at the position of P2) has a resistance element R6 and a capacitor. The AC signal (the output signal of the AC power supply PW) is input to the comparator CP (comparator) positively fed back via C2, and the output signal (the signal at the position of P2) is used as the half-wave shaping signal. Is.
Thereby, on the input side of the comparator CP, the input voltage is temporarily shifted to the positive voltage side when a zero cross from the negative voltage to the positive voltage occurs, and conversely, when the zero cross from the positive voltage to the negative voltage occurs, Thus, the input voltage is shifted to the negative voltage side. By obtaining such hysteresis characteristics, it is possible to suppress the generation of noise pulses in the output signal of the comparator CP when the AC signal is zero-crossed. This makes it possible to obtain a more stable zero-cross signal (less influenced by noise).

  The present invention is applicable to a zero cross signal output device.

1 is a block diagram illustrating a schematic configuration of an image processing device Z including a zero-cross signal output circuit X according to an embodiment of the present invention. FIG. 3 is a circuit diagram of a zero cross signal output circuit X. The figure showing the voltage waveform of the alternating current signal in the zero cross signal output circuit X, and a zero cross signal. The figure showing the voltage waveform of the alternating current signal in the conventional zero cross signal output circuit A, and a zero cross signal.

Explanation of symbols

1, 1 '... half wave shaping circuit (half wave shaping signal generating means)
2 ... Delay circuit (delay means)
3 ... XOR detection element 4 ... Photocoupler circuit (photocoupler output means)
5. Signal output circuit (zero cross signal output means)
X ... Zero cross signal output circuit (device)
Z: Image processing device PW: AC power supply R1, R2,... Resistance elements C1, C2 ... Capacitors D1, D2 ... Diodes TR1, TR2 ... Transistor B1 ... Buffer CP ... Comparator (comparator)
PC ... Photocoupler

Claims (6)

In the zero cross signal output device that outputs the zero cross signal based on the output signal of the AC power supply,
Half-wave shaping signal generating means for generating the half-wave shaping signal based on the output signal of the AC power supply;
Delay means for delaying the half-wave shaped signal;
Zero cross signal output means for generating an exclusive OR signal of each signal before and after delaying the half wave shaping signal by the delay means, and outputting a zero cross signal based on the exclusive OR signal;
A zero-cross signal output device comprising:   The zero cross signal output device according to claim 1, wherein a delay time by the delay means is set longer than a generation period of a noise pulse generated in the half-wave shaping signal. The zero cross signal output means comprises:
Photocoupler output means for outputting the zero-cross signal via a photocoupler based on the exclusive OR signal;
Current limiting means for limiting the maximum current of the signal flowing on the primary side of the photocoupler;
The zero cross signal output device according to claim 1 or 2 comprising.   The zero-crossing signal according to any one of claims 1 to 3, wherein the half-wave shaping signal generating means differentially inputs an output signal of the AC power supply to a comparator and uses the output signal as the half-wave shaping signal. Signal output device.   The half-wave shaping signal generating means inputs the output signal of the AC power supply to a comparator whose output signal is positively fed back through a resistance element and a capacitor, and uses the output signal as the half-wave shaping signal. The zero cross signal output apparatus in any one of Claims 1-4.   6. An image processing apparatus comprising: the zero-cross signal output device according to claim 1; and a control unit that performs an interrupt process using the zero-cross signal output thereby.

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