JP2005276999A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having the metal-insulating film-semiconductor (MIS) structure, consisting of an epitaxial wafer having a hexagonal system semiconductor region with superior characteristics, by improving the insulation breakdown characteristic of a gate insulation film formed on the hexagonal system semiconductor region. <P>SOLUTION: The semiconductor device has the metal-insulating film-semiconductor (MIS) structure, consisting of an epitaxial wafer having the hexagonal system semiconductor region with excellent properties, by improving the insulating breakdown characteristics of the gate insulating film formed on the hexagonal system semiconductor region. Further, the device has the metal-insulating film semiconductor (MIS) structure on the epitaxial wafer having the hexagonal system semiconductor region, wherein in-plane dislocation density is 1,000/cm<SP>2</SP>or lower and a density of dislocations including in-plane dislocation is 10,000/cm2 or lower, and has the hexagonal system semiconductor region, having a total number of dislocations of 10 or smaller within a region wherein the gate insulation film is formed. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to a semiconductor device manufactured on an epitaxial wafer having a hexagonal semiconductor region, and more particularly to a semiconductor device (field effect transistor (MISFET)) having a metal-insulating film-semiconductor (MIS) structure and a manufacturing method thereof. The present invention relates to a semiconductor device using silicon carbide which is a typical semiconductor among hexagonal semiconductors.

Silicon carbide has excellent physical properties compared to silicon, such as (1) a wide band gap, (2) a high dielectric breakdown strength, and (3) a high saturation drift velocity of electrons. Therefore, by using silicon carbide as a substrate material, a power semiconductor element having a high breakdown voltage and a low resistance exceeding the limit of silicon can be produced.
In addition, silicon carbide is characterized in that silicon oxide, which is an insulator, can be formed by thermal oxidation as in the case of silicon. For these reasons, it is considered that a high withstand voltage and low on-resistance MISFET using silicon carbide as a substrate material can be realized, and many researches and developments have been conducted.

However, to realize a MISFET using silicon carbide as a substrate material, excellent long-term reliability of silicon oxide used as a gate insulating film must be ensured.
The dielectric breakdown charge total amount (Q _BD ) is widely used as an index of long-term reliability of silicon oxide films. This value indicates the total amount of electric charge that has flowed through the silicon oxide film until the silicon oxide film reaches dielectric breakdown.
However, Q _BD when 50% of the formed by thermal oxidation of silicon carbide on a substrate a silicon oxide film dielectric breakdown is several to several tens mC / cm ² at room temperature, this value is on the silicon substrate It has been reported that it is 1/10 to 1/100 smaller than a silicon oxide film formed by a thermal oxidation method (see, for example, Non-Patent Document 1), which has a serious problem.
CJ Anthony [Materials Science and Engineering B61-62, 460 (1999)]

  In view of the conventional problems, the present invention improves the dielectric breakdown characteristics of a gate insulating film formed on a hexagonal semiconductor region, and comprises a metal-insulation comprising an epitaxial wafer having a hexagonal semiconductor region having excellent characteristics. An object is to obtain a semiconductor device having a film-semiconductor (MIS) structure.

The present invention is effective in improving the withstand voltage and long-term reliability of the gate insulating film by forming the gate insulating film on the epitaxial wafer having a hexagonal semiconductor region having a low dislocation density contained in the wafer. I got the knowledge.
The present invention has been made based on this finding, and the semiconductor device according to the present invention is an epitaxial wafer having a hexagonal semiconductor region having an in-plane dislocation density of 1000 / cm ² or less. And
The semiconductor device according to the present invention is an epitaxial wafer having a hexagonal semiconductor region having a dislocation density including in-plane dislocations of 10,000 or less per cm ² .

The epitaxial wafer is a hexagonal semiconductor region having a metal-insulating film-semiconductor (MIS) structure and having a total number of dislocations of 10 or less in a region where a gate insulating film is formed. To do.
The dislocation is one or more of a screw dislocation, an edge dislocation, and an in-plane dislocation.

The gate insulating film is made of silicon oxide, silicon nitride, silicon oxynitride, aluminum nitride, zirconium oxide, or hafnium oxide.
In the MIS structure in the semiconductor device, the gate insulating film is formed in a portion in contact with the hexagonal semiconductor region, or one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film is formed on the gate insulating film, or It is a composite film having two or more.

The semiconductor device of the present invention includes a DMOSFET, a lateral resurf MOSFET, or a UMOSFET.
The hexagonal semiconductor used in the semiconductor device is silicon carbide or gallium nitride.
Further, the plane orientation of the hexagonal semiconductor is the following [Formula 3], and the off-angle is 0 ° to 8 °.

The MIS structure of a semiconductor device is usually formed on a semiconductor layer that is epitaxially grown on a semiconductor substrate. A method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device using an epitaxial wafer having a hexagonal semiconductor layer epitaxially grown on the uppermost layer, and the in-plane dislocation density is 1000 pieces / cm ² or less during epitaxial growth. As described above, the hexagonal semiconductor layer is epitaxially grown.

The semiconductor device manufacturing method according to the present invention is characterized in that the hexagonal semiconductor layer is epitaxially grown so that the dislocation density including the in-plane dislocations is 10,000 / cm ² or less.
A method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device in which a gate insulating film having a metal-insulating film-semiconductor (MIS) structure is formed on a hexagonal semiconductor region, and the gate insulating film is formed. The total number of the dislocations is 10 or less in the region formed.
In the semiconductor device manufacturing method, the dislocation is one or more of a screw dislocation, an edge dislocation, and an in-plane dislocation.

The gate insulating film is made of silicon oxide, silicon nitride, silicon oxynitride, aluminum nitride, zirconium oxide, or hafnium oxide.
In the MIS structure in the method for manufacturing a semiconductor device, the gate insulating film is formed at a portion in contact with the hexagonal semiconductor region, or any one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film is formed on the gate insulating film. It is characterized by being a composite film having 1 or 2 or more.

The hexagonal semiconductor used in the method for manufacturing a semiconductor device is silicon carbide or gallium nitride.
Further, the hexagonal semiconductor has a plane orientation represented by the following [Equation 4] and an off angle of 0 ° to 8 °.

  The present invention improves the dielectric breakdown characteristics of a gate insulating film formed on a hexagonal semiconductor region, and obtains a semiconductor device having a metal-insulating film-semiconductor (MIS) structure made of an epitaxial wafer having long-term reliability. It has the excellent effect that it becomes possible.

  As described above, a semiconductor device having a metal-insulating film-semiconductor (MIS) structure has a gate insulating film formed on a hexagonal semiconductor region having a low dislocation density contained in an epitaxial wafer. This significantly improves the dielectric strength and long-term reliability of the film, which is a major feature of the present invention.

Dislocations include screw dislocations, edge dislocations, and in-plane dislocations, which occur during the growth of bulk and epitaxial films of hexagonal semiconductors, and the total number of these three types of dislocation densities is 10,000 / cm ^2. If the density of in-plane dislocations exceeds 1000 / cm ² , it can be seen that this is a major cause of damage to the dielectric strength and long-term reliability of the gate insulating film formed on the epitaxial wafer. It was.
That is, when the above-mentioned dislocations, particularly in-plane dislocations, are generated in an epitaxial wafer having a hexagonal semiconductor region, microroughness occurs at the gate insulating film / hexagonal semiconductor interface formed on the dislocations. This is because the change of the internal electric field of the gate insulating film is locally accelerated at the portion (weak spot), and the dielectric breakdown lifetime is reduced.

For this reason, it is extremely important to reduce dislocations, particularly in-plane dislocations. Such knowledge was first recognized by the present inventors. Further, in the hexagonal semiconductor region having a metal-insulating film-semiconductor (MIS) structure, the total number of dislocations is preferably 10 or less in the region where the gate insulating film is formed.
The present invention uses an epitaxial wafer having a hexagonal semiconductor region with a small number of dislocations, particularly in-plane dislocations, as a starting material, and forms a gate insulating film in a portion in contact with the hexagonal semiconductor region, thereby providing a semiconductor device. Constitute.

In addition, any one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film, or two or more of these films can be formed over the gate insulating film. These single-layer or multi-layer films can be obtained by chemical vapor deposition and / or thermal oxidation of a silicon nitride film by chemical vapor deposition.
According to the present invention, an epitaxial wafer having a hexagonal semiconductor region having excellent characteristics can be used, and a semiconductor device having a gate insulating film having high withstand voltage and long-term reliability can be manufactured.
These semiconductor devices having the MIS structure can be used as DMOSFET, Lateral Resurf MOSFET, and UMOSFET semiconductor devices.

Embodiments of the present invention will be described below with reference to the drawings.
First, a silicon carbide substrate in which 4H—SiC was homoepitaxially grown on a bulk substrate having a surface off by 8 ° from the (0001) Si plane was used as the substrate.
As shown in FIG. 1, a thick insulating film 2 was formed on a silicon carbide substrate 1, a window was opened in this, and after normal RCA cleaning, a sacrificial oxide film was formed and removed with hydrofluoric acid. Next, a silicon oxide film 3 having a thickness of 50 nm was formed on the silicon carbide substrate in an oxygen atmosphere at an atmospheric pressure of 1000 ° C. or higher.

Thereafter, the sample was heat-treated at a temperature of 1000 ° C. or higher in nitrogen gas at a flow rate of 1 liter / min. Finally, Al was used to form an Al electrode 4 and an ohmic electrode 5 in ohmic contact with the substrate on the silicon oxide film 3 to produce a MOS capacitor.
This sample was connected to the TDDB measuring device 6 and the insulation film breakdown (TDDB) measurement was performed in a vacuumed metal measuring chamber with light blocked.

In the TDDB measurement, as shown in FIG. 1, an electric field is applied between the Al electrode 4 and the ohmic electrode 5 of the MOS capacitor, and the leakage current flowing in the insulating film until the gate insulating film (silicon oxide film 3) is destroyed. Was observed. Q _BD was derived by integrating the leakage current up to dielectric breakdown.
After complete breakdown of the gate insulating film 3 by TDDB measurement, the sample removes the Al electrode 4 and the ohmic electrode 5 with phosphoric acid, and then removes the gate insulating film 3 and the thick insulating film 4 with hydrofluoric acid. As a process, the silicon carbide surface layer was etched by dipping in a heated molten KOH etching solution to expose the surface on which dislocations were formed.

As a result of observing dislocations formed on the silicon carbide surface layer using an optical microscope, the samples after the molten KOH etching were classified into three types based on their shapes and sizes. They are screw dislocations, edge dislocations, and in-plane dislocations.
FIG. 2 shows a correlation diagram between the Q _BD value obtained from TDDB measurement (stress electric field E = 9 MV / cm) and the number of dislocations generated in one gate insulating film region.

This figure shows that the Q _BD value of the MOS capacitor correlates with the number of dislocations occurring in the gate insulating film region, and the Q _BD value of the MOS capacitor decreases as the number of dislocations increases. . This is because, as the number of dislocations in the gate insulating film region increases, the probability of generating a weak spot that causes dielectric breakdown of the gate insulating film increases, and therefore the reliability of the gate insulating film decreases.

FIG. 3 shows an optical microscope observation image of the MOS capacitor in which the dielectric breakdown of the gate insulating film is caused by typical in-plane dislocation.
In this figure, gate insulation is selectively gate-insulated in the in-plane dislocations 9 despite the presence of many screw dislocations 10 and edge dislocations 11 in the gate insulating film formation region 7 in excess of the number of in-plane dislocations 9. It was confirmed that dielectric breakdown 8 occurred in the film.
On the other hand, it was confirmed that in most MOS capacitors having dielectric breakdown due to the screw dislocations 10 or the edge dislocations 11, the in-plane dislocations 9 do not exist in the gate insulating film formation region.

For all the MOS capacitors used for the TDDB measurement, the result of identifying the type of dislocation that caused the dielectric breakdown of the gate insulating film by optical microscope observation is shown in FIG. And a pie chart of the MOS capacitor 13 with dielectric breakdown caused by screw dislocations or edge dislocations.
As shown in FIG. 4, it can be seen that the dielectric breakdown of the gate insulating film is caused by in-plane dislocations in 70% or more of MOS capacitors.

From the above, the first factor causing the dielectric breakdown of the gate insulating film formed on the silicon carbide substrate by the thermal oxidation method is that in-plane dislocations are taken into the gate insulating film forming region. Further, the total number of dislocations included in the gate insulating film formation region is important as a second factor.

In general, it is known that the _QBD value of a gate insulating film made of a silicon oxide film formed on a silicon semiconductor having high reliability characteristics must be at least 1 C / cm ² . Therefore, the gate insulating film formed on the silicon carbide semiconductor also needs to have a _QBD value of 1 C / cm ² or more.
In this embodiment, in order to guarantee a _QBD value of 1 C / cm ² or more, it is understood from FIG. 2 that the number of dislocations included in the region where the gate insulating film is formed must be 10 or less. it can. As a result of calculating the dislocation density on the silicon carbide epitaxial wafer to achieve this condition using the area of the gate insulating film formation region of the MOS capacitor formed on the sample used for the measurement, 10000 / cm It turns out that it must be ² or less.

In addition, regarding the in-plane dislocations on the silicon carbide epitaxial wafer, in this embodiment, in order to achieve high gate insulating film reliability, the gate insulating film should not be taken into the gate insulating film formation region. Need to form.
As a result of analyzing the in-plane dislocation density for realizing this in the same manner as the calculation of the dislocation density described above, the in-plane dislocation density on the silicon carbide epitaxial wafer should be 1000 pieces / cm ² or less. I found it.

In this embodiment, the case where a silicon oxide film is formed on a silicon carbide substrate by thermal oxidation has been described. However, a gate insulating film is formed on a portion in contact with another hexagonal semiconductor region, and further on that. The same tendency as in the above example was also observed when any one or a plurality of silicon oxide films, silicon nitride films, silicon oxynitride films were formed.

A metal-insulator-semiconductor (MIS) structure consisting of an epitaxial wafer with a hexagonal semiconductor region that improves the breakdown characteristics of the gate insulating film formed on the hexagonal semiconductor region and improves long-term reliability. This is useful as a semiconductor device.

It is a cross-sectional schematic diagram of the MOS capacitor used for TDDB measurement. FIG. 5 is a correlation diagram between a Q _BD value obtained from TDDB measurement (stress electric field E = 9 MV / cm) and the number of dislocations generated in one gate insulating film region. It is a figure which shows the optical microscope observation image of the MOS capacitor which produced the dielectric breakdown of the gate insulating film by typical in-plane dislocation. It is a figure which shows the ratio of the MOS capacitor which carried out the dielectric breakdown by the in-plane dislocation, and the MOS capacitor which carried out the dielectric breakdown by the screw dislocation or the edge dislocation.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Silicon carbide substrate 2 Insulating film 3 Silicon oxide film 4 Al electrode 5 Ohmic electrode 6 TDDB measuring device 7 In the gate insulating film formation area 8 Insulation breakdown 9 In-plane dislocation 10 Spiral dislocation 11 Edge dislocation 12 Insulated breakdown by in-plane dislocation MOS capacitor 13 MOS capacitor with dielectric breakdown caused by screw dislocation or edge dislocation

Claims (17)

A semiconductor device comprising an epitaxial wafer having a hexagonal semiconductor region having an in-plane dislocation density of 1000 / cm ² or less. 2. The semiconductor device according to claim 1, wherein the semiconductor device is an epitaxial wafer having a hexagonal semiconductor region having a dislocation density of 10,000 / cm ² or less. 3. The semiconductor device according to claim 1, wherein the semiconductor device has a metal-insulating film-semiconductor (MIS) structure, and a total number of dislocations is 10 or less in a region where a gate insulating film is formed. A semiconductor device comprising an epitaxial wafer having a hexagonal semiconductor region. 4. The semiconductor device according to claim 1, wherein the dislocation is any one or more of a screw dislocation, an edge dislocation, and an in-plane dislocation. 5. 5. The semiconductor device according to claim 3, wherein the gate insulating film is silicon oxide, silicon nitride, silicon oxynitride, aluminum nitride, zirconium oxide, or hafnium oxide. 6. The semiconductor device according to claim 3, wherein the gate insulating film is formed at a portion in contact with the hexagonal semiconductor region, or a silicon oxide film, a silicon nitride film, an acid is formed on the gate insulating film. A semiconductor device comprising a composite film having one or more of silicon nitride films. 7. The semiconductor device according to claim 6, wherein the semiconductor device is a DMOSFET, a Lateral Resurf MOSFET, or a UMOSFET. 8. The semiconductor device according to claim 1, wherein the hexagonal semiconductor is silicon carbide or gallium nitride. 9. The semiconductor device according to claim 1, wherein the hexagonal semiconductor has a plane orientation of the following [Equation 1] and an off angle of 0 ° to 8 °. apparatus.
A method of manufacturing a semiconductor device using an epitaxial wafer having a hexagonal semiconductor layer epitaxially grown on the top layer, wherein the hexagonal semiconductor layer is epitaxially grown so that the in-plane dislocation density is 1000 pieces / cm ² or less during epitaxial growth. A method for manufacturing a semiconductor device, comprising: 11. The method of manufacturing a semiconductor device according to claim 10, wherein the hexagonal semiconductor layer is epitaxially grown so that a dislocation density is 10,000 / cm ² or less during epitaxial growth. 12. The method of manufacturing a semiconductor device according to claim 10, wherein the gate insulating film is formed in a hexagonal semiconductor region so that the total number of dislocations in the region where the gate insulating film is formed is 10 or less. A method of manufacturing a semiconductor device. 13. The method for manufacturing a semiconductor device according to claim 10, wherein the dislocation is one or more of a screw dislocation, an edge dislocation, and an in-plane dislocation. Method. 14. The method of manufacturing a semiconductor device according to claim 12, wherein the gate insulating film is silicon oxide, silicon nitride, silicon oxynitride, aluminum nitride, zirconium oxide, or hafnium oxide. Production method. 15. The method of manufacturing a semiconductor device according to claim 12, wherein after the gate insulating film is formed, a silicon oxide film by a chemical vapor deposition method, a silicon nitride film by a chemical vapor deposition method, or a chemical vapor deposition method is formed. One or more silicon oxynitride films formed by thermally oxidizing a silicon nitride film by a method are formed. 16. The method of manufacturing a semiconductor device according to claim 10, wherein the hexagonal semiconductor is silicon carbide or gallium nitride. 17. The method of manufacturing a semiconductor device according to claim 10, wherein a plane orientation of the hexagonal semiconductor is the following number [2], and an off angle is 0 ° to 8 °. A method of manufacturing a semiconductor device.